TWI543517B - Digital frequency conversion voltage converter - Google Patents

Description

Digital variable frequency voltage converter

The present invention relates to a voltage converter, and more particularly to a digital variable frequency voltage converter.

Please refer to "Figure 1A" and "Figure 1B" for the basic architecture of the Buck Converter. When the switch 1 is turned on, an input terminal Vi charges an inductor 2 and a capacitor 3. An output terminal Vo exhibits a charging voltage result of the capacitor 3; and when the switch 1 is disconnected as in the state of "FIG. 1B", the capacitor 3 begins to discharge and passes through a diode 4 and the Inductor 2 forms a new circuit. Please refer to "Figure 2". The conduction state of the switch 1 is controlled by Pulse Width Modulation (PWM), thereby adjusting the output terminal Vo. The magnitude of the voltage value, in other words, the length of the on-time of the switch 1 can be controlled by controlling the duty cycle (Duty Cycle) of the pulse wave. With the above basic structure, the high voltage of the input terminal Vi can be stably outputted to a lower output voltage.

However, the PWM signal changes as the load changes to stabilize the output voltage. When the load is fixed, the circuit may also affect the output voltage due to component errors caused by PWM jitter. Furthermore, the circuit uses inductors and capacitors to form a second-order low-pass filter. If the pole and zero of the equivalent series resistance of the capacitor are considered, the system is unstable, so a compensation circuit must be designed to stabilize the system loop.

Therefore, how to choose the best switching time has become the goal of circuit design researchers, such as S. Cliquennois et al. in IEEE J. Solid-State Circuits, vol. 47, no. 7, pp. 1546–1556, Jul. 2012, "A 65-nm, 1-A buck converter with multi-function SAR-ADC-based CCM/PSK digital control loop," and, as X. Zhang et al. at IEEE J. Solid-State Circuits , vol. 49, no. 11, pp. 2377-2386, Nov. 2014, "A 0.6V Input CCM/DCM Operating Digital Buck Converter in 40nm CMOS," as well as C.-H. Tsai et al. Power Electronics, IEEE Transactions on, vol. 29, no. 4, pp. 1830–1839, 2014, “Digitally controlled switching converter with automatic multimode switching,” has revealed its mechanism for automatically adjusting the pulse width to match Load and output voltage for optimal adjustment.

In the above prior art, the switching time is adjusted in such a manner that the duty ratio of the pulse wave is controlled in a state where the frequency is fixed, and an optimum switching efficiency is sought. However, the switching time adjustment includes the frequency and the on-period. If only the automatic adjustment of the on-period is sought, it can only be applied to a specific circuit load system. In addition, there are known techniques that only control the frequency of the pulse wave for optimal efficiency adjustment. However, regardless of which of the above methods, only a single variable can be considered, and whether the efficiency is optimized or not is still negotiable.

The main object of the present invention is to solve the problem that the conventional technique can adjust the switching time of the voltage converter only by considering a single variable of the duty ratio or the pulse frequency, and cannot comprehensively adjust.

To achieve the above objective, the present invention provides a digital variable frequency voltage converter that stably converts an input voltage of an input voltage terminal into an output voltage, and the digital variable frequency voltage converter includes a switch electrically connected to the input voltage terminal. The switching unit, a charge and discharge stable output unit, a digital pulse wave generating unit, a feedback voltage control unit, and a frequency output selecting unit.

The switch switching unit includes a switching input terminal connected to the input voltage terminal, a control terminal and a switching output terminal, and the control terminal controls a conduction state of the switching input terminal and the switching output terminal; the charging and discharging stable output unit is electrically connected to The switch switching unit includes an output voltage terminal, the charge and discharge stable output unit is charged and discharged by the input voltage according to the switching of the switch switching unit, and the output voltage is stably outputted at the output voltage end; the digit The pulse wave generating unit is electrically connected to the control end, and generates a digital pulse wave signal to the control end to control a conduction state between the switching input end and the switching output end; the feedback voltage control unit is electrically connected to the control end An output voltage terminal and the digital pulse wave generating unit, and controlling a duty ratio of the digital pulse signal by feedback of the output voltage; the frequency output selecting unit is electrically connected to the input voltage terminal and the digital pulse wave is generated a unit, and providing the digital pulse wave generating unit complex frequency signal to control the output frequency of the digital pulse wave signal , By a current and the input voltage of the feedback terminal to select the best value of the frequency signal.

As can be seen from the above description, the present invention has the following features:

1. The feedback voltage control unit and the frequency output selection unit respectively confirm and adjust the duty ratio and the pulse wave frequency to optimize, reduce system loss, and improve conversion efficiency.

Second, by optimizing the pulse frequency selection and adjusting the duty cycle, the problem of poor applicability of different loads and outputs can be reduced, which is suitable for use.

The detailed description and technical content of the present invention will now be described as follows:

Please refer to "Figure 3" and "Figure 6". The present invention is a digital variable frequency voltage converter which stably converts an input voltage of an input voltage terminal 10 into an output voltage, and the digital frequency conversion type The voltage converter includes a switch switching unit 20 electrically connected to the input voltage terminal 10, a charge and discharge stable output unit 30, a digital pulse wave generating unit 40, a feedback voltage control unit 50, and a frequency output selecting unit 60.

In the present embodiment, the buck converter is used as an illustration. The switch switching unit 20 includes a switching input terminal 21 connected to the input voltage terminal 10, a control terminal 22, and a switching output terminal 23. The control terminal 22 controls the In the present embodiment, the switch switching unit 20 is an NMOS transistor, and the switch input terminal 21, the control terminal 22, and the switch output terminal 23 are respectively The drain, gate and source of the NMOS transistor.

The charge and discharge stable output unit 30 is electrically connected to the switching output terminal 23 and includes an output voltage terminal 31. The charge and discharge stable output unit 30 receives the input voltage for charging, and discharges when the switch switching unit 20 is turned off. So that the output voltage terminal 31 provides the output voltage of the stable output. In this embodiment, the charge and discharge stable output unit 30 includes a unidirectional conduction module 32 electrically connected to the switching output terminal 23 and grounded, and two ends electrically connected to the switching output terminal 23 and the output respectively. The inductor 33 of the voltage terminal 31, and a capacitor 34 electrically connected to the inductor 33 adjacent to the output voltage terminal 31 and grounded, the unidirectional conduction module 32 can be a PN diode, an NMOS or a PMOS transistor, and Preferably, the NMOS transistor is selected and controlled in a saturation mode to reduce the problem of the turn-on voltage difference.

The digital pulse wave generating unit 40 is electrically connected to the control terminal 22, and generates a digital pulse wave signal to the control terminal 22 to control the conduction state of the input voltage terminal 10 to the charge and discharge stable output unit 30, in other words By controlling the duty ratio and the frequency of the digital pulse signal, the switching time of the switching unit 20 can be controlled, and the output voltage of the charging and discharging stable output unit 30 can be controlled.

The feedback voltage control unit 50 is electrically connected to the output voltage terminal 31 and the digital pulse wave generating unit 40, and controls the duty ratio of the digital pulse signal by feedback of the output voltage. Further, the feedback voltage control unit 50 includes a reference voltage module 51, a comparison module 52 electrically connected to the reference voltage module 51 and the output voltage terminal 31, and an electrical connection to the comparison module. The group 52 and the duty cycle counting module 53 of the digital pulse wave generating unit 40, the comparison module 52 is compared with the reference voltage of the reference voltage module 51 by the output voltage, and is counted by the duty cycle. The module 53 controls the duty cycle of the digital pulse signal. In this embodiment, a suitable ratio of the resistor modules 54 is first designed to obtain different partial voltages of the high and low voltages, and then compared with the reference voltage of the reference voltage module 51 through the operational amplifier as the comparison module 52: When the two partial pressures are less than the reference voltage, the duty cycle counting module 53 controls the digital pulse wave generating unit 40 to increase the duty ratio of the digital pulse wave to increase the output voltage; if the two partial pressures are When the reference voltage is greater than the reference voltage, the duty cycle counting module 53 controls the digital pulse wave generating unit 40 to reduce the duty ratio of the digital pulse wave to reduce the output voltage; if the reference voltage is between the two partial voltages During the interval, the output voltage is within the set range, then the duty ratio of the digital pulse wave is maintained, and the duty ratio of the digital pulse signal has been determined to reach the preset output by the above determination manner. The range of voltages.

The frequency output selection unit 60 is electrically connected to the input voltage terminal 10 and the digital pulse wave generating unit 40, and provides the digital pulse wave generating unit 40 with a plurality of frequency signals to control the output frequency of the digital pulse signal. The current value fed back by the input voltage terminal 10 selects the best frequency signal. In the embodiment, the frequency output selection unit 60 includes a current sensing module 61 electrically connected to the input voltage terminal 10, and a current connection between the current sensing module 61 and the digital pulse wave generating unit 40. The frequency memory control module 62, the frequency memory control module 62 provides the frequency signals of the digital pulse wave generating unit 40 to control the output frequency of the digital pulse signal, and receive and match the current sensing module 61. The current values of the frequency signals are determined from the frequency signals and the best frequency signal is selected. The current sensing module 61 of FIG. 3 is connected in parallel to the input voltage terminal 10, and the current sensing module 61 of FIG. 6 is integrated in series with the main circuit of the input voltage terminal 10. In the structure, but the function is the same, unless otherwise stated.

Further, the frequency output selection unit 60 further includes an analog digital conversion module 63 electrically connected between the current sensing module 61 and the frequency memory control module 62. The analog digital conversion module 63 receives The current sensed by the voltage sensing module is converted into a digital current signal to the frequency memory control module 62 as a temporary memory of the frequency memory control module 62.

Furthermore, in the present invention, a quasi-shift unit 71 and a drive buffer unit 72 are further included, and the digital pulse wave generating unit 40 is electrically connected through the level shift unit 71 and the drive buffer unit 72. The control terminal 22 of the switch switching unit 20 is used to effectively improve circuit stability. It should be particularly noted that "FIG. 6" further discloses the preferred implementation circuit of the level shifting unit 71 and the driving buffer unit 72 of "FIG. 3", but is not limited to this implementation circuit, and in the present case, The module block represented by a square can be operated by a single-chip module such as 8051 in a program write manner, or a specific circuit can be designed to meet the functional requirements of each unit module.

The detailed operation of the present invention is as follows:

First, the frequency memory control module 62 outputs a first set of frequency signals, assuming 500 kHz, and thus the digital pulse wave generating unit 40 generates a set of digital pulse signals having a frequency of 500 kHz, and then passes through the level shifting unit. After the driving buffer unit 72 and the driving buffer unit 72, the switching operation of the switching unit 20 is controlled, thereby controlling the conduction time of the input voltage input to the charging and discharging stable output unit 30, and the charging and discharging stable output unit 30 is input by the input voltage. The capacitor 34 in the middle is charged, and discharges when the switch switching unit 20 is turned off, and the output voltage is generated.

Then, the feedback voltage control unit 50 further obtains two different partial voltages of the high and low voltages through the resistance module 54 , and compares the two partial voltages with the reference voltage provided by the reference voltage module 51 through the comparison module 52 . The size of the digital pulse wave is further controlled by the duty cycle counting module 53 to control the duty ratio of the digital pulse wave generating unit 40. The higher the duty ratio of the digital pulse wave, the longer the charging time, and thus the output voltage is In contrast, the lower the duty cycle of the digital pulse wave, the shorter the charging time, so the output voltage will be reduced, and the duty cycle adjustment will be repeated several times until the output voltage reaches a predetermined value and is stabilized. until. The detailed operation of the duty cycle counting module 53 has been described above, and the description will not be repeated here.

Then, when the system reaches a steady state, the frequency memory control module 62 records the load current under the first group of frequency signals through the current sensing module 61 and the analog digital conversion module 63. Then, the second group of frequency signals are tested. Similarly, the load current under the second group of frequency signals is recorded until the output voltage is stabilized. It should be particularly noted that, in this embodiment, a temporary storage comparison method is adopted. If the load current of the second group of frequency signals is smaller than the load current of the first group of frequency signals, the record of the first group of frequency signals is deleted. Only the second group of frequency signals are recorded, thereby reducing the memory space required for system temporary memory.

Finally, after multiple sets of frequency signal scanning and testing, a set of digital pulse signals with the best performance can be found. In this embodiment, a set of frequency signals with the lowest load current is selected as the best digital position. Pulse signal.

Please refer to "Figure 4" to find the lowest current in a specific range by using the frequency scanning method of the present invention under different current conditions (for example, 100 mA, 200 mA, and 300 mA) under different loads. The frequency represented, under the condition of fixed output voltage, the minimum output current represents the smallest power loss, which also represents the optimization of its circuit efficiency. As shown in Fig. 5, the fixed frequency system conversion efficiency 81 at a fixed frequency of 500 kHz is significant compared to the frequency sweep confirmation confirmed by the present invention, and the optimum frequency system conversion efficiency 82 after selecting the optimized frequency has an obvious The efficiency improvement, on average, can improve the efficiency by nearly 20%, and the system conversion efficiency is improved by about 35% when the load current is 100 mA. It is obvious that the present invention is quite advanced.

In addition, as shown in FIG. 7 , which is another embodiment of the present invention, which is a boost converter circuit, the input voltage terminal 10 is electrically connected to the inductor 90 . The switching input terminal 21a of the switch switching unit 20a, and the switching output terminal 23a of the switch switching unit 20a is grounded, and the charge and discharge stable output unit 30a further includes an electrical connection between the switching input terminal 21 and the output voltage terminal 31a. The unidirectional conduction module 32a is connected to the capacitor 34a electrically connected to the output voltage terminal 31a, and the other end of the capacitor 34a is grounded. The switch switching unit 20a is a PMOS transistor. With the above block structure, a voltage converter having a boost can be obtained, but the digital frequency conversion method is the same as the above-described step-down adjustment method, and the description thereof will not be repeated.

In summary, the present invention has the following features:

1. The feedback voltage control unit and the frequency output selection unit respectively confirm and adjust the duty ratio and the pulse wave frequency to optimize, reduce system loss, and improve conversion efficiency.

Second, by optimizing the pulse frequency selection and adjusting the duty cycle, the problem of poor applicability of different loads and outputs can be reduced, which is suitable for use.

Third, the use of the current sensing module with the analog digital conversion module to further digitize the circuit, and meet the needs of use.

Therefore, the present invention is highly progressive and conforms to the requirements of the invention patent application, and the application is filed according to law, and the praying office grants the patent as soon as possible.

Conventional technology
1‧‧‧ switch
Vi‧‧‧ input
2‧‧‧Inductance
3‧‧‧ Capacitance
Vo‧‧‧ output
4‧‧‧Diodes of the Invention
10‧‧‧Input voltage terminal
20, 20a‧‧ ‧ switch switching unit
21, 21a‧‧‧Switch input
22, 22a‧‧‧ control end
23, 23a‧‧‧Switching output
30, 30a‧‧‧Charge and discharge stable output unit
31, 31a‧‧‧ output voltage terminal
32, 32a‧‧‧ single guide module
33, 90‧‧‧Inductance
34, 34a‧‧‧ capacitor
40‧‧‧Digital Pulse Generation Unit
50‧‧‧Review voltage control unit
51‧‧‧reference voltage module
52‧‧‧Comparative Module
53‧‧‧Duty cycle counting module
54‧‧‧Resistance module
60‧‧‧frequency output selection unit
61‧‧‧ Current sensing module
62‧‧‧frequency memory control module
63‧‧‧ Analog Digital Converter Module
71‧‧‧ level shifting unit
72‧‧‧Drive buffer unit
81‧‧‧Frequency frequency system conversion efficiency
82‧‧‧Optimal frequency system conversion efficiency

1A-1B are schematic diagrams showing the operation of the basic architecture of the prior art. Figure 2 is a schematic diagram showing the duty cycle adjustment of the pulse width. FIG. 3 is a schematic structural view of a block of the present invention. FIG. 4 is a schematic diagram showing the result of the load signal corresponding to the frequency signal of the present invention. Figure 5 is a schematic diagram showing the results of conversion efficiency of the present invention. Figure 6 is a schematic view showing the use of the circuit of the present invention. FIG. 7 is a block diagram showing another embodiment of the present invention.

10‧‧‧Input voltage terminal

20‧‧‧Switching unit

21‧‧‧Switch input

22‧‧‧Control end

23‧‧‧Switching output

30‧‧‧Charge and discharge stable output unit

31‧‧‧Output voltage terminal

32‧‧‧One-way module

33‧‧‧Inductance

34‧‧‧ Capacitance

40‧‧‧Digital Pulse Generation Unit

50‧‧‧Review voltage control unit

51‧‧‧reference voltage module

52‧‧‧Comparative Module

53‧‧‧Duty cycle counting module

54‧‧‧Resistance module

60‧‧‧frequency output selection unit

61‧‧‧ Current sensing module

62‧‧‧frequency memory control module

63‧‧‧ Analog Digital Converter Module

71‧‧‧ level shifting unit

72‧‧‧Drive buffer unit

Claims (9)

A digital variable frequency voltage converter is characterized in that an input voltage of an input voltage terminal is stably converted and outputted into an output voltage, and the digital variable frequency voltage converter comprises: a switch switching unit electrically connected to the input voltage end, comprising a switching input terminal connected to the input voltage terminal, a control terminal and a switching output terminal, wherein the control terminal controls a conduction state of the switching input terminal and the switching output terminal; and a charging and discharging stable output unit electrically connected to the switching switching unit, The system includes an output voltage terminal, the charge and discharge stable output unit is charged and discharged by the input voltage according to the switching of the switch switching unit, and the output voltage is stably outputted at the output voltage end; a digital pulse wave generating unit for generating a digital pulse wave signal to the control terminal for controlling a conduction state of the switching input terminal and the switching output terminal; and electrically connecting the output voltage terminal and the digital pulse wave a feedback voltage control unit of the generating unit, which is controlled by feedback of the output voltage a duty ratio of the digital pulse signal; and a frequency output selection unit electrically connected to the input voltage terminal and the digital pulse wave generating unit, which provides the digital pulse wave generating unit complex frequency signal to control the digital pulse The output frequency of the wave signal, and the best value of the frequency signal is selected by the current value fed back by the input voltage terminal. The digital variable frequency voltage converter according to claim 1, wherein the switch switching unit is an NMOS transistor, and the switching input terminal, the control terminal and the switching output terminal are respectively 汲 of the NMOS transistor. Pole, gate and source. The digital variable frequency voltage converter of claim 1, wherein the charge and discharge stable output unit comprises a unidirectional conduction module electrically connected to the switching output end and grounded, and two ends are respectively electrically connected The switching output and the inductance of the output voltage terminal, and a capacitor electrically connected to the inductor adjacent to the output voltage terminal and grounded. The digital variable frequency voltage converter of claim 3, wherein the unidirectional conduction module is selected from any one of a PN diode, an NMOS, and a PMOS transistor. The digital variable frequency voltage converter of claim 1, wherein the input voltage terminal is electrically connected to the switching input end of the switch switching unit through an inductor, and the switching output end of the switch switching unit is grounded. The charge and discharge stable output unit further includes a unidirectional conduction module electrically connected between the switching input terminal and the output voltage terminal, and a capacitor electrically connected to the output voltage terminal, the other end of the capacitor being grounded . The digital variable frequency voltage converter of claim 1, wherein the feedback voltage control unit comprises a reference voltage module, a comparison module electrically connected to the reference voltage module and the output voltage terminal, and a comparison between the comparison module and the duty cycle counting module of the digital pulse wave generating unit, wherein the comparison module compares the output voltage with a reference voltage of the reference voltage module, and the duty is occupied by the duty The ratio counting module controls the duty ratio of the digital pulse signal. The digital frequency conversion type voltage converter of claim 1, wherein the frequency output selection unit comprises a current sensing module electrically connected to the input voltage terminal, and electrically connecting the current sensing module to the digital position a frequency memory control module of the pulse wave generating unit, the frequency memory control module provides the frequency signals of the digital pulse wave generating unit to control an output frequency of the digital pulse wave signal, and receive a pair of the current sensing module The current values of the frequency signals should be used to determine from the frequency signals and select the best frequency signal. The digital frequency conversion type voltage converter of claim 7, wherein the frequency output selection unit further comprises an analog digital conversion module electrically connected between the current sensing module and the frequency memory control module. The analog-to-digital conversion module receives the current value sensed by the voltage sensing module and converts it into a digital current signal to the frequency memory control module. The digital frequency conversion type voltage converter according to claim 1, wherein the digital pulse wave generating unit is electrically connected to the control end of the switch switching unit through a quasi-shift unit and a driving buffer unit. .