TWI541910B - Integrated circuit packaging system with package-in-package and method of manufacture thereof - Google Patents

Description

Integrated circuit package system with package inner package and manufacturing method thereof

The present invention is generally directed to integrated circuit packaging systems, and more particularly to systems for stacked devices.

The integrated circuit package is a building block used in high-performance electronic systems and is used to provide applications for products such as smart phones, pocket personal computers, smart portable military devices, and aviation. The payload of the aircraft and many other similar products that require compact electronics that support many complex functions.

Integrated circuits such as wafers or dies include circuitry designed to perform various functions in high performance electronic systems. Products with small size requirements and many complex functions rely on a limited size, limited number, and high input-output (IO) wired integrated circuit package.

The integrated circuit package may include a package substrate or a package substrate that provides an erect structure, at least one wafer or die is attached to the erection structure, and an outer shell such as an epoxy is attached to the wafer or the die to protect Its content.

The other side of the wafer or die (referred to as the active face of the die or die) has an electrically conductive region that provides an electrical connection to its circuitry. A connector comprising an electrically conductive material is attached to the electrically conductive region to provide an electrical connection between the circuitry of the wafer or die and circuitry of other different wafers or die.

This other circuitry can come from many possible sources. One possible source may be the presence of circuitry within the integrated circuit package, such as from another wafer, i.e., as a multi-wafer integrated circuit package. Another possible source may be circuitry present outside of the integrated circuit package, such as from a printed circuit board within the electronic system.

Yet another possible source may be circuitry from one or more separate integrated circuit packages having one or more wafers or semiconductor dice inside. The individual integrated circuit package can be connected to and surrounded by a conductor to form a single sealed package structure, or the external integrated circuit package can be externally connected to the single sealed package structure.

For products with small printed circuit board systems, an integrated circuit package with a small footprint and a high internal IO connection is sought. Global market demand also requires lower cost and higher reliability solutions through simplified manufacturing procedures and early implementation of known good die (KGD) circuit system testing during manufacturing to produce higher yield and improved circuits. System reliability. In addition, the influence and resiliency provided by the replacement of package components contributes to market leadership as needed.

Flipchip fabrication technology has become more advanced as more wafers or dies are integrated into a single package. As such, the package assembly should have more advanced designs for simple package applications incorporating more functional wafers. However, due to the difficulty of flip chip fabrication, only a single flip chip application is typically produced in a large number of product manufacturing.

Attempts to provide a complete solution that simplifies manufacturing processes, smaller size, and lower cost have failed due to design flexibility, reduced package totals, increased functionality, impact, and increased IO cabling capabilities.

In view of the ever-increasing pressure of commercial competition, as well as the growth expected by consumers and the diversification of meaningful products in the market, finding solutions to these problems is becoming more and more critical.

The answers to these questions have been considered for a long time, but previous developments have not taught or suggested any answers, and thus the answers to these questions have long plagued those of ordinary skill in the art to which the present invention pertains.

The present invention provides a method of manufacturing an integrated circuit package system, comprising: providing a package substrate having a component side and a system side; and mounting a first integrated circuit die on a component side of the package substrate; a second integrated circuit die is mounted on the component side; an inner package having an inner die is mounted over the first integrated circuit die; the first integrated circuit die, the second integrated circuit die Coupling the wafer interconnect between the inner die, the component side, or a combination thereof; and by encapsulating the component side, the first integrated circuit die, the second integrated circuit die, the interior A package, interconnected with the wafer to form a stacked package body.

The present invention provides an integrated circuit package system comprising: a package substrate having a component side and a system side; a first integrated circuit die mounted on a component side of the package substrate; and a second integrated circuit die And the inner package is mounted on the component side of the package substrate; the inner package has an inner die and is disposed above the first integrated circuit die; the wafer is interconnected in the first integrated circuit die, The second integrated circuit die, the inner die, the component side, or a combination thereof; and the stacked package body, the component side, the first integrated circuit die, and the second integrated body A circuit die, the inner package, and an encapsulant on the interconnect of the wafer are formed.

Some embodiments of the invention have other steps or elements in addition to or in place of those mentioned above. These steps or elements will become apparent to those of ordinary skill in the art in the <RTIgt;

The following embodiments are described in sufficient detail to enable those skilled in the art to make and use the invention. It will be appreciated that other embodiments will be apparent, and that changes in the system, process, or mechanism may be made without departing from the scope of the invention.

In the following description, numerous specific details are set forth in the description However, it is apparent that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some conventional circuits, system configurations, and process steps will not be disclosed in detail.

The drawings of the embodiments of the display system are part of the illustrations and not to scale, and in particular, some of the dimensions are exaggerated in the drawings for clarity. Similarly, although the drawings in the drawings generally show similar directions for convenience of description, the representations in the drawings are largely undefined. In general, the invention is operable in any direction.

The various embodiments disclosed and described are to be considered in a For the convenience of description, the embodiments have been described as the first embodiment, the second embodiment, and the like, and are not intended to have any other meaning or to limit the present invention.

For the purposes of this description, the term "horizontal" as used herein is defined as a plane parallel to the plane or surface of the package substrate, regardless of its orientation. The term "vertical" is about the direction perpendicular to the level just defined. For example, "above", "below", "bottom", "top", "side" (such as "sidewall"), "higher" The terms "higher", "lower", "upper", "over", and "under" are relative to the horizontal plane in the schema. definition. The phrase "on" means that there is direct contact between components.

As used herein, the term "processing" includes the deposition, patterning, exposure, development, etching, cleaning, and/or removal of the material or photoresist required to form the structure or photoresist.

Referring now to Figure 1, there is shown a cross-sectional view of an integrated circuit package system 100 in a first embodiment of the present invention. A cross-sectional view of the integrated circuit package system 100 depicts a package substrate 102 having a component side 104 and a system side 106. System contacts 108 on the system side 106 can have system interconnects 110 that are configured to attach to a next level system (not shown), such as solder balls, solder bumps, solder pillars, or stud bumps (stud Bump).

The first integrated circuit die 112, such as a flip chip die, can be coupled to the component contacts 114 on the component side 104 of the package substrate 102 by the wafer interconnect 116. The wafer interconnect 116 can include bond wires, solder balls, solder bumps, solder pillars, or stud bumps. A sealant 118, such as an underfill material, may be injected around the wafer interconnect 116 and between the component side 104 and the first integrated circuit die 112.

The second integrated circuit die 120, such as a flip chip die, can be coupled to the component contacts 114 on the component side 104 of the package substrate 102 by the die interconnect 116. The second integrated circuit die 120 can be placed adjacent to the first integrated circuit die 112, and a gap is left between the second integrated circuit die 120 and the first integrated circuit die 112. A gap 122 is formed between the first integrated circuit die 112 and the second integrated circuit die 120. The encapsulant 118 can be injected around the wafer interconnect 116 and between the component side 104 and the second integrated circuit die 120.

It has been found that the first integrated circuit die 112 and the second integrated circuit die 120 can be prevented from being warped by the package substrate 102 by providing the gap 122 at a position close to the center of the package substrate 102. The problem caused by the music, thus increasing the yield of the integrated circuit package system 100.

An inner package 124 such as a quad flat pack-no lead (QFN) or a ball grid array (BGA) package may be mounted on the first integrated circuit in an inverted manner. The die 112 is on the second integrated circuit die 120. An adhesive 126 may be disposed between the inner package 124, the first integrated circuit die 112, and the second integrated circuit die 120.

It has been discovered that the use of the inner package 124 can be thoroughly tested to improve the overall package yield prior to completion of the overall package in conjunction with other components.

The inner package 124 can have one or more inner dies 128 electrically connected to the inner package substrate 130 provided with the inner package contacts 131 and formed of, for example, an epoxy molding compound. The package 132 is encapsulated. While the inner package 124 is shown as an integrated circuit having a single wire bond type, this is merely an example and may be other configurations.

The inner package substrate 130 can be electrically connected to the component side 104 of the package substrate 102 by the wafer interconnect 116. This configuration allows a signal connection to be formed between the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the internal die 128, or a combination thereof.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 124, the die interconnect 116, the encapsulant 118, the The epoxy resin molding compound is molded on the adhesive 126, and the epoxy resin molding compound passes through the gap 122 to form the package body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

The assembly of the integrated circuit package system 100 has been found to provide a relatively thin package and to provide a high functional density. This invention simplifies the design of the next level system by combining functions and reducing the number of interconnects required for the system printed circuit board (not shown). Accordingly, it has been discovered that the integrated circuit packaging methods and apparatus of the present invention provide important and hitherto unknown and unobtainable solutions, capabilities, and functional aspects for fabricating high density and thin package in-package devices.

Referring now to Figure 2, there is shown a cross-sectional view of an integrated circuit package system 200 in a second embodiment of the present invention. A cross-sectional view of the integrated circuit package system 200 depicts the package substrate 102 having a first integrated circuit die 112 and a second integrated circuit die 120 that are mounted to the component side 104 and separated by a gap 122. The inner package 202 can be placed over the first integrated circuit die 112 and fixed by the adhesive 126.

The inner package 202 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 202 is shown as an integrated circuit with a single wire bond type, this is merely an example and may be other configurations.

It has been found that the use of the inner package 202 can be thoroughly tested before the overall package is completed in conjunction with other components to increase the overall package yield.

The inner package 202 can be coupled to the component side 104 of the package substrate 102 by, for example, a wafer interconnect 116 that incorporates leads. This configuration allows a signal connection to be formed between the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the internal die 128, or a combination thereof.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 202, the die interconnect 116, the encapsulant 118, the The epoxy resin molding compound is molded on the adhesive 126, and the epoxy resin molding compound passes through the gap 122 to form the package body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Figure 3, there is shown a cross-sectional view of an integrated circuit package system 300 in a third embodiment of the present invention. A cross-sectional view of the integrated circuit package system 300 depicts the package substrate 102 having a first integrated circuit die 112 and a second integrated circuit die 120 that are mounted to the component side 104 and separated by a gap 122. The inner package 202 can be placed over the first integrated circuit die 112 and fixed by the adhesive 126. A third integrated circuit die 302, such as a wire-bonded die, can be mounted over the second integrated circuit die 120 by the adhesive 126. The wafer interconnect 116 can couple the third integrated circuit die 302 to the component contacts 114 on the component side 104 of the package substrate 102.

The inner package 202 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 124 is shown as an integrated circuit having a single wire bond type, this is merely an example and may be other configurations.

The inner package 202 can be coupled to the component side 104 of the package substrate 102 by, for example, a wafer interconnect 116 that incorporates leads. The fabric allows the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the third integrated circuit die 302, the internal die 128, or a combination thereof A signal connection is formed between them.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 202, the die interconnect 116, the encapsulant 118, the The epoxy resin molding compound is molded on the adhesive 126, and the epoxy resin molding compound passes through the gap 122 to form the package body 134.

Referring now to Figure 4, there is shown a cross-sectional view of an integrated circuit package system 400 in a fourth embodiment of the present invention. A cross-sectional view of the integrated circuit package system 400 depicts the package substrate 102 having a first integrated circuit die 112 (eg, a wire bond die) mounted to the component side 104 and a second integrated circuit die 120 separated by a gap. 122. The first integrated circuit die 112 can be coupled to the component contact 114 by the die interconnect 116.

The first integrated circuit die 112 can be mounted on the component side 104 by the adhesive 126. The inner package 124 can be mounted over the first integrated circuit die 112 (fixed by the film adhesive 402) and the second integrated circuit die 120 (fixed by the adhesive 126).

The gap contact 404 can be coupled to the first integrated circuit die 112 by the die interconnect 116. By coupling the first integrated circuit die 112 to the gap contact 404, an increase in the number of input/output interconnections can be achieved. This will further simplify the design of the system level substrate (not shown) by reducing the number of interconnect traces required in the system level substrate.

The inner package 124 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 124 is shown as an integrated circuit having a single wire bond type, this is merely an example and may be other configurations.

The inner package 124 can be coupled to the component side 104 of the package substrate 102 by, for example, a wafer interconnect 116 that incorporates leads. This configuration allows a signal connection to be formed between the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the internal die 128, or a combination thereof.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 124, the die interconnect 116, the encapsulant 118, the The adhesive 126 is molded on the adhesive 402 having a lead in the film, and the epoxy molding compound passes through the gap 122 to form the package body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Fig. 5, there is shown a cross-sectional view of an integrated circuit package system 500 in a fifth embodiment of the present invention. A cross-sectional view of the integrated circuit package system 500 depicts the package substrate 102 having a first integrated circuit die 112 and a second integrated circuit die 120 (eg, wire bonded die) that are mounted to the component side 104 and separated by a gap. 122. The inner package 202 can be placed over the first integrated circuit die 112 and fixed by the adhesive 126.

The inner package 202 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 202 is shown as an integrated circuit with a single wire bond type, this is merely an example and may be other configurations.

The third integrated circuit die 302, such as a wire bond die, can be overlying the second integrated circuit die 120 by a leaded adhesive 402 in the film. The wafer interconnect 116 can couple the third integrated circuit die 302 to the component contact 114, the inner package 202, the gap contact 404, or a combination thereof.

The inner package 202 can be coupled to the component side 104 of the package substrate 102 by, for example, a wafer interconnect 116 that incorporates leads. The fabric allows the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the third integrated circuit die 302, the internal die 128, or a combination thereof A signal connection is formed between them.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 202, the wafer interconnect 116, the encapsulant 118, the film The stacked package body 134 can be formed by the lead adhesive 80, the adhesive 126 molding the epoxy molding compound, and the epoxy molding compound passing through the gap 122. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Fig. 6, there is shown a cross-sectional view of an integrated circuit package system 600 in a sixth embodiment of the present invention. A cross-sectional view of the integrated circuit package system 600 depicts the package substrate 102 having a first integrated circuit die 112 (eg, a wire bond die) mounted to the component side 104 and a second integrated circuit die 120 separated by a gap. 122. The first integrated circuit die 112 can be coupled to the component contact 114 by the die interconnect 116. The gap contact 404 in the gap 122 can be coupled to the first integrated circuit die 112, the second integrated circuit die 120, or a combination thereof.

The first integrated circuit die 112 can be mounted on the component side 104 by the adhesive 126. The inner package 124 can be mounted over the first integrated circuit die 112 and the second integrated circuit die 120, and fixed by a bonding agent 402 having a lead in the film.

The inner package 124 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 124 is shown as an integrated circuit having a single wire bond type, this is merely an example and may be other configurations.

The inner package 124 can be coupled to the component side 104 of the package substrate 102 by, for example, a wafer interconnect 116 that incorporates leads. This configuration allows a signal connection to be formed between the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the internal die 128, or a combination thereof.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 124, the die interconnect 116, and the leads in the film The epoxy resin molding compound is molded on the adhesive 402, the adhesive 126, and the epoxy resin molding compound passes through the gap 122 to form the package body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Fig. 7, there is shown a cross-sectional view of an integrated circuit package system 700 in a seventh embodiment of the present invention. The cross-sectional view of the integrated circuit package system 700 depicts the package substrate 102 having a first integrated circuit die 112 and a second integrated circuit die 120 that are mounted to the component side 104 and separated by a gap 122. The inner package 202 can be placed over the first integrated circuit die 112 and fixed in position by an adhesive 402 having leads in the film.

The inner package 202 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 202 is shown as an integrated circuit with a single wire bond type, this is merely an example and may be other configurations.

The inner package 202 can be coupled to the component contact 114, the second integrated circuit die 120, the gap contact 404, or a combination thereof by, for example, a wafer interconnect 116 that incorporates a lead. This configuration allows a signal connection to be formed between the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the internal die 128, or a combination thereof.

By bonding the leads in the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 202, the die interconnect 116, and the film. The epoxy resin molding compound is molded on the adhesive 402, and the epoxy resin molding compound passes through the gap 122 to form the package body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Fig. 8, there is shown a cross-sectional view of an integrated circuit package system 800 in an eighth embodiment of the present invention. A cross-sectional view of the integrated circuit package system 800 depicts the package substrate 102 having a first integrated circuit die 112 that is erected to the component side 104 by the adhesive 126 and a second integrated circuit die 120 (eg, wire bonding) The grains are separated by a gap 122. The inner package 202 can be placed over the first integrated circuit die 112 and fixed in position by an adhesive 402 having leads in the film.

The inner package 202 can have one or more inner dies 128 electrically connected to the inner package substrate 130 and encapsulated by an inner package body 132 formed, for example, of an epoxy molding compound. While the inner package 202 is shown as an integrated circuit with a single wire bond type, this is merely an example and may be other configurations.

The third integrated circuit die 302, such as a wire bond die, can be overlying the second integrated circuit die 120 by a leaded adhesive 402 in the film. The wafer interconnect 116 can couple the third integrated circuit die 302 to the component contact 114, the inner package 202, the gap contact 404, or a combination thereof.

The inner package 202 can be coupled to the component contact 114, the gap contact 404, the third integrated circuit die 302, or a combination thereof by, for example, a wafer interconnect 116 that incorporates a lead. The fabric allows the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the third integrated circuit die 302, the internal die 128, or a combination thereof A signal connection is formed between them.

By bonding the leads in the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 202, the die interconnect 116, and the film. The epoxy resin molding compound is molded on the adhesive 402, and the epoxy resin molding compound passes through the gap 122 to form the package body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Fig. 9, there is shown a cross-sectional view of an integrated circuit package system 900 in a ninth embodiment of the present invention. A cross-sectional view of the integrated circuit package system 900 depicts the package substrate 102 having a first integrated circuit die 112 that is erected to the component side 104 by the adhesive 126 and a second integrated circuit die 120 (eg, wire bonding) The grains are separated by a gap 122.

The inner package 202 can be placed over the first integrated circuit die 112 and fixed in position by an adhesive 402 having leads in the film. A fourth integrated circuit die 902, such as a flip chip die, can be mounted on the inner package contacts 131 of the inner package substrate 130 by a wafer interconnect 116 such as solder balls.

The third integrated circuit die 302, such as a wire bond die, can be overlying the second integrated circuit die 120 by a leaded adhesive 402 in the film. The wafer interconnect 116 can couple the third integrated circuit die 302 to the component contact 114, the inner package 202, the gap contact 404, or a combination thereof.

The inner package 202 can be coupled to the component contact 114, the gap contact 404, the third integrated circuit die 302, or a combination thereof by, for example, a wafer interconnect 116 that incorporates a lead. The fabric allows the system interconnect 110, the first integrated circuit die 112, the second integrated circuit die 120, the third integrated circuit die 302, and the fourth integrated circuit die 902. A signal connection is formed between the inner die 128, or a combination thereof.

By the component side 104 of the package substrate 102, the first integrated circuit die 112, the second integrated circuit die 120, the inner package 202, the third integrated circuit die 302, the first The four integrated circuit die 902, the die interconnect 116, the encapsulant 118, the adhesive 126 mold the epoxy molding compound, and the epoxy molding compound passes through the gap 122 to form a stacked package. Body 134. Although the stacked package body 134 can be formed the same material as the inner package body 132, it can still be identified as being different from the inner package body 132 because their boundaries can be identified in a cross-sectional view.

Referring now to Figure 10, a bottom view of the integrated circuit package system 100 is shown. A bottom view of the integrated circuit package system 100 depicts an array 1002 of system interconnects 110 on the system side 106. The section line 1--1 shows the viewing position and direction of Fig. 1. This is also substantially the same as the cross-sectional view of Figures 2-9.

Referring now to Figure 11, a flowchart of a method 1100 of fabricating an integrated circuit package system 100 in a further embodiment of the present invention is shown. The method 1100 includes, in block 1102, providing a package substrate having a component side and a system side; in block 1104, a first integrated circuit die is erected on a component side of the package substrate; and in block 1106, a second integrated circuit die is mounted on the component side of the package substrate; an inner package having internal die is mounted over the first integrated circuit die; in block 1108; in the first integrated circuit die Coupling the wafer interconnect between the second integrated circuit die, the inner die, the component side, or a combination thereof; and in block 1110; by encapsulating the component side, the first integrated circuit The die, the second integrated circuit die, the inner package, and the die are interconnected to form a stacked package body.

The resulting methods, processes, equipment, devices, products, and/or systems are straightforward, cost effective, uncomplicated, highly versatile, and effective, and can be modified by modifying known techniques. It is surprisingly and inconspicuously implemented, and is therefore immediately suitable for efficient and economical manufacture of in-package packaging systems that are fully compatible with conventional manufacturing methods or processes and techniques.

Another important aspect of the present invention is that it greatly supports and helps to reduce costs, simplify systems, and enhance historical trends in performance.

These and other important aspects of the invention thus facilitate the state of the technology to at least the next level.

Although the present invention has been described in connection with the specific embodiments thereof, it is understood that many alternatives, modifications, and variations are apparent to those of ordinary skill in the art. Accordingly, the present invention is intended to embrace all such alternatives, modifications, and variations as fall within the scope of the appended claims. All matters presented herein or shown in the drawings are to be interpreted as illustrative and non-limiting.

100, 200, 300, 400, 500. . . Integrated circuit packaging system

102. . . Package substrate

104. . . Component side

106. . . System side

108. . . System contact

110. . . System interconnection

112. . . First integrated circuit die

114. . . Component contact

116. . . Chip interconnect

118. . . Sealants

120. . . Second integrated circuit die

122. . . gap

124, 202. . . Internal package

126. . . Adhesive

128. . . Internal grain

130. . . Internal package substrate

131. . . Internal package contact

132. . . Internal package

134. . . Stacked package body

302. . . Third integrated circuit die

402. . . Film adhesive

404. . . Gap contact

600, 700, 800, 900. . . Integrated circuit packaging system

902. . . Fourth integrated circuit die

1002. . . Array

1100. . . method

1102, 1104, 1106, 1108, 1110. . . Square

1--1. . . Cut line

Figure 1 is a cross-sectional view showing an integrated circuit package system in a first embodiment of the present invention;

Figure 2 is a cross-sectional view showing an integrated circuit package system in a second embodiment of the present invention;

Figure 3 is a cross-sectional view showing an integrated circuit package system in a third embodiment of the present invention;

Figure 4 is a cross-sectional view showing an integrated circuit package system in a fourth embodiment of the present invention;

Figure 5 is a cross-sectional view showing an integrated circuit package system in a fifth embodiment of the present invention;

Figure 6 is a cross-sectional view showing an integrated circuit package system in a sixth embodiment of the present invention;

Figure 7 is a cross-sectional view showing an integrated circuit package system in a seventh embodiment of the present invention;

Figure 8 is a cross-sectional view showing an integrated circuit package system in an eighth embodiment of the present invention;

Figure 9 is a cross-sectional view showing an integrated circuit package system in a ninth embodiment of the present invention;

Figure 10 is a bottom view of the integrated circuit package system;

Figure 11 is a flow chart showing a method of manufacturing an integrated circuit package system in a further embodiment of the present invention.

100. . . Integrated circuit packaging system

102. . . Package substrate

104. . . Component side

106. . . System side

108. . . System contact

110. . . System interconnection

112. . . First integrated circuit die

114. . . Component contact

116. . . Chip interconnect

118. . . Sealants

120. . . Second integrated circuit die

122. . . gap

124. . . Internal package

126. . . Adhesive

128. . . Internal grain

130. . . Internal package substrate

131. . . Internal package contact

132. . . Internal package

134. . . Stacked package body

Claims (10)

A manufacturing method of an integrated circuit package system includes: providing a package substrate having a component side and a system side; and mounting a first integrated circuit die on the component side of the package substrate; the component in the package substrate a second integrated circuit die is mounted on the side; an inner package having an inner die is mounted on the first integrated circuit die in an inverted manner, wherein the first integrated circuit die and the inner package are Separating from the second integrated circuit die with a gap; coupling the wafer between the first integrated circuit die, the second integrated circuit die, the inner die, the component side, or a combination thereof Interconnecting; and forming a stacked package body by encapsulating the component side, the first integrated circuit die, the second integrated circuit die, the inner package, and the wafer. The method of claim 1, wherein the erecting the inner package comprises: manufacturing an inner package substrate for erecting the inner die; and molding the inner package body on the inner die and the inner package substrate. The method of claim 1, wherein the erecting the inner package comprises: coupling at least one inner package substrate of the inner chip to the inner side of the inner package. The method of claim 1, further comprising erecting a third integrated circuit die above the second integrated circuit die. The method of claim 1, wherein the erecting the inner package comprises: arranging a fourth integrated circuit die on an outer side of the inner package; and coupling the inner package substrate to the first integrated body a circuit die, the second integrated circuit die, a third integrated circuit die, the fourth integrated circuit die, the inner die, the component side, or a combination thereof. An integrated circuit packaging system includes: a package substrate having a component side and a system side; a first integrated circuit die mounted on the component side of the package substrate; and a second integrated circuit die Separating from the first integrated circuit die by a gap and erecting on the component side of the package substrate; the inner package has an inner die and is mounted on the first integrated circuit die in an inverted manner Above; a wafer interconnect between the first integrated circuit die, the second integrated circuit die, the inner die, the component side, or a combination thereof, wherein the first integrated circuit crystal And the inner package is separated from the second integrated circuit die by a gap; and the package body is stacked by the component side, the first integrated circuit die, and the second integrated circuit die The inner package is formed with an encapsulation on the interconnect of the wafer. The system of claim 6, wherein the internal package comprises: an inner package substrate for erecting the inner die; and an inner package body molded in the inner die and the inner package On the substrate. The system of claim 6, wherein at least one of the wafer interconnects is coupled between the inner package substrate of the inner package and the component side. For example, the system of claim 6 includes a third integrated circuit die that is mounted above the second integrated circuit die. The system of claim 6 , wherein the internal package is: the fourth integrated circuit die is located on an outer side of the inner package; and the inner package substrate is coupled to the a first integrated circuit die, the second integrated circuit die, a third integrated circuit die, the fourth integrated circuit die, the inner die, the component side, or a combination thereof.