TWI541518B - A high-speed substrate for transmitting the test signal of the test machine - Google Patents

A high-speed substrate for transmitting the test signal of the test machine Download PDF

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TWI541518B
TWI541518B TW103124756A TW103124756A TWI541518B TW I541518 B TWI541518 B TW I541518B TW 103124756 A TW103124756 A TW 103124756A TW 103124756 A TW103124756 A TW 103124756A TW I541518 B TWI541518 B TW I541518B
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test
speed substrate
layer
probe
contact
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TW103124756A
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TW201441638A (en
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jia-tai Zhang
wei-zheng Gu
zhao-ping Xie
chun-ji Wang
ya-yun Zheng
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Description

用以傳輸測試機台之測試訊號的高速基板 High-speed substrate for transmitting test signals of test machines

本發明係關於高速測試之測試裝置,特別是指一種能夠傳輸測試機台之測試訊號的高速基板。 The invention relates to a test device for high-speed testing, in particular to a high-speed substrate capable of transmitting test signals of a test machine.

隨著科技化電子產品漸趨高速運作的需求下,電子產品內部之積體電路元件在晶圓測試時,測試探針卡除了需顧及電子元件測試銲墊之間的間距,使探針卡的探針在點觸測試銲墊時能精確對準,尚須顧慮電子元件的高速運作需求,針對個別電子元件的測試特性而於探針卡電路板上設計有能配合其操作條件的高速測試電路,提供積體電路晶圓達成完整的測試工程,藉以確保產品的使用品質。 With the increasing demand for high-speed operation of electronic products, the integrated circuit components inside the electronic product are tested in the wafer, and the test probe card needs to take into account the spacing between the electronic component test pads, so that the probe card The probe can be precisely aligned when the test pad is touched, and the high-speed operation requirements of the electronic component must be considered. The high-speed test circuit can be designed on the probe card circuit board to match the operating conditions of the individual electronic component. Provide integrated circuit wafers to complete a test project to ensure the quality of the product.

然而探針卡製造商普遍可快速量產製作之測試公板係為於電路板上具有固定位置之測試接點,需再透過跳線結構作為測試機台與探針間之訊號傳輸路徑,僅適於一般中、低頻段之訊號傳輸測試用;除非所有傳輸結構完全針對特定之高頻測試條件而設計,包括顧及高頻測試中特定的訊號傳輸阻抗或特定的傳輸路徑等條件,否則以測試公板組裝之探針卡無法提供為混合有一般中、低頻段及高頻測試需求的製程技術元件所用。縱使以固定線路佈設之專板設計所提供之探針卡,對於積體電路為相同頻率操作甚至相同運作條件的不同晶圓製程產品,只要製程電子元件之電路佈局有所更改,使高速電子元 件中各訊號之相對傳輸路徑有所變更或與一般中、低頻段的訊號傳輸路徑有相對變更,探針卡製造商仍須重新設計製作與其電路佈局相對應的專板測試之探針卡;為此探針卡製造業者皆須耗費相當的工時及製作成本,尤其當製程積體電路越複雜且待測試電路越繁多時,相對的專板製作則需花費更多的工時及成本。 However, the probe card manufacturer generally can quickly produce a test board which has a fixed position on the circuit board. The jumper structure is used as a signal transmission path between the test machine and the probe. Suitable for signal transmission test in general medium and low frequency bands; unless all transmission structures are designed for specific high frequency test conditions, including specific signal transmission impedance or specific transmission path in high frequency test, etc. The public board assembled probe card cannot be used for process technology components that are mixed with general medium and low frequency bands and high frequency test requirements. Even if the probe card provided by the fixed-board layout is designed for different wafer process products with the same frequency operation and even the same operating conditions as the integrated circuit, as long as the circuit layout of the process electronic components is changed, the high-speed electronic element is made. The relative transmission path of each signal in the device is changed or relatively changed with the signal transmission path of the general middle and low frequency bands, and the probe card manufacturer still has to redesign the probe card for the special board test corresponding to the circuit layout; For this reason, the probe card manufacturer has to spend considerable labor and production costs, especially when the process integrated circuit is more complicated and the circuit to be tested is more complicated, the relative special board production requires more labor and cost.

縱使有如台灣專利公告第I266882提出之一種以適於傳 輸高頻訊號之撓性導線構成之探測系統,然,該探測系統於電路板上配置額外之位置設置撓性導線以接收高頻訊號,需將測試機台之測試頭所提供高頻訊號及一般頻段之測試訊號分開於不同之訊號接收位置,無異影響一般頻段測試訊號之電路佈設,需犧牲高頻傳輸路徑所佔去的電路空間。且將撓性導線自電路板邊緣延伸至具有高密度排列之探針結構中,對於有特定彈性需求之微小探針結構而言,將撓性導線直接插入高密度探針之間無異直接造成對探針彈性延展方向之阻力;致使待測晶粒在所有探針同時點觸至不同元件之測試銲墊時,所受到之彈性接觸力以及對探針之反作用力亦完全不同,經一段時間使用過後勢必影響不同探針之彈性回復力,造成探針針尖之測試平面不平齊而使局部測試銲墊受力過大或電性接觸不良,致使降低積體電路晶圓電性測試之可靠度。再者,一旦每一待測晶粒有更多數不同條件之高頻元件時,測試機台需以更多測試頭輸出不同條件之高頻訊號,則上述探測系統需於電路板邊緣以更多數之撓性導線接收所不同位置之測試頭所提供之高頻訊號;不但更多之撓性導線完全插入高密度探針之間,對所有探針的彈性延展方向造成更大的阻力,且只要操作過 程稍有碰觸任何一撓性導線,將致使所有探針完全錯位甚至損毀,需對探針卡重新維修而無法進行電性測試。 Even if it is as proposed in Taiwan Patent Publication No. I266882, it is suitable for transmission. A detection system consisting of a flexible wire for transmitting a high-frequency signal. However, the detection system is provided with an additional position on the circuit board to set a flexible wire to receive a high-frequency signal, and the high-frequency signal provided by the test head of the test machine is required. The test signals of the general frequency band are separated from the different signal receiving positions, which affects the circuit layout of the general frequency band test signal, and the circuit space occupied by the high frequency transmission path needs to be sacrificed. And extending the flexible wire from the edge of the circuit board to the probe structure with high density arrangement, for the micro-probe structure with specific elasticity requirements, directly inserting the flexible wire directly into the high-density probe directly causes The resistance to the elastic extension direction of the probe; so that when the test die touches the test pads of different components at the same time, the elastic contact force and the reaction force to the probe are completely different, after a period of time. After use, it will affect the elastic restoring force of different probes, causing the test plane of the probe tip to be uneven, which may cause excessive stress or poor electrical contact of the local test pads, resulting in lower reliability of the electrical test of the integrated circuit wafer. Furthermore, once each of the die to be tested has more high frequency components with different conditions, the test machine needs to output high frequency signals of different conditions with more test heads, and the above detection system needs to be more on the edge of the circuit board. Most flexible wires receive high frequency signals from test heads at different locations; not only are more flexible wires fully inserted between the high density probes, causing greater resistance to the elastic extension of all probes, And as long as it has been operated A slight touch on any flexible wire will cause all probes to be completely misaligned or even damaged. The probe card needs to be repaired and cannot be electrically tested.

因此探針卡製造業者在面臨晶圓廠下單訂製探針卡時,如何能以最短的交期,降低製造成本,並兼顧高品質的測試線路傳輸結構,以供積體電路晶圓進行高可靠度的電測工程,實為現今探針卡製造者所面臨的一大考驗。 Therefore, when the probe card manufacturer faces a fab to order a probe card, how can the manufacturing cost be reduced with the shortest delivery time, and the high-quality test line transmission structure can be considered for the integrated circuit wafer. High-reliability electrical test engineering is a big test for today's probe card manufacturers.

本發明之主要目的在於提供一種高速基板,其可傳輸測試機台所提供的測試訊號。 The main object of the present invention is to provide a high speed substrate that can transmit test signals provided by a test machine.

為達成前揭目的,本發明所提供一種高速基板,包括有:一上表面及相對之一下表面;一端,具有多數通孔以及多數第二測試接點,各該通孔可供該測試機台之一測試頭通過,各該第二測試接點可供傳遞該測試機台的測試訊號;另一端,位於該一端相對的一端,具有多數探針接點與至少一接地探針接點,各該探針接點可供一高頻探針電性連接,該至少一接地探針接點可供一接地探針電性連接;多數訊號線,各該訊號線的兩端分別與各該探針接點與各該測試接點電性連接;以及,至少一接地層,係與該至少一接地探針接點電性連接。 To achieve the foregoing objective, the present invention provides a high speed substrate comprising: an upper surface and a lower surface; one end having a plurality of through holes and a plurality of second test contacts, each of the through holes being available for the test machine One of the test heads passes, and each of the second test contacts is configured to transmit a test signal of the test machine; the other end is located at an opposite end of the one end, and has a plurality of probe contacts and at least one ground probe contact, each The probe contact is electrically connected to a high frequency probe, and the at least one ground probe contact is electrically connected to a ground probe; and the majority of the signal lines and the two ends of the signal line are respectively connected to the probe The pin contact is electrically connected to each of the test contacts; and at least one ground layer is electrically connected to the at least one ground probe contact.

1、2、3、4‧‧‧測試模組 1, 2, 3, 4‧‧‧ test modules

10‧‧‧電路基板 10‧‧‧ circuit board

102‧‧‧測試區 102‧‧‧Test area

104‧‧‧探針區 104‧‧‧ probe area

106‧‧‧上表面 106‧‧‧Upper surface

108‧‧‧下表面 108‧‧‧ lower surface

12‧‧‧第一測試接點 12‧‧‧First test contact

14‧‧‧第一探針接點 14‧‧‧First probe contact

16‧‧‧第一訊號線 16‧‧‧First signal line

30、30’、70、90‧‧‧高速基板 30, 30', 70, 90‧‧‧ high speed substrates

300、702、704、902、904‧‧‧軟性電路板 300, 702, 704, 902, 904‧‧‧ flexible circuit boards

32‧‧‧接點層 32‧‧‧Contact layer

322‧‧‧第二測試接點 322‧‧‧Second test contact

324‧‧‧接地接點 324‧‧‧ Grounding contacts

34‧‧‧接地層 34‧‧‧ Grounding layer

34’‧‧‧外接地層 34’‧‧‧Outer ground plane

340‧‧‧盲孔 340‧‧‧Blind hole

342‧‧‧通孔 342‧‧‧through hole

344、346‧‧‧金屬塊 344, 346‧‧‧ metal blocks

348‧‧‧焊接材 348‧‧‧welding materials

350‧‧‧金屬固定件 350‧‧‧Metal fasteners

36、72、74、92、94‧‧‧訊號線 36, 72, 74, 92, 94‧‧‧ signal lines

360‧‧‧訊號層 360‧‧‧Signal layer

362‧‧‧第二探針接點 362‧‧‧Second probe contact

364‧‧‧接地探針接點 364‧‧‧Ground probe contact

38‧‧‧絕緣層 38‧‧‧Insulation

50‧‧‧探針組 50‧‧‧ probe set

502‧‧‧固定座 502‧‧‧ Fixed seat

504‧‧‧金屬片 504‧‧‧metal pieces

506‧‧‧絕緣膠材 506‧‧‧Insulating rubber

508‧‧‧導電膠 508‧‧‧ conductive adhesive

52‧‧‧第一探針 52‧‧‧First probe

54、58‧‧‧第二探針 54, 58‧‧‧ second probe

56‧‧‧接地探針 56‧‧‧ Grounding probe

542、582‧‧‧金屬針 542, 582‧‧ ‧ metal needle

544‧‧‧地線 544‧‧‧Ground

584‧‧‧金屬套管 584‧‧‧Metal casing

706‧‧‧轉接器 706‧‧‧Adapter

906‧‧‧傳輸線 906‧‧‧ transmission line

第一圖係本發明所提供第一較佳實施例之頂視示意圖;第二圖係上述第一較佳實施例之局部底視示意圖;第三圖係上述第一較佳實施例之結構示意圖;第四圖係上述第一較佳實施例之局部頂視示意圖,表示高速基板設於電路基板上表面之結構示意圖;第五圖A、B係分別為上述第四圖之5A-5A連線及5B-5B連線之剖視示意圖;第六圖係本發明所提供高速基板與電路基板之多種固接方式,表示高速基板於側邊使接地層與電路基板之第一測試接點之連接導通方式;第七圖A、B係分別為上述第六圖之7A-7A連線及7B-7B連線剖視示意圖;第八圖係本發明所提供探針組之另一第二探針與高速基板導通之傳輸結構示意圖;第九圖係上述第八圖之局部底視示意圖;第十圖A、B係分別為上述第二圖所示第二探針於探針組內部的交錯及層疊配置結構;第十一圖A、B係分別為上述第八圖所示另一第二探針於探針組內部的交錯及層疊配置結構;第十二圖係本發明所提供第二較佳實施例之結構示意圖;第十三圖係上述第二較佳實施例之局部剖視示意圖,表示高速基板設於電路基板上表面之結構示意圖; 第十四圖係本發明所提供第三較佳實施例之結構示意圖;第十五圖係本發明所提供第四較佳實施例之結構示意圖。 The first figure is a top view of a first preferred embodiment of the present invention; the second figure is a partial bottom view of the first preferred embodiment; and the third figure is a schematic view of the first preferred embodiment. The fourth figure is a partial top view of the first preferred embodiment, showing a schematic view of the high-speed substrate disposed on the upper surface of the circuit substrate; the fifth drawing A and B are respectively connected to the fifth figure 5A-5A. FIG. 6 is a cross-sectional view of the connection of the 5B-5B; the sixth figure is a plurality of fastening methods of the high-speed substrate and the circuit substrate provided by the present invention, and indicates that the high-speed substrate connects the ground layer to the first test contact of the circuit substrate on the side. FIG. 7 and FIG. 7B are respectively a schematic cross-sectional view of the 7A-7A connection and the 7B-7B connection of the sixth figure; and the eighth diagram is another second probe of the probe set provided by the present invention. A schematic diagram of a transmission structure that is electrically connected to a high-speed substrate; the ninth diagram is a partial bottom view of the eighth diagram; and the tenth diagrams A and B are respectively the interlacing of the second probe inside the probe group shown in the second figure. Cascading configuration structure; Figure 11 and Figure A are the eighth The other second probe is shown in the interleaved and stacked configuration of the probe set; the twelfth is a schematic view of the second preferred embodiment of the present invention; A schematic cross-sectional view of an embodiment showing a schematic diagram of a high speed substrate disposed on an upper surface of a circuit substrate; Figure 14 is a schematic view showing the structure of a third preferred embodiment of the present invention; and Figure 15 is a schematic view showing the structure of a fourth preferred embodiment of the present invention.

以下,茲配合圖式列舉若干較佳實施例,用以對本發明之結構、製作與功效作詳細說明。然而,本發明各實施例僅用於說明以特定結構及製作方法使用本發明,並非用以侷限本發明的範圍;圖式中,各元件的形狀或大小僅為方便標示之用,並非用以侷限本發明的結構。 In the following, a number of preferred embodiments are listed in conjunction with the drawings to illustrate the structure, fabrication and efficacy of the present invention. However, the embodiments of the present invention are only used to illustrate the use of the present invention in a specific structure and manufacturing method, and are not intended to limit the scope of the present invention; in the drawings, the shapes or sizes of the components are merely for convenience of labeling, and are not used for The structure of the present invention is limited.

請參閱如第一至第三圖所示本發明所提供第一較佳實施例之一整合式高速測試模組1,適用於對同時具有於一般中、低頻段運作之電子元件及以更高頻段運作之高速電子元件進行積體電路晶圓級測試,因此測試機台可將接地電位以及較低測試頻率之第一測試訊號及較高測試頻率之第二測試訊號透過測試模組1傳輸至積體電路晶圓之待測晶粒以進行電性測試,更詳述之,第二測試訊號具有符合高頻訊號之傳輸結構,因而各該第二測試訊號之傳輸路徑需伴隨接地電位,以維持訊號特性阻抗之傳輸;該測試模組1包括有一電路基板10、一高速基板30以及一探針組50,其中:請配合第一至第三圖參照,電路基板10可區分為位於外、內圈之一測試區102及一探針區104,並具有相對之一上表面106及一下表面108,該上表面106於該測試區102佈設有多數第一測試接點12,該下表面108於該探針區104佈設有多數第一探針接 點14,該第一測試接點12用以傳遞上述測試機台之第一測試訊號或接地電位,並透過多數外部跳線結構或內部走線之第一訊號線16與該第一探針接點14電性導通。 Please refer to an integrated high-speed test module 1 according to the first preferred embodiment of the present invention as shown in the first to third figures, which is suitable for electronic components that are simultaneously operated in the general middle and low frequency bands and higher The high-speed electronic components operating in the frequency band perform the integrated circuit wafer level test, so the test machine can transmit the ground potential and the first test signal of the lower test frequency and the second test signal of the higher test frequency to the test module 1 through The die to be tested of the integrated circuit wafer is electrically tested. More specifically, the second test signal has a transmission structure conforming to the high frequency signal, so that the transmission path of each of the second test signals is accompanied by a ground potential. The test module 1 includes a circuit substrate 10, a high-speed substrate 30, and a probe set 50, wherein: in conjunction with the first to third figures, the circuit substrate 10 can be distinguished as being located outside, a test area 102 and a probe area 104 of the inner ring, and have a pair of upper surface 106 and a lower surface 108. The upper surface 106 is provided with a plurality of first test contacts 12 in the test area 102. The surface 108 is provided with a plurality of first probes in the probe region 104. Point 14 , the first test contact 12 is used to transmit the first test signal or the ground potential of the test machine, and is connected to the first probe through a plurality of external jumper structures or a first signal line 16 of the internal trace Point 14 is electrically conductive.

高速基板30用以傳遞上述測試機台之第二測試訊號,係沿該電路基板10之上表面106自該測試區102延伸佈設至該探針區104,並穿設該電路基板10後沿該下表面108延伸至該電路基板10之中央以接近該探針組50邊緣,至於最適之數量及位置則依實際積體電路元件之高頻測試需求而配置。該高速基板30可如本實施例所提供之以單一軟性電路板300所製成,使第二測試訊號於軟性電路板300內沿電路基板10之上、下表面106、108傳遞於測試區102及探針區104之間。配合第三圖參照,該高速基板30於該電路基板10上表面106覆蓋部分測試區102,並設有一接點層32、一接地層34以及多數訊號線36,因此上述測試機台之第二測試訊號為對應該電路基板10之測試區102由該接點層32接收,經該等訊號線36傳遞至該探針組50,其中該接點層32、接地層34以及訊號線36之結構特徵及功能應用分別詳述如下。 The high-speed substrate 30 is used to transmit the second test signal of the test machine, and is disposed along the upper surface 106 of the circuit substrate 10 from the test area 102 to the probe area 104, and is disposed on the circuit board 10 The lower surface 108 extends to the center of the circuit substrate 10 to approximate the edge of the probe set 50, and the optimum number and position are configured according to the high frequency test requirements of the actual integrated circuit components. The high-speed substrate 30 can be made of a single flexible circuit board 300 as provided in the embodiment, so that the second test signal is transmitted to the test area 102 along the upper and lower surfaces 106 and 108 of the circuit board 10 in the flexible circuit board 300. And between the probe areas 104. Referring to the third figure, the high-speed substrate 30 covers a portion of the test area 102 on the upper surface 106 of the circuit substrate 10, and is provided with a contact layer 32, a ground layer 34, and a plurality of signal lines 36, so that the second test machine is The test signal is received by the contact layer 32 corresponding to the test substrate 102 of the circuit substrate 10, and transmitted to the probe set 50 via the signal line 36, wherein the structure of the contact layer 32, the ground layer 34 and the signal line 36 Features and functional applications are detailed below.

該接點層32於對應該電路基板10之上表面106設有多數第二測試接點322及多數接地接點324,並提供為該高速基板30表面之絕緣保護作用;至少一該接地接點324及至少一該第二測試接點322位於該電路基板10之第一測試接點12上,較佳者,配合第四圖參照,使各該第二測試接點322及接地接點324覆蓋該第一測試接點12並與之對準,且該第二測試接點322與第一測試接點12電性 絕緣,故對測試機台而言,測試頭所提供高頻訊號之位置維持相同於原本第一測試接點12之相對位置,並完全由具有高頻傳輸規格之高速基板30傳遞第二測試訊號。 The contact layer 32 is provided with a plurality of second test contacts 322 and a plurality of ground contacts 324 on the upper surface 106 of the corresponding circuit substrate 10, and is provided as an insulation protection function for the surface of the high speed substrate 30; at least one of the ground contacts 324 and at least one of the second test contacts 322 are located on the first test contact 12 of the circuit substrate 10. Preferably, the second test contact 322 and the ground contact 324 are covered by reference to the fourth figure. The first test contact 12 is aligned with the first test contact 12, and the second test contact 322 is electrically connected to the first test contact 12 Insulation, so for the test machine, the position of the high frequency signal provided by the test head is maintained at the same position as the original first test contact 12, and the second test signal is completely transmitted by the high speed substrate 30 having the high frequency transmission specification. .

該接地層34電性連接該等接地接點324以及上述測試機 台之接地電位,可如第五圖A所示,將對位於該第一測試接點12上之局部接點層32去除,形成位於該接地層34上之一盲孔340,使該接地層34外露構成其中一該接地接點324。或者,將軟性電路板300穿設至少一通孔342,正向對位於該第一測試接點12上,再去除通孔342邊緣之局部接點層32使該接地層34於該通孔342中外露,藉由具導電性之焊接材於該通孔342中將接地層34與第一測試接點12以相互焊接,焊接材凝固後即形成容置於該通孔342之一金屬塊344,該金屬塊344之表面則構成其中一該接地接點324。因此高速基板30除了可藉由該接地接點324使接地層34接收測試機台所提供之接地電位,更具有使佈設於軟性電路板300內部之接地層34與其相互導通之電路基板10之第一測試接點12形成等接地電位之特徵;且因接地層34可與電路基板10之第一測試接點12藉由焊接方式連接導通,更兼具將高速基板30與電路基板10相互固接之功能。另外,通孔342之設置可僅用於使測試機台之測試頭直接透過通孔342而仍以第一測試接點12接收第一測試訊號,或者使第一測試接點12透過通孔342接收接地電位,可與高速基板30所傳輸的接地電位有效區隔,以避免電路基板與高速基板所傳輸的訊號相互干擾;尤其若更透過通孔342注入焊接材,配合第五圖B參照, 焊接材凝固後形成之一金屬塊346不但將第一測試接點12導通至該高速基板30表面,使測試機台之測試頭直接接觸金屬塊346,並可同樣將高速基板30與電路基板10相互固接。 The ground layer 34 is electrically connected to the ground contacts 324 and the testing machine The grounding potential of the stage can be removed as shown in FIG. 5A, and the local contact layer 32 on the first test contact 12 is removed to form a blind hole 340 on the ground layer 34. The exposed portion 34 constitutes one of the ground contacts 324. Alternatively, the flexible circuit board 300 is disposed through the at least one through hole 342, and the positive contact is located on the first test contact 12, and then the local contact layer 32 at the edge of the through hole 342 is removed to make the ground layer 34 in the through hole 342. Exposed, the grounding layer 34 and the first test contact 12 are welded to each other in the through hole 342 by a conductive solder material, and the solder material is solidified to form a metal block 344 received in the through hole 342. The surface of the metal block 344 constitutes one of the ground contacts 324. Therefore, in addition to the grounding layer 34 receiving the ground potential provided by the testing machine, the high-speed substrate 30 has the first circuit board 10 for electrically connecting the grounding layer 34 disposed inside the flexible circuit board 300 to each other. The test contact 12 is characterized by a ground potential; and the ground layer 34 can be connected to the first test contact 12 of the circuit substrate 10 by soldering, and the high speed substrate 30 and the circuit substrate 10 are fixed to each other. Features. In addition, the setting of the through hole 342 can only be used to directly pass the test head of the test machine through the through hole 342 to receive the first test signal at the first test contact 12 or to pass the first test contact 12 through the through hole 342. The receiving ground potential can be effectively separated from the ground potential transmitted by the high-speed substrate 30 to avoid interference between the signals transmitted by the circuit substrate and the high-speed substrate; in particular, if the solder material is injected through the through hole 342, refer to FIG. After the solder material solidifies, one metal block 346 is formed to not only conduct the first test contact 12 to the surface of the high speed substrate 30, but also the test head of the test machine directly contacts the metal block 346, and the high speed substrate 30 and the circuit substrate 10 are also similarly Secure each other.

至於藉由焊接方式同時使接地層34與電路基板10之第一測試接點12連接導通,並將高速基板30與電路基板10相互固接之功能,亦可如第六及第七圖A所示,使高速基板30之側邊與電路基板10之第一測試接點12鄰接之軟性電路板300表面,將未設置有第二測試接點322及接地接點324之局部接點層32去除,使接地層34於邊緣外露,再藉由焊接材348將外露之接地層34與鄰接之第一測試接點12連接導通,則接地層34可以透過高速基板30側邊鄰近之第一測試接點12與電路基板10具有等接地電位之特徵,且焊接材348兼具將高速基板30之側邊與電路基板10相互固接之功能。如此接地層34可不必全部佈設至通孔342之邊緣因而未於通孔342中外露,可使高速基板30所覆蓋之部分第一測試接點12透過通孔342或更藉由金屬塊346與測試機台之點觸頭接觸,由於與接地層34電性絕緣,因此更可以高速基板30所覆蓋之部分第一測試接點12接收測試機台之第一測試訊號。另外,配合第七圖A參照,只要高速基板30之訊號線36未緊鄰高速基板30之邊緣配置,高速基板30接點層32之接地接點324可位於鄰近高速基板30邊緣,藉由通孔342及容置於該通孔342之金屬塊344使電路基板10之第一測試接點12導通至接地層34,且兼具將高速基板30之側邊與電路基板10相互固接之功能。 The function of simultaneously connecting the ground layer 34 to the first test contact 12 of the circuit substrate 10 by soldering, and fixing the high speed substrate 30 and the circuit substrate 10 to each other may also be as shown in FIG. 6 and FIG. The surface of the flexible circuit board 300 adjacent to the first test contact 12 of the circuit board 10 is disposed on the side of the high-speed substrate 30, and the local contact layer 32 not provided with the second test contact 322 and the ground contact 324 is removed. The ground layer 34 is exposed at the edge, and the exposed ground layer 34 is connected to the adjacent first test contact 12 by the solder material 348, and the ground layer 34 can pass through the first test connection adjacent to the side of the high speed substrate 30. The point 12 and the circuit board 10 have characteristics of equal ground potential, and the solder material 348 has a function of fixing the side of the high speed substrate 30 and the circuit board 10 to each other. Therefore, the ground layer 34 does not need to be completely disposed to the edge of the through hole 342 and is not exposed in the through hole 342, so that a portion of the first test contact 12 covered by the high speed substrate 30 can pass through the through hole 342 or more by the metal block 346. The point contact contact of the test machine is electrically insulated from the ground layer 34, so that the first test contact 12 covered by the high speed substrate 30 can receive the first test signal of the test machine. In addition, referring to FIG. 7A, as long as the signal line 36 of the high speed substrate 30 is not disposed adjacent to the edge of the high speed substrate 30, the ground contact 324 of the high speed substrate 30 contact layer 32 can be located adjacent to the edge of the high speed substrate 30, through the through hole. The 342 and the metal block 344 disposed in the through hole 342 electrically connect the first test contact 12 of the circuit substrate 10 to the ground layer 34, and have the function of fixing the side of the high speed substrate 30 and the circuit substrate 10 to each other.

甚至,更可以如第七圖B所示,高速基板30於邊緣覆蓋 之第一測試接點12上設置通孔342後,同樣去除通孔342邊緣之局部接點層32使該接地層34於該通孔342中外露,再以一金屬固定件350(如鐵釘、T型針)穿過該通孔342使金屬固定件350抵止於外露之接地層34表面且崁入第一測試接點12,甚至更可穿過第一測試接點12以至電路基板10背面焊接固定;因而金屬固定件350不但可於接點層32外露構成接地接點324,並使電路基板10之第一測試接點12導通至接地層34,且兼具將高速基板30之側邊與電路基板10相互固接之功能。 Even, as shown in FIG. 7B, the high speed substrate 30 is covered at the edge. After the through hole 342 is disposed on the first test contact 12, the local contact layer 32 of the edge of the through hole 342 is also removed to expose the ground layer 34 to the through hole 342, and then a metal fixing member 350 (such as a nail) The T-shaped pin passes through the through hole 342 to cause the metal fixture 350 to abut against the surface of the exposed ground layer 34 and break into the first test contact 12, and even pass through the first test contact 12 to the circuit substrate 10 The back side is fixed by welding; therefore, the metal fixing member 350 can not only form the grounding contact 324 on the contact layer 32, but also electrically connect the first test contact 12 of the circuit substrate 10 to the ground layer 34, and also has the side of the high speed substrate 30. The function of fixing the circuit board 10 to each other.

當然,於高速基板30之兩側邊將高速基板30與電路基板 10相互固接之方式,可如本實施例所例舉之兩側邊分別為不同之手法達成,或者可採任一方式使兩側邊同時以相同之手法達成,皆可具有本發明所欲達成之功效,因而不在此限。 Of course, the high speed substrate 30 and the circuit substrate are disposed on both sides of the high speed substrate 30. 10, the manner of fixing each other may be achieved by different methods according to the two sides illustrated in the embodiment, or the two sides may be achieved by the same method in any manner, and may have the desired method of the present invention. The effect achieved is not limited to this.

各該訊號線36沿該高速基板30之延伸方向佈設於該軟 性電路板300內部,配合第三圖參照,該等訊號線36設置於一訊號層360上並與接地層34相隔一絕緣層38,由第二測試訊號之實際高頻傳輸規格使訊號層360與接地層34相隔特定厚度之絕緣層38;較佳者,該等訊號線36可部分設於訊號層360且部分設於該接點層32內部或表面,由實際高頻傳輸規格而變化接點層32之厚度,因而可增加高頻訊號傳輸之電路空間。各訊號線36之一端縱向導通至該接點層32之各該第二測試接點322,以傳遞上述測試機台之第二測試訊號,各訊號線36之另一端延伸至該探針組50之邊緣,對應 各訊號線36之末端形成一第二探針接點362,且各該第二探針接點362鄰近具有一接地探針接點364與該接地層34電性導通,配合第二圖參照;至於接地探針接點364可透過該絕緣層38與接地層34縱向電性連接,或者移除第二探針接點362鄰近之局部絕緣層38使外露之接地層34形成該接地探針接點364,皆可具有本發明所欲達成之功效,因而不在此限。 Each of the signal lines 36 is disposed in the soft direction along the extending direction of the high speed substrate 30 The signal board 300 is disposed on a signal layer 360 and is separated from the ground layer 34 by an insulating layer 38. The signal layer 360 is made by the actual high frequency transmission specification of the second test signal. The insulating layer 38 is separated from the ground layer 34 by a specific thickness. Preferably, the signal lines 36 are partially disposed on the signal layer 360 and partially disposed inside or on the surface of the contact layer 32, and are changed by actual high frequency transmission specifications. The thickness of the layer 32 is such that the circuit space for high frequency signal transmission can be increased. One end of each signal line 36 is longitudinally connected to each of the second test contacts 322 of the contact layer 32 to transmit a second test signal of the test machine, and the other end of each signal line 36 extends to the probe set 50. Edge, corresponding A second probe contact 362 is formed at the end of each of the signal lines 36, and each of the second probe contacts 362 has a ground probe contact 364 electrically connected to the ground layer 34, which is referred to in the second figure; The grounding probe contact 364 can be electrically connected to the ground layer 34 through the insulating layer 38, or the local insulating layer 38 adjacent to the second probe contact 362 can be removed to form the exposed ground layer 34 to form the grounding probe. Point 364 can have the effect desired by the present invention, and thus is not limited thereto.

當然,各訊號線36所對應之待測電子元件之間若有訊號 接續或同步處理之時序對應關係,該高速基板30所佈設之訊號線36更可藉由精確的路徑設計使相關之訊號線36等長,例如以接點層32與訊號層360中上、下對準之訊號線36符合等長的需求,或者,同一層接點層32或訊號層360所佈設之訊號線36以增加走線路徑方式使至少二訊號線36符合等長的需求,配合第二圖參照,皆可具有本發明所欲達成之功效,因而不在此限。 Of course, if there is a signal between the electronic components to be tested corresponding to each signal line 36 The timing line of the connection or synchronization process, the signal line 36 disposed on the high-speed substrate 30 can be made to have the same length of the signal line 36 by the precise path design, for example, the upper and lower layers of the contact layer 32 and the signal layer 360. The aligned signal line 36 meets the requirements of the same length, or the signal line 36 disposed on the same layer of the contact layer 32 or the signal layer 360 increases the routing path so that at least two signal lines 36 meet the requirements of the same length. The reference to the two figures can have the effect that the present invention intends to achieve, and thus is not limited thereto.

請配合第二及第三圖參照,探針組50之一固定座上502 設有多數第一、第二探針52、54以及至少一接地探針56。其中,第一探針52電性連接該電路基板10之第一探針接點14;第二探針54為具高頻傳輸特性之高頻探針結構,具有一金屬針542以及與該金屬針542鄰接且電性絕緣之接地金屬,該金屬針542電性連接該高速基板30之訊號線36,該接地金屬電性連接該高速基板之接地層34及接地探針56,第二探針54可如本實施例所提供者為一金屬針542以及與之相互並列且電性絕緣之一地線544所製成,使該金屬針542於該高速基板30上與第二探針接點362電性連接,該地線 544於該高速基板30上與該接地探針接點364電性連接。由於本發明所提供之第二探針主要以配合第二訊號傳遞路徑上伴隨有傳輸接地電位的結構,因此亦可為如第八及九圖所示之具有同軸傳輸結構者;其中,探針組50更有另一第二探針58,第二探針58具有一金屬針582以及一於金屬針582外圍同軸環繞之金屬套管584,該金屬套管584形成與該金屬針582鄰接且電性絕緣接地金屬,使該金屬針582電性連接該高速基板30之第二探針接點362,該金屬套管584電性連接該接地探針接點364。因此該高速基板30傳輸高頻訊號至探針組50之傳輸結構上,任何使傳輸高頻訊號之金屬針設置與之鄰接且電性絕緣之接地金屬,皆可具有本發明所欲達成之功效,因而不在此限。 Please refer to the second and third figures for reference. One of the probe sets 50 is fixed on the base 502. A plurality of first and second probes 52, 54 and at least one grounding probe 56 are provided. The first probe 52 is electrically connected to the first probe contact 14 of the circuit substrate 10; the second probe 54 is a high frequency probe structure having high frequency transmission characteristics, having a metal pin 542 and the metal The pin 542 is adjacent to the electrically insulating grounding metal. The metal pin 542 is electrically connected to the signal line 36 of the high speed substrate 30. The grounding metal is electrically connected to the grounding layer 34 of the high speed substrate and the grounding probe 56, and the second probe. 54 can be made as a metal pin 542 and a ground wire 544 juxtaposed and electrically insulated from each other, so that the metal pin 542 is connected to the second probe on the high speed substrate 30. 362 electrical connection, the ground wire 544 is electrically connected to the ground probe contact 364 on the high speed substrate 30. Since the second probe provided by the present invention mainly cooperates with the structure of the second signal transmission path accompanied by the transmission ground potential, it can also be a coaxial transmission structure as shown in the eighth and ninth diagrams; wherein the probe The set 50 further has a second probe 58 having a metal pin 582 and a metal sleeve 584 coaxially surrounding the periphery of the metal pin 582, the metal sleeve 584 being formed adjacent to the metal pin 582 and The metal pin 582 is electrically connected to the second probe contact 362 of the high speed substrate 30. The metal sleeve 584 is electrically connected to the ground probe contact 364. Therefore, the high-speed substrate 30 transmits the high-frequency signal to the transmission structure of the probe set 50, and any grounding metal that is disposed adjacent to and electrically insulated by the metal needle for transmitting the high-frequency signal can have the effect desired by the present invention. And therefore not limited to this.

當然,為使高頻訊號傳輸至第二探針54時伴隨之接地電 位可維持於高頻導通迴路上,探針組50更於固定座502上設有一金屬片504與該等第二探針54之接地金屬電性連接,第二探針54之金屬針542與該金屬片504透過一絕緣膠材506相互黏著以固定維持特定間距,且該接地探針56設置於該金屬片504上與之電性導通;或者,更可將該金屬片504延伸至鄰近之第一探針52上直接與之電性導通,使透過電路板10所傳輸的第一測試訊號之接地電位在鄰近待測晶粒時仍可與該高速基板30所傳輸的第二測試訊號之接地電位等電位,因此該測試模組1所測試待測晶粒所需之所有接地電位更可透過該金屬片504達到等電位之功能,使本發明具有確保電路接地的完整性之功效。 Of course, the grounding power accompanying the transmission of the high frequency signal to the second probe 54 The position of the probe group 50 is further provided on the fixing base 502, and a metal piece 504 is electrically connected to the grounding metal of the second probes 54. The metal needle 542 of the second probe 54 is connected. The metal strips 504 are adhered to each other through an insulating adhesive 506 to maintain a specific spacing, and the grounding probes 56 are disposed on the metal strips 504 to be electrically connected thereto. Alternatively, the metal strips 504 may be extended to the adjacent ones. The first probe 52 is directly electrically connected to the first test signal, so that the ground potential of the first test signal transmitted through the circuit board 10 can still be transmitted with the second test signal transmitted by the high speed substrate 30 when adjacent to the die to be tested. The ground potential is equipotential, so that all the ground potentials required for testing the die to be tested by the test module 1 can reach the equipotential function through the metal piece 504, so that the invention has the effect of ensuring the integrity of the circuit ground.

另外,為了使該高速基板30能有效應用於高密度的高頻 傳輸需求,探針組50之第二探針54、58同樣可以高密度的空間配置方式,達成如第十圖A、B(或第十一圖A、B)所示分別使該等第二探針54(或58)於固定座502上以交錯及層疊結構滿足高密度的高頻傳輸需求,其中:第十圖A、B為金屬針542與地線544所並列製成之第二探針54於固定座502上的分佈結構。由於絕緣膠材506可以將該等第二探針54及金屬片504於固定座502表面不同縱向高度上逐層固定黏著,因此各該第二探針54附著於固定座502之方式即可以絕緣膠材506將金屬針542鄰近於金屬片504黏著使相隔特定間距,更使與金屬針542並列之地線544貼附金屬片504,再固定金屬片504與固定座502之橫向間隔距離,當完成固定座502上各探針52、54、56的分佈結構後,絕緣膠材506再依其可固化之特性(如熱固化或UV固化)成型於固定座502上。若以較低空間密度配置的結構而言,金屬片504可僅於單一側邊空間以絕緣膠材506黏著該等第二探針54,因此減少固定座502上第二探針54的配置厚度;或者為如第十圖A所示,使第二探針54交錯配置於金屬片504兩側,降低金屬針542之間的電性干擾影響;若以較高空間密度配置的結構而言,配合第十圖B參照,該第二探針54可配置於與金屬片504兩側縱向間隔特定位置,形成金屬片504同一局部之兩側皆佈設有第二探針54之多層重疊結構,當然若考量高密度配置下鄰近金屬針542之間的電性干擾影響,甚至更可於金屬針542及與之並列之地線 544周圍設置絕緣套管,增加第二探針54所傳輸第二測試訊號的完整性。 In addition, in order to enable the high speed substrate 30 to be effectively applied to high density high frequency For transmission requirements, the second probes 54, 58 of the probe set 50 can also be placed in a high-density spatial configuration to achieve the second as shown in FIG. 11A, B (or FIG. 11A, B), respectively. The probe 54 (or 58) satisfies the high-density high-frequency transmission requirement on the fixing base 502 in a staggered and laminated structure, wherein: the tenth figure A, B is the second probe of the metal needle 542 and the ground line 544. The distribution structure of the needle 54 on the mount 502. Since the insulating material 506 can fix the second probes 54 and the metal sheets 504 to each other at different longitudinal heights on the surface of the fixing base 502, the second probes 54 can be insulated by being attached to the fixing base 502. The glue 506 adheres the metal pins 542 adjacent to the metal piece 504 so as to be spaced apart from each other by a specific spacing, and further attaches the metal piece 504 to the ground wire 544 juxtaposed with the metal pins 542, and then fixes the lateral distance between the metal piece 504 and the fixing base 502. After the distribution structure of the probes 52, 54, 56 on the mount 502 is completed, the insulating rubber 506 is molded on the mount 502 according to its curable characteristics such as heat curing or UV curing. If the structure is disposed at a lower spatial density, the metal piece 504 can adhere the second probes 54 with the insulating rubber 506 only in a single side space, thereby reducing the thickness of the second probe 54 on the fixing base 502. Or as shown in FIG. 11A, the second probes 54 are alternately arranged on both sides of the metal piece 504 to reduce the influence of electrical interference between the metal pins 542; if the structure is arranged at a higher spatial density, Referring to FIG. 4B, the second probe 54 can be disposed at a specific position longitudinally spaced from both sides of the metal piece 504, and the two sides of the same portion of the metal piece 504 are provided with a plurality of overlapping structures of the second probes 54. Considering the influence of electrical interference between adjacent metal pins 542 in a high-density configuration, it is even more suitable for metal pins 542 and ground wires juxtaposed therewith. An insulating sleeve is disposed around the 544 to increase the integrity of the second test signal transmitted by the second probe 54.

第十一圖A、B為以金屬套管584同軸環繞金屬針582所 製成之第二探針58於固定座502上的分佈結構。由於第二探針58之金屬針582延伸進入金屬套管584內部並與金屬套管584相隔特定間距且電性絕緣,因此以絕緣膠材506將金屬套管584表面貼附於金屬片504,即可達成將金屬套管584與金屬片504電性連接以及固定金屬針582之目的;且若顧及金屬套管584之弧形表面與金屬片504之接觸面積降低電性連接效果,更可如本實施例所提供之先以導電膠508使金屬套管584貼附於金屬片504,再附著絕緣膠材506使第二探針58穩固於固定座502上,當完成固定座502上各探針52、54、56、58的分佈結構後,絕緣膠材506再依其可固化之特性(如熱固化或UV固化)成型於固定座502上。若以較低空間密度配置的結構而言,金屬片504可僅於單一側邊空間以絕緣膠材506黏著該等第二探針58,或者為如第十一圖A所示,使第二探針58交錯配置於金屬片504兩側;若以較高空間密度配置的結構而言,配合第十一圖B參照,該第二探針58可配置於與金屬片504兩側縱向間隔特定位置,形成金屬片504同一局部之兩側皆佈設有第二探針58之多層重疊結構。 11th, A, B is a metal sleeve 584 coaxially surrounding the metal needle 582 The distribution structure of the fabricated second probe 58 on the mount 502. Since the metal pin 582 of the second probe 58 extends into the metal sleeve 584 and is electrically insulated from the metal sleeve 584 by a certain distance, the surface of the metal sleeve 584 is attached to the metal piece 504 by the insulating rubber 506. The purpose of electrically connecting the metal sleeve 584 to the metal piece 504 and fixing the metal needle 582 can be achieved; and if the contact area between the curved surface of the metal sleeve 584 and the metal piece 504 is reduced, the electrical connection effect is reduced. In this embodiment, the metal sleeve 584 is attached to the metal piece 504 by the conductive adhesive 508, and then the insulating material 506 is adhered to stabilize the second probe 58 on the fixing base 502. After the distribution of the pins 52, 54, 56, 58 is completed, the insulating rubber 506 is formed on the mount 502 according to its curable characteristics (such as heat curing or UV curing). If the structure is disposed at a lower spatial density, the metal piece 504 may adhere the second probes 58 with an insulating rubber 506 only in a single side space, or as shown in FIG. The probes 58 are staggered on both sides of the metal piece 504; if the structure is disposed at a higher spatial density, the second probe 58 can be disposed longitudinally spaced from the sides of the metal piece 504 with reference to FIG. In position, a plurality of overlapping structures of the second probes 58 are disposed on both sides of the same portion of the metal sheet 504.

綜合上述可知,本發明所提供測試模組1可以電路基板10之第一測試接點12接收測試機台所提供之第一測試訊號,經該電路基板10之第一訊號線16傳輸後,以探針組50之第一探針52點 觸待測晶粒中一般中、低頻段運作之電子元件;同時可以高速基板30之軟性電路板300所設置之第二測試接點322接收測試機台所提供之第二測試訊號,並透過軟性電路板300所設置之其中一通孔342與電路基板10之第一測試接點12對位,使測試機台之測試頭所提供高頻訊號之位置維持相同於原本第一測試接點12之相對位置,並仍可以通孔342下第一測試接點12接收第一測試訊號或接地電位,不需犧牲高頻傳輸路徑所佔去的電路空間。尤其若更透過通孔342形成之金屬塊344、346,不但可將第一測試接點12導通至該高速基板30表面,使測試機台之測試頭直接接觸金屬塊344、346,並可達到將高速基板30與電路基板10固接的目的。 In summary, the test module 1 of the present invention can receive the first test signal provided by the test machine by the first test contact 12 of the circuit substrate 10, and transmit the first test signal 16 of the circuit substrate 10 to detect The first probe of the needle set 50 is 52 points. The electronic component operating in the normal middle and low frequency bands of the die is touched; at the same time, the second test signal 322 provided by the flexible circuit board 300 of the high speed substrate 30 receives the second test signal provided by the test machine, and passes through the flexible circuit. One of the through holes 342 of the board 300 is aligned with the first test contact 12 of the circuit board 10, so that the position of the high frequency signal provided by the test head of the test machine remains the same as the position of the original first test contact 12. And the first test signal 12 or the ground potential can still be received by the first test contact 12 under the through hole 342 without sacrificing the circuit space occupied by the high frequency transmission path. In particular, if the metal blocks 344 and 346 formed through the through holes 342 are formed, not only the first test contact 12 can be electrically connected to the surface of the high speed substrate 30, but also the test head of the test machine directly contacts the metal blocks 344 and 346, and can reach The purpose of fixing the high speed substrate 30 to the circuit board 10 is as follows.

再者,高速基板30傳遞第二測試訊號時,透過該接地接 點324接收測試機台所提供之接地電位,可使接地電位伴隨第二測試訊號於高速基板30之接地層34傳輸,維持第二測試訊號於高速基板30內之高頻傳輸特性阻抗;或者,以其中一通孔342穿過接地層34,藉由使該接地層34於該通孔342中外露,接地層34與第一測試接點12更可以透過金屬塊344相互導通並固接,使接地層34與其相互導通之第一測試接點12形成等接地電位之特徵。因此在以探針組50之第二探針54點觸待測晶粒中高頻段運作之高速電子元件,則可以高速基板30與電路基板10所整合的穩固組合結構,對積體電路晶圓待測晶粒之所有不同操作頻段之電子元件同步進行完整之電性測試。 Furthermore, when the high-speed substrate 30 transmits the second test signal, the ground connection is transmitted through the ground. Point 324 receives the ground potential provided by the test machine, and the ground potential can be transmitted along the ground layer 34 of the high speed substrate 30 along with the second test signal to maintain the high frequency transmission characteristic impedance of the second test signal in the high speed substrate 30; or One of the through holes 342 passes through the grounding layer 34. The grounding layer 34 and the first testing contact 12 are further electrically connected to each other through the metal block 344 to fix the grounding layer. The first test contact 12, which is electrically connected to it 34, is characterized by an equal ground potential. Therefore, when the high-speed electronic component operating in the high frequency band of the die to be tested is touched by the second probe 54 of the probe set 50, the stable combination structure of the high-speed substrate 30 and the circuit substrate 10 can be integrated, and the integrated circuit wafer can be integrated. The electronic components of all the different operating bands of the die to be tested are simultaneously subjected to a complete electrical test.

更甚者,藉由高速基板30之內部電路佈設結構,可使高 速基板30表面具有相當大的電路空間得以增設其餘電路元件,以調整高速基板30所傳遞第二測試訊號之電容或電感特性;因此使測試元件電性連接高速基板30內部之訊號線36及接地層34,可依待測晶粒中電子元件之高頻訊號傳遞頻率或特性阻抗等不同規格而彈性改變高速基板30內部訊號線36之電容或電感特性。 Moreover, by the internal circuit layout structure of the high speed substrate 30, the height can be made high. The surface of the speed substrate 30 has a relatively large circuit space to add the remaining circuit components to adjust the capacitance or inductance characteristics of the second test signal transmitted by the high speed substrate 30. Therefore, the test component is electrically connected to the signal line 36 inside the high speed substrate 30. The ground layer 34 can elastically change the capacitance or inductance characteristic of the internal signal line 36 of the high-speed substrate 30 according to different specifications such as high-frequency signal transmission frequency or characteristic impedance of the electronic components in the die to be tested.

請參閱如第十二圖所示本發明另一較佳實施例所提供 之測試模組2,包括一高速基板30’設於如上述之電路基板10並延伸佈設至鄰近探針組50,該高速基板30’具有如同上述實施例所提供之接點層32、接地層34及訊號層360,且使多數訊號線36部分設於訊號層360且部分設於該接點層32內部或表面;差異僅在於,訊號層360兩側分別有接地層34及一外接地層34’,使接點層32及訊號層360之訊號線36所傳輸之第二測試訊號有各自對應的接地訊號迴路分別傳經接地層34及外接地層34’,避免任一高頻路徑結構產生缺陷而對其餘鄰近高頻路徑造成影響,更可減少訊號線36所傳輸第二測試訊號之周圍介電材質之介電損耗。 Please refer to another preferred embodiment of the present invention as shown in FIG. The test module 2 includes a high-speed substrate 30' disposed on the circuit substrate 10 as described above and extending to the adjacent probe set 50. The high-speed substrate 30' has a contact layer 32 and a ground layer as provided in the above embodiment. 34 and the signal layer 360, and the majority of the signal lines 36 are disposed on the signal layer 360 and partially disposed inside or on the surface of the contact layer 32; the difference is only that the signal layer 360 has a ground layer 34 and an outer ground layer 34 respectively. The second test signal transmitted by the signal line 36 of the contact layer 32 and the signal layer 360 has its corresponding ground signal loop passing through the ground layer 34 and the outer ground layer 34', respectively, to avoid defects in any high frequency path structure. The remaining high frequency paths are affected, and the dielectric loss of the surrounding dielectric material transmitted by the second test signal transmitted by the signal line 36 can be reduced.

至於該外接地層34’與之間可如第十三圖所示,該高速 基板30’之軟性電路板300穿設有如上述各實施例所設置之通孔342,正向對位於該第一測試接點12上,並同時去除通孔342邊緣之局部接點層32及通孔342邊緣鄰近電路基板10之軟性電路板300局部表面,使該接地層34及外接地層34’於該通孔342中外露;因此可如上述實施例藉由具導電性之焊接材於該通孔342中將接地層34及外接地層34’與第一測試接點12相互焊接,焊接材凝固後形成 之金屬塊344構成其中一該接地接點324。因此由該接地接點324使接地層34及外接地層34’接收測試機台所提供之接地電位,且接地層34及外接地層34’與電路基板10之第一測試接點12藉由焊接方式連接導通,兼具將高速基板30’與電路基板10相互固接之功能。 As for the outer ground layer 34' and between, as shown in the thirteenth figure, the high speed The flexible circuit board 300 of the substrate 30' is provided with through holes 342 provided in the above embodiments, and the positive contact is located on the first test contact 12, and simultaneously removes the local contact layer 32 and the edge of the through hole 342. The edge of the hole 342 is adjacent to a partial surface of the flexible circuit board 300 of the circuit substrate 10, so that the ground layer 34 and the outer ground layer 34' are exposed in the through hole 342; therefore, the conductive material can be used in the through hole according to the above embodiment. In the hole 342, the ground layer 34 and the outer ground layer 34' are welded to the first test contact 12, and the solder material is solidified. The metal block 344 constitutes one of the ground contacts 324. Therefore, the grounding layer 34 and the external ground layer 34' receive the ground potential provided by the testing machine by the grounding contact 324, and the grounding layer 34 and the outer grounding layer 34' are connected to the first test contact 12 of the circuit substrate 10 by soldering. The function of the high-speed substrate 30' and the circuit board 10 is fixed to each other.

值得一提的是,本發明所提供高速基板可如上述實施例 僅以單一軟性電路板所製成,依據積體電路晶圓之電路佈局再於軟性電路板內規劃對應高頻訊號傳輸位置之訊號線;或可如第十四及第十五圖所示分別為本發明第三及第四較佳實施例所提供之一測試模組3、4,分別具有以複數個軟性電路板分段延伸之一高速基板70、90,設於如同上述實施例所提供該電路基板10之上、下表面106、108。各該高速基板70、90與上述實施例所提供者同樣使一軟性電路板702、902覆蓋電路基板10之第一測試接點12,沿電路基板10之上表面106自測試區102延伸佈設至探針區104,差異僅在於各軟性電路板702、902於探針區104再與另一軟性電路板704、904電性連接,並使以軟性電路板704、904接設如同上述實施例所提供該探針組50之第二探針54,其中:第十四圖所示高速基板70之二該軟性電路板702、704之間以一轉接器706電性連接,轉接器706可為多重矩陣開關元件,用以將對應該電路基板10上表面106之軟性電路板702所佈設之多數訊號線72切換至與對應該電路基板10下表面108之軟性電路板704之多數訊號線74一對一電性導通。 It is worth mentioning that the high speed substrate provided by the present invention can be as described in the above embodiment. It is made only by a single flexible circuit board, and the signal line corresponding to the high-frequency signal transmission position is planned in the flexible circuit board according to the circuit layout of the integrated circuit wafer; or as shown in the fourteenth and fifteenth figures respectively A test module 3, 4 provided for the third and fourth preferred embodiments of the present invention has a high speed substrate 70, 90 extending in a plurality of flexible circuit boards, respectively, as provided in the above embodiment. The circuit board 10 has upper and lower surfaces 106 and 108. Each of the high-speed substrates 70 and 90, like the one provided in the above embodiment, has a flexible circuit board 702, 902 covering the first test contact 12 of the circuit substrate 10, and extending from the upper surface 106 of the circuit substrate 10 from the test area 102 to The probe area 104 differs only in that the flexible circuit boards 702 and 902 are electrically connected to the other flexible circuit boards 704 and 904 in the probe area 104, and are connected to the flexible circuit boards 704 and 904 as in the above embodiment. The second probe 54 of the probe set 50 is provided, wherein: the high-speed substrate 70 shown in FIG. 14 is electrically connected to the flexible circuit boards 702 and 704 by an adapter 706, and the adapter 706 can be For the multi-matrix switching element, the majority of the signal lines 72 disposed on the flexible circuit board 702 corresponding to the upper surface 106 of the circuit substrate 10 are switched to the majority of the signal lines 74 of the flexible circuit board 704 corresponding to the lower surface 108 of the circuit substrate 10. One-to-one electrical conduction.

第十五圖所示高速基板90之二該軟性電路板902、904之 間以多數高頻傳輸線906電性連接,用以將對應該電路基板10上表面106之軟性電路板902所佈設之多數訊號線92跳接至與對應該電路基板10下表面108之軟性電路板904之多數訊號線94一對一電性導通。 The high-speed substrate 90 shown in the fifteenth figure, the flexible circuit board 902, 904 A plurality of high frequency transmission lines 906 are electrically connected to jump a plurality of signal lines 92 disposed on the flexible circuit board 902 corresponding to the upper surface 106 of the circuit substrate 10 to a flexible circuit board corresponding to the lower surface 108 of the circuit substrate 10. Most of the signal lines 94 of 904 are electrically turned on one to one.

因此該高速基板70(或90)之各軟性電路板702、704(或 902、904)可事先備製好固定路徑之訊號線72、74(或92、94),再依實際積體電路晶圓之電路佈局將上、下表面106、108分別對應之訊號線72、74(或92、94)相互轉接導通,加速測試模組3(或4)的模組製作工時。 Therefore, the flexible circuit boards 702, 704 of the high speed substrate 70 (or 90) (or 902, 904) The signal lines 72, 74 (or 92, 94) of the fixed path may be prepared in advance, and the signal lines 72 corresponding to the upper and lower surfaces 106, 108 respectively according to the circuit layout of the actual integrated circuit wafer, 74 (or 92, 94) is turned on and off to accelerate the module manufacturing time of the test module 3 (or 4).

唯,以上所述者,僅為本發明之較佳可行實施例而已,故舉凡應用本發明說明書及申請專利範圍所為之等效結構變化,理應包含在本發明之專利範圍內。 The above-mentioned embodiments are merely preferred embodiments of the present invention, and equivalent structural changes to the scope of the present invention and the scope of the claims are intended to be included in the scope of the present invention.

1‧‧‧測試模組 1‧‧‧Test module

10‧‧‧電路基板 10‧‧‧ circuit board

102‧‧‧測試區 102‧‧‧Test area

104‧‧‧探針區 104‧‧‧ probe area

106‧‧‧上表面 106‧‧‧Upper surface

108‧‧‧下表面 108‧‧‧ lower surface

12‧‧‧第一測試接點 12‧‧‧First test contact

16‧‧‧第一訊號線 16‧‧‧First signal line

30‧‧‧高速基板 30‧‧‧High speed substrate

300‧‧‧軟性電路板 300‧‧‧Soft circuit board

32‧‧‧接點層 32‧‧‧Contact layer

322‧‧‧第二測試接點 322‧‧‧Second test contact

324‧‧‧接地接點 324‧‧‧ Grounding contacts

34‧‧‧接地層 34‧‧‧ Grounding layer

36‧‧‧訊號線 36‧‧‧Signal line

360‧‧‧訊號層 360‧‧‧Signal layer

362‧‧‧第二探針接點 362‧‧‧Second probe contact

364‧‧‧接地探針接點 364‧‧‧Ground probe contact

38‧‧‧絕緣層 38‧‧‧Insulation

50‧‧‧探針組 50‧‧‧ probe set

502‧‧‧固定座 502‧‧‧ Fixed seat

504‧‧‧金屬片 504‧‧‧metal pieces

506‧‧‧絕緣膠材 506‧‧‧Insulating rubber

54‧‧‧第二探針 54‧‧‧second probe

542‧‧‧金屬針 542‧‧‧Metal Needle

544‧‧‧地線 544‧‧‧Ground

Claims (18)

一種高速基板,用於搭配一具有多數第一測試接點且用以傳輸一測試機台所提供之中、低頻測試訊號之電路基板,以傳輸該測試機台所提供之高頻測試訊號,該高速基板具有:一上表面及相對之一下表面;一端,具有多數通孔以及多數第二測試接點,各該通孔可供該測試機台之一測試頭通過,各該第二測試接點可供傳遞該測試機台的高頻測試訊號;另一端,位於該一端相對的一端,具有多數探針接點與至少一接地探針接點,各該探針接點可供一高頻探針電性連接,該至少一接地探針接點可供一接地探針電性連接;多數訊號線,各該訊號線的兩端分別與各該探針接點與各該第二測試接點電性連接;以及至少一接地層,係與該至少一接地探針接點電性連接。 A high-speed substrate for equipping a circuit substrate having a plurality of first test contacts for transmitting a low-frequency test signal provided by a test machine to transmit a high-frequency test signal provided by the test machine, the high-speed substrate The utility model has an upper surface and a lower surface; one end has a plurality of through holes and a plurality of second test contacts, each of the through holes is available for one of the test heads of the test machine, and each of the second test contacts is available Transmitting the high frequency test signal of the test machine; the other end is located at the opposite end of the one end, and has a plurality of probe contacts and at least one ground probe contact, and each of the probe contacts can be used for a high frequency probe The at least one grounding probe contact is electrically connected to a grounding probe; the majority of the signal lines, the two ends of each of the signal lines are respectively electrically connected to the probe contacts and the second test contacts And connecting at least one ground layer to the at least one grounding probe contact. 依據申請專利範圍第1項所述之高速基板,該高速基板具有一訊號層,各該訊號線位於該訊號層。 The high speed substrate according to claim 1, wherein the high speed substrate has a signal layer, and each of the signal lines is located in the signal layer. 依據申請專利範圍第1項所述之高速基板,該高速基板具有一接點層,各該第二測試接點位於該接點層。 The high speed substrate according to claim 1, wherein the high speed substrate has a contact layer, and each of the second test contacts is located at the contact layer. 依據申請專利範圍第2項所述之高速基板,該高速基板更具有一接點層,該接點層與該訊號層之間具有該接地層。 According to the high-speed substrate of claim 2, the high-speed substrate further has a contact layer, and the ground layer is provided between the contact layer and the signal layer. 依據申請專利範圍第2項所述之高速基板,該高速基板更具有一接點層,該接點層與該接地層之間具有該訊號層。 According to the high-speed substrate of claim 2, the high-speed substrate further has a contact layer, and the signal layer is provided between the contact layer and the ground layer. 依據申請專利範圍第3項所述之高速基板,該等訊號線係部分設於該接點層的內部或表面。 According to the high-speed substrate of claim 3, the signal line portions are disposed inside or on the surface of the contact layer. 依據申請專利範圍第4項所述之高速基板,該高速基板還設有一外接地層,該訊號層位於該接地層與外接地層之間。 According to the high-speed substrate of claim 4, the high-speed substrate is further provided with an outer ground layer, and the signal layer is located between the ground layer and the outer ground layer. 依據申請專利範圍第7項所述之高速基板,該高速基板的外接地層是於至少一該通孔外露。 According to the high speed substrate of claim 7, the outer ground layer of the high speed substrate is exposed at least one of the through holes. 依據申請專利範圍第4或5項中任一項所述之高速基板,該接點層與訊號層分別具有一該訊號線相互重疊對位。 The high-speed substrate according to any one of claims 4 to 5, wherein the contact layer and the signal layer respectively have a signal line overlapping with each other. 依據申請專利範圍第4或5項中任一項所述之高速基板,該接點層或訊號層具有長度相同的至少二該訊號線。 The high speed substrate according to any one of claims 4 or 5, wherein the contact layer or the signal layer has at least two signal lines of the same length. 依據申請專利範圍第1項所述之高速基板,該高速基板的接地層是於鄰近各該探針接點外露並形成該接地探針接點。 According to the high-speed substrate of claim 1, the ground layer of the high-speed substrate is exposed adjacent to the probe contacts and forms the ground probe contact. 依據申請專利範圍第1項所述之高速基板,該高速基板的該接地層是於至少一該通孔外露。 The high-speed substrate according to claim 1, wherein the ground layer of the high-speed substrate is exposed to at least one of the through holes. 依據申請專利範圍第1項所述之高速基板,該高速基板更包括至少一接地接點,該接地層電性連接該至少一接地接點。 The high speed substrate further includes at least one ground contact electrically connected to the at least one ground contact. 依據申請專利範圍第13項所述之高速基板,該至少一接地接點位於該高速基板之一接點層或該接地層。 According to the high speed substrate of claim 13, the at least one ground contact is located at one of the contact layers of the high speed substrate or the ground layer. 依據申請專利範圍第14項所述之高速基板,該高速基板的接地層上設有一盲孔,該接地接點位於該接地層且通過該盲孔外露。 According to the high-speed substrate of claim 14, the grounding layer of the high-speed substrate is provided with a blind hole, and the grounding contact is located on the grounding layer and exposed through the blind hole. 依據申請專利範圍第1項所述之高速基板,該高速基板還包括至少一電路元件,該電路元件設於該高速基板的表面,用以調整該高速基板所傳遞的該測試訊號的電容或電感特性。 According to the high-speed substrate of claim 1, the high-speed substrate further includes at least one circuit component disposed on a surface of the high-speed substrate for adjusting a capacitance or an inductance of the test signal transmitted by the high-speed substrate. characteristic. 依據申請專利範圍第1項所述之高速基板,該高速基板的接地層是於該高速基板的邊緣外露。 According to the high speed substrate of claim 1, the ground layer of the high speed substrate is exposed at the edge of the high speed substrate. 一種高速基板,用於搭配一具有多數第一測試接點且用以傳輸一測試機台所提供之中、低頻測試訊號之電路基板,以傳輸該測試機台所提供之高頻測試訊號,該高速基板具有:一上表面及相對之一下表面;一端,具有多數通孔以及多數第二測試接點,各該通孔可供該測試機台之一測試頭通過,各該第二測試接點可供傳遞該測試機台的高頻測試訊號,該多數通孔至少其中之一通孔用於正對該電路基板之該多數第一測試接點其中之一;另一端,位於該一端相對的一端,具有多數探針接點與至少一接地探針接點,各該探針接點可供一高頻探針電性連接,該至少一接地探針接點可供一接地探針電性連接;多數訊號線,各該訊號線的兩端分別與各該探針接點與各該第二測試接點電性連接;以及至少一接地層,係與該至少一接地探針接點電性連接。 A high-speed substrate for equipping a circuit substrate having a plurality of first test contacts for transmitting a low-frequency test signal provided by a test machine to transmit a high-frequency test signal provided by the test machine, the high-speed substrate The utility model has an upper surface and a lower surface; one end has a plurality of through holes and a plurality of second test contacts, each of the through holes is available for one of the test heads of the test machine, and each of the second test contacts is available Transmitting a high frequency test signal of the test machine, wherein at least one of the plurality of through holes is for one of the plurality of first test contacts of the circuit substrate; and the other end is located at an opposite end of the one end, A plurality of probe contacts are connected to at least one ground probe, and each of the probe contacts is electrically connected to a high frequency probe, and the at least one ground probe contact is electrically connected to a ground probe; Each of the signal lines is electrically connected to each of the probe contacts and each of the second test contacts; and at least one ground layer is electrically connected to the at least one ground probe contact.
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