TWI538372B - Buck DC converter and its fast response circuit - Google Patents

Buck DC converter and its fast response circuit Download PDF

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TWI538372B
TWI538372B TW104117345A TW104117345A TWI538372B TW I538372 B TWI538372 B TW I538372B TW 104117345 A TW104117345 A TW 104117345A TW 104117345 A TW104117345 A TW 104117345A TW I538372 B TWI538372 B TW I538372B
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voltage
unit
switch
converter
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TW201642568A (en
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guan-ren Zeng
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Description

降壓直流轉換器及其快速響應電路 Buck DC converter and its fast response circuit

本發明係關於一種降壓直流轉換器及其快速響應電路,尤指一種可使降壓直流轉換器具有快速瞬時響應能力的降壓直流轉換器及其快速響應電路。 The present invention relates to a step-down DC converter and a fast response circuit thereof, and more particularly to a step-down DC converter capable of providing a fast transient response capability of a step-down DC converter and a fast response circuit thereof.

隨著電子產業的發展,各種電子裝置在電子技術的進步下亦因該發展趨勢及人類的需求而不斷地被開發出來,例如各種不同功能取向的手持式電子裝置、筆記型電腦、桌上型電腦等。 With the development of the electronics industry, various electronic devices have been continuously developed due to the development trend and human needs under the advancement of electronic technology, such as handheld electronic devices with different functional orientations, notebook computers, and desktops. Computer, etc.

由於電子產品需藉由給予足夠的電力始能穩定地運作,因此電子產品內各負載的電源供應電路就顯得相當重要。電源供應電路會根據負載的功率需求來供應適當的電壓與電流,當負載在輕載(低功率消耗)與重載(高功率消耗)間做變換時,電源供應電路就必須要能快速進行對應的切換。 Since electronic products need to operate stably with sufficient power, the power supply circuit of each load in the electronic product is quite important. The power supply circuit supplies the appropriate voltage and current according to the power demand of the load. When the load is changed between light load (low power consumption) and heavy load (high power consumption), the power supply circuit must be able to respond quickly. Switching.

習知的電源供應電路中係藉由降壓直流轉換器來完成輕載與重載間之電源供應的切換,習知的降壓直流轉換器係單純利用一回授電壓,並經由一誤差放大器後,得到一補償電壓,再透過將該補償電壓與一斜坡振盪訊號比較後的比較結果來調整該降壓直流轉換器的一責任週期(duty cycle),以控制降壓直流轉換器的輸出電壓。然而,由於該誤差放大器的輸出端會外接電阻及電容並接地以作為頻率補償,且該補償電壓的電位係由該電容經過該電阻而由該誤差放大器的輸出級進行放電,因此,當原本位於重載供應狀態而具有高電位的補償電壓要轉換為輕載供應狀態之低電位的補償電壓時,該電容由於在放電 上需要時間,導致習知的架構無法將原處於高電位的補償電壓快速調整為低電位(需等待該電容放電完畢),進而導致本應快速切換為輕載的責任週期之責任比在初期仍有一段時間處於重載的責任週期之責任比,此狀況使得重載狀態下的降壓直流轉換器在應轉為輕載狀態的初期仍然供應著過高的輸出電壓(亦稱「輸出峰值電壓」),亦即,習知的降壓直流轉換器難以在重載轉輕載時達到快速切換,整個降壓直流轉換器的迴路反應慢,而使得重載轉輕載的輸出峰值電壓無法被有效地減少。 In the conventional power supply circuit, the power supply between the light load and the heavy load is switched by a step-down DC converter. The conventional step-down DC converter simply uses a feedback voltage and passes through an error amplifier. Afterwards, a compensation voltage is obtained, and a duty cycle of the step-down DC converter is adjusted by comparing the compensation voltage with a ramping signal to control the output voltage of the step-down DC converter. . However, since the output of the error amplifier is externally connected with a resistor and a capacitor and grounded as a frequency compensation, and the potential of the compensation voltage is discharged from the output of the error amplifier by the capacitor, the original is located When the compensation voltage with a high potential is transferred to the low-potential compensation voltage of the light-load supply state, the capacitor is discharged It takes time to cause the conventional architecture to quickly adjust the compensation voltage that was originally at a high potential to a low potential (waiting for the capacitor to be discharged), which in turn leads to a duty cycle that should be quickly switched to light load. There is a duty ratio for the duty cycle of the heavy load for a period of time. This condition causes the step-down DC converter under heavy load to still supply an excessive output voltage at the initial stage of switching to a light load state (also known as "output peak voltage". That is, the conventional step-down DC converter is difficult to achieve fast switching when the load is heavy to light load, and the loop response of the entire step-down DC converter is slow, so that the output peak voltage of the heavy load to the light load cannot be Effectively reduced.

為此,如何加快該補償電壓的調整速度及使迴路反應速度變快,進而有效減少重載轉輕載時之輸出峰值電壓係本發明亟欲解決之問題。 Therefore, how to speed up the adjustment speed of the compensation voltage and make the loop reaction speed become faster, thereby effectively reducing the output peak voltage when the heavy load is transferred to the light load is a problem to be solved by the present invention.

為解決上述現有技術的缺失,本發明之一目的在於提供一種降壓直流轉換器的快速響應電路,其係可快速調整補償電壓及加速電容的放電(縮短其放電時間),進而加快該補償電壓的調整速度及使迴路反應速度變快,而有效減少重載轉輕載時之輸出峰值電壓。 In order to solve the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a fast response circuit of a step-down DC converter, which can quickly adjust the compensation voltage and the discharge of the acceleration capacitor (shortening the discharge time), thereby accelerating the compensation voltage. The adjustment speed and the loop reaction speed are faster, and the output peak voltage at the time of heavy load to light load is effectively reduced.

為達上述目的及其他目的,本發明提出一種降壓直流轉換器的快速響應電路,係根據該降壓直流轉換器之輸出端的一回授電壓與一參考電壓的比較結果產生一調整誤差電壓供該降壓直流轉換器之功率級進行責任週期之責任比的調整,該快速響應電路包括:一補償單元,係接收該比較結果之電壓以進行儲存;一偵測單元,係耦接該補償單元及接收該比較結果,根據該比較結果之電壓及該補償單元所儲存之電壓產生一開關電壓;及一開關單元,其輸入端係接收該比較結果之電位並耦接該降壓直流轉換器之功率級的輸入端,該開關單元之輸出端係接地,該開關單元之控制端耦接該偵測單元以響應該開關 電壓而於重載轉輕載時所接收的比較結果下導通與該接地間的路徑,使該降壓直流轉換器之功率級輸入端之接收電壓的電位被下拉。 To achieve the above and other objects, the present invention provides a fast response circuit for a step-down DC converter, which generates an adjustment error voltage according to a comparison between a feedback voltage and a reference voltage at an output end of the step-down DC converter. The power stage of the step-down DC converter performs the duty ratio adjustment of the duty cycle. The fast response circuit includes: a compensation unit that receives the voltage of the comparison result for storage; and a detection unit coupled to the compensation unit And receiving the comparison result, generating a switching voltage according to the voltage of the comparison result and the voltage stored by the compensation unit; and a switching unit, wherein the input end receives the potential of the comparison result and is coupled to the step-down DC converter An input end of the power stage, the output end of the switch unit is grounded, and the control end of the switch unit is coupled to the detecting unit to respond to the switch The voltage is turned on and the path between the ground and the ground when the load is transferred from the heavy load to the light load, so that the potential of the received voltage of the power stage input terminal of the step-down DC converter is pulled down.

於本發明之一實施例中,該補償單元係包含一電阻單元及一電容單元,該電阻單元的一端係接收該比較結果之電壓以及耦接該偵測單元的第一端,該電阻單元的另一端係耦接該偵測單元的第二端及該電容單元的一端,該電容單元之另一端係接地。 In one embodiment of the present invention, the compensation unit includes a resistor unit and a capacitor unit, and one end of the resistor unit receives the voltage of the comparison result and is coupled to the first end of the detecting unit. The other end is coupled to the second end of the detecting unit and one end of the capacitor unit, and the other end of the capacitor unit is grounded.

於本發明之一實施例中,該偵測單元係為一比較器,該比較器的正相輸入端係接收該補償單元所儲存之電壓,該比較器的反相輸入端係接收該比較結果之電壓,以響應重載轉輕載時之該補償單元所儲存之電壓高於該比較結果之電壓的狀況產生導通該開關單元的開關電壓。 In an embodiment of the invention, the detecting unit is a comparator, and the positive phase input terminal of the comparator receives the voltage stored by the compensation unit, and the inverting input terminal of the comparator receives the comparison result. The voltage is generated to turn on the switching voltage of the switching unit in response to the condition that the voltage stored by the compensation unit is higher than the voltage of the comparison result when the heavy load is transferred to the light load.

為達上述目的及其他目的,本發明復提出一種降壓直流轉換器,包括一功率級、一濾波電路、一第一分壓電路、一誤差放大器及一偵測以及快速充放電電路,該功率級係接收一輸入電壓,並基於其內部的一責任週期而調整該輸入電壓;該濾波電路係接收調整後的該輸入電壓,並將該輸入電壓轉換為一電感電流,且對該電感電流濾波,而產生該輸出電壓;該第一分壓電路係接收並分壓該輸出電壓而產生一回授電壓;該誤差放大器係接收一參考電壓及該回授電壓,並基於該參考電壓及該回授電壓的電壓差,而產生一誤差電壓;該快速響應電路係耦接於該功率級及該誤差放大器之間。其中,該快速響應電路包含一補償單元、一偵測單元及一第三開關,該頻率補償單元係為一分壓儲能電路,並用於接收該誤差電壓,而產生一分壓並儲存其電位;該偵測單元係根據該誤差電壓及該補償單元所儲存之電壓產生一開關電壓;及該第三開關係接收該開關電壓,並響應該開關電壓進行開啟或關閉,以選擇性地將該誤差電 壓接地而產生並輸出對應的一調整誤差電壓至該功率級,供該功率級調整該責任週期的責任比(duty ratio)。 To achieve the above and other objects, the present invention further provides a step-down DC converter including a power stage, a filter circuit, a first voltage dividing circuit, an error amplifier, and a detecting and fast charging and discharging circuit. The power stage receives an input voltage and adjusts the input voltage based on an internal duty cycle thereof; the filter circuit receives the adjusted input voltage, converts the input voltage into an inductor current, and the inductor current Filtering to generate the output voltage; the first voltage dividing circuit receives and divides the output voltage to generate a feedback voltage; the error amplifier receives a reference voltage and the feedback voltage, and based on the reference voltage and The voltage difference of the feedback voltage generates an error voltage; the fast response circuit is coupled between the power stage and the error amplifier. The fast response circuit includes a compensation unit, a detection unit and a third switch. The frequency compensation unit is a voltage division energy storage circuit and is configured to receive the error voltage to generate a voltage division and store the potential thereof. The detecting unit generates a switching voltage according to the error voltage and a voltage stored by the compensation unit; and the third open relationship receives the switching voltage, and is turned on or off in response to the switching voltage to selectively Error power Pressing the ground generates and outputs a corresponding adjustment error voltage to the power level, wherein the power level adjusts a duty ratio of the duty cycle.

於本發明之一實施例中,當該第三開關開啟時,該誤差電壓之電位始因接地而下降。 In an embodiment of the invention, when the third switch is turned on, the potential of the error voltage begins to drop due to grounding.

於本發明之一實施例中,該第三開關(該開關單元)為一N型金屬氧化物半導體場效電晶體(NMOS)。 In an embodiment of the invention, the third switch (the switching unit) is an N-type metal oxide semiconductor field effect transistor (NMOS).

於本發明之一實施例中,該功率級包含一邏輯單元以接收該調整誤差電壓,該邏輯單元可為一正反器,該正反器的重置端接收該調整誤差電壓,該正反器的設置端接收一時脈訊號,該正反器的輸出端輸出一責任週期供該功率級調整該輸入電壓。 In an embodiment of the invention, the power stage includes a logic unit to receive the adjustment error voltage, the logic unit can be a flip-flop, and the reset end of the flip-flop receives the adjustment error voltage, the positive and negative The set terminal of the device receives a clock signal, and the output of the flip-flop outputs a duty cycle for the power level to adjust the input voltage.

於本發明之一實施例中,該開關單元之輸入端係接收該誤差電壓並耦接該正反器的重置端,該開關單元之輸出端係接地,該開關單元之控制端耦接該偵測單元以響應該開關電壓而於重載轉輕載時導通該開關單元,使該誤差電壓的電位被下拉而成為輸入至該功率級的該調整誤差電壓。 In an embodiment of the present invention, the input end of the switch unit receives the error voltage and is coupled to the reset end of the flip-flop, the output end of the switch unit is grounded, and the control end of the switch unit is coupled to the The detecting unit turns on the switching unit when the heavy load is turned to light load in response to the switching voltage, so that the potential of the error voltage is pulled down to become the adjusted error voltage input to the power stage.

藉此,本發明之降壓直流轉換器藉由該功率級、該濾波電路、該第一分壓電路、該誤差放大器及該快速響應電路,以加快該補償電壓的調整速度及使迴路反應速度變快,進而有效減少重載轉輕載時之輸出峰值電壓。 Thereby, the buck DC converter of the present invention accelerates the adjustment speed of the compensation voltage and makes the loop reaction by the power stage, the filter circuit, the first voltage dividing circuit, the error amplifier and the fast response circuit. The speed is faster, which effectively reduces the output peak voltage when the load is heavy to light load.

100‧‧‧降壓直流轉換器 100‧‧‧Buck DC Converter

110‧‧‧功率級 110‧‧‧Power level

111‧‧‧閘極驅動器 111‧‧‧gate driver

112‧‧‧邏輯單元 112‧‧‧Logical unit

120‧‧‧濾波電路 120‧‧‧Filter circuit

130‧‧‧第一分壓電路 130‧‧‧First voltage divider circuit

140‧‧‧誤差放大器 140‧‧‧Error amplifier

150‧‧‧快速響應電路 150‧‧‧Response fast circuit

151‧‧‧補償單元 151‧‧‧Compensation unit

152‧‧‧偵測單元 152‧‧‧Detection unit

C‧‧‧電容 C‧‧‧ capacitor

C1‧‧‧第一端 C1‧‧‧ first end

C2‧‧‧第二端 C2‧‧‧ second end

Clk‧‧‧時脈訊號 Clk‧‧‧ clock signal

IL‧‧‧電感電流 I L ‧‧‧Inductor current

L‧‧‧電感 L‧‧‧Inductance

L1‧‧‧第一端 L1‧‧‧ first end

L2‧‧‧第二端 L2‧‧‧ second end

R‧‧‧電阻 R‧‧‧resistance

R1‧‧‧第一端 R1‧‧‧ first end

R2‧‧‧第二端 R2‧‧‧ second end

RA‧‧‧電阻 R A ‧‧‧resistance

RB‧‧‧電阻 R B ‧‧‧resistance

RL‧‧‧負載電阻 R L ‧‧‧Load resistor

S1‧‧‧第一開關 S1‧‧‧ first switch

S2‧‧‧第二開關 S2‧‧‧ second switch

S3‧‧‧第三開關 S3‧‧‧ third switch

VAE‧‧‧調整誤差電壓 V AE ‧‧‧Adjust error voltage

VD‧‧‧分壓 V D ‧‧‧ partial pressure

VE‧‧‧誤差電壓 V E ‧‧‧ error voltage

VFB‧‧‧回授電壓 V FB ‧‧‧Responsive voltage

VIN‧‧‧輸入電壓 V IN ‧‧‧ input voltage

VOUT‧‧‧輸出電壓 V OUT ‧‧‧ output voltage

VREF‧‧‧參考電壓 V REF ‧‧‧reference voltage

VS‧‧‧開關電壓 V S ‧‧‧Switching voltage

〔圖1〕係為本發明之一實施例中降壓直流轉換器之電路圖。 FIG. 1 is a circuit diagram of a step-down DC converter according to an embodiment of the present invention.

為充分瞭解本發明之目的、特徵及功效,茲藉由下述具體之實施例,並配合所附之圖式,對本發明做一詳細說明,說明如後: 請參閱圖1,係為本發明之一實施例中降壓直流轉換器之電路圖。該降壓直流轉換器100包括一功率級110、一濾波電路120、一第一分壓電路130、一誤差放大器140以及一快速響應電路150。 In order to fully understand the objects, features and advantages of the present invention, the present invention will be described in detail by the following specific embodiments and the accompanying drawings. Please refer to FIG. 1, which is a circuit diagram of a step-down DC converter according to an embodiment of the present invention. The step-down DC converter 100 includes a power stage 110, a filter circuit 120, a first voltage dividing circuit 130, an error amplifier 140, and a fast response circuit 150.

該功率級110係接收一輸入電壓VIN,並基於其內部的一責任週期(duty cycle)進行調整而輸出調整後之該輸入電壓VINThe power stage 110 receives a system input voltage V IN, and a duty cycle based on its inside (duty cycle) is adjusted to output the input voltage V IN after the adjustment.

詳言之,該功率級110包括一第一開關S1、一第二開關S2、一閘極驅動器111以及一邏輯單元112。該第一開關S1係耦接至該輸入電壓VIN,且當該第一開關S1為開啟時,輸出該輸入電壓VIN至該濾波電路120,並在該濾波電路120中產生一電感電流IL;該第二開關S2係接地,且當該第二開關S2為開啟時,該濾波電路120係接地;該閘極驅動器111係接收一責任週期(duty cycle),以控制該第一開關S1及該第二開關S2的開啟或關閉;以及該邏輯單元112係基於一調整誤差電壓VAE及一時脈訊號Clk,而決定該責任週期的責任比(duty ratio),並輸出該責任週期至該閘極驅動器111。 In detail, the power stage 110 includes a first switch S 1 , a second switch S 2 , a gate driver 111 , and a logic unit 112 . The first switch S 1 is coupled to the input voltage V IN , and when the first switch S 1 is turned on, outputs the input voltage V IN to the filter circuit 120, and generates an inductor in the filter circuit 120. Current I L ; the second switch S 2 is grounded, and when the second switch S 2 is turned on, the filter circuit 120 is grounded; the gate driver 111 receives a duty cycle to control the The first switch S 1 and the second switch S 2 are turned on or off; and the logic unit 112 determines a duty ratio of the duty cycle based on an adjustment error voltage V AE and a clock signal Clk, and The duty cycle is output to the gate driver 111.

於本實施例中,該第一開關S1可為一P型金屬氧化物半導體場效電晶體(PMOS),該第二開關S2可為一N型金屬氧化物半導體場效電晶體(NMOS);該邏輯單元112可為一正反器,且該正反器的重置端(R)接收該調整誤差電壓VAE,該正反器的設置端(S)接收該時脈訊號Clk,該正反器的輸出端(Q)輸出該責任週期至該閘極驅動器111。其中,該第一開關S1、該第二開關S2以及該邏輯單元112的形式並不以此為限,凡是能達成相同功能的電子元件皆不脫離本發明的範疇。 In this embodiment, the first switch S 1 may be a P-type metal oxide semiconductor field effect transistor (PMOS), and the second switch S 2 may be an N-type metal oxide semiconductor field effect transistor (NMOS). The logic unit 112 can be a flip-flop, and the reset terminal (R) of the flip-flop receives the adjustment error voltage V AE , and the set terminal (S) of the flip-flop receives the clock signal Clk, The output terminal (Q) of the flip-flop outputs the duty cycle to the gate driver 111. The form of the first switch S 1 , the second switch S 2 , and the logic unit 112 are not limited thereto, and any electronic component that can achieve the same function does not deviate from the scope of the present invention.

該濾波電路120可為一低通濾波電路,用於傳送及儲存能量,並濾除交流雜訊波。該濾波電路120包含一電感L、一電容C以及一電阻R。該電感L係具有一第一端L1及一第二端L2,該電感L的第一端L1係接收該輸入電壓VIN,並將該輸入電壓VIN轉換為一電感電流IL,且該電感L的第二端L2係輸出一輸出電壓VOUT;該電容C係具有一第一端C1及一第二端C2,該第電容C的第一端C1係耦接至該電感L的第二端L2;以及該電阻R係具有一第一端R1及一第二端R2,該電阻R的第一端R1係耦接至該電容C的第二端C2,該電阻R的第二端R2係接地。其中,該濾波電路120的形式並不以此為限,凡是能達成相同功能的電子元件皆屬於本發明保護的範圍。 The filter circuit 120 can be a low pass filter circuit for transmitting and storing energy and filtering out AC noise waves. The filter circuit 120 includes an inductor L, a capacitor C, and a resistor R. The inductor L has a first end L1 and a second end L2. The first end L1 of the inductor L receives the input voltage V IN and converts the input voltage V IN into an inductor current I L , and the The second end L2 of the inductor L outputs an output voltage V OUT . The capacitor C has a first end C1 and a second end C2. The first end C1 of the capacitor C is coupled to the inductor L. The second end L2 has a first end R1 and a second end R2. The first end R1 of the resistor R is coupled to the second end C2 of the capacitor C, and the second end of the resistor R R2 is grounded. The form of the filter circuit 120 is not limited thereto. Any electronic component that can achieve the same function belongs to the scope of protection of the present invention.

該第一分壓電路130係接收並分壓該輸出電壓VOUT而產生一回授電壓VFB,且該第一分壓電路130係由串聯的二電阻(RA,RB)所組成。其中,該第一分壓電路130的形式並不以此為限,凡是能達成相同功能的電子元件皆屬於本發明保護的範圍。 The first voltage dividing circuit 130 receives and divides the output voltage V OUT to generate a feedback voltage V FB , and the first voltage dividing circuit 130 is connected by two resistors (R A , R B ) connected in series. composition. The form of the first voltage dividing circuit 130 is not limited thereto, and all electronic components that can achieve the same function are within the scope of the present invention.

該誤差放大器140係接收一參考電壓VREF及該回授電壓VFB,並基於該參考電壓VREF及該回授電壓VFB的電壓差,而產生一誤差電壓VEThe error amplifier 140 receives a reference voltage V REF and the feedback voltage V FB , and generates an error voltage V E based on the voltage difference between the reference voltage V REF and the feedback voltage V FB .

詳言之,該誤差放大器140具有一反相端(-)、一非反相端(+)及一輸出端,該誤差放大器140的反相端係接收該回授電壓VFB,該誤差放大器140的非反相端係接收該參考電壓VREF,並基於該參考電壓VREF及該回授電壓VFB的電壓差,以使得該誤差放大器的輸出端係輸出該誤差電壓VE。其中,該誤差放大器140的形式並不以此為限,凡是能達成相同功能的電子元件皆屬於本發明保護的範圍。 In detail, the error amplifier 140 has an inverting terminal (-), a non-inverting terminal (+) and an output terminal, and the inverting terminal of the error amplifier 140 receives the feedback voltage V FB , the error amplifier The non-inverting terminal of 140 receives the reference voltage V REF and is based on the voltage difference between the reference voltage V REF and the feedback voltage V FB such that the output of the error amplifier outputs the error voltage V E . The form of the error amplifier 140 is not limited thereto, and all electronic components that can achieve the same function are within the scope of the present invention.

本發明係藉由該快速響應電路150來根據該降壓直流轉換器100之輸出端的一回授電壓VFB與一參考電壓VREF的比較結果產生一調整誤差電壓VAE供該降壓直流轉換器100之功率級110進行責任週期之責任比的調整。該快速響應電路150係耦接於該功率級110及該誤差放大器140之間,且該快速響應電路150包含一補償單元151、一偵測單元152及一第三開關(開關單元)S3The present invention generates an adjustment error voltage V AE for the step-down DC conversion by comparing the feedback voltage V FB of the output terminal of the step-down DC converter 100 with a reference voltage V REF by the fast response circuit 150. The power stage 110 of the device 100 adjusts the duty ratio of the duty cycle. The fast response circuit 150 is coupled between line 140 and the power level of the error amplifier 110, and the fast response circuit 150 includes a compensation unit 151, a detecting unit 152, and a third switch (switch unit) S 3.

該補償單元151係為一分壓儲能電路,其由串聯的一電阻R及一電容C所組成,並用於接收該誤差電壓VE,而產生一分壓VD並儲存其電位於該電容C。 The compensation unit 151 is a voltage division energy storage circuit, which is composed of a resistor R and a capacitor C connected in series, and is used for receiving the error voltage V E to generate a voltage divider V D and storing the capacitor therein. C.

該偵測單元152係偵測該誤差電壓VE及該電容C所儲存之該分壓VD,並產生一開關電壓VS。更具體而言,該偵測單元152係根據回授電壓VFB與參考電壓VREF的比較結果及該分壓VD產生一開關電壓VS。其中該補償單元151亦可稱為一種頻率補償用的補償單元。 The detecting unit 152 detects the error voltage V E and the divided voltage V D stored by the capacitor C, and generates a switching voltage V S . More specifically, the detecting unit 152 generates a switching voltage V S according to the comparison result of the feedback voltage V FB and the reference voltage V REF and the divided voltage V D . The compensation unit 151 can also be referred to as a compensation unit for frequency compensation.

該第三開關S3之輸出端係耦接至接地,該第三開關S3之輸入端係耦接於該誤差放大器140之輸出端與該功率級110之輸入端(例如可為前述正反器的重置端),以控制該誤差電壓VE輸入該功率級110之電位。其中,該第三開關S3接收該開關電壓VS,並根據該開關電壓VS的大小來決定開啟或關閉,即當該開關電壓VS大於該第三開關S3的臨界電壓時,該開關電壓VS開啟,反之則關閉,藉以調整該誤差電壓VE,而產生並輸出對應的調整誤差電壓VAE至該功率級110,來調整該責任週期的責任比。詳言之,當該第三開關S3開啟時,儲存在該補償單元151的電容C中之電位會因導通接地路徑的該第三開關S3而被快速放電,使得該誤差電壓VE之電位可快速響應而下降;當該第三開關S3關閉時,該誤差電壓VE即不會受接地點的影響而可輸入至該功率級110之輸入端(例如可為 前述正反器的重置端)。於本實施例中,該第三開關S3為一N型金屬氧化物半導體場效電晶體(NMOS),但其形式並不以此為限,凡是能達成相同功能的電子元件皆屬於本發明的範疇。 The output of the third switch S 3 is coupled to the ground. The input end of the third switch S 3 is coupled to the output end of the error amplifier 140 and the input end of the power stage 110 (for example, the foregoing positive and negative The reset terminal of the device is configured to control the error voltage V E to input the potential of the power stage 110. The third switch S 3 receives the switching voltage V S and determines whether to turn on or off according to the magnitude of the switching voltage V S , that is, when the switching voltage V S is greater than the threshold voltage of the third switch S 3 , The switching voltage V S is turned on, otherwise it is turned off, thereby adjusting the error voltage V E to generate and output a corresponding adjustment error voltage V AE to the power stage 110 to adjust the duty ratio of the duty cycle. In detail, when the third switch S 3 is turned on, the potential stored in the capacitor C of the compensation unit 151 is rapidly discharged due to the third switch S 3 that conducts the ground path, so that the error voltage V E The potential can be quickly responded to decrease; when the third switch S 3 is turned off, the error voltage V E is not affected by the grounding point and can be input to the input end of the power stage 110 (for example, the foregoing flip-flop can be Reset end). In this embodiment, the third switch S 3 is an N-type metal oxide semiconductor field effect transistor (NMOS), but the form is not limited thereto, and any electronic component capable of achieving the same function belongs to the present invention. The scope.

於操作該降壓直流轉換器100時,當該降壓直流轉換器100於重載的狀態中,由於重載所需的輸出電壓VOUT較大,因此使得該回授電壓VFB、該誤差電壓VE以及該責任週期之責任比較大;而當該降壓直流轉換器100於輕載的狀態中,由於輕載所需的輸出電壓VOUT較小,因此使得該回授電壓VFB、該誤差電壓VE以及該責任週期之責任比較小。 When the buck DC converter 100 is operated, when the buck DC converter 100 is in a heavy load state, the feedback voltage V FB , the error is made due to the large output voltage V OUT required for the heavy load. voltage V E and a duty cycle of the responsibility of the larger; when the down DC converter 100 to the light load state, due to the smaller required light load the output voltage V OUT, so that the feedback voltage V FB, The error voltage V E and the responsibility of the duty cycle are relatively small.

更進一步地,當該降壓直流轉換器於動態的負載轉換時,其中動態的負載轉換可為重載轉換為輕載或輕載轉換為重載兩種狀態,在此該降壓直流轉換器100以重載轉輕載為例子進行說明:在重載轉換為輕載的過程中,該輸出電壓VOUT及該責任週期之責任比由大轉變為小時,該回授電壓VFB會先降低而使誤差電壓VE降低(因與參考電壓VREF的差異變小),此時該誤差電壓VE會藉由該補償單元151進行放電,亦即,本發明之偵測單元152即會因正相輸入端之該分壓VD(先前儲能於電容C之電位)高於反相輸入端之該誤差電壓VE,而輸出高電位的該開關電壓VS,該第三開關S3係被開啟而導通與接地的路徑,該誤差電壓VE的電位立即被快速下拉,因此能夠快速地決定出輕載時的責任週期之責任比,而快速調整輸入至該功率級110的該調整誤差電壓VAE及透過本發明的此架構來使迴路反應速度變快,而有效減少重載轉輕載時之輸出峰值電壓。 Further, when the step-down DC converter is in dynamic load conversion, wherein the dynamic load conversion can be converted from heavy load to light load or light load to heavy load, where the buck DC converter 100 is described by taking heavy-duty to light-loading as an example: during the process of transferring heavy load to light load, the duty ratio V OUT and the duty ratio of the duty cycle are changed from large to small, and the feedback voltage V FB is first lowered. The error voltage V E is lowered (because the difference from the reference voltage V REF becomes smaller), and the error voltage V E is discharged by the compensation unit 151 at this time, that is, the detecting unit 152 of the present invention is caused by The divided voltage V D of the non-inverting input terminal (previously stored at the potential of the capacitor C) is higher than the error voltage V E of the inverting input terminal, and the switching voltage V S of the high potential is output, the third switch S 3 The path of being turned on and grounded, the potential of the error voltage V E is immediately pulled down quickly, so that the duty ratio of the duty cycle at the light load can be quickly determined, and the adjustment input to the power stage 110 is quickly adjusted. error voltage V AE and through this architecture of the present invention Loop so that the reaction rate becomes faster, effectively reducing the overloading of the peak output voltage at light load transfer.

綜上所述,本發明之降壓直流轉換器藉由該功率級、該濾波電路、該第一分壓電路、該誤差放大器及該快速響應電路之間的電路配置,並透 過及該快速響應電路的補償單元、偵測單元及開關單元,來達到有效減少重載轉輕載時之輸出峰值電壓的目的。 In summary, the step-down DC converter of the present invention has a circuit configuration between the power stage, the filter circuit, the first voltage dividing circuit, the error amplifier, and the fast response circuit. The compensation unit, the detecting unit and the switching unit of the fast response circuit are used to effectively reduce the output peak voltage when the heavy load is transferred to the light load.

本發明在上文中已以較佳實施例揭露,然熟習本項技術者應理解的是,該實施例僅用於描繪本發明,而不應解讀為限制本發明之範圍。應注意的是,舉凡與該實施例等效之變化與置換,均應設為涵蓋於本發明之範疇內。因此,本發明之保護範圍當以申請專利範圍所界定者為準。 The invention has been described above in terms of the preferred embodiments, and it should be understood by those skilled in the art that the present invention is not intended to limit the scope of the invention. It should be noted that variations and permutations equivalent to those of the embodiments are intended to be included within the scope of the present invention. Therefore, the scope of protection of the present invention is defined by the scope of the patent application.

100‧‧‧降壓直流轉換器 100‧‧‧Buck DC Converter

110‧‧‧功率級 110‧‧‧Power level

111‧‧‧閘極驅動器 111‧‧‧gate driver

112‧‧‧邏輯單元 112‧‧‧Logical unit

120‧‧‧濾波電路 120‧‧‧Filter circuit

130‧‧‧第一分壓電路 130‧‧‧First voltage divider circuit

140‧‧‧誤差放大器 140‧‧‧Error amplifier

150‧‧‧快速響應電路 150‧‧‧Response fast circuit

151‧‧‧補償單元 151‧‧‧Compensation unit

152‧‧‧偵測單元 152‧‧‧Detection unit

C‧‧‧電容 C‧‧‧ capacitor

C1‧‧‧第一端 C1‧‧‧ first end

C2‧‧‧第二端 C2‧‧‧ second end

Clk‧‧‧時脈訊號 Clk‧‧‧ clock signal

IL‧‧‧電感電流 I L ‧‧‧Inductor current

L‧‧‧電感 L‧‧‧Inductance

L1‧‧‧第一端 L1‧‧‧ first end

L2‧‧‧第二端 L2‧‧‧ second end

R‧‧‧電阻 R‧‧‧resistance

R1‧‧‧第一端 R1‧‧‧ first end

R2‧‧‧第二端 R2‧‧‧ second end

RA‧‧‧電阻 R A ‧‧‧resistance

RB‧‧‧電阻 R B ‧‧‧resistance

RL‧‧‧負載電阻 R L ‧‧‧Load resistor

S1‧‧‧第一開關 S 1 ‧‧‧first switch

S2‧‧‧第二開關 S 2 ‧‧‧second switch

S3‧‧‧第三開關 S 3 ‧‧‧third switch

VAE‧‧‧調整誤差電壓 V AE ‧‧‧Adjust error voltage

VD‧‧‧分壓 V D ‧‧‧ partial pressure

VE‧‧‧誤差電壓 V E ‧‧‧ error voltage

VFB‧‧‧回授電壓 V FB ‧‧‧Responsive voltage

VIN‧‧‧輸入電壓 V IN ‧‧‧ input voltage

VOUT‧‧‧輸出電壓 V OUT ‧‧‧ output voltage

VREF‧‧‧參考電壓 V REF ‧‧‧reference voltage

VS‧‧‧開關電壓 V S ‧‧‧Switching voltage

Claims (9)

一種降壓直流轉換器的快速響應電路,係根據該降壓直流轉換器之輸出端的一回授電壓與一參考電壓的比較結果產生一調整誤差電壓供該降壓直流轉換器之功率級內的一邏輯單元進行責任週期之責任比的調整,該快速響應電路包括:一補償單元,係接收該比較結果之電壓以進行儲存;一偵測單元,係耦接該補償單元及接收該比較結果,根據該比較結果之電壓及該補償單元所儲存之電壓產生一開關電壓;及一開關單元,其輸入端係接收該比較結果之電位並耦接該降壓直流轉換器之功率級的該邏輯單元,該開關單元之輸出端係接地,該開關單元之控制端耦接該偵測單元以響應該開關電壓而於重載轉輕載時所接收的比較結果下導通與該接地間的路徑,使該降壓直流轉換器之功率級的該邏輯單元之接收電壓的電位被下拉而調整該責任週期之責任比,其中,該補償單元係包含一電阻單元及一電容單元,該電阻單元的一端係接收該比較結果之電壓以及耦接該偵測單元的第一端,該電阻單元的另一端係耦接該偵測單元的第二端及該電容單元的一端,該電容單元之另一端係接地。 A fast response circuit of a step-down DC converter generates an adjusted error voltage for a power level of the step-down DC converter according to a comparison between a feedback voltage of the output of the step-down DC converter and a reference voltage a logic unit performs a duty ratio adjustment of the duty cycle, the fast response circuit includes: a compensation unit that receives the voltage of the comparison result for storage; and a detection unit coupled to the compensation unit and receives the comparison result, Generating a switching voltage according to the voltage of the comparison result and the voltage stored by the compensation unit; and a switching unit whose input end receives the potential of the comparison result and is coupled to the logic unit of the power level of the step-down DC converter The output end of the switch unit is grounded, and the control end of the switch unit is coupled to the detection unit to turn on the path between the ground and the ground under the comparison result received during the heavy load to light load in response to the switch voltage. The potential of the receiving voltage of the logic unit of the power stage of the step-down DC converter is pulled down to adjust the duty ratio of the duty cycle, wherein The compensation unit includes a resistor unit and a capacitor unit. One end of the resistor unit receives the voltage of the comparison result and is coupled to the first end of the detecting unit. The other end of the resistor unit is coupled to the detecting unit. The second end and one end of the capacitor unit are grounded at the other end of the capacitor unit. 如請求項1所述之快速響應電路,其中該偵測單元係為一比較器,該比較器的正相輸入端係接收該補償單元所儲存之電壓,該比較器的反相輸入端係接收該比較結果之電壓,以響應重載轉輕載時 之該補償單元所儲存之電壓高於該比較結果之電壓的狀況產生導通該開關單元的開關電壓。 The fast response circuit of claim 1, wherein the detecting unit is a comparator, the positive phase input terminal of the comparator receives the voltage stored by the compensation unit, and the inverting input terminal of the comparator receives The voltage of the comparison result in response to heavy load to light load The condition that the voltage stored by the compensation unit is higher than the voltage of the comparison result produces a switching voltage that turns on the switching unit. 如請求項1或2所述之快速響應電路,其中該開關單元係為一N型金屬氧化物半導體場效電晶體。 The fast response circuit of claim 1 or 2, wherein the switching unit is an N-type metal oxide semiconductor field effect transistor. 一種降壓直流轉換器,包括:一功率級,係接收一輸入電壓,該功率級包含一第一開關、一第二開關、一邏輯單元及一閘極驅動器,該第一開關、該第二開關及該邏輯單元係透過該閘極驅動器而連接,該第一開關係耦接至該輸入電壓,該第二開關係接地,該邏輯單元係產生一責任週期,該閘極驅動器係接收該責任週期以控制該第一開關及該第二開關的開啟或關閉,進而調整該輸入電壓;一濾波電路,係耦接該功率級的第一開關及第二開關,當該第一開關為開啟時,該濾波電路接收調整後的該輸入電壓,並將該輸入電壓轉換為一電感電流,且對該電感電流濾波,而產生一輸出電壓,當該第二開關為開啟時,該濾波電路接地;一第一分壓電路,係耦接該濾波電路以接收並分壓該輸出電壓而產生一回授電壓;一誤差放大器,係耦接該第一分壓電路以接收一參考電壓及該回授電壓,並基於該參考電壓及該回授電壓的電壓差,而產生一誤差電壓;以及一快速響應電路,係耦接於該功率級及該誤差放大器之間,該快速響應電路包含: 一補償單元,係為一分壓儲能電路,並用於接收該誤差電壓,而產生一分壓並儲存其電位;一偵測單元,係根據該誤差電壓及該補償單元所儲存之電壓產生一開關電壓;及一開關單元,係接收該開關電壓,並響應該開關電壓進行開啟或關閉,以選擇性地將該誤差電壓接地而產生並輸出對應的一調整誤差電壓至該功率級的該邏輯單元,供該功率級的該邏輯單元調整該責任週期的責任比,其中,該補償單元係包含一電阻單元及一電容單元,該電阻單元的一端係接收該誤差電壓以及耦接該偵測單元的第一端,該電阻單元的另一端係耦接該偵測單元的第二端及該電容單元的一端,該電容單元之另一端係接地。 A step-down DC converter includes: a power stage that receives an input voltage, the power stage includes a first switch, a second switch, a logic unit, and a gate driver, the first switch, the second The switch and the logic unit are connected through the gate driver, the first open relationship is coupled to the input voltage, the second open relationship is grounded, the logic unit generates a duty cycle, and the gate driver receives the responsibility a cycle to control the opening or closing of the first switch and the second switch to adjust the input voltage; a filter circuit coupled to the first switch and the second switch of the power stage, when the first switch is turned on The filter circuit receives the adjusted input voltage, converts the input voltage into an inductor current, and filters the inductor current to generate an output voltage. When the second switch is turned on, the filter circuit is grounded; a first voltage dividing circuit coupled to the filter circuit to receive and divide the output voltage to generate a feedback voltage; an error amplifier coupled to the first voltage dividing circuit for receiving a reference voltage and the feedback voltage, and an error voltage is generated based on the voltage difference between the reference voltage and the feedback voltage; and a fast response circuit coupled between the power stage and the error amplifier, the fast The response circuit contains: A compensation unit is a voltage division energy storage circuit, and is configured to receive the error voltage to generate a voltage division and store the potential thereof; a detection unit generates a voltage according to the error voltage and the voltage stored by the compensation unit a switching voltage; and a switching unit that receives the switching voltage and turns on or off in response to the switching voltage to selectively ground the error voltage to generate and output a corresponding adjusted error voltage to the logic of the power stage a unit for the logic unit of the power stage to adjust a duty ratio of the duty cycle, wherein the compensation unit includes a resistor unit and a capacitor unit, and one end of the resistor unit receives the error voltage and is coupled to the detecting unit The other end of the resistor unit is coupled to the second end of the detecting unit and one end of the capacitor unit, and the other end of the capacitor unit is grounded. 如請求項4所述之降壓直流轉換器,其中當該開關單元開啟時,該誤差電壓之電位始因接地而下降。 The step-down DC converter of claim 4, wherein when the switching unit is turned on, the potential of the error voltage begins to drop due to grounding. 如請求項5所述之降壓直流轉換器,其中該邏輯單元係配置以接收該調整誤差電壓。 The buck DC converter of claim 5, wherein the logic unit is configured to receive the adjustment error voltage. 如請求項6所述之降壓直流轉換器,其中該邏輯單元為一正反器。 The buck DC converter of claim 6, wherein the logic unit is a flip flop. 如請求項7所述之降壓直流轉換器,其中該正反器的重置端接收該調整誤差電壓,該正反器的設置端接收一時脈訊號,該正反器的輸出端輸出一責任週期供該功率級調整該輸入電壓。 The step-down DC converter of claim 7, wherein the reset terminal of the flip-flop receives the adjustment error voltage, the set terminal of the flip-flop receives a clock signal, and the output of the flip-flop outputs a responsibility The cycle is used by the power stage to adjust the input voltage. 如請求項8所述之降壓直流轉換器,其中該開關單元之輸入端係接收該誤差電壓並耦接該正反器的重置端,該開關單元之輸出端係接地,該開關單元之控制端耦接該偵測單元以響應該開關電壓而於重載轉輕載時導通該開關單元,使該誤差電壓的電位被下拉而成為輸入至該功率級的該調整誤差電壓。 The step-down DC converter of claim 8, wherein the input end of the switch unit receives the error voltage and is coupled to the reset end of the flip-flop, the output end of the switch unit is grounded, and the switch unit is The control terminal is coupled to the detecting unit to turn on the switching unit when the heavy load is turned to light load in response to the switching voltage, so that the potential of the error voltage is pulled down to become the adjusted error voltage input to the power stage.
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US11329562B1 (en) 2020-11-08 2022-05-10 Elite Semiconductor Microelectronics Technology Inc. Constant on-time buck converter with improved transient response
TWI767482B (en) * 2020-12-29 2022-06-11 晶豪科技股份有限公司 Constant on-time buck converter

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US11329562B1 (en) 2020-11-08 2022-05-10 Elite Semiconductor Microelectronics Technology Inc. Constant on-time buck converter with improved transient response
TWI767482B (en) * 2020-12-29 2022-06-11 晶豪科技股份有限公司 Constant on-time buck converter
CN113922668A (en) * 2021-09-07 2022-01-11 西安理工大学 Single-event transient reinforcing circuit and method applied to DC-DC converter
CN113922668B (en) * 2021-09-07 2024-01-16 西安理工大学 Single-event transient strengthening circuit and method applied to DC-DC converter

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