TWI536516B - Semicomductor package with heat dissipation structure and manufacturing method thereof - Google Patents

Description

Semiconductor package with heat dissipation structure and method of manufacturing same

The present invention relates to a semiconductor package and a method of fabricating the same, and more particularly to a semiconductor package having a heat dissipation structure and a method of fabricating the same.

1A shows a cross-sectional view of a conventional semiconductor package. In order to improve the heat dissipation performance, the semiconductor package 60 is provided with a heat dissipating member 62 on the die 61, and a thermal conductive paste 63 is disposed between the die 61 and the heat sink 62 to facilitate the die 61. The heat is conducted to the heat sink 62. However, the heat conductive paste 63 is limited by its own material properties, and its heat conduction effect is still limited.

In addition, the heat sink 62 of the conventional semiconductor package 60 is mainly bonded to a heat dissipation ring 65 through a heat dissipation adhesive 64. By controlling the width of the heat dissipation adhesive 64 after pressing, the degree of warpage can be controlled within an appropriate range. The conventional dispensing method generally only controls the coverage area of the heat-dissipating adhesive 64 after pressing, and cannot effectively control the width of the heat-dissipating adhesive 64 after pressing, and the joint effect is difficult to control.

As described above, in order to meet the high heat dissipation requirements of semiconductor packages, metal heat conductive materials such as indium sheets have been used in recent years, and since they have excellent thermal conductivity and ductility, the heat conduction effect can be greatly improved. Indium flakes must be used in combination with a medium having a gold plating layer to melt the surface of the indium flakes to form a metal bond with the gold plating layer to achieve an effective bonding effect.

FIG. 1B shows a schematic view of a high temperature state of an indium wafer used in a conventional semiconductor package 60. The indium sheet I has fluidity due to the molten state during the high-temperature bonding process, and the flow of the indium sheet I means that it cannot be effectively bonded to the heat sink 62, and the heat conduction effect is greatly reduced, and in addition, the flow is everywhere. The indium sheet I may also cause an internal electrical short circuit of the semiconductor package 60.

In addition, the degree of warpage of the above semiconductor package may also seriously affect the bonding effect between the indium sheet and the gold plating layer. Therefore, the semiconductor package using the indium sheet must control the degree of warpage within an appropriate range.

In view of this, it is necessary to provide an innovative and progressive semiconductor package and its manufacturing method to solve the above problems.

The invention forms a dam on a heat sink of a semiconductor package, and surrounds a metal heat conductive member to ensure that the metal heat conductive member can be restrained in the dam when the process is subjected to high temperature, thereby preventing the metal heat conductive member. The flow prevents electrical shorts inside the semiconductor package.

The present invention provides a semiconductor package including a first substrate, a first die, a metal heat spreader, and a heat sink. The first substrate has an upper surface, and the first die is disposed on the first substrate. On the upper surface, the first die has a top surface and a first bonding layer. The first bonding layer is disposed on the top surface, and the metal heat conducting member is disposed on the first bonding layer of the first die. The component is disposed on the metal heat conducting member, the heat sink has an inner surface, a second bonding layer and a dam, the second bonding layer and the dam are disposed on the inner surface, and the second bonding layer abuts the a metal heat conducting member, the dam surrounding the metal heat conducting member, and the dam can limit the metal heat conducting member.

The present invention further provides a method of fabricating a semiconductor package, the method comprising: (a) providing a first substrate and a first die, the first substrate having an upper surface, the first die disposed on the first substrate On the upper surface, the first die has a top surface and a first bonding layer, the first bonding layer is formed on the top surface; (b) a metal heat conducting member is disposed on the first bonding layer of the first die And (c) providing a heat dissipating member on the metal heat conducting member, the heat dissipating member having an inner surface, a second bonding layer and a dam, the second bonding layer and the dam being formed on the inner surface The second bonding layer abuts the metal heat conducting member, the dam surrounds the metal heat conducting member, and the dam can limit the metal heat conducting member.

In order to better understand the above and other aspects of the present invention, the preferred embodiments are described below, and in conjunction with the drawings, the detailed description is as follows:

2 and 2A and 2B are respectively a schematic structural view and a partial enlarged view of a semiconductor package according to an embodiment of the present invention. A semiconductor package 10 includes a first substrate 11, a first die 12, a second die 13, a second substrate 14, a heat sink 15, a metal heat conductor 20, a heat sink 30, and a heat sink. Glue 40.

The first substrate 11 is an electrical interposer having an upper surface 11a and at least one via hole 111 as an external electrical connection structure.

The first die 12 is a logic die having a top surface 12a and a back surface 12b opposite to the top surface 12a. In this embodiment, the back surface 12b has at least one first bump 122 as An external electrical connection structure and a first primer 123 can cover the first bump 122. The first die 12 is disposed on the first substrate 11 in a flip chip manner, that is, the back surface 12b faces downward. The upper surface 11a, and the first die 12 has a first bonding layer 121 formed on the top surface 12a, and the first bonding layer 121 is formed by stacking a plurality of metal layers.

The second die 13 is a memory die having an upper end surface 13a and a lower end surface 13b opposite to the upper end surface 13a. In the embodiment, the lower end surface 13b has at least one second convex portion. The block 131 is used as an external electrical connection structure and a second primer 132 can cover the second bump 131. The second die 13 is disposed on the flip chip, that is, the lower end surface 13b faces downward. The upper surface 11a of the first substrate 11 is located on one side of the first die 12.

The second substrate 14 has an intermediate block 141 and a peripheral block 142. In the embodiment, the first substrate 11 is disposed in the middle block 141 of the second substrate 14.

The heat dissipation ring 15 has a first surface 15a, an opposite second surface 15b, and a groove structure 151. The second surface 15b is fixed to the peripheral block 142 of the second substrate 14. The groove structure 151 is The recessed structure is preferably recessed on the first surface 15a. Preferably, the trench structure 151 has at least two trenches U.

The metal heat conducting member 20 is disposed on the first bonding layer 121 of the first die 12, and in the embodiment, the metal heat conducting member 20 can be an indium plate or other metal material with good thermal conductivity, and the metal The surface area of the heat conducting member 20 is at least not less than the surface area of the first die 12.

The heat dissipating member 30 is disposed on the heat dissipating ring 15 and the metal heat conducting member 20. In the embodiment, the heat dissipating member 30 has an inner surface 30a and a second portion. The bonding layer 31 and a dam 32 are rough surfaces, the second bonding layer 31 and the dam 32 are formed on the inner surface 30a, and the second bonding layer 31 abuts the metal heat conducting member 20 In this embodiment, the second bonding layer 31 is made of gold (Au), and preferably, the surface area of the second bonding layer 31 is at least not less than the surface area of the metal heat conducting member, and the second bonding layer 31 The surface is a rough surface for increasing the bonding strength of the second bonding layer 31 and the metal heat conductive member 20. The dam 32 surrounds the second bonding layer 31 and the metal heat conducting member 20, and does not affect the contact area of the metal heat conducting member 20 with the second bonding layer 31, that is, does not affect the heat conduction effect of the metal heat conducting member. The dam 32 can limit the metal heat conducting member 20 on the top surface 12a of the first die 12. In the embodiment, the metal heat conducting member 20 is located in the dam 32, and the dam 32 is There is a gap Y between the metal heat conducting member 20, preferably, the gap Y is between 50 and 250 microns, and the height H of the dam 32 is greater than the thickness of the second bonding layer 31, and The height H of the dam 32 is not less than one half of the thickness of the metal heat conducting member 20. Preferably, the height H of the dam 32 is between 100 and 650 microns, and the width W of the dam 32 is Between 100 and 600 microns. Further, in the present embodiment, the dam 32 is formed of a rubber material. Alternatively, in another embodiment, the heat sink 30 can integrally form the dam 32.

The heat dissipating adhesive 40 can be disposed between the heat dissipating ring 15 and the heat dissipating member 30. In the embodiment, the heat dissipating adhesive 40 has a first portion 41 and a second portion 42. A portion 41 is located in the trench structure 151 of the heat dissipating ring 15 , and a second portion 42 of the heat dissipating adhesive 40 is located between the first surface 15 a of the heat dissipating ring 15 and the heat sink 30 . In addition, since the trench structure 151 has the two trenches U, the width of the heat-dissipating adhesive 40 after pressing can be controlled within a desired range.

Fig. 3 shows various embodiments of the first bonding layer 121 of the present invention. Referring to FIG. 3, in the embodiment, the first bonding layer 121 has the following implementations: Aspect A: The metal layers are sequentially Ti(Ti)/Copper (Cu) from bottom to top. Copper (Cu) / nickel (Ni) / palladium (Pd) / gold (Au). The titanium (Ti) layer is a barrier layer, the first copper (Cu) layer is a seed layer, the second copper (Cu) layer is a buffer layer, and the nickel (Ni) layer is a copper diffusion barrier layer, palladium. The (Pd) layer is an adhesive layer, and the gold (Au) layer is a solder layer. Preferably, the thickness of the titanium (Ti) layer is between 0.1 and 0.5 μm, and the thickness of the first copper (Cu) layer is Between 0.1 and 0.5 micron, the thickness of the second copper (Cu) layer is between 3 and 50 microns, and the thickness of the nickel (Ni) layer is between 1 and 3 microns, palladium (Pd) layer The thickness of the gold (Au) layer is between 0.1 and 0.5 microns; the aspect B: the metal layer is titanium (Ti) / copper in order from bottom to top ( Cu) / copper (Cu) / nickel (Ni) / palladium (Pd). The aspect B is basically the same as the aspect A, and the difference is only in the case B, the gold (Au) layer (welding layer) is omitted; the aspect C: the metal layers are sequentially ordered from titanium (Ti)/copper from bottom to top. (Cu) / nickel (Ni) / palladium (Pd) / gold (Au). The aspect C is basically the same as the aspect A, and the difference is only that the second copper (Cu) layer (buffer layer) is omitted from the aspect C; the aspect D: the metal layers are sequentially titanium (Ti) from bottom to top. / copper (Cu) / nickel (Ni) / palladium (Pd). The aspect D is basically the same as the aspect C, the difference is only in the case D omitting the gold (Au) layer (welding layer); the aspect E: the metal layers are sequentially ordered from the bottom to the top (Ti) / copper (Cu) / copper (Cu) / nickel (Ni) / tin silver (SnAg). The aspect E is basically the same as the state B, and the difference is only in the case that the E is replaced by a tin-silver (SnAg) layer instead of the palladium (Pd) layer; the aspect F: the metal layers are sequentially titanium from bottom to top ( Ti) / copper (Cu) / nickel (Ni) / gold (Au). The aspect F is substantially the same as the aspect D, and the difference is only in the fact that the F-type replaces the palladium (Pd) layer with a gold (Au) layer; and the aspect G: the metal layers are sequentially titanium from bottom to top ( Ti) / copper (Cu) / copper (Cu) / nickel (Ni) / gold (Au). The aspect G is substantially the same as the aspect B, and the difference is only in the case where the G system replaces the palladium (Pd) layer with a gold (Au) layer.

4 is a schematic view showing the structure of a dam according to an embodiment of the present invention. The dam 32 series can be a box body.

Fig. 5 is a schematic view showing the structure of a dam according to another embodiment of the present invention. The dam 32 has four strips 321 which are separated from each other and arranged in a square shape.

Fig. 6 is a schematic view showing the structure of a dam according to still another embodiment of the present invention. The dam 32 has a plurality of dot-shaped bodies 32a which are arranged in a square shape at intervals.

7A through 7D are diagrams showing the fabrication of a semiconductor package in accordance with an embodiment of the present invention.

As shown in FIG. 7A, a first substrate 11, a first die 12, a second die 13, a second substrate 14, and a heat dissipation ring 15 are provided. In this embodiment, the first substrate 11 is provided. For the electrical interposer, the first die 12 is a logic die, and the second die 13 is a memory die. The first substrate 11 has an upper surface 11a. The first die 12 is disposed on the upper surface 11a of the first substrate 11. The first die 12 has a top surface 12a and a first bonding layer 121. In this embodiment, the first bonding layer 121 is formed on the top surface 12a, and the first bonding layer 121 is formed by stacking a plurality of metal layers.

The second die 13 is disposed on the upper surface 11a of the first substrate 11 and is located on one side of the first die 12, and the second substrate 14 has an intermediate block 141 and a peripheral block 142. In this embodiment, the first substrate 11 is disposed on the middle block 141 of the second substrate 14 , and the heat dissipation ring 15 is fixed to the peripheral block 142 of the second substrate 14 . In addition, the heat dissipation ring 15 has a first surface 15a, an opposite second surface 15b, and a groove structure 151. The second surface 15b is fixed to the peripheral block 142 of the second substrate 14. The groove structure 151 is recessed on the first surface 15a. Preferably, the groove structure 151 has at least two grooves U.

As shown in FIG. 7B, a metal heat conducting member 20 is disposed on the first bonding layer 121 of the first die 12. In the embodiment, the metal heat conducting member 20 can be an indium plate or other thermal conductivity. Good metal materials.

As shown in FIG. 7C, a heat dissipating member 30 is disposed on the metal heat conducting member 20, and in this step, the heat dissipating member 30 is further disposed on the heat dissipating ring 15, and the heat dissipating member 30 is fixed to the heat dissipating ring. In the embodiment, the heat dissipating adhesive 40 is disposed between the heat dissipating ring 15 and the heat dissipating member 30. In the embodiment, the heat dissipating adhesive 40 has a first portion 41 and a second portion 42. The first portion 41 of the adhesive 40 is located in the trench structure 151 of the heat dissipating ring 15 , and the second portion 42 of the heat dissipating adhesive 40 is located between the first surface 15 a of the heat dissipating ring 15 and the heat sink 30 . . In addition, since the trench structure 151 has the two trenches U, the width of the heat-dissipating adhesive 40 after pressing can be controlled within a desired range.

As shown in FIG. 7C, the heat dissipating member 30 has an inner surface 30a, a second bonding layer 31 and a dam 32. The inner surface 30a is a rough surface. In the embodiment, the rough surface can be plasma. A surface treatment method or a sandblasting method is formed. The second bonding layer 31 and the dam 32 are formed on the inner surface 30a, and the second bonding layer 31 abuts the metal heat conducting member 20. In the embodiment, the second bonding layer 31 is gold (Au And preferably, the surface of the second bonding layer 31 is a rough surface for increasing the bonding strength of the second bonding layer 31 and the metal heat conducting member 20. The dam 32 surrounds the second joint layer 31, and the dam 32 can limit the metal heat conducting member 20. In the embodiment, the metal heat conducting member 20 is located in the dam 32. Further, in the present embodiment, the dam 32 is formed of a rubber material. Alternatively, in another embodiment, the heat sink 30 can integrally form the dam 32.

As shown in FIG. 7D, the method further includes performing a reflow step to fuse the metal heat conducting member 20 to the first bonding layer 121 of the first die 12 and the second bonding layer 31 of the heat sink 30, due to the barrier The dam 32 surrounds the metal heat conducting member 20, thereby ensuring that the metal heat conducting member 20 can be restrained in the dam 32 during high temperature reflow, thereby preventing the metal heat conducting member 20 from flowing.

8 and 8A are schematic diagrams and partial enlarged views of a semiconductor package in accordance with another embodiment of the present invention. The colloid 50 is used to fill the gap of the dam 32 due to the tolerance of the heat sink 30. In the embodiment, the colloid 50 covers a portion of the dam 32, and the colloid 50 has a a coating width X and a coating height Z, the coating width X being at least not less than a sum of a width of the dam 32 and a gap between the dam 32 and the metal heat conducting member 20, the cladding height Z being at least not less than the first crystal grain 12 Half the thickness. In this embodiment, preferably, the cladding width X is between 450 micrometers and 700 micrometers, and the cladding height Z is between 250 micrometers and 400 micrometers.

Further, in the present embodiment, the step of forming the rough surface of the second bonding layer 31 may be in the following manners: Fig. 9 is a view showing the first forming step of the rough surface of the second bonding layer of the present invention. The first forming step of the rough surface of the second bonding layer 31 includes: roughening the inner surface 30a of the heat sink 30; and forming the inner surface 30a of the second bonding layer 31 after roughening.

Figure 10 is a view showing a second forming step of the rough surface of the second bonding layer of the present invention. The second forming step of the rough surface of the second bonding layer 31 includes: forming the second bonding layer 31 on the inner surface 30a; and roughening the surface of the second bonding layer 31 and the inner surface 30a.

Figure 11 is a view showing a third forming step of the rough surface of the second bonding layer of the present invention. The third forming step of the rough surface of the second bonding layer 31 includes: forming the second bonding layer 31 on the inner surface 30a; and roughening the surface of the second bonding layer 31.

The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the scope of the present invention. The scope of the invention should be as set forth in the appended claims.

10. . . Semiconductor package

11. . . First substrate

11a. . . Upper surface

12. . . First grain

12a. . . Top surface

12b. . . back

13. . . Second grain

13a. . . Upper end

13b. . . Lower end

14. . . Second substrate

15. . . Heat ring

15a. . . First surface

15b. . . Second surface

20. . . Metal heat conductor

30. . . Heat sink

30a. . . The inner surface

31. . . Second bonding layer

32. . . Barrier

32a. . . Point body

40. . . Heat sink

41. . . first part

42. . . the second part

50. . . colloid

60. . . Conventional semiconductor package structure

61. . . Grain

62. . . Heat sink

63. . . Thermal adhesive

64. . . Heat sink

65. . . Heat ring

111. . . Via

121. . . First bonding layer

122. . . First bump

123. . . First primer

131. . . Second bump

132. . . Second primer

141. . . Intermediate block

142. . . Peripheral block

151. . . Groove structure

321. . . Strip

H. . . height

I. . . Indium tablets

U. . . Trench

W. . . width

X. . . Coat width

Y. . . gap

Z. . . Coating height

1A is a schematic structural view showing a conventional semiconductor package structure;

1B is a schematic view showing a state in which an indium piece is used in a conventional semiconductor package structure;

2 is a schematic structural view of a semiconductor package according to an embodiment of the present invention;

2A is a partial enlarged view of a semiconductor package in accordance with an embodiment of the present invention;

2B is another partial enlarged view of a semiconductor package in accordance with an embodiment of the present invention;

Figure 3 shows various embodiments of the first bonding layer of the present invention;

4 is a schematic structural view of a dam according to an embodiment of the present invention;

Figure 5 is a schematic view showing the structure of a dam according to another embodiment of the present invention;

6 is a schematic structural view of a dam according to still another embodiment of the present invention;

7A to 7D are diagrams showing the manufacture of a semiconductor package in accordance with an embodiment of the present invention;

8 is a schematic view showing a state of a semiconductor package in accordance with another embodiment of the present invention;

8A is a partial enlarged view of a semiconductor package in accordance with another embodiment of the present invention;

Figure 9 is a view showing a first forming step of the rough surface of the second bonding layer of the present invention;

Figure 10 is a view showing a second forming step of the rough surface of the second bonding layer of the present invention;

Figure 11 is a view showing a third forming step of the rough surface of the second bonding layer of the present invention.

10. . . Semiconductor package

11. . . First substrate

11a. . . Upper surface

12. . . First grain

12a. . . Top surface

12b. . . back

13. . . Second grain

13a. . . Upper end

13b. . . Lower end

14. . . Second substrate

15. . . Heat ring

15a. . . First surface

15b. . . Second surface

20. . . Metal heat conductor

30. . . Heat sink

30a. . . The inner surface

31. . . Second bonding layer

32. . . Barrier

40. . . Heat sink

41. . . first part

42. . . the second part

121. . . First bonding layer

122. . . First bump

123. . . First primer

131. . . Second bump

132. . . Second primer

141. . . Intermediate block

142. . . Peripheral block

151. . . Groove structure

U. . . Trench

Claims (10)

A semiconductor package includes: a first substrate having an upper surface; a first die disposed on an upper surface of the first substrate, the first die having a top surface; a metal heat conductive member disposed on the a surface of the first die, and a surface area of the metal heat conducting member is at least not less than a surface area of the first die; a heat dissipating ring surrounding the first die; a heat dissipating member disposed on the metal heat conducting member and the The heat dissipating member has an inner surface; and a dam is formed on the inner surface of the heat dissipating member, the dam surrounds the metal heat conducting member, and the dam can limit the metal heat conducting member to the first The top surface of the grain. The semiconductor package of claim 1, wherein the metal heat conductive member is an indium sheet. The semiconductor package of claim 1, wherein the height of the dam is not less than one half of the thickness of the metal heat conducting member. The semiconductor package of claim 1, wherein the dam has four strips that are separated from each other and arranged in a square shape. The semiconductor package of claim 1, wherein the dam has a plurality of dot-like bodies spaced apart in a box shape. The semiconductor package of claim 1, wherein the heat sink integrally forms the dam. The semiconductor package of claim 1, further comprising a first bonding layer formed on The top surface of the first die, and the first bonding layer is formed by stacking a plurality of metal layers. The semiconductor package of claim 7, wherein the metal layers are made of titanium (Ti), copper (Cu), nickel (Ni), palladium (Pd), gold (Au) or tin silver (SnAg). The semiconductor package of claim 7, wherein the metal layers are titanium (Ti) / copper (Cu) / nickel (Ni) / gold (Au) in order from bottom to top. The semiconductor package of claim 1, further comprising a colloid, the glue system covering part of the dam.