TWI533285B - Control circuit of display device and signal transformation circuit - Google Patents

Description

Display device control circuit and signal conversion circuit

The present invention relates to a control circuit and a signal conversion circuit of a display device, and more particularly to a control circuit and a signal conversion circuit for a display device having radio frequency interference protection.

Everyone in today's daily life has a great opportunity to access a wide range of electronic devices, such as televisions, computers, screens, mobile phones, tablets, etc. If the electronic devices interfere with each other, they will be brought to the user. Big inconvenience and poor user experience, such as when a mobile phone receives an incoming call, the neighboring TV or screen may be affected by the RF signal, causing noise, picture distortion, no picture or even restarting. Therefore, the electronic device must take various protective measures to avoid interference from other devices, and the interference generated by the mobile phone is most common, because when the mobile phone receives an incoming call, the antenna portion generates a large amount of energy due to the RF signal. The normal operation of electronic components that affect other electronic devices, coupled with the high mobility of mobile phones, has increased the threat to other electronic devices. Therefore, it is necessary to radiate radio frequency from mobile phones when designing electronic circuits of electronic devices. Interference, RFI) to protect.

In view of the deficiencies of the prior art, an object of the present invention is to provide a control circuit and a signal conversion circuit for a display device with radio frequency interference protection to block a mobile phone Radio frequency interference of communication equipment.

The invention discloses a control circuit for a display device, comprising: an image processing chip, comprising a first pin and a second pin; a resistor, an end of which is coupled to the first pin; and an oscillating circuit, Having a first end point and a second end point, the first end point is coupled to the other end of the resistor, the second end point is coupled to the second pin, and the oscillating circuit is output by the first end point An oscillating signal is applied to the image processing chip; wherein the resistor forms a low pass filter with one of the parasitic capacitances of the first pin to filter out a high frequency noise.

The invention further discloses a signal conversion circuit, which is located inside a chip for converting an oscillation signal into a clock signal. The chip comprises a first pin and a second pin for connecting one of the outside of the chip. An oscillating circuit for receiving an oscillating signal, the signal converting circuit comprising: an inverter having an input coupled to the first pin and an output coupled to the second pin; a resistor, an end thereof The other end of the inverter is coupled to the output of the inverter; the other end is coupled to the output of the inverter; a Schmitt trigger circuit having an input coupled to the input of the inverter and the inverting One of the output terminals of the device receives the oscillation signal and outputs the clock signal at an output thereof; and a low pass filter circuit coupled between the inverter and the Schmitt trigger circuit For filtering high frequency noise from one of the first pin inputs.

The invention further discloses a signal conversion circuit, which is located inside a chip for converting an oscillation signal into a clock signal. The chip comprises a first pin and a second pin for connecting one of the outside of the chip. An oscillating circuit for receiving an oscillating signal, the signal converting circuit comprising: a low-pass filter circuit having an input end and an output end, wherein the input end is coupled to the first pin for filtering out the first connection a high frequency noise input; an inverter having an input coupled to the output of the low pass filter circuit, and an output coupled to the second pin; a resistor, one end of which is coupled to the input end of the inverter, and the other end of which is coupled to the output end of the inverter; and a Schmitt trigger circuit having an input coupled to the inverter One of the input end and the output end of the inverter to receive the oscillation signal, and an output terminal outputs the clock.

The control circuit and the signal conversion circuit of the display device with radio frequency interference protection of the invention have a protection circuit for preventing high-frequency signal interference, can prevent radio frequency interference generated by a communication device such as a mobile phone, and particularly can avoid radio frequency interference of the display device due to the mobile phone. The resulting picture is distorted, no picture or reboot.

The features, implementations, and utilities of the present invention are described in detail with reference to the preferred embodiments.

100‧‧‧ boards

110, 310, 410, 510, 610, 710, 810, 910, 1010‧‧‧ wafer

111, 112, 114, 120, 512‧‧‧ resistance

113‧‧‧Inverter

115, 150, 160, 514, 912 ‧ ‧ capacitors

116‧‧‧Amplifier

117‧‧‧ Schmitt trigger circuit

118‧‧‧Processing Circuit

119a‧‧‧Oscillation signal input pin

119b‧‧‧Oscillation signal output pin

130‧‧‧ crystal oscillator

140‧‧‧ nodes

170‧‧‧Parasitic capacitance

190‧‧‧Oscillation circuit

1 is a circuit diagram of an embodiment of a clock generation circuit with high frequency signal interference protection according to the present invention; [FIG. 2] is a relationship between an amplitude of a periodic signal output by an inverter and a resistance value of the resistor 120. FIG. 3 is a circuit diagram of another embodiment of a clock generation circuit with high frequency signal interference protection according to the present invention; FIG. 4 is another embodiment of a clock generation circuit with high frequency signal interference protection according to the present invention; A circuit diagram of an embodiment; [Fig. 5] is a circuit diagram of another embodiment of a clock generation circuit with high frequency signal interference protection according to the present invention; FIG. 6 is a circuit diagram of another embodiment of a clock generation circuit with high frequency signal interference protection according to the present invention; FIG. 7 is another embodiment of a clock generation circuit with high frequency signal interference protection according to the present invention; The circuit diagram of the example; [Fig. 8] is a circuit diagram of another embodiment of the clock generation circuit with high frequency signal interference protection according to the present invention; [Fig. 9] is a clock generation circuit with high frequency signal interference protection according to the present invention. A circuit diagram of another embodiment; and [Fig. 10] is a circuit diagram of another embodiment of a clock generation circuit with high frequency signal interference protection of the present invention.

The technical terms of the following descriptions refer to the idioms in the technical field, and some of the terms are explained or defined in the specification, and the explanation of the terms is based on the description or definition of the specification.

The disclosure of the present invention includes a control circuit and a signal conversion circuit of a display device with radio frequency interference protection, which can prevent interference of radio frequency signals. The implementation of the present invention is not limited to the embodiments described below, and the embodiments of the present invention are not limited to the embodiments described below. Since some of the components included in the control circuit and the signal conversion circuit of the display device of the present invention may be known components alone, the following description is known without affecting the full disclosure and feasibility of the device invention. The details of the components will be abbreviated.

Please refer to FIG. 1 , which is a high frequency signal interference protection of the present invention. A circuit diagram of one embodiment of a pulse generating circuit. The wafer 110, the resistor 120, the crystal oscillator 130, and the capacitors 150 and 160 are all disposed on the circuit board 100. The wafer 110 may be a wafer having a specific function, such as an image processing wafer having an image scaling function. If the wafer 110 needs to refer to a stable periodic signal during operation, it is necessary to provide a pad or a pin to input an external reference signal. For example, the chip 110 provides the oscillation signal input pin 119a and The oscillation signal output pin 119b is used for external oscillation signal input and output. The crystal oscillator 130 external to the wafer 110 and the capacitors 150 and 160 form an oscillating circuit 190 that provides the periodic oscillating signals required by the wafer 110. One end of the crystal oscillator 130 is coupled to the oscillation signal input pin 119a, and the other end is coupled to the oscillation signal output pin 119b. Meanwhile, one end of the crystal oscillator 130 is coupled to the ground or a reference voltage level through the capacitor 150, and the other end The capacitor 160 is coupled to ground or the same reference voltage level.

The inside of the wafer 110 includes resistors 111 and 112, an inverter 113, a resistor 114, a capacitor 115, an amplifier 116, a Schmitt-trigger 117, and a processing circuit 118. The resistors 111 and 112 are Eletrostatic Discharge (ESD) protection resistors. The inverter 113 is used for buffering, and the input end is coupled to the oscillation signal input pin 119a, and the output end is coupled to the oscillation signal output pin 119b. The resistor 114 is a feedback resistor of the inverter 113, and two ends of the resistor 114 are respectively coupled to the input end and the output end of the inverter 113. Because of the action of the crystal oscillator 130, a periodic signal similar to a sine wave is generated at the output of the inverter 113. After the periodic signal passes through the Schmitt trigger circuit 117, the clock CLK required by the processing circuit 118 is formed. . Assuming that the wafer 110 is an image processing chip, the processing circuit 118 processes the image signal according to the clock CLK, and the image signal can be input by other pads or pins (not shown) of the wafer 110.

In actual operation, when the circuit board 100 shown in FIG. 1 is too close to a communication device, such as a mobile phone, the high frequency signal of the mobile phone may be inserted into the chip 110 through the node 140, causing the chip to malfunction. Therefore, the resistor 120 is connected in series between the crystal oscillator 130 and the oscillation signal input pin 119a, and the resistor 120 forms a low-pass filter with the parasitic capacitor 170 of the oscillation signal input pin 119a, that is, the mobile phone. The generated high frequency signal is filtered by the low pass filter circuit without affecting the normal operation of the wafer 110. Since the input pin 119a is made of a metal material, the parasitic capacitor 170 is present inside. The parasitic capacitor 170 is shown outside the input pin 119a in FIG. 1 for convenience of description, and does not mean that the parasitic capacitor 170 is located at the input pin. A separate component external to 119a. In a preferred embodiment, the capacitance measured by the parasitic capacitance 170 is approximately 2 pF, and the cut-off frequency of the low pass filter circuit In order to filter out the high frequency signal of the mobile phone above 900MHz, the resistance value of the resistor 120 should be greater than 177Ω. Although in theory the larger the resistance value of the resistor 120 is, the fact that the resistance value of the resistor 120 is too large will cause some side effects such as the frequency shift of the crystal oscillator 130, the reduction of the negative resistance, and the period of the output of the inverter 113. The amplitude of the sexual signal is reduced to cause a shift error of the Schmitt trigger circuit 117 and the like. The wafer 110 has individual design requirements for the frequency offset, the magnitude of the negative resistance, and the input of the Schmitt trigger circuit 117, as long as the added resistor 120 does not cause the frequency shift of the crystal oscillator 130 to be excessively large and negatively resistive. The absolute value is too small and the transition state error of the Schmitt trigger circuit 117 can be used as the resistance of the filter circuit. The transition error of the Schmitt trigger circuit 117 is the key to designing the resistor 120. Please refer to FIG. 2 , which is a graph showing the relationship between the amplitude of the periodic signal output by the inverter 113 and the resistance of the resistor 120 . As the resistance of the resistor 120 increases, the amplitude of the periodic signal output by the inverter 113 becomes smaller and smaller. If the amplitude of the periodic signal is too small, the transition state of the Schmitt trigger circuit 117 will be incorrect, and the correct clock will not be output. Therefore, the resistance value of the resistor 120 must be adjusted according to the actual design of the Schmitt trigger circuit 117. In a preferred embodiment, the absolute difference between the high-level peak value V _ph and the low-level peak value V _{pl of the} periodic signal and the low input voltage threshold VIL and the high input voltage threshold VIH of the Schmitt trigger circuit 117 must be More than 0.6V, that is, | V _ph - VIH | > 0.6 and | V _pl - VIL | > 0.6, and when the resistance value of the resistor 120 is greater than 1000 Ω, the probability of a Schmitt trigger circuit 117 having a transition error is greatly improved. . Therefore, in this embodiment, under the input limitation of the Schmitt trigger circuit 117, the resistance value of the resistor 120 is preferably not more than 1000 Ω. When the resistance value can meet the requirements of the Schmitt trigger circuit 117, if the frequency offset and the negative resistance are maintained within the range specified by the design requirements, the resistance value can be used as the resistor 120. resistance. When the resistance value is equal to 1000Ω, the cutoff frequency of the low-pass filter circuit is about 160MHz, which can filter out high-frequency signals above 900MHz from the mobile phone. In summary, in a preferred embodiment of the invention, the resistance of the resistor 120 is between about 200 Ω and 1000 Ω. The resistor 120 can be made of various types of resistors, such as resistors made of transistors or resistors made of high resistance coefficient wires. In the above negative resistance measurement method, the crystal oscillator 130 is connected in series with a variable resistor _Vr , and the clock is measured from the general purpose input/output pin (GPIO) of the wafer 110. The resistance of the resistor V _r is increased until the clock is unstable, and then the resistance of the variable resistor V _r is reduced to a negative value of the resistance of the variable resistor V _r when the clock just returns to stability. value.

To compensate for the decrease in the amplitude of the reference signal caused by the series resistor 120, an amplifier 116 is provided inside the wafer 110 to amplify the reference signal. Referring to FIG. 3, in the wafer 310, the output of the inverter 113 is coupled to the amplifier 116 through the capacitor 115. Therefore, the periodic signal can be amplified by the amplifier 116 before inputting the Schmitt trigger circuit 117, and the Schmitt trigger circuit is lowered. 117 The possibility of a transition error. On the other hand, if the amplification factor of the amplifier 116 is increased, the resistance value of the resistor 120 can be increased to further reduce the cutoff frequency f _{c of the} low-pass filter circuit, but it is still necessary to ensure that the oscillation signal of the crystal oscillator 130 is not Filter out. Please note that since the signals at the input and output of the inverter 113 are only in an inverted relationship and do not affect the operation of the Schmitt trigger circuit 117, the Schmitt trigger circuit 117 of FIG. 1 can be coupled with an inverted phase. In addition to the output of the device 113, it can also be coupled to the input terminal of the inverter 113, as shown by the wafer 410 of FIG. 4; similarly, the Schmitt trigger circuit 117 of FIG. 3 can pass through the amplifier 116 and the capacitor. The 115 is coupled to the input end of the inverter 113 and can also be coupled to the input end of the inverter 113.

The wafers 110, 310, and 410 are a wafer formed by an integrated circuit. In an embodiment, the wafer 110 can be an integrated circuit having an image processing function, such as an image scaling function, and the wafer 110 and the resistor 120. The crystal oscillator 130 and the capacitors 150 and 160 together with the circuit board 100 carrying the electronic components constitute a control circuit of the display device. The display device may be, for example, a monitor or a television device. The display device using this circuit will no longer be threatened by high-frequency signal interference, and the user does not have to worry about the distortion of the display device, no picture or automatic restart when the mobile phone is placed near the display device.

In another embodiment of the invention, the high frequency signal interference protection circuit is designed in the wafer. Please refer to FIG. 5, which is a circuit diagram of another embodiment of the clock generation circuit with high frequency signal interference protection of the present invention. The wafer 510 includes electrostatic discharge protection resistors 111 and 112, an oscillating signal input pin 119a, an oscillating signal output pin 119b, an inverter 113, resistors 114 and 512, a capacitor 514, a Schmitt trigger circuit 117, and a processing circuit 118. The oscillating signal input pin 119a and the oscillating signal output pin 119b are connected to the oscillating circuit 190 outside the chip 510 to receive the oscillating signal, wherein the inverter 113, the resistors 114 and 512, the capacitor 514, and The main function of the Schmitt trigger circuit 117 is to convert the oscillation signal generated by the oscillation circuit 190 into a clock signal CLK. In the embodiment, the resistor 512 and the capacitor 514 form a low-pass filter circuit for filtering high-frequency signals that are inserted into the wafer 510 from the outside of the wafer 510 via the oscillation signal input pin 119a. One end of the resistor 512 is coupled to the output end of the inverter 113, and the other end is an output end of the low-pass filter circuit coupled to the input end of the Schmitt trigger circuit 117; one end of the capacitor 514 is coupled to the Schmitt trigger circuit 117. The input, that is, the output of the low-pass filter circuit, and the other end are coupled to the reference voltage level, usually grounded. When the resistance value of the resistor 512 and the capacitance value of the capacitor 514 are selected, the target is to make the cutoff frequency smaller than the frequency of the high frequency signal, for example, the frequency of the high frequency signal is 900 MHz or more, and the capacitance value of the capacitor 514 is 2 pF, and the resistance of the resistor 512 The value should be greater than 177 Ω.

Similarly, in the above embodiment, the low-pass filter circuit can be coupled to the input end of the inverter 113, as shown in FIG. 6. At this time, one end of the resistor 512 in the chip 610 is coupled to the inverter 113. The input is the same as the embodiment shown in FIG. The resistors 512 of the above two embodiments can be implemented by using polysilicon resistors, and the capacitors 514 can be implemented by using a metal oxide semiconductor capacitor (MOS Capacitor). In addition, in order to compensate for the decrease in signal amplitude caused by the resistor 512, the amplifier can be coupled between the low-pass filter circuit and the Schmitt trigger circuit 117 in the embodiment of FIG. 5 or FIG. 6, and the embodiment of FIG. 5 adds the amplifier. As shown in the wafer 710 of FIG. 7, the embodiment of FIG. 6 adds the amplifier as shown by the wafer 810 of FIG. 8, thus reducing the possible transition errors of the Schmitt trigger circuit 117.

In addition to the above embodiments, the present invention can also utilize the electrostatic discharge protection resistor 111 to generate a low pass filter circuit. Please refer to FIG. 9, which is a circuit diagram of another embodiment of the clock generation circuit with high frequency signal interference protection of the present invention. Wafer 910 contains static The electric discharge protection resistors 111 and 112, the oscillation signal input pin 119a, the oscillation signal output pin 119b, the inverter 113, the resistor 114, the capacitor 912, the Schmitt trigger circuit 117, and the processing circuit 118, wherein the inverter 113, The main function of the resistors 114 and 111, the capacitor 912 and the Schmitt trigger circuit 117 is to convert the oscillation signal generated by the crystal oscillator 130 into the clock signal CLK. The oscillation signal input pin 119a and the oscillation signal output pin 119b are connected to the oscillation circuit 190 outside the chip 910 to receive the oscillation signal. In the embodiment, the capacitor 912 and the electrostatic discharge protection resistor 111 form a low-pass filter circuit, which can filter out the high-frequency signal that is inserted from the outside of the chip 910 by the oscillation signal input pin 119a. The input end of the low-pass filter circuit is coupled to the oscillation signal input pin 119a, and the output end is coupled to the input end of the inverter 113. One end of the ESD protection resistor 111 is coupled to the oscillation signal input pin 119a, and the other end is coupled to the output end of the low-pass filter circuit. One end of the capacitor 912 is coupled to the output end of the low-pass filter circuit, and the other end is coupled to the reference voltage Bit, usually grounded.

In the embodiment of FIG. 9, the input of the Schmitt trigger circuit 117 can be coupled to the input of the inverter 113, that is, the output of the low pass filter, as shown by the wafer 1010 of FIG. The internal resistance of the wafers 910 and 1010 in FIGS. 9 and 10 can be implemented using a polysilicon resistor, and the capacitor 912 can be implemented using a metal oxide semiconductor capacitor.

In the embodiment of FIG. 5 to FIG. 10, the interference protection circuit with built-in high-frequency signal inside the chip, that is, the principle of low-pass filtering is used to filter the high-frequency signal, so as not to affect the operation of the clock generation circuit, thereby affecting The overall function of the chip. Compared with the embodiments of FIG. 1, FIG. 3 and FIG. 4, the interference protection circuit of the high frequency signal is disposed in the wafer, which can reduce the component usage on the circuit board, thereby avoiding more components and longer winding possibilities. The chance of electromagnetic interference on the board increases.

It is noted that the shapes, the dimensions, the proportions, and the like of the elements are merely illustrative, and are intended to be used by those of ordinary skill in the art to understand the invention and not to limit the invention. In addition, some or all of the technical features of any embodiment may be selectively implemented, or a combination of some or all of the technical features of the plurality of embodiments may be selectively implemented according to the disclosure of the present invention and the requirements thereof. Thereby, the elasticity at the time of implementation of the present invention is increased. Furthermore, the foregoing embodiments are exemplified by image processing wafers, and are not intended to limit the present invention, and those skilled in the art can appropriately apply the present invention to other types of wafers in accordance with the disclosure of the present invention.

Although the embodiments of the present invention are described above, the embodiments are not intended to limit the present invention, and those skilled in the art can change the technical features of the present invention according to the explicit or implicit contents of the present invention. Such variations are all within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention is defined by the scope of the patent application of the specification.

100‧‧‧ boards

110‧‧‧ wafer

111, 112, 114, 120‧‧‧ resistance

113‧‧‧Inverter

150, 160‧‧‧ capacitor

117‧‧‧ Schmitt trigger circuit

118‧‧‧Processing Circuit

119a‧‧‧Oscillation signal input pin

119b‧‧‧Oscillation signal output pin

130‧‧‧ crystal oscillator

140‧‧‧ nodes

170‧‧‧Parasitic capacitance

190‧‧‧Oscillation circuit

Claims (12)

A control device for a display device includes: an image processing chip, comprising a first pin and a second pin, the image processing chip further comprising: an inverter, an input end coupled to the first pin An output terminal is coupled to the second pin; a further resistor having one end coupled to the input end of the inverter and the other end coupled to the output end of the inverter; and a Schmitt trigger The circuit has an input coupled to one of the input end of the inverter and the output end of the inverter, wherein an output terminal outputs a clock signal; and a resistor coupled to the first end of the resistor And an oscillating circuit having a first end point and a second end point, wherein the first end point is coupled to the other end of the resistor, the second end point is coupled to the second pin, the oscillating The circuit outputs an oscillating signal to the image processing chip by the first terminal; wherein the resistor forms a low pass filter with one of the parasitic capacitances of the first pin to filter out a high frequency noise. The control circuit of the display device of claim 1, wherein the image processing chip further comprises: a first static electricity protection resistor coupled between the input end of the inverter and the first pin ;as well as A second static electricity protection resistor is coupled between the output end of the inverter and the second pin. The control circuit of the display device of claim 1, wherein the image processing chip further comprises: an amplifier coupled between the Schmitt trigger circuit and the inverter. The control circuit of the display device of claim 1, wherein the image processing chip is an image scaling chip. The control circuit of the display device according to claim 1, wherein the resistance of the resistor is between 200 ohms and 1000 ohms. A signal conversion circuit is disposed inside a chip for converting an oscillation signal into a clock signal. The chip includes a first pin and a second pin for connecting an oscillating circuit outside the chip to receive An oscillating signal, the signal conversion circuit includes: an inverter having an input coupled to the first pin and an output coupled to the second pin; a resistor coupled to the end of the resistor The input end of the device is coupled to the output end of the inverter; a Schmitt trigger circuit having an input coupled to the input end of the inverter and the output end of the inverter One of the signals to receive the oscillation signal and output the clock signal at an output thereof; and a low-pass filter circuit coupled between the inverter and the Schmitt trigger circuit for filtering One of the high frequency noise is input from the first pin. The signal conversion circuit of claim 6, further comprising: a first static electricity protection resistor coupled between the input end of the inverter and the first pin; A second static electricity protection resistor is coupled between the output end of the inverter and the second pin. The signal conversion circuit of claim 6, wherein the low-pass filter circuit comprises: another resistor, one end of which is coupled to the input end of the inverter and the output end of the inverter And the other end is coupled to the output end of the low-pass filter circuit; and a capacitor coupled to the output end of the low-pass filter circuit and coupled to a reference voltage level at the other end. The signal conversion circuit of claim 8, further comprising: an amplifier coupled between the output of the low pass filter and the input of the Schmitt trigger circuit. A signal conversion circuit is disposed inside a chip for converting an oscillation signal into a clock signal. The chip includes a first pin and a second pin for connecting an oscillating circuit outside the chip to receive An oscillating signal, the signal conversion circuit includes: a low-pass filter circuit having an input end and an output end, the input end of which is coupled to the first pin for filtering one of the inputs from the first pin An inverter having an input coupled to the output of the low-pass filter circuit, an output coupled to the second pin, and a resistor coupled to the inverter The input end is coupled to the output end of the inverter; and a Schmitt trigger circuit having an input coupled to the input end of the inverter and the output end of the inverter One of them receives the oscillation signal, and an output terminal outputs the clock. The signal conversion circuit of claim 10, further comprising: an electrostatic protection resistor coupled between the output end of the inverter and the second pin. The signal conversion circuit of claim 10, wherein the low-pass filter circuit comprises: another resistor, one end of which is coupled to the first pin, and the other end of which is coupled to the output end of the low-pass filter circuit And a capacitor, one end of which is coupled to the output end of the low-pass filter circuit, and the other end is coupled to a reference voltage level; wherein the resistor has the function of electrostatic protection.