TWI527495B - Can be adjusted by a resistor output current ripple of the PWM controller and LED driver circuit - Google Patents

Description

PWM controller and LED driving circuit capable of adjusting output current ripple by a resistor

The invention relates to a PWM-pulse width modulation controller and an LED (light emitting diode) driving circuit, in particular to adjusting a pulse width modulation of an output current chopping by a resistor A variable controller and an LED driving circuit including the pulse width modulation controller.

Please refer to FIG. 1 , which illustrates a circuit diagram of a conventional LED driving circuit. As shown in FIG. 1 , the conventional LED driving circuit includes a bridge rectifier 10 , a first resistor 11 , a first capacitor 12 , a PWM controller 13 , and an NMOS (n type metal oxide semiconductor). The transistor 14, an inductor 15, a second capacitor 16, an LED module 17, a second resistor 18, a diode 19, and a third capacitor 20.

The bridge rectifier 10 is configured to generate a full-wave rectified voltage V _IN according to an AC power source V _AC .

The first resistor 11 and the first capacitor 12 are configured to generate a DC voltage V _CC according to the full-wave rectified voltage V _IN .

The PWM controller 13 has a first pin coupled to the DC voltage V _CC and a second pin to provide a pulse width modulation signal V _G to drive the N-type MOS transistor 14; a third pin The current sensing signal V _CS is coupled to a positive voltage signal; a fourth pin is coupled to a reference ground; and a fifth pin is coupled to the third capacitor 20 to generate a comparison signal V _COMP .

The NMOS transistor 14 turns on/off its drain-source channel according to the voltage level of the pulse width modulation signal V _G .

The inductor 15 is used to store energy when the NMOS transistor 14 is turned on and to release energy when the NMOS transistor 14 is turned off.

The second capacitor 16 is a large capacitor for reducing the ripple of the current I _LED flowing through one of the LED modules 17.

The second resistor 18 is configured to generate a current sense signal V _CS according to a current I _R flowing through the resistor, wherein V _CS is a positive voltage signal.

The diode 19 is used to provide an inductance 15 - a discharge path when the NMOS transistor 14 is turned off.

The third capacitor 20 is coupled to the fifth pin of the PWM controller 13 to generate a comparison signal V _COMP .

In operation, the PWM controller 13 filters the difference between the current sense signal V _CS and a reference voltage (not shown) via the third capacitor 20 to generate a comparison signal V _COMP ; thereafter, the PWM controller 13 The comparison signal V _COMP and a fixed sawtooth signal (not shown) are subjected to a voltage comparison operation to determine the duty ratio of the pulse width modulation signal V _G . At steady state, the average voltage of the current sense signal V _CS approaches the reference voltage via a negative feedback.

Please refer to FIG. 2 , which illustrates a circuit diagram of another conventional LED driving circuit. As shown in FIG. 2, the conventional LED driving circuit includes a bridge rectifier 30, a first resistor 31, a first capacitor 32, a PWM controller 33, an NMOS transistor 34, a second resistor 35, and an inductor. 36. A second capacitor 37, an LED module 38, a diode 39, and a third capacitor 40.

The bridge rectifier 30 is configured to generate a full-wave rectified voltage V _IN according to an AC power source V _AC .

The first resistor 31 and the first capacitor 32 are configured to generate a DC voltage V _CC according to the full-wave rectified voltage V _IN .

The PWM controller 33 has a first pin coupled to the DC voltage V _CC , a second pin to provide a pulse width modulation signal V _G to drive the NMOS transistor 34, and a third pin to couple the first pin. The current sense signal V _CS is a negative voltage signal; a fourth pin is coupled to a reference ground; and a fifth pin is coupled to the third capacitor 40 to generate a comparison signal V _COMP .

The NMOS transistor 34 turns on/off its drain-source channel according to the voltage level of the pulse width modulation signal V _G .

The second resistor 35 is configured to generate a current sensing signal V _CS according to a current I _R flowing through the resistor, wherein V _CS is a negative voltage signal.

Inductor 36 is used to store energy when NMOS transistor 34 is turned on and to release energy when NMOS transistor 34 is turned off.

The second capacitor 37 is a large capacitor for reducing the ripple of the current I _LED flowing through one of the LED modules 38.

The diode 39 is used to provide an inductance 36-discharge path when the NMOS transistor 34 is turned off.

The third capacitor 40 is coupled to the fifth pin of the PWM controller 33 to generate a comparison signal V _COMP .

During operation, the PWM controller 33 first inverts the polarity of the current sense signal V _CS to generate a positive voltage signal (not shown), and then causes the positive voltage signal and a reference voltage (not shown). The difference is filtered by the third capacitor 40 to generate a comparison signal V _COMP ; afterwards, the PWM controller 33 compares the comparison signal V _COMP with a fixed sawtooth signal (not shown) for a voltage comparison operation. The duty ratio of the pulse width modulation signal V _{G is} determined. At steady state, the average voltage of the positive voltage signal approaches the reference voltage via a negative feedback.

Since the absolute value of the voltage of the current sensing signal V _CS is equal to the product of the resistance value of the second resistor 35 and the current I _R , that is, the resistance value of the second resistor 35 is inversely proportional to the current I _R , and therefore, by changing the second The resistance value of the resistor 35 changes the current I _R such that the current I _LED produces a different average value.

In addition, in FIG. 1, the chopping current of the current I _R is related to the inductance value of the inductor 15 . The larger the inductance value is, the smaller the chopping current I _R is, and the smaller the chopping current of the current I _LED is. In 2, the chopping current of the current I _R is related to the inductance value of the inductor 36. The larger the inductance value is, the smaller the chopping current I _R is, and the smaller the chopping current of the current I _LED is. However, the larger the inductance value, the higher the cost. Therefore, in FIG. 1, the LED driving circuit reduces the chopping of the current I _LED by causing the second capacitor 16 to have a large capacitance value to absorb the AC component of the current I _R ; and in FIG. 2 The LED driver circuit reduces the ripple of the current I _LED by causing the second capacitor 37 to have a large capacitance value to absorb the AC component of the current I _R .

However, capacitors with large capacitance values are costly and easily damaged. Therefore, the conventional LED driving circuits of FIGS. 1 and 2 have the disadvantages that the working life is not long.

In order to solve the aforementioned problems, we need a novel pulse width modulation controller and a corresponding LED driving circuit architecture.

An object of the present invention is to disclose a PWM controller which can be externally The resistor adjusts the ripple of an output current.

Another object of the present invention is to disclose a PWM controller having an output current chopping adjustment mechanism that provides a high power factor.

Another object of the present invention is to disclose an LED driving circuit that can adjust the chopping of an output current by an external resistor.

Another object of the present invention is to disclose an LED driving circuit having an output current chopping adjustment mechanism that provides a high power factor.

In order to achieve the foregoing object, a PWM controller capable of adjusting output current ripple by a resistor is proposed, which has a sawtooth signal generating unit for generating a control current, a positive voltage signal, and a constant current. a sawtooth signal, wherein the control current is determined by an external resistor, and the rising slope of the sawtooth signal changes in the same direction or opposite direction to the control current; an amplifier having a positive input terminal coupled to the a reference voltage, a negative input coupled to a current sense signal, and an output coupled to an external capacitor to generate a comparison signal; and a comparator having a positive input coupled to the sawtooth signal, A negative input terminal is coupled to the comparison signal, and an output terminal is configured to generate a conduction end signal, wherein the conduction end signal exhibits an active state when the sawtooth wave signal touches the comparison signal.

In an embodiment, the positive voltage signal is provided by the current sense signal.

In one embodiment, the positive voltage signal is a signal obtained by processing the current sensing signal through a polarity switching circuit.

In one embodiment, the sawtooth signal generating unit has a constant current source having an input terminal coupled to the DC voltage, and an output terminal to provide a first current, wherein the first current system a constant current; a capacitor having a first end point coupled to the output end of the constant current source, and a second end point coupled to a reference ground, wherein the first end point is used Providing the sawtooth signal; a switch having a first channel end to couple the first end of the capacitor, a second channel end to couple the reference ground, and a control input terminal A switching signal is coupled, wherein the switching signal presents an active state when the voltage of the sawtooth wave signal climbs to a level of the comparison signal to electrically connect the first channel end point and the second channel end point a current mirror is formed by a first PMOS (p type metal oxide semiconductor) and a second PMOS transistor, wherein the first PMOS transistor system is used to provide a second Current to the capacitor; an NMOS transistor with a turn a pole, a gate, and a source, wherein the drain is coupled to the second PMOS transistor, and the source is coupled to the external resistor; and an amplifier having a positive input An input voltage is coupled, a negative input terminal is coupled to the source of the NMOS transistor, and an output terminal is coupled to the gate of the NMOS transistor, wherein the input voltage is The positive voltage signal is provided.

In an embodiment, the sawtooth signal generating unit has a constant current source having an input terminal for coupling a DC voltage and an output. An end point to provide a first current, wherein the first current is the constant current; a capacitor having a first end point to couple the output end of the constant current source and coupled to the external connection a resistor, and a second end point coupled to a reference ground, wherein the first end is used to provide the sawtooth signal; and a switch has a first channel end to couple the capacitor An end point, a second channel end point coupled to the reference ground, and a control input end point coupled to a switching signal, wherein the switching signal is caused by a voltage of the sawtooth wave signal climbing to the comparison signal Positioning an active state to electrically connect the first channel end point and the second channel end point; a current mirror is formed by a first PMOS transistor and a second PMOS transistor, wherein the a PMOS transistor system is configured to provide a second current to the capacitor; an NMOS transistor having a drain, a gate, and a source, wherein the drain is coupled to the second PMOS Crystal; an amplifier having a positive input coupled to an input voltage, a negative The input terminal is coupled to the source of the NMOS transistor, and an output terminal is coupled to the gate of the NMOS transistor, wherein the input voltage is provided by the positive voltage signal; and a resistor One end is coupled to the source of the NMOS transistor, and the other end is coupled to the reference ground.

In order to achieve the foregoing object, an LED driving circuit capable of adjusting an output current chopping by a resistor is proposed, which has a bridge rectifier having two AC input terminals, a positive output terminal, and a negative output terminal. The two AC input terminals are coupled to an AC power source, and the positive output terminal and the The negative output terminal is configured to provide a full-wave rectified voltage; a PWM controller having: a first pin to couple the DC voltage; a second pin to provide a pulse width modulation signal; and a third a pin is coupled to a current sensing signal; a fourth pin is coupled to a reference ground; a fifth pin is coupled to an external resistor to generate a control current; and a sixth pin is coupled to the first An external capacitor is used to generate a comparison signal; an NMOS transistor has a drain, a gate, and a source, wherein the drain is coupled to the positive output, and the gate is coupled to the a second pin, and the source is coupled to the third pin; a current sensing resistor having one end coupled to the reference ground and the other end coupled to the a third pin for generating the current sensing signal according to a current flowing through one of the resistor bodies; an inductor having one end coupled to the current sensing resistor; and an LED module having one end coupled to the inductor The other end is coupled, and the other end is coupled to the negative output end; and a diode has a negative The pole is coupled to the third pin, and an anode is coupled to the negative output terminal; wherein the PWM controller is configured to: difference between the current sensing signal and a reference voltage Filtering by the external capacitor to generate the comparison signal; and performing a voltage comparison operation on the comparison signal and a sawtooth signal to determine a duty ratio of the pulse width modulation signal, wherein the sawtooth signal The rising slope is controlled by the control current.

In an embodiment, the rising slope of the sawtooth signal changes in the same direction as the control current.

In one embodiment, the rising slope of the sawtooth signal and the control current are inversely varied.

In order to achieve the above object, another LED driving circuit capable of adjusting output current chopping by a resistor is proposed, which has: a bridge rectifier having two AC input terminals, one positive output terminal, and one negative output terminal, wherein The two AC input terminals are coupled to an AC power source, and the positive output terminal and the negative output terminal are configured to provide a full-wave rectified voltage; and a PWM controller has a first pin coupled to a DC voltage; a second pin to provide a pulse width modulation signal; a third pin coupled to a current sensing signal; a fourth pin coupled to a reference ground; and a fifth pin An external resistor is coupled to generate a control current; and a sixth pin is coupled to the external capacitor to generate a comparison signal; an NMOS transistor having a drain, a gate, and a source, wherein the a drain is coupled to the positive output, the gate is coupled to the second pin, and the source is coupled to the reference ground; a current sensing resistor, one end Is coupled to the reference ground, and the other end is coupled to the a third pin for generating the current sensing signal according to a current flowing through one of the resistor bodies; an inductor having one end coupled to the current sensing resistor; and an LED module having one end coupled to the inductor The other end is coupled to the other end coupled to the negative output terminal; and a diode having a cathode coupled to the reference ground and an anode coupled to the negative Output The PWM controller is configured to: invert a polarity of the current sensing signal to generate a positive voltage signal; and filter a difference between the positive voltage signal and a reference voltage by the external capacitor to generate the Comparing the signal; and performing a voltage comparison operation on the comparison signal and the sawtooth signal to determine a duty ratio of the pulse width modulation signal, wherein a rising slope of the sawtooth signal is controlled by the control current.

In an embodiment, the rising slope of the sawtooth signal changes in the same direction as the control current.

In one embodiment, the rising slope of the sawtooth signal and the control current are inversely varied.

The detailed description of the drawings and the preferred embodiments are set forth in the accompanying drawings.

10, 30, 100‧‧ ‧ bridge rectifier

11, 31, 110‧‧‧ first resistance

12, 32, 120‧‧‧ first capacitor

13, 33, 130a, 130b‧‧‧ PWM controller

14, 34, 140, 1316‧‧‧ NMOS transistors

15, 36, 142‧‧‧Inductance

16, 37, 146‧‧‧ second capacitor

17, 38, 144‧‧‧ LED modules

18, 35, 141‧‧‧ second resistor

19, 39, 145‧‧ ‧ diode

20, 40‧‧‧ third capacitor

147‧‧‧ Third resistor

131‧‧‧Sawtooth signal generating unit

132, 1317‧ ‧ amplifier

133‧‧‧ comparator

134‧‧‧ or gate

135‧‧‧Latch

136‧‧‧ drive circuit

137‧‧‧Polarity conversion circuit

1311‧‧‧Constant current source

1312‧‧‧ Capacitance

1313‧‧‧Switch

1314‧‧‧First PMOS transistor

1315‧‧‧Second PMOS transistor

1318‧‧‧resistance

FIG. 1 is a circuit diagram of a conventional LED driving circuit.

2 is a circuit diagram of another conventional LED driving circuit.

3 is a circuit diagram of a preferred embodiment of an LED driver circuit using a PWM controller of the present invention.

4 is a circuit diagram showing another preferred embodiment of an LED driving circuit using the PWM controller of the present invention.

FIG. 5 is a circuit diagram of a preferred embodiment of the PWM controller of FIG. 3. FIG.

6 is a circuit diagram of a preferred embodiment of the PWM controller of FIG. 4.

7 is a circuit diagram of a sawtooth signal generating unit of FIG. 5 and FIG. Figure.

FIG. 8 is a circuit diagram showing another preferred embodiment of one of the sawtooth signal generating units of FIGS. 5 and 6.

FIG. 9 is a waveform diagram showing one of a sawtooth wave signal V _SAW and a comparison signal V _COMP when an external resistor is set to a high resistance value according to an embodiment of the invention.

FIG. 10 is a waveform diagram showing one of a sawtooth wave signal V _SAW and a comparison signal V _COMP when an external resistor is set to a low resistance value according to an embodiment of the invention.

FIG. 11 is a diagram showing an output current waveform I _LED1 when an external resistor is set to a high resistance value, and an output current waveform I _LED2 when a low resistance value is set, according to an embodiment of the invention.

Referring to FIG. 3, a circuit diagram of a preferred embodiment of an LED driving circuit using the PWM controller of the present invention is shown. As shown in FIG. 3, the LED driving circuit includes a bridge rectifier 100, a first resistor 110, a first capacitor 120, a PWM controller 130a, an NMOS transistor 140, a second resistor 141, and an inductor 142. An LED module 144, a diode 145, a second capacitor 146, and a third resistor 147.

The bridge rectifier 100 has two AC input terminals, a positive output terminal, and a negative output terminal, wherein the two AC input terminals are coupled to an AC power source V _AC , and the positive output terminal and the negative output terminal are coupled to each other. The method provides a full-wave rectified voltage V _IN , wherein the negative output terminal is a first reference ground.

The first resistor 110 and the first capacitor 120 are configured to generate a DC voltage V _CC according to the full-wave rectified voltage V _IN , wherein the voltage of V _CC is relative to a second reference ground.

The PWM controller 130a has a first pin to couple the DC voltage V _CC , a second pin to provide a pulse width modulation signal V _G to drive the NMOS transistor 140, and a third pin to couple the first pin. The current sensing signal V _CS is a positive voltage signal; a fourth pin is coupled to the second reference ground; and a fifth pin is coupled to the third resistor 147 to generate a control current I _X ; And a sixth pin to couple the second capacitor 146 to generate a comparison signal V _COMP .

The NMOS transistor 140 has a drain, a gate, and a source, wherein the drain is coupled to the positive output, the gate is coupled to the second pin, and The source is coupled to the third pin.

The second resistor 141 is a current sensing resistor, one end of which is coupled to the second reference ground, and the other end of which is coupled to the third pin to flow through a current I of the resistive body _R generates the current sense signal V _CS , wherein V _CS is a positive voltage signal relative to the second reference ground.

The inductor 142 has one end coupled to the second resistor 141. The inductor 142 is used to store energy when the NMOS transistor 140 is turned on and to release energy when the NMOS transistor 140 is turned off.

One end of the LED module 144 is coupled to the other end of the inductor 142, and the other end of the LED module 144 is coupled to the negative output.

The diode 145 has a cathode coupled to the third pin, and an anode coupled to the negative output terminal, and is configured to provide an inductance 142 when the NMOS transistor 140 is disconnected. Discharge path.

The second capacitor 146 is coupled between the second reference ground and the sixth pin of the PWM controller 130a to generate a comparison signal V _COMP .

The third resistor 147 is coupled between the second reference ground and the fifth pin of the PWM controller 130a to generate a control current I _X .

In operation, the PWM controller 130a filters the difference between the current sense signal V _CS and a reference voltage (not shown) via the second capacitor 146 to generate a comparison signal V _COMP ; thereafter, the PWM controller 130a The comparison signal V _COMP and a sawtooth wave signal (not shown) are subjected to a voltage comparison operation to determine a duty ratio of the pulse width modulation signal V _G , and at a steady state, via a negative feedback The average voltage of the current sense signal V _CS will approach the reference voltage. In addition, the rising slope of the sawtooth signal is controlled by the control current I _X . The rising slope of the sawtooth signal may change in the same direction or in the opposite direction as the control current I _X . When the rising slope of the sawtooth signal becomes larger/smaller, the level of the comparison signal V _COMP rises/decreases, and the chopping of the current sensing signal V _CS (ie, the current I _R ) becomes smaller/larger. . That is, by changing the resistance value of the third resistor 147, the chopping magnitude of the current I _R can be changed, thereby changing the chopping magnitude of the current I _LED .

Referring to FIG. 4, a circuit diagram of another preferred embodiment of an LED driving circuit using the PWM controller of the present invention is shown. As shown in FIG. 4, the LED driving circuit includes a bridge rectifier 100, a first resistor 110, a first capacitor 120, a PWM controller 130b, an NMOS transistor 140, a second resistor 141, and an inductor 142. An LED module 144, a diode 145, a second capacitor 146, and a third resistor 147.

The bridge rectifier 100 has two AC input terminals, a positive output terminal, and a negative output terminal, wherein the two AC input terminals are coupled to an AC power source V _AC , and the positive output terminal and the negative output terminal are coupled to each other. The method provides a full-wave rectified voltage V _IN , wherein the negative output terminal is a first reference ground.

The first resistor 110 and the first capacitor 120 are configured to generate a DC voltage V _CC according to the full-wave rectified voltage V _IN , wherein the voltage of V _CC is relative to a second reference ground.

The PWM controller 130b has a first pin coupled to the DC voltage V _CC , a second pin to provide a pulse width modulation signal V _G to drive the NMOS transistor 140, and a third pin to couple the first pin. The current sensing signal V _CS is a negative voltage signal; a fourth pin is coupled to the second reference ground; and a fifth pin is coupled to the third resistor 147 to generate a control current I _X ; And a sixth pin to couple the second capacitor 146 to generate a comparison signal V _COMP .

The NMOS transistor 140 has a drain, a gate, and a source, wherein the drain is coupled to the positive output, the gate is coupled to the second pin, and the gate The source is coupled to the second reference ground.

The second resistor 141 is a current sensing resistor, one end of which is coupled to the second reference ground, and the other end of which is coupled to the third pin to flow through a current I of the resistive body _R generates the current sense signal V _CS , wherein V _CS is a negative voltage signal relative to the second reference ground.

The inductor 142 has one end coupled to the second resistor 141. The inductor 142 is used to store energy when the NMOS transistor 140 is turned on and to release energy when the NMOS transistor 140 is turned off.

One end of the LED module 144 is coupled to the other end of the inductor 142, and the other end of the LED module 144 is coupled to the negative output.

The diode 145 has a cathode coupled to the second reference ground and an anode coupled to the negative output. The diode 145 is used to provide an inductance 142-discharge path when the NMOS transistor 140 is turned off.

The second capacitor 146 is coupled between the second reference ground and the sixth pin of the PWM controller 130b to generate a comparison signal V _COMP .

The third resistor 147 is coupled between the second reference ground and the fifth pin of the PWM controller 130b to generate a control current I _X .

In operation, the PWM controller 130b first inverts the polarity of the current sense signal V _CS to generate a positive voltage signal (not shown), and then causes the positive voltage signal and a reference voltage (not shown). The difference between the two is filtered by the second capacitor 146 to generate a comparison signal V _COMP ; afterwards, the PWM controller 130b compares the comparison signal V _COMP with a sawtooth signal (not shown) to determine a pulse. The duty ratio of the width modulation signal V _G . At steady state, the average voltage of the positive voltage signal approaches the reference voltage via a negative feedback. In addition, the rising slope of the sawtooth signal is controlled by the control current I _X . The rising slope of the sawtooth signal may change in the same direction or in the opposite direction as the control current I _X . When the rising slope of the sawtooth signal becomes larger/smaller, the level of the comparison signal V _COMP rises/decreases, and the chopping of the current sensing signal V _CS (ie, the current I _R ) becomes smaller/larger. . That is, by changing the resistance value of the third resistor 147, the chopping magnitude of the current I _R can be changed, thereby changing the chopping magnitude of the current I _LED .

Please refer to FIG. 5, which is a circuit diagram of a preferred embodiment of the PWM controller 130a of FIG. As shown in FIG. 5, the PWM controller 130a has a sawtooth signal generating unit 131, an amplifier 132, a comparator 133, a gate 134, a latch 135, and a driving circuit 136.

The sawtooth signal generating unit 131 is configured to generate a sawtooth wave signal V _SAW according to the control current I _X , the positive voltage signal (provided by the current sensing signal V _CS ), and a certain current (not shown). The resistance value of I _X = V _CS / third resistor 147, and the rising slope of the sawtooth wave signal V _SAW may vary in the same direction or in the opposite direction as the control current I _X .

The amplifier 132 has a positive input terminal coupled to a reference voltage V _REF , a negative input terminal coupled to the current sense signal V _CS , and an output terminal coupled to the second capacitor 146 to generate the comparison signal V _COMP .

The comparator 133 has a positive input terminal coupled to the sawtooth wave signal V _SAW , a negative input terminal coupled to the comparison signal V _COMP , and an output terminal to generate a conduction end signal V _EON for transmission to the OR gate 134, wherein The turn-on signal V _EON exhibits an active state (such as, but not limited to, a high potential) when the sawtooth signal V _SAW touches the comparison signal V _COMP .

The OR gate 134 has a first input terminal coupled to the output terminal of the comparator 133, a second input terminal coupled to an overcurrent protection signal OCP, and an output terminal coupled to the latch 135.

The latch 135 has a set input to couple a clock signal CLK, a reset input to couple the output of the gate 134, and a state output to couple the drive circuit 136.

The drive circuit 136 has an input coupled to the state output of the latch 135 and an output to provide a pulse width modulated signal V _G .

Please refer to FIG. 6, which is a circuit diagram of a preferred embodiment of the PWM controller 130b of FIG. As shown in FIG. 6, the PWM controller 130b has a sawtooth signal generating unit 131, an amplifier 132, a comparator 133, a gate 134, a latch 135, a driving circuit 136, and a polarity switching circuit 137. .

Sawtooth signal generating unit 131 is used by the control system current I _X, a positive voltage signal (lines generated by the current sense signal V _CS), and a constant current (not shown in the drawing) generates a sawtooth signal V _SAW, Wherein the resistance value of I _X =V _CS /third resistance 147, and the rising slope of the sawtooth wave signal V _SAW may change in the same direction or in the opposite direction as the control current I _X .

The amplifier 132 has a positive input terminal coupled to a reference voltage V _REF , a negative input terminal coupled to the positive voltage signal output by the polarity switching circuit 137 , and an output terminal coupled to the second capacitor 146 to generate a comparison signal. V _COMP .

The comparator 133 has a positive input terminal coupled to the sawtooth wave signal V _SAW , a negative input terminal coupled to the comparison signal V _COMP , and an output terminal to generate a conduction end signal V _EON for transmission to the OR gate 134, wherein The turn-on signal V _EON exhibits an active state (such as, but not limited to, a high potential) when the sawtooth signal V _SAW touches the comparison signal V _COMP .

The OR gate 134 has a first input terminal coupled to the output terminal of the comparator 133, a second input terminal coupled to an overcurrent protection signal OCP, and an output terminal coupled to the latch 135.

The latch 135 has a set input to couple a clock signal CLK, a reset input to couple the output of the gate 134, and a state output to couple the drive circuit 136.

The drive circuit 136 has an input coupled to the state output of the latch 135 and an output to provide a pulse width modulated signal V _G .

The polarity switching circuit 137 has an input terminal coupled to the current sensing signal V _CS and an output terminal to provide the positive voltage signal, wherein the voltage value of the positive voltage signal and the absolute value of the current sensing signal V _CS The voltage value is proportional.

Please refer to FIG. 7, which is a circuit diagram of a preferred embodiment of the sawtooth signal generating unit 131 of FIGS. 5 and 6. As shown in FIG. 7, the sawtooth wave signal generating unit 131 has a constant current source 1311, a capacitor 1312, a switch 1313, a first PMOS transistor 1314, a second PMOS transistor 1315, an NMOS transistor 1316, and a Amplifier 1317.

The constant current source 1311 has an input terminal to couple the DC voltage V _DD and an output terminal to provide a first current I ₁ , wherein the first current I ₁ is a constant current.

The capacitor 1312 has a first end point coupled to the output end of the constant current source 1311, and a second end point coupled to the second reference ground, wherein the first end point is used to provide a sawtooth Wave signal V _SAW .

The switch 1313 has a first channel end to couple the first end of the capacitor 1312, a second channel end to couple the second reference ground, and a control input end to couple a switching signal V _SW , wherein the switching signal V _SW exhibits an active state (such as, but not limited to, a high potential) when the voltage of the sawtooth wave signal V _SAW climbs to the level of the comparison signal V _COMP to make the first channel end point An electrical connection is made to the second channel end to zero the voltage of the capacitor 1312.

The first PMOS transistor 1314 and the second PMOS transistor 1315 are used to form a current mirror to provide a second current I ₂ to the capacitor 1312 by the first PMOS transistor 1314 under the power supply of the DC voltage V _DD .

The NMOS transistor 1316 has a drain, a gate, and a source, wherein the drain is coupled to the second PMOS transistor 1315, and the source is coupled to the third resistor 147.

The amplifier 1317 has a positive input terminal coupled to an input voltage V _P , a negative input terminal coupled to the source of the NMOS transistor 1316 , and an output terminal coupled to the gate of the NMOS transistor 1316. Wherein, the input voltage V _P is provided by the positive voltage signal.

When the resistance value of the third resistor 147 becomes smaller/larger, the current I _X becomes larger/smaller, causing the second current I _{2 to} become larger/smaller, thereby making the slope of the sawtooth wave signal V _SAW larger/variable. small. In addition, since the current sensing signal V _CS also affects the sawtooth wave signal V _SAW , the output current chopping adjustment mechanism of the present invention can also provide a high power factor.

Referring to FIG. 8, a circuit diagram of another preferred embodiment of the sawtooth signal generating unit 131 of FIGS. 5 and 6 is illustrated. As shown in FIG. 8, the sawtooth wave signal generating unit 131 has a certain A current source 1311, a capacitor 1312, a switch 1313, a first PMOS transistor 1314, a second PMOS transistor 1315, an NMOS transistor 1316, an amplifier 1317, and a resistor 1318.

The constant current source 1311 has an input terminal to couple the DC voltage V _DD and an output terminal to provide a first current I ₁ , wherein the first current I ₁ is a constant current.

The capacitor 1312 has a first end point coupled to the output end of the constant current source 1311 and coupled to the third resistor 147, and a second end point coupled to the second reference ground, wherein the first The endpoint is used to provide a sawtooth signal V _SAW .

The switch 1313 has a first channel end to couple the first end of the capacitor 1312, a second channel end to couple the second reference ground, and a control input end to couple a switching signal V _SW , wherein the switching signal V _SW exhibits an active state (such as, but not limited to, a high potential) when the voltage of the sawtooth wave signal V _SAW climbs to the level of the comparison signal V _COMP to make the first channel end point An electrical connection is made to the second channel end to zero the voltage of the capacitor 1312.

The first PMOS transistor 1314 and the second PMOS transistor 1315 are used to form a current mirror to provide a second current I ₂ to the capacitor 1312 by the first PMOS transistor 1314 under the power supply of the DC voltage V _DD .

The NMOS transistor 1316 has a drain, a gate, and a source, wherein the drain is coupled to the second PMOS transistor 1315, and the source is coupled to the resistor 1318.

The amplifier 1317 has a positive input terminal coupled to an input voltage V _P , a negative input terminal coupled to the source of the NMOS transistor 1316 , and an output terminal coupled to the gate of the NMOS transistor 1316. Wherein, the input voltage V _P is provided by the positive voltage signal.

One end of the resistor 1318 is coupled to the source of the NMOS transistor 1316, and the other end is coupled to the second reference ground.

When the resistance value of the third resistor 147 becomes smaller/larger, the current I _X becomes larger/smaller, causing I ₁ +I ₂ -I _{X to} become smaller/larger, thereby causing the slope of the sawtooth wave signal V _{SAW to} become smaller. Small / bigger. In addition, since the current sensing signal V _CS also affects the sawtooth wave signal V _SAW , the output current chopping adjustment mechanism of the present invention can also provide a high power factor.

Referring to Figures 9, 10, and 11, together, when the slope of the sawtooth wave signal V _SAW becomes small, as shown in Figure 9, the level of the comparison signal V _COMP becomes lower, and at this time, the waveform of the current I _{LED is} as follows. As shown by I _{LED1 of} Fig. 11, there is a large chopping; when the slope of the sawtooth wave signal V _SAW becomes large, as shown in Fig. 10, the level of the comparison signal V _COMP becomes high, and at this time, the current I _LED The waveform is as shown by I _{LED 2} of Figure 11, with a small chopping.

With the above disclosed design, the present invention has the following advantages:

1. The PWM controller of the present invention can adjust the chopping of an output current by an external resistor.

2. The PWM controller of the present invention has an output current chopping adjustment mechanism that provides a high power factor.

3. The LED driving circuit of the present invention can adjust the chopping of an output current by an external resistor.

4. The LED drive circuit of the present invention has an output current chopping adjustment mechanism that provides a high power factor.

The disclosure of the present invention is a preferred embodiment. Any change or modification of the present invention originating from the technical idea of the present invention and being easily inferred by those skilled in the art will not deviate from the scope of patent rights of the present invention.

In summary, this case shows its difference in terms of purpose, means and function. In the technical characteristics of Xizhi, and its first invention is practical and practical, it is also in compliance with the patent requirements of the invention. Please ask your review committee to inspect it and pray for an early patent.

130a‧‧‧PWM controller

146‧‧‧second capacitor

147‧‧‧ Third resistor

131‧‧‧Sawtooth signal generating unit

132‧‧‧Amplifier

133‧‧‧ comparator

134‧‧‧ or gate

135‧‧‧Latch

136‧‧‧ drive circuit

Claims (8)

A PWM controller capable of adjusting output current ripple by a resistor, comprising: a sawtooth signal generating unit for generating a sawtooth signal according to a control current, a positive voltage signal, and a certain current, wherein the control The current is determined by an external resistor, and the rising slope of the sawtooth signal changes in the same direction or opposite direction to the control current; an amplifier having a positive input terminal coupled to a reference voltage and a negative input terminal a current sensing signal is coupled, and an output is coupled to an external capacitor to generate a comparison signal; and a comparator having a positive input coupled to the sawtooth signal and a negative input coupled to the output Comparing the signal, and an output end to generate a turn-on end signal, wherein the turn-on end signal exhibits an active state when the sawtooth wave signal touches the comparison signal; wherein the sawtooth wave signal generating unit has: a constant current source, having An input terminal is coupled to the DC voltage, and an output terminal is configured to provide a first current, wherein the first current is the constant current; The first end point is coupled to the output end of the constant current source, and the second end point is coupled to a reference ground, wherein the first end point is used to provide the sawtooth wave signal; a switch having a first channel end to couple the first end of the capacitor, a second channel end to couple the reference ground, and a control input end to couple a switching signal, Wherein the switching signal is in an active state when the voltage of the sawtooth wave signal climbs to a level of the comparison signal to electrically connect the first channel end point and the second channel end point; a current mirror Composed of a first PMOS transistor and a second PMOS transistor, The first PMOS transistor system is configured to provide a second current to the capacitor; an NMOS transistor having a drain, a gate, and a source, wherein the drain is coupled to the first a PMOS transistor, wherein the source is coupled to the external resistor; and an amplifier having a positive input coupled to an input voltage and a negative input coupled to the source of the NMOS transistor And an output coupled to the gate of the NMOS transistor, wherein the input voltage is provided by the positive voltage signal. A PWM controller capable of adjusting an output current chopping by a resistor according to the first aspect of the patent application, wherein the positive voltage signal is provided by the current sensing signal. A PWM controller capable of adjusting an output current chopping by a resistor according to the first aspect of the patent application, wherein the positive voltage signal is obtained by processing the current sensing signal through a polarity switching circuit. signal. A PWM controller capable of adjusting output current ripple by a resistor, comprising: a sawtooth signal generating unit for generating a sawtooth signal according to a control current, a positive voltage signal, and a certain current, wherein the control The current is determined by an external resistor, and the rising slope of the sawtooth signal changes in the same direction or opposite direction to the control current; an amplifier having a positive input terminal coupled to a reference voltage and a negative input terminal a current sensing signal is coupled, and an output is coupled to an external capacitor to generate a comparison signal; and a comparator having a positive input coupled to the sawtooth signal and a negative input coupled to the output Comparing the signal, and an output end to generate a conduction end signal, wherein the conduction end signal exhibits an active state when the sawtooth wave signal touches the comparison signal; The sawtooth signal generating unit has a constant current source having an input terminal to couple a DC voltage, and an output terminal to provide a first current, wherein the first current is the constant current; a capacitor having a first end point coupled to the output terminal of the constant current source and coupled to the external resistor, and a second end point coupled to a reference ground, wherein the first end point Providing the sawtooth signal; a switch having a first channel end to couple the first end of the capacitor, a second channel end to couple the reference ground, and a control input The end point is coupled to a switching signal, wherein the switching signal exhibits an active state when the voltage of the sawtooth wave signal climbs to a level of the comparison signal to cause the first channel end point and the second channel end Point electrical connection; a current mirror is composed of a first PMOS transistor and a second PMOS transistor, wherein the first PMOS transistor system is used to provide a second current to the capacitor; an NMOS transistor has a bungee, a gate, and a source, of which The anode is coupled to the second PMOS transistor; an amplifier having a positive input coupled to an input voltage, a negative input coupled to the source of the NMOS transistor, and a The output end is coupled to the gate of the NMOS transistor, wherein the input voltage is provided by the positive voltage signal; and a resistor having one end coupled to the source of the NMOS transistor, The other end is coupled to the reference ground. An LED driving circuit capable of adjusting output current chopping by a resistor, comprising: a bridge rectifier having two AC input terminals, one positive output terminal, and one negative output terminal The two AC input terminals are coupled to an AC power source, and the positive output terminal and the negative output terminal are configured to provide a full-wave rectified voltage; and a PWM controller has: a first pin coupled Connect a DC voltage; a second pin to provide a pulse width modulation signal; a third pin to couple a current sensing signal; a fourth pin to couple a reference ground; and a fifth pin An external resistor is coupled to generate a control current; and a sixth pin is coupled to the external capacitor to generate a comparison signal; an NMOS transistor having a drain, a gate, and a source, wherein The gate is coupled to the positive output terminal, the gate is coupled to the second pin, and the source is coupled to the third pin; a current sensing resistor One end is coupled to the reference ground, and the other end is coupled to the third pin to generate the current sensing signal according to a current flowing through one of the resistance bodies; an inductor One end is coupled to the current sensing resistor; one LED module has one end coupled to the other end of the inductor The other end is coupled to the negative output terminal; and a diode having a cathode coupled to the third pin and an anode coupled to the negative output terminal; The PWM controller is configured to: filter a difference between the current sensing signal and a reference voltage by the external capacitor to generate the comparison signal; and perform the comparison signal and a sawtooth signal according to the comparison signal and a sawtooth signal A voltage comparison operation determines a duty cycle of the pulse width modulation signal, wherein a rising slope of the sawtooth signal is controlled by the control current. The LED capable of adjusting the output current chopping by a resistor as described in item 5 of the patent application scope The driving circuit, wherein the rising slope of the sawtooth signal changes in the same direction or in the opposite direction to the control current. An LED driving circuit capable of adjusting an output current chopping by a resistor, comprising: a bridge rectifier having two AC input terminals, a positive output terminal, and a negative output terminal, wherein the two AC input terminals are coupled To an AC power source, the positive output terminal and the negative output terminal are used to provide a full-wave rectified voltage; a PWM controller having: a first pin to couple a DC voltage; and a second pin Providing a pulse width modulation signal; a third pin coupled to a current sensing signal; a fourth pin coupled to a reference ground; and a fifth pin coupled to an external resistor to generate a control And a sixth pin for coupling an external capacitor to generate a comparison signal; an NMOS transistor having a drain, a gate, and a source, wherein the drain is coupled to the current a positive output terminal, the gate is coupled to the second pin, and the source is coupled to the reference ground; a current sensing resistor having one end coupled to the reference ground The other end is coupled to the third pin to flow through the resistor One current of the body generates the current sensing signal; one end of the inductor is coupled to the current sensing resistor; one LED module has one end coupled to the other end of the inductor and the other end coupled Connecting to the negative output terminal; and a diode having a cathode coupled to the reference ground and an anode coupled to the negative output terminal; wherein the PWM controller is used To reverse the polarity of the current sense signal Generating a positive voltage signal; filtering a difference between the positive voltage signal and a reference voltage via the external capacitor to generate the comparison signal; and performing a voltage comparison operation based on the comparison signal and a sawtooth signal A duty cycle of the pulse width modulation signal is determined, wherein a rising slope of the sawtooth signal is controlled by the control current. The LED driving circuit capable of adjusting the output current chopping by a resistor according to the seventh aspect of the patent application, wherein the rising slope of the sawtooth wave signal changes in the same direction or in the opposite direction to the control current.