TWI515805B - Semiconductor packaging method - Google Patents

Description

Semiconductor packaging method

The invention relates to a semiconductor packaging method, in particular to a packaging method which can improve the optical sensing effect of the semiconductor and improve the strength and stability of the overall semiconductor package structure.

According to the photo-sensing wafer, it is widely used. In order to improve the performance and stability of the photo-sensing wafer, environmental factors (such as light), mechanical support and electrical connection must be considered to ensure light. Sensing the reliability of the wafer to the measured values.

For example, the Taiwan Patent Publication No. 420865 discloses a "plastic packaging structure and method for optical sensing chip packaging", which is covered by the light sensing package by a transparent cover package, and the light can be used. After passing through the transparent cover body, it is projected onto the light sensing wafer to achieve the purpose of sensing light. However, the complicated components of the case and the complicated processing steps are likely to cause problems in production cost and work time.

In order to solve the above problem, the Taiwan Patent Publication No. M308500 discloses a "molded package structure for a light sensing wafer", which comprises a lead frame, a light sensing chip, a plurality of wires, and an encapsulation layer; The sensing chip is disposed on the lead frame and has at least one active area and a non-active area, the non-active area is located around the active area; the conductive lines are connected to the light sensing wafer and the lead frame; and the packaging layer is opaquely disposed on the The non-active area and the lead frame and the non-active area, the wires and the lead frame are partially formed, and at least one open area is formed corresponding to the active area; the system is replaced by a molding process. The way to cap the package.

However, the active area of the light sensing chip is open, and there is no covering of other optical structures (such as convex lenses), the sensing effect is poor, and the pollutants are easily accumulated to affect the sensing precision, and the open function The region enables the photo-sensing wafer to have a protective effect; and in the molding package, a convex portion directly abuts against an active region of the photo-sensing wafer, so that the encapsulating layer forms the open region, and the convex portion There is no alignment structure for its alignment. It is necessary to have a more precise alignment to increase the processing difficulty of the photo-sensing wafer. If the alignment is inaccurate, it will affect its sensing effect and increase. The defect rate of the product; therefore, there is a packaging method, and the convexity is difficult to control except for the accuracy of alignment and clamping. The convex portion is difficult to process and cannot be applied to a small-sized wafer, which is difficult to meet the market's light and short development. demand.

In view of the above, the present invention provides a packaging method capable of improving the optical sensing effect of a semiconductor and improving the strength and stability of the overall semiconductor package structure.

In order to achieve the above object, in the surface of the primary package of the semiconductor of the present invention, the secondary package is formed by using a secondary package mold, and the secondary package mold is formed with a yield space, and the shape of the yield space is associated with the primary package. The exposed shape corresponds to such that when the surface of the primary package is covered with the secondary package, the secondary package is formed with a yielding structure with respect to the yield space, and the partial region of the primary package can be exposed relatively.

Wherein, the press molding of the secondary mold can save the time and cost of adding the outer cover, and can improve the strength and stability of the overall package structure, and can ensure the half The yield of the conductor, and the partial structure of the primary package can be exposed by the yield structure, thereby ensuring the working performance of the internal semiconductor without being disturbed by the external environment, thereby achieving better light, electric shielding and light guiding. The optical effect of adjusting the semiconductor by using the primary package can have a concentrating effect, for example, and the optical sensing effect of the semiconductor can be improved.

According to the above main structural features, the second package mold is provided with a first mold and a second mold, and the first mold is formed on the substrate to form a cavity, and the second mold is disposed in the first mold. The yield space is located at the end of the second mold and is relatively close to the surface of the portion of the primary package.

Each of the above-mentioned semiconductors covers the package once, and each of the packages has a pitch, and the secondary package is formed with a compartment portion extending relatively into the respective intervals.

According to the above main structural features, the encapsulation material of the primary package may be a light transmissive material; the encapsulation material of the secondary package may be a material for filtering, filtering or filtering electromagnetic waves.

According to the above main structural features, the primary package outer shape may be an arc convex portion, and the yield space correspondingly forms a concave shape, and the second mold may be located at an upper side or a side of the first mold. .

According to the above main structural features, the outer shape of the primary package may be a depressed portion, and the yield space is correspondingly formed into an arcuate shape, and the second mold may be located at an upper portion or a side of the first mold.

In particular, the encapsulation method of the present invention can produce the following effects:

1. Adjusting the optical effect of the semiconductor by using a single package, for example, can have a light collecting effect, and the optical sensing effect of the semiconductor can be improved.

2. When the secondary mold is pressed, the letting space can be combined with the primary package Some areas are exposed to each other to achieve a fast alignment effect to ensure the yield of the semiconductor.

3. By using the yield structure, a portion of the package body can be exposed, and other regions are covered by the secondary package, thereby ensuring the working performance of the internal semiconductor without being disturbed by the external environment, so as to achieve better light and electricity. Covering and light guiding.

The features of the present invention can be clearly understood by referring to the drawings and the detailed description of the embodiments.

The semiconductor package method of the present invention includes at least one substrate 10 as shown in the first figure, and at least one semiconductor 20 is fixed, as shown in the first to fourth embodiments of the present invention. The surface of the substrate 10, as shown in the embodiment, is provided with two semiconductors 20. The semiconductor of the present invention may be a photo-sensing wafer, and the type thereof may be a CCD (charge-coupled device) or a CMOS (Complementary Metal Oxide). Semiconductor), LED (light emitting diode) or Photodiode, Sensor IC (Light Sensor, Hall IC).

The package is performed once. As shown in the second figure, the package mold 30 is provided once for the stamping process, and the surface of the semiconductor 20 is covered once with the package 40, wherein, as shown in the third figure, each semiconductor 20 is covered once. The package body 40 has a spacing 41 between the primary packages 40.

The second package is provided with a second package mold 50 for performing a press molding process. As shown in the fourth figure, the second package mold 50 is provided with a first mold 51 and a second mold 52, and the first mold 51 is covered with Forming a cavity 53 behind the substrate, the first The second mold 52 is disposed in the first mold 51, and the end of the second mold 52 is provided with a seating space 521, and the shape of the yield space 521 corresponds to the outer shape of the primary package, and the yield space 521 It extends into the cavity 53 and is relatively close to the surface of a portion of the primary package 40.

In the embodiment shown in the figure, the shape of the exposed portion of the primary package 40 is an arc convex portion 42 , and the yield space 521 is correspondingly formed into a concave shape, and the second mold 52 can be located opposite to the same. The first mold 51 is close to the upper portion, so that the yield space 521 can be aligned with the arc convex portion 42 of the primary package; after molding, as shown in the fifth figure, the secondary package 60 is formed with a relative extension. The spacer portion 61 of each of the first package bodies 41 is formed, and the secondary package body 60 is formed with a yielding structure 62 at the position of the yield space 521, so that the arc convex portion 42 of the primary package body portion can be exposed. The package of the semiconductor 20 is completed.

Of course, the outer shape of the primary package may also be a depressed portion, and the yield space is correspondingly formed into an arcuate shape; and the second mold 52 may also be located opposite to the side of the first mold 51, as shown in FIG. The embossed portion 42 is disposed on the side of the semiconductor so that the secondary package 60 can be formed with a yielding structure 62 relative to the yield space 521. Please refer to the seventh figure. The arc convex portion 42 of the partial portion of the primary package is exposed.

Furthermore, in the above embodiment, the second mold may be assembled and fixed with the first mold; or the second mold 52 may be integrally formed with the first mold 51, as shown in the eighth figure; The yield space 521 is located in the first mold 51, as shown in the ninth figure, and does not protrude into the cavity 53, and is relatively close to the surface of the arc convex portion 42 of the partial portion of the primary package; The encapsulating material of the primary package may be a light transmissive material, and the encapsulation material of the secondary package may be a material for filtering, filtering or filtering electromagnetic waves, such as an optical composite material. It has the function of filtering and filtering, or it can be an iron oxide composite material to have electrical shielding effect.

It is worth mentioning that the optical effect of the present invention by using a primary package to adjust the semiconductor, for example, can have a concentrating effect, which can improve the optical sensing effect of the semiconductor; and when the stamper is used for the second mold, the yield space is It can be aligned with the exposed portion of the primary package to achieve a fast alignment effect to ensure the yield of the semiconductor, and the partial structure of the first package can be exposed by the yield structure, while other regions are The sub-package coverage ensures the performance of the internal semiconductor without being disturbed by the external environment for better light, electrical shielding and light guiding.

In summary, the present invention provides a preferred and feasible packaging method for a semiconductor, and an application for an invention patent according to the law; the technical content and technical features of the present invention are disclosed above, but those skilled in the art may still be based on the present invention. The disclosure is made without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should be construed as being limited by the scope of the appended claims

10‧‧‧Substrate

20‧‧‧Semiconductor

30‧‧‧One time package mould

40‧‧‧One package

41‧‧‧ spacing

42‧‧‧Arc convex

50‧‧‧Secondary package mould

51‧‧‧First mould

52‧‧‧Second mold

521‧‧‧Let the space

53‧‧‧ cavity

60‧‧‧ secondary package

61‧‧‧ Compartment

62‧‧‧Recession structure

The first to fourth figures are schematic structural views of the packaging method in the present invention.

The fifth figure is a schematic structural view of the semiconductor completed package in the present invention.

The sixth figure is another schematic diagram of the packaging method of the present invention.

The seventh figure is another schematic diagram of the semiconductor completed package in the present invention.

The eighth figure is another structural schematic diagram of the secondary packaging mold in the present invention.

The ninth drawing is a schematic view of another structure of the secondary packaging mold in the present invention.

10‧‧‧Substrate

20‧‧‧Semiconductor

40‧‧‧One package

41‧‧‧ spacing

42‧‧‧Arc convex

50‧‧‧Secondary package mould

51‧‧‧First mould

52‧‧‧Second mold

521‧‧‧Let the space

53‧‧‧ cavity

Claims (9)

A semiconductor packaging method includes at least: providing a substrate; fixing at least one semiconductor on the surface of the substrate; performing a package once, covering the semiconductor surface with the package once; performing secondary packaging to provide a secondary package mold, the second The secondary package mold is formed with a yield space, and the shape of the yield space corresponds to the outer shape of the primary package, so that when the surface of the primary package is covered with the secondary package, the secondary package is opposite to the A bit-receiving structure is formed at the bit space to expose a portion of the primary package portion. The method of packaging a semiconductor according to claim 1, wherein the second package mold is provided with a first mold and a second mold, and the first mold is covered with the substrate to form a cavity, the second mold The locating space is located in the first mold, and the yield space is located at the end of the second mold and relatively close to the surface of the partial portion of the primary package. The method of packaging a semiconductor according to claim 1, wherein the second mold is integrally formed with the first mold. The method of packaging a semiconductor according to claim 1, wherein the second mold is assembled and fixed to the first mold. The method of encapsulating a semiconductor according to the first aspect of the invention, wherein the first package outer shape may be an arc convex portion, and the yield space is correspondingly formed into a concave shape, and the second mold may be located opposite to the first A mold is near the top or side. The method of encapsulating a semiconductor according to claim 1, wherein the outer shape of the primary package may be a depressed portion, and the yield space is Correspondingly, an arcuate shape is formed, and the second mold can be located relatively close to or at the side of the first mold. The method of packaging a semiconductor according to claim 1, wherein each of the semiconductors covers the package once, and each of the packages has a pitch, and the secondary package is formed with a corresponding extension. The compartment of the gap. The method of packaging a semiconductor according to claim 1, wherein the packaging material of the primary package may be a light transmissive material. The method of encapsulating a semiconductor according to the first aspect of the invention, wherein the encapsulation material of the secondary package may be a material for filtering, filtering or filtering electromagnetic waves.