TWI513005B - Thin film transistor and fabricating method thereof - Google Patents

Description

Thin film transistor and method of manufacturing same

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a thin film transistor and a method of fabricating the same, and more particularly to an oxidation phenomenon in which a solution metal oxide is generated on a surface of a source and a drain metal electrode after sintering. A thin film transistor that reduces electrical resistance and a method of manufacturing the same.

With the development of flat display technology, thin film transistor liquid crystal display (TFT-LCD) with high image quality, good space utilization efficiency, low power consumption, and no radiation has gradually become a market. Mainstream. A conventional thin film transistor is formed by forming a gate on a substrate, and then sequentially depositing an insulating layer and a semiconductor layer as a channel on the substrate to cover the gate. Then, a source and a drain are formed on both sides of the semiconductor layer, respectively, to thereby produce a thin film transistor.

Regarding the process of the channel layer, in addition to the above-described formation of the semiconductor layer by chemical vapor deposition, it is also possible to pass through a solution metal. Oxide layer A method of forming a metal oxide semiconductor layer by high temperature sintering. According to the structure, the thin film transistor can be divided into two types, a coplanar oxide TFT and a BCE oxide TFT.

However, in the case of a coplanar oxide thin film transistor, in the case of using a conventional metal material as a source and a drain, since the solution metal oxide is sintered at a high temperature, an auto-oxidation-reduction reaction occurs in the semiconductor. The layer forms a metal oxide with the source and the surface of the drain metal layer, which causes a problem of excessive contact resistance.

In order to improve the above surface oxidation problem, a metal oxide such as indium tin oxide (ITO) has been studied as a source and a drain. However, due to excessive resistance of ITO, a severe resistance-capacitance delay may occur. (RC delay), which in turn causes the display panel to have a problem of poor picture uniformity, such as a phenomenon in which a partial area under the screen is slightly grayish white. Therefore, how to develop a thin film transistor that avoids the surface oxidation phenomenon of the metal oxide solution layer after sintering and simultaneously reduces the electric resistance is one of the goals that the developer desires to achieve.

The invention provides a thin film transistor and a manufacturing method thereof, which can avoid the formation of a thin film transistor by a solution metal oxide method to generate an oxidation phenomenon on a surface of a source and a drain metal electrode and reduce the electric resistance.

The present invention provides a thin film transistor comprising a gate, a gate insulating layer, a source and a drain, a metal oxide semiconductor layer, and a first metal oxide conductive layer. And a second metal oxide conductive layer. The gate insulating layer covers the gate. The source and drain are on the gate insulating layer. The metal oxide semiconductor layer covers the source, the drain, and the gate insulating layer above the gate to serve as a channel layer. The first metal oxide conductive layer is located between the source and the metal oxide semiconductor layer to isolate the source from the metal oxide semiconductor layer. The second metal oxide conductive layer is between the drain and the metal oxide semiconductor layer to isolate the drain from the metal oxide semiconductor layer.

The present invention further provides a method of manufacturing a thin film transistor, the method comprising the following steps. Forming a gate; forming a gate insulating layer over the gate; forming a source and a drain on the gate insulating layer; forming a first metal oxide conductive layer on the source and forming a second metal oxide conductive layer on the drain Forming a metal oxide semiconductor layer on the first metal oxide conductive layer, the second metal oxide conductive layer, and the gate insulating layer above the gate to serve as a channel layer, wherein the first metal oxide conductive layer is isolated from the source And a metal oxide semiconductor layer, and the second metal oxide conductive layer separates the drain and the metal oxide semiconductor layer.

Based on the above, the source and the drain of the thin film transistor of the present invention have both a metal layer and a metal oxide conductive layer covering the metal layer, so that the metal oxide semiconductor layer can be prevented from being between the high temperature sintering process and the metal layer. The surface oxide is formed and the contact resistance between the metal oxide semiconductor layer and the source and the drain can be lowered.

The above described features and advantages of the invention will be apparent from the following description.

100‧‧‧Substrate

104‧‧‧ gate insulation

106, 106'‧‧‧First metal oxide conductive layer

108, 108'‧‧‧Second metal oxide conductive layer

110‧‧‧Metal oxide semiconductor layer

112‧‧‧flat layer

D‧‧‧汲

d, d’‧‧‧ distance

G‧‧‧ gate

S‧‧‧ source

1A to 1F are cross-sectional views showing a process of a thin film transistor according to a first embodiment of the present invention.

2 is a cross-sectional view showing a thin film transistor according to an embodiment of the present invention.

Figure 3 is a cross-sectional view showing a thin film transistor of another embodiment of the present invention.

4A to 4C are partial process sectional views of a thin film transistor according to a second embodiment of the present invention.

Figure 5 is a cross-sectional view showing a thin film transistor of an embodiment of the present invention.

Figure 6 is a cross-sectional view showing a thin film transistor of another embodiment of the present invention.

Hereinafter, a method of manufacturing the thin film transistor of the first embodiment of the present invention will be described in detail with reference to the drawings. 1A to 1F are cross-sectional views showing a process of a thin film transistor according to a first embodiment of the present invention. For the sake of clarity, FIGS. 1A through 1F only show some of the components of the thin film transistor.

First, referring to FIG. 1A, a gate G is formed on a substrate 100. The material of the substrate 100 may be glass, quartz, organic polymer or an opaque/reflective material (such as a conductive material, metal, wafer, ceramic, or other suitable material). For example, the gate electrode G is formed by first forming a first conductor layer (not shown) and then patterning the first conductor layer. The first conductor layer is generally a metal material such as a metal material such as molybdenum, titanium, aluminum, chromium, copper, tin, tantalum, tungsten, gold or silver, but the invention is not limited thereto. Other conductive materials such as alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, or stacked layers of metal materials and other conductive materials may also be used for the first conductor layer. The method of forming the first conductor layer is, for example, a physical vapor deposition method such as a sputtering method, but the present invention is not limited thereto.

Then, referring to FIG. 1B, a gate insulating layer 104 is formed over the gate G, and the gate insulating layer 104 covers the gate G. The material of the gate insulating layer 104 is, for example, a dielectric material such as hafnium oxide, tantalum nitride or hafnium oxynitride or a stacked layer of at least two of the above materials. The method of forming the gate insulating layer 104 is, for example, a chemical vapor deposition method, but the present invention is not limited thereto.

Next, referring to FIG. 1C, a source S and a drain D are formed on the gate insulating layer 104, wherein the source S and the drain D do not contact each other. The source S and the drain D are formed by, for example, forming a second conductor layer (not shown) covering the gate insulating layer 104 and then patterning the second conductor layer. The second conductor layer is generally formed of a single layer or a multilayer structure using a metal material such as molybdenum, titanium, aluminum, chromium, copper, tin, antimony, tungsten, gold or silver, but the invention is not limited thereto. Other conductive materials such as alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, or stacked layers of metal materials and other conductive materials may also be used for the second conductor layer. The method of forming the second conductor layer is, for example, a physical vapor deposition method such as a sputtering method, but the present invention is not limited thereto. The method of patterning the second conductor layer is performed, for example, by conventional lithography and etching procedures.

Referring to FIG. 1D, a first metal oxide conductive layer 106 is formed on the source S and a second metal oxide conductive layer 108 is formed on the drain D. specifically It is said that the first metal oxide conductive layer 106 covers one side surface of the source S and a part of the upper surface, and the second metal oxide conductive layer 108 covers one side surface of the drain D and a part of the upper surface.

The material of the first metal oxide conductive layer 106 and the second metal oxide conductive layer 108 is, for example, indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or the like. At least two stacked layers. The thickness of the first metal oxide conductive layer 106 and the second metal oxide conductive layer 108 is, for example, 500 Å to 1300 Å.

Referring to FIG. 1E, a metal oxide semiconductor layer 110 is formed on the first metal oxide conductive layer 106, the second metal oxide conductive layer 108, and the gate insulating layer 104 over the gate G to serve as a channel layer. (channel). It should be noted that, in this embodiment, the first metal oxide conductive layer 106 only needs to cover the source S to isolate the source S from the metal oxide semiconductor layer 110; likewise, the second metal The oxide conductive layer 108 only needs to cover the drain D to isolate the drain D from the metal oxide semiconductor layer 110, but the invention is not limited thereto.

The metal oxide semiconductor layer 110 includes indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or the like or a stacked layer of at least two of the above. Here, the oxygen content of the metal oxide in the first metal oxide conductive layer 106 and the second metal oxide conductive layer 108 is relatively low as a conductive layer. In addition, the metal oxide in the metal oxide semiconductor layer 110 has a relatively high oxygen content as a semiconductor layer.

In the present embodiment, the method of forming the metal oxide semiconductor layer 110 is packaged The method includes the following steps: first, coating a solution metal oxide on the first metal oxide conductive layer 106, the second metal oxide conductive layer 108, and the gate insulating layer 104 over the gate G; and then performing a sintering process To form a metal oxide semiconductor layer 110 in a solution state metal oxide. The metal oxide solution layer can be applied by a conventional method such as spin coating, roll coating, curtain coating, flow coating, printing coating, fine concave coating, concave coating, ring rod Coating and the like. Sintering can be carried out by a conventional method, for example, 300 ° C to 400 ° C, and the sintering time is, for example, 1 hour. However, the invention is not limited thereto. The sintering cycle can be repeated as many times as needed.

The solution metal oxide includes a solvent and an organometallic precursor dissolved in a solvent. The solvent to be used is not limited as long as it can dissolve the organometallic precursor, for example, 2-methoxyl ethanol. The organometallic precursor is, for example, a metal halide, but the invention is not limited thereto.

Finally, referring to FIG. 1F, a planarization layer 112 is formed on the substrate 100 to cover the metal oxide semiconductor layer 110, the first metal oxide conductive layer 106, the second metal oxide conductive layer 108, the gate G, and the gate metal layer 110. The source S and the drain D are completed to complete the thin film transistor of one embodiment of the present invention. The flat layer 112 is an unpatterned film layer, but the invention is not limited thereto. Wherein, the material of the flat layer 112 comprises an inorganic material, such as yttrium oxide, tantalum nitride, ytterbium oxynitride or the like or a stacked layer of at least two materials; the organic material is, for example, a polyester (PET), a polyolefin, Polypropylene, polycarbonate, polyalkylene oxide, polyphenylene, polyether, polyketone, polyalcohol, polyaldehyde or the like or a combination thereof; or a combination thereof.

The thin film transistor of the embodiment of the invention is used as a thin film transistor liquid crystal display In the case of a driving element of a TFT-LCD, a pixel electrode (not shown) may be further formed on the flat layer 112 after the planarization layer 112 is formed as described above. The thin film transistor provided by the embodiment of the present invention can also be applied to an active matrix organic light emitting display (AMOLED), but the invention is not limited thereto.

2 is a cross-sectional view showing a thin film transistor according to an embodiment of the present invention. Figure 3 is a cross-sectional view showing a thin film transistor of another embodiment of the present invention. The manufacturing method of the thin film transistor in these embodiments is similar to the steps of the above embodiment of FIG. 1, please refer to FIG. 1F, FIG. 2 and FIG. 3, the only difference being that the first metal oxide of the embodiment of FIG. The conductive layer 106 and the second metal oxide conductive layer 108 extend toward the uncovered side surfaces of the source S and the drain D, respectively. In the embodiment of FIG. 3, the first metal oxide conductive layer 106 completely covers the source S, and the second metal oxide conductive layer 108 completely covers the drain D.

Hereinafter, a method of manufacturing a thin film transistor of a second embodiment of the present invention will be described in detail with reference to the drawings. 4A to 4C are partial process sectional views of a thin film transistor according to a second embodiment of the present invention. For the sake of clarity, FIGS. 4A through 4C only show some of the components of the thin film transistor.

In the present embodiment, the manufacturing method of the thin film transistor is similar to that of the above-described embodiment, and therefore the same or similar elements are denoted by the same or similar symbols, and the same steps will not be repeated. Referring to FIG. 4A, the only difference is that after the source S and the drain D are formed on the gate insulating layer 104, the first metal oxide conductive layer 106' and the second metal oxide conductive layer 108' respectively cover the source. Extreme S and bungee The upper surface of D and the side surface extend beyond the gap between the source S and the drain D. The first metal oxide conductive layer 106' is located at a first distance from the edge of the source S and the drain D to the source S, and the second metal oxide conductive layer 108' is located at the source S and the drain D. a second distance d' between the edge to the drain D, and the first distance d and the second distance d' may be between 1 micrometer and 5 micrometers, preferably between 1 micrometer and 2 micrometers; in other implementations In the example, the first distance d and the second distance d' may be the same or different.

Next, as shown in FIG. 4B, a metal oxide semiconductor layer 110 is formed on the first metal oxide conductive layer 106', the second metal oxide conductive layer 108', and the gate insulating layer 104 over the gate G, as Channel layer. As shown in FIG. 4C, a planarization layer 112 is formed on the substrate 100 to cover the metal oxide semiconductor layer 110, the first metal oxide conductive layer 106', the second metal oxide conductive layer 108', and the gate G formed as described above. The source S and the drain D, thereby completing the thin film transistor of the second embodiment of the present invention. The steps in FIGS. 4B and 4C described above are the same as or similar to the steps in FIGS. 1E and 1F, respectively.

Similarly, FIG. 5 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention. Figure 6 is a cross-sectional view showing a thin film transistor of another embodiment of the present invention. The manufacturing method of the thin film transistor in these embodiments is similar to the steps of the above embodiment of FIG. 4, please refer to FIG. 4C, FIG. 5 and FIG. 6, the only difference being that the first metal oxide of the embodiment of FIG. The conductive layer 106' and the second metal oxide conductive layer 108' extend toward the uncovered side surfaces of the source S and the drain D, respectively. In the embodiment of FIG. 6, the first metal oxide conductive layer 106' completely covers the source S, and the second metal oxide is guided. The electrical layer 108' completely covers the drain D.

In order to prove that the present invention has a metal layer and a metal oxide conductive layer (for example, ITO) covering the metal layer as a source S and a drain D wire, the thin film transistor can effectively reduce the source and the drain wire. The resistance and the resistance of the wire were not affected after sintering at a high temperature, and the following Experimental Example 1 to Experimental Example 4 were used for verification. The experimental conditions and results are shown in Table 1.

[Experimental Example 1]

A thin film transistor was fabricated according to the procedure in the above examples, and ITO was used as the metal oxide conductive layer of the source S and the drain D. The thickness of the ITO was 500 angstroms, and the thickness of the metal layer of the source S and the drain D was 2000 angstroms. Before applying the solution metal semiconductor material, the resistance of the S/D wire was measured, which is the S/D wire resistance before sintering in Table 1. Next, after the solution-state metal semiconductor material was applied and sintered at 370 ° C for one time, the electric resistance of the S/D wire was measured again, which is the sintered S/D wire resistance in Table 1.

[Experimental Example 2]

Similar to Experimental Example 1, the thickness of the metal layer of the source S and the drain D was 2000 angstroms, with the difference that the thickness of the ITO was 750 angstroms. Similarly, the resistance of the S/D wire was measured before coating the solution metal semiconductor material. Next, after the solution-state metal semiconductor material was applied and sintered at 370 ° C for 2 times, the electric resistance of the S/D wire was measured again, and the results are shown in Table 1.

[Experimental Example 3]

Similar to Experimental Example 1, the thickness of the metal layer of the source S and the drain D was 2000 angstroms, the difference being that the thickness of the ITO was 1,300 angstroms. Similarly, the resistance of the S/D wire was measured before coating the solution metal semiconductor material. Next, after the solution-state metal semiconductor material was applied and sintered at 370 ° C for one time, the electric resistance of the S/D wire was measured again, and the results are shown in Table 1.

[Comparative Example 1]

A thin film transistor was produced according to the above procedure, except that in Comparative Example 1, the source S and the drain D were not formed by a metal layer, and the source S was directly formed by ITO having a thickness of 1300 Å and Bungee D. Similarly, the resistance of the S/D wire was measured after coating the solution metal semiconductor material and before sintering. Next, after sintering at 370 ° C for 2 times, the electric resistance of the S/D wire was measured again, and the results are shown in Table 1.

According to the results of Table 1, it can be seen that in the case where the source S and the drain D wire have a metal layer and a metal oxide conductive layer (for example, ITO) overlying the metal layer, the source and the drain wire can be significantly reduced. The resistance, and after sintering at high temperature, still does not affect the resistance of the wire.

In summary, in the thin film transistor of the present invention, the source and the drain have both a metal layer and a metal oxide conductive layer covering the metal layer, so that the solution metal oxide semiconductor layer can be prevented from being sintered at a high temperature. Surface oxide formation with the metal layer, and can reduce the contact resistance between the metal oxide semiconductor layer and the source and the drain, thereby improving the resistance-capacitance delay and improving the picture uniformity of the display panel driven by the thin film transistor. .

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧Substrate

104‧‧‧ gate insulation

106‧‧‧First metal oxide conductive layer

108‧‧‧Second metal oxide conductive layer

110‧‧‧Metal oxide semiconductor layer

112‧‧‧flat layer

D‧‧‧汲

G‧‧‧ gate

S‧‧‧ source

Claims (16)

A thin film transistor comprising: a gate; a gate insulating layer covering the gate; a source and a drain on the gate insulating layer; a metal oxide semiconductor layer covering the source, The drain electrode and the gate insulating layer above the gate serve as a channel layer; a first metal oxide conductive layer is located between the source and the metal oxide semiconductor layer to enable the source and The metal oxide semiconductor layer is isolated, and the first metal oxide conductive layer covers an upper surface and a side surface of the source; and a second metal oxide conductive layer is located at the drain and the metal is oxidized Between the semiconductor layers, the drain is separated from the metal oxide semiconductor layer, and the second metal oxide conductive layer covers an upper surface and a side surface of the drain. The thin film transistor of claim 1, wherein the first metal oxide conductive layer completely covers the source, and the second metal oxide conductive layer completely covers the drain. The thin film transistor according to claim 1, wherein the first metal oxide conductive layer and the second metal oxide conductive layer respectively extend toward a gap between the source and the drain. The thin film transistor according to claim 3, wherein the first metal oxide conductive layer is located at an edge between the source and the drain to have a source a first distance, the second metal oxide conductive layer is located at an edge between the source and the drain to the drain having a second distance, and the first distance and the second distance are between 1 micrometer and 5 Between microns. The thin film transistor of claim 4, wherein the first distance is the same as the second distance. The thin film transistor of claim 4, wherein the first distance is different from the second distance. The thin film transistor according to claim 1, wherein the source and the material of the drain include a metal material. A method for manufacturing a thin film transistor includes: forming a gate; forming a gate insulating layer over the gate; forming a source and a drain on the gate insulating layer; forming a first layer on the source a metal oxide conductive layer, wherein the first metal oxide conductive layer covers an upper surface and a side surface of the source, and a second metal oxide conductive layer is formed on the drain, wherein the second metal oxide The conductive layer covers an upper surface and a side surface of the drain; forming a metal oxide on the first metal oxide conductive layer, the second metal oxide conductive layer, and the gate insulating layer above the gate a semiconductor layer as a channel layer, wherein the first metal oxide conductive layer isolates the source from the metal oxide semiconductor layer, and the second metal oxide conductive layer isolates the drain and the metal oxide Semiconductor layer. The method of manufacturing a thin film transistor according to claim 8, wherein the method of forming the metal oxide semiconductor layer comprises: the first metal oxide conductive layer, the second metal oxide conductive layer, and the gate A gate metal oxide is coated on the gate insulating layer on the upper side; a sintering process is performed to form the solution metal oxide to form the metal oxide semiconductor layer. The method for producing a thin film transistor according to claim 9, wherein the solution metal oxide solution layer comprises a solvent and an organometallic precursor dissolved in the solvent. The method of manufacturing a thin film transistor according to claim 8, wherein the first metal oxide conductive layer completely covers the source, and the second metal oxide conductive layer completely covers the drain. The method for fabricating a thin film transistor according to claim 8, wherein the first metal oxide conductive layer and the second metal oxide conductive layer respectively face a gap between the source and the drain extend. The method for fabricating a thin film transistor according to claim 12, wherein the first metal oxide conductive layer is located at an edge between the source and the drain to the source having a first distance, the first The second metal oxide conductive layer has a second distance from the edge between the source and the drain to the drain, and the first distance and the second distance are between 1 micrometer and 5 micrometers. The method for producing a thin film transistor according to claim 13, Wherein the first distance is the same as the second distance. The method of manufacturing a thin film transistor according to claim 13, wherein the first distance is different from the second distance. The method of manufacturing a thin film transistor according to claim 8, wherein the source and the material of the drain include a metal material.