TWI511328B - Light-emitting diode chip and manufacturing method thereof - Google Patents

Description

Light-emitting diode chip and manufacturing method thereof

The present invention relates to a light emitting diode wafer and a method of fabricating the same, and more particularly to a nitride light emitting diode wafer and a method of fabricating the same.

With the advancement of semiconductor technology, today's light-emitting diodes have high-intensity output, and the light-emitting diodes have the advantages of power saving, small size, low voltage driving, and no mercury, so the light-emitting diode has Widely used in the field of display and lighting.

The light emitting diode structure includes a light emitting diode chip and a peripheral trace layout, wherein the light emitting diode chip includes a growth substrate and a semiconductor element layer. In general, the light extraction efficiency of a light-emitting diode wafer is related to the epitaxial quality of the semiconductor element layer and the light extraction efficiency.

At present, in order to improve light extraction efficiency, the prior art has improved the epitaxial quality and light extraction efficiency of the semiconductor element layer. For example, conventional techniques have been used to improve the epitaxial quality of subsequent growth by growing a nucleation layer and a buffer layer, but the growth of the nucleation layer and the buffer layer takes time and cost. In addition, the nucleation layer and the buffer layer also increase the overall thickness of the light-emitting diode wafer. In addition, in order to improve light extraction efficiency, conventional techniques have been used to form a recessed structure on a growth substrate to increase the probability of light being scattered (as in the prior art shown in U.S. Patent No. 7,037,702). Obviously, how to improve the quality of epitaxial and improve the efficiency of light extraction is one of the topics that current R&D personnel are trying to solve.

The present invention provides a light emitting diode wafer having good epitaxial quality and light extraction efficiency.

The invention also provides a method for fabricating a light-emitting diode wafer, which can improve the epitaxial quality and light extraction efficiency of the light-emitting diode.

The present invention provides a light emitting diode wafer including a mixed substrate and a semiconductor element layer. The mixed substrate includes a growth substrate and a metal nitride film. The metal nitride film is disposed on the growth substrate. In the metal nitride film, the content of the metal is larger than the content of nitrogen, wherein the metal nitride film has a grown surface, and the mixed substrate has a plurality of doped regions extending from the growth surface to the inside of the mixed substrate. The semiconductor element layer includes a first type semiconductor layer, an active layer, and a second type semiconductor layer. The first type semiconductor layer is disposed on the grown surface of the metal nitride film. The active layer is disposed on the first type semiconductor layer. The second type semiconductor layer is disposed on the active layer.

The invention also provides a method for fabricating a light emitting diode wafer comprising providing a grown substrate. On the grown substrate, the metal nitride material is attached to the growth substrate by thermal evaporation or sputtering to form a metal nitride film. A plurality of doped regions are formed in the metal nitride film, and the doped regions extend from the grown surface of the metal nitride film to the inside of the mixed substrate. On the metal nitride film, a first type semiconductor layer, an active layer, and a second type semiconductor layer are sequentially formed.

In an embodiment of the invention, the material of the metal nitride film comprises aluminum nitride, gallium nitride, indium nitride, aluminum indium nitride, aluminum gallium nitride, indium gallium nitride or aluminum gallium nitride. .

In an embodiment of the invention, in the foregoing metal nitride film The metal to nitrogen content ratio is greater than one.

In an embodiment of the invention, the metal nitride film has a thickness of from 1 nanometer (nm) to 4000 nm.

In an embodiment of the invention, the thickness of the doped region is greater than the thickness of the metal nitride film.

In an embodiment of the invention, the thickness of the doped region is less than or equal to the thickness of the metal nitride film.

In one embodiment of the invention, the doped regions described above have a metallic or non-metallic dopant.

In an embodiment of the invention, the aforementioned non-metal dopants include argon, oxygen, helium, hydrogen, nitrogen, carbon, phosphorus, arsenic, magnesium, zinc, antimony, bismuth, gold, aluminum.

In an embodiment of the invention, the manner in which the doped regions are formed may be achieved by ion implantation or thermal diffusion.

In an embodiment of the invention, the metal nitride film has a refractive index n ₁ , the growth substrate has a refractive index of n ₂ , and the doped region of the metal nitride film has a refractive index of n ₃ , and the growth substrate The doped region has a refractive index of n ₄ and n ₁ ≠n ₂ ≠n ₃ ≠n ₄ .

In an embodiment of the invention, the metal nitride film has a refractive index n ₁ , the growth substrate has a refractive index n ₂ , and the doped region in the metal nitride film has a refractive index n ₃ , and n ₁ ≠n ₂ ≠n ₃ .

In an embodiment of the invention, a plurality of voids exist between the semiconductor element layer and the mixed substrate, and each of the holes is located above one of the doped regions.

In an embodiment of the invention, a plurality of holes exist between the semiconductor element layer and the mixed substrate, and the holes are respectively located above one of the undoped regions.

In an embodiment of the invention, one of the first semiconductor layer and the second semiconductor layer is a P-type semiconductor layer, and the other of the first semiconductor layer and the second semiconductor layer is an N-type semiconductor layer. .

In one embodiment of the invention, the aforementioned active layer has a single or multiple quantum well structure.

In an embodiment of the invention, the light emitting diode chip further includes a first electrode electrically connected to the first type semiconductor layer and a second electrode electrically connected to the second type semiconductor layer.

In an embodiment of the invention, the light emitting diode chip further includes an ohmic contact layer disposed between the second electrode and the second type semiconductor layer.

In an embodiment of the invention, the aforementioned thermal evaporation method includes electron beam evaporation (E-Gun Evaporation).

In an embodiment of the invention, the method for fabricating the LED array further includes forming a first electrode on the first type semiconductor layer and forming a second electrode on the second type semiconductor layer.

In an embodiment of the invention, the method for fabricating a light emitting diode wafer further includes forming an ohmic contact layer before forming the second electrode on the second type semiconductor layer, wherein the ohmic contact layer is disposed on the second electrode and Between the two types of semiconductor layers.

In an embodiment of the invention, the method for fabricating the LED body further includes: forming a first electrode on the first type semiconductor layer, the pattern The ohmic contact layer, the second type semiconductor layer, the active layer and the first type semiconductor layer are exposed to expose a portion of the first type semiconductor layer.

Based on the above, the light-emitting diode wafer of the present invention can improve the subsequent epitaxial quality by forming a metal nitride film on the grown substrate, thereby improving the light-emitting efficiency of the light-emitting diode wafer. Further, the present invention forms a doped region in the mixed substrate so that the inside of the light-emitting diode wafer has a more diverse refractive index. Furthermore, the present invention selectively forms a hole between the semiconductor element layer and the mixed substrate, thereby increasing the probability of light being scattered, so that the light extraction efficiency of the light emitting diode chip can be improved.

The above described features and advantages of the present invention will be more apparent from the following description.

[First Embodiment]

1A to 1E are schematic cross-sectional views showing a process of fabricating a light-emitting diode wafer according to a first embodiment of the present invention, and FIGS. 1C' and 1C" are respectively different distributions of doped regions in a mixed substrate.

Referring to FIG. 1A, first, a growth substrate 112 is provided. The growth substrate 112 may be a sapphire substrate (alumina, Al ₂ O ₃ ), a bismuth carbide (SiC) substrate, a bismuth (Si) substrate, or a gallium arsenide (GaAa) substrate. A gallium phosphide (GaP) substrate, a gallium nitride (GaN) substrate, a lithium aluminate (LiAlO ₂ ) substrate, a lithium gallium hydride (LiGaO ₂ ) substrate, or other substrate suitable for epitaxy. Next, a metal nitride film 114 is formed on the growth substrate 112.

In the present embodiment, a method of forming the metal nitride film 114 is, for example, The metal nitride material is heated by a thermal evaporation method. Specifically, the thermal evaporation method includes methods such as thermal resistance, radiation, electron beam, and arc. In this embodiment, the metal nitride material (for example, chromium nitride, aluminum nitride, gallium nitride, tantalum nitride, indium nitride, aluminum indium nitride, aluminum gallium nitride, indium gallium nitride or nitride) Aluminum gallium indium) is directly sublimed from a solid state to a gaseous state by, for example, electron beam evaporation. The gaseous metal nitride material is directly attached to the growth substrate 112 to form the metal nitride film 114. The thickness of the metal nitride film 114 is, for example, between 1 nm and 4000 nm. In the present embodiment, the thickness of the metal nitride film 114 is, for example, between 5 nm and 1000 nm. Further, the ratio of the metal content to the nitrogen content in the metal nitride film 114 is greater than 1.

Since the metal nitride film 114 helps to improve the quality of the subsequent epitaxy, it is not necessary to additionally provide a buffer layer in the prior art on the hybrid substrate 110, thereby reducing the thickness of the LED chip and reducing the process cost and time.

In order to further improve the light extraction efficiency, in the subsequent process, the present embodiment forms a doped region in the mixed substrate 110 so that the inside of the light emitting diode wafer has a more diverse refractive index. A detailed method of fabricating a doping region will be described later with reference to FIG. 1B and FIGS. 1C to 1C".

Referring to FIG. 1B, the doped regions are formed, for example, by ion implantation or thermal diffusion. In the present embodiment, the doped regions are formed by thermal diffusion as an example. First, the patterned film 120 is formed on the growth surface S of the mixed substrate 110. The patterned film 120 may be composed of a plurality of strip patterns or a plurality of dot patterns, and the foregoing pattern may be periodic. Or non-periodically arranged. In this embodiment, the material of the patterned film 120 is, for example, a metal, a non-metal dopant or any suitable material, wherein the non-metal dopant includes argon, oxygen, helium, hydrogen, nitrogen, carbon, phosphorus, arsenic, magnesium, Zinc, bismuth, antimony, gold, aluminum.

Next, referring to FIG. 1C, a dopant in the patterned film 120 is diffused from the growth surface S of the metal nitride film 114 to the inside of the mixed substrate 110 via a thermal tempering process. Thereafter, the patterned thin film 120 which is not diffused into the inside of the mixed substrate 110 on the mixed substrate 110' is removed to form a mixed substrate 110' having the doped region 120'. It should be noted that the above thermal tempering process not only makes the dopant distribution in the doped region 120' more uniform, but also further repairs the lattice defects in the mixed substrate 110'.

The metal nitride film 114 and the growth substrate 112 in the mixed substrate 110 are "modified" because the dopant in the patterned film 120 is diffused into the inside of the mixed substrate 110. Specifically, since the dopant diffuses into the inside of the mixed substrate 110, the refractive index or lattice constant of the surface of the original metal nitride film 114 and the growth substrate 112 is changed. In detail, the amount of refractive index in the hybrid substrate 110' can be changed by changing the depth of the dopant diffusion (i.e., the thickness D _{D(a) of the} doped region 120' ₎ .

Referring to FIG. 1C, in the embodiment, the doping region 120' occupies an area of about 30% to 80% of the area of the metal nitride film 114', and the thickness D _{D of the} doped region 120' _{(a) ),} for example, a metal nitride thin film 114 is greater than the 'thickness D _{M (a).} At this time, there are at least four kinds of refractive indices in the mixed substrate 110'. Specifically, the refractive index of the metal nitride film 114' is n ₁ , the refractive index of the grown substrate 112' is n ₂ , and the refractive index of the doped region 120' in the metal nitride film 114' is n ₃ , and is grown. The doped region 120' in the substrate 112' has a refractive index n ₄ and n ₁ ≠n ₂ ≠n ₃ ≠n ₄ . Further, by forming the doped region 120' in the mixed substrate 110', the inside of the light-emitting diode wafer has a more diverse refractive index (increased from the original n ₁ , n ₂ to n ₁ , n ₂ , n ₃ , n ₄ ), thereby increasing the probability of light being scattered, and improving the light extraction efficiency of the LED chip.

On the other hand, 120 'thickness _D D _(a) except that a metal nitride thin film 114 is greater than the' thickness of the doped region D _{M (a),} but also less than or equal metal nitride thin film 114 'thickness D _{M (a )} . Please refer to FIG. 1C′ and FIG. 1C”. At this time, there are at least three kinds of refractive indexes in the mixed substrate 110′ (the refractive index of the metal nitride film is n ₁ , the refractive index of the grown substrate is n ₂ , and the metal nitride The doped region in the film has a refractive index of n ₃ and n ₁ ≠n ₂ ≠n ₃ ).

In this embodiment, since the lattice constant of the metal nitride film 114' of the mixed substrate 110' is different from the undoped region in the doped region 120', a selective growth phenomenon occurs in the epitaxial process, thereby enabling subsequent A plurality of holes 130 may be formed between the formed epitaxial film layer and the mixed substrate 110', and each of the holes 130 is located above one of the doped regions 120'. It is to be noted that the hole 130 and the doped region 120' have the function of increasing the scattering of the light, thereby reducing the chance that the light extraction efficiency is suppressed by total reflection of the light inside the light-emitting diode wafer. In other words, a higher proportion of light can penetrate the light-emitting diode wafer, and the light extraction efficiency can be improved.

Next, referring to FIG. 1D, a semiconductor device layer 140 (including a first type semiconductor layer) is sequentially formed on the growth surface S of the metal nitride film 114'. 142, active layer 144 and second type semiconductor layer 146) and ohmic contact layer 150. In the present embodiment, each of the above-mentioned film layers is formed by, for example, Metal Organic Chemical Vapor Deposition (MOCVD), but the embodiment is not limited thereto.

Further, one of the first type semiconductor layer 142 and the second type semiconductor layer 146 is a P type semiconductor layer, and the other of the first type semiconductor layer 142 and the second type semiconductor layer 146 is an N type semiconductor layer. In the present embodiment, the first type semiconductor layer 142 is, for example, an N-type gallium nitride layer doped with ytterbium, lanthanum, cerium or a combination thereof. The second type semiconductor layer 146 is, for example, a magnesium-doped P-type gallium nitride layer.

In this embodiment, the active layer 144 may include a first barrier layer (not shown), a light emitting layer (not shown), and a second barrier layer (not shown). The first barrier layer is, for example, an N-type aluminum gallium nitride layer doped with yttrium, lanthanum, cerium or a combination thereof. The luminescent layer is, for example, a single or multiple quantum well structure composed of aluminum indium gallium nitride. Further, the second barrier layer is, for example, a P-type aluminum gallium nitride layer doped with magnesium.

In the present embodiment, the ohmic contact layer 150 is used for conduction, so that the ohmic contact layer 150 is "modified" by doping a higher concentration of P-type dopant than the second-type semiconductor layer 140. The purpose is to make the conductivity better than that of the second type semiconductor layer 140.

Referring to FIG. 1E, after the first semiconductor layer 142, the active layer 144, the second semiconductor layer 146, and the ohmic contact layer 150 are formed, the ohmic contact layer 150, the second semiconductor layer 146, and the active layer are sequentially patterned. Layer 144 and a portion of first type semiconductor layer 142 to simultaneously form a patterned Europe The contact layer 150', the second type semiconductor layer 146', the active layer 144', and a portion of the first type semiconductor layer 142' are exposed. In the present embodiment, the above-described patterning method is, for example, lithography etching. However, the manner in which this embodiment does not limit the patterning must be lithography, and other ways in which the first type semiconductor layer 142' can be patterned can be employed.

Next, the first electrode 160 is formed on the first type semiconductor layer 142' not covered by the active layer 144', while the second electrode 170 is formed on the second type semiconductor layer 146', so that the second electrode 170 is transmitted through the ohmic contact. The layer 150 ′ is electrically connected to the second type semiconductor layer 146 ′ and the first electrode 160 is electrically connected to the first type semiconductor layer 142 ′.

[Second embodiment]

In this embodiment, by the adjustment of the parameters of the epitaxial growth, the holes existing between the semiconductor element layer 140 and the mixed substrate 110' may be located above the undoped regions, respectively. 2A and 2B are schematic cross-sectional views showing a manufacturing process of a light-emitting diode wafer according to a second embodiment of the present invention.

Referring to FIG. 2A and FIG. 2B, the LED array 100' of the present embodiment has a similar manufacturing process as the LED array 100 of the foregoing embodiment. The difference between the two is mainly due to the adjustment of the parameters of the epitaxial growth of the LED array 100' of the present embodiment such that the holes 130' are respectively located above the undoped regions. Here, the hole 130' and the doped region 120' have an effect of increasing the scattering of light, thereby reducing the chance that the light extraction efficiency is suppressed by total reflection of light inside the light-emitting diode wafer. In other words, a higher proportion of light can penetrate the LED array 100', and the light extraction efficiency Therefore it can be upgraded.

It is worth mentioning that, by forming the doping region 120' to increase the light scattering ratio, in addition to the aforementioned forming the doping region 120' by thermal diffusion, an ion implantation process may also be used. Here, the area occupied by the doped region 120' is between about 30% and 80% of the area of the metal nitride film 114'.

2C is a schematic view showing the light emitting diode wafer 100' of the present embodiment applied to a flip chip package structure. Referring to FIG. 2C, the flip chip package structure of the embodiment includes a light emitting diode chip 100', a plurality of conductive bumps BP, and a carrier substrate SUB, wherein the light emitting diode chip 100' is transmitted through the conductive bumps BP. It is electrically connected to the carrier substrate SUB. In this embodiment, the conductive bumps BP are, for example, solder bumps or gold bumps or bumps made of other conductive materials.

[Third embodiment]

Figure 3 is a schematic illustration of the formation of a doped region in accordance with a third embodiment of the present invention. Referring to FIG. 3, first, a patterned mask 210 is formed on the growth surface S of the metal nitride film 114. In this embodiment, the material of the patterned mask 210 may be a photoresist (Photo-Resist, PR), a metal, or a dielectric material such as tantalum oxide or tantalum nitride. Next, the mixed substrate 110 is ion-implanted with the patterned mask 210 as a mask. After the ion implantation is completed, the patterned mask 210 is removed, and the hybrid substrate 110 is subjected to a thermal tempering process to form a muddged substrate 110' having a doped region 220', wherein the doped region 220' is from the metal The grown surface S of the nitride film 114' extends to the mixed substrate 110' internal.

Furthermore, in this embodiment, holes can be selectively formed between the semiconductor element layer and the mixed substrate, thereby increasing the probability of light being scattered, and thereby improving the light extraction efficiency of the light emitting diode chip. Specifically, the method of forming the holes may be achieved by utilizing surface structure damage of the local regions. In one embodiment, the method for forming the holes is, for example, high-power laser irradiation, and local area modification is performed on the mixed substrate having a flat surface to achieve different growth rates of the local regions, thereby generating more Holes.

In detail, during the epitaxial growth of the semiconductor layer, the formation of the holes is mainly due to the fact that the growth surface of the metal nitride film subjected to localized modification is hard to grow the semiconductor device layer (or the growth rate of the semiconductor device layer is much lower than that of the adjacent layer). Unmodified surface). As the thickness of the epitaxial layer of the semiconductor increases, the growth rate of the epitaxial layer above the unmodified region is much higher than the growth rate above the modified region, so the epitaxial layer tends to grow laterally. The layer will eventually bond above the modified area. Therefore, a hole is formed above the grown surface of the modified metal nitride film.

It is worth noting that the metal nitride film modified by local region has a regional lattice constant change or adaptability change, so the holes 130, 130' can be adjusted by changing the epitaxial growth conditions (please refer to FIG. 1D). And the position formed in Figure 2A). In other words, the holes existing between the aforementioned semiconductor element layer 140 and the mixed substrate 110' may be located above the doped region 120' or the undoped region, respectively. These holes have the aforementioned functions, and therefore will not be described again.

Fourth Embodiment

4A and FIG. 4B are schematic cross-sectional views showing a manufacturing process of a light-emitting diode wafer according to a fourth embodiment of the present invention. Referring to FIG. 4A and FIG. 1D simultaneously, a conductive substrate 300 is first provided. A first electrode 310 is formed on one surface of the conductive substrate 300, and a metal electrode layer 311 is formed on the other surface of the conductive substrate 300. Next, a bonding layer 320 is formed on the ohmic contact layer 150 illustrated in FIG. 1D, and the bonding layer 320 is bonded to the metal electrode layer 311. In the present embodiment, the bonding layer 320 is, for example, capable of reflecting light, and the bonding layer 320 may be composed of a plurality of layers of different metals and form a good ohmic contact with the ohmic contact layer 150.

Next, referring to Fig. 4B, the mixed substrate 110' having the doped region 120' is removed to separate the hybrid substrate 110' from the semiconductor device layer 140. After the mixed substrate 110' is separated from the semiconductor element layer 140, the holes 130 are exposed. Next, a second electrode 330 is formed on the first type semiconductor layer 142 of the semiconductor device layer 140, and the second electrode 330 covers at least a portion of the hole 130. After the completion of the second electrode 330, the fabrication of the light-emitting diode wafer 100" of the present embodiment is initially completed.

[Fifth Embodiment]

5A and FIG. 5B are schematic cross-sectional views showing a manufacturing process of a light-emitting diode wafer according to a fifth embodiment of the present invention. Referring to FIG. 5A and FIG. 2A , a conductive substrate 300 is first provided. One surface of the conductive substrate 300 is formed with a first electrode 310 and a metal electrode layer 311 is formed on the other surface. Next, a bonding layer 320 is formed on the ohmic contact layer 150 illustrated in FIG. 2A. The bonding layer 320 is bonded to the metal electrode layer 311. In the present embodiment, the bonding layer 320 is, for example, capable of reflecting light, and the bonding layer 320 is composed of a plurality of layers of different metals and forms a good ohmic contact with the ohmic contact layer 150.

Next, referring to Fig. 5B, the mixed substrate 110' having the doped region 120' is removed to separate the hybrid substrate 110' from the semiconductor device layer 140. After the mixed substrate 110' is separated from the semiconductor element layer 140, the holes 130' are exposed. Next, a second electrode 330 is formed on the first type semiconductor layer 142 of the semiconductor device layer 140, and the second electrode 330 covers at least a portion of the hole 130'. After the completion of the second electrode 330, the fabrication of the LED array 100'" of the present embodiment is initially completed.

In the fourth embodiment and the fifth embodiment described above, after the mixed substrate 110' is separated from the semiconductor element layer 140, it is not necessary to further roughen the surface of the semiconductor element layer 140, thereby reducing the complexity of the overall process and the holes. 130, 130' helps to improve the light extraction efficiency of the LED chips 100", 100"".

The light-emitting diode wafer proposed by the invention does not need to make a thicker nucleation layer and a buffer layer, but forms a thin aluminum nitride film on a growth substrate by thermal evaporation to enhance the epitaxial crystal. Quality, so the thickness of the LED chip and the cost and time of the process can be reduced. In addition, compared to the sputtering method, since the production threshold of the thermal evaporation is low, the selectivity of the machine is large. In addition, since the aluminum nitride film contributes to the improvement of the epitaxial quality, the light-emitting diode chip proposed by the present invention can have better photoelectric characteristics and luminous efficiency. In addition, by providing holes and doped regions in the semiconductor device layer, the probability of light scattering is increased, thereby improving light extraction efficiency. Therefore, the light-emitting diode chip proposed by the present invention can have a higher light-emitting efficiency.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100, 100', 100", 100'''‧‧‧ luminescent diode chips

110, 110'‧‧‧ mixed substrate

112, 112'‧‧‧ growth substrate

114, 114'‧‧‧Metal Nitride Film

120‧‧‧ patterned film

120', 220'‧‧‧ doped area

130, 130’‧‧‧ Hole

140, 140'‧‧‧ semiconductor component layer

142, 142'‧‧‧ first type semiconductor layer

144, 144’‧‧‧ active layer

146, 146'‧‧‧ second type semiconductor layer

150, 150' ‧ ‧ ohmic contact layer

160‧‧‧First electrode

170‧‧‧second electrode

210‧‧‧ patterned mask

S‧‧‧ growth surface

D _D(a) , D _M(a) ‧‧‧ thickness

n ₁ , n ₂ , n ₃ , n ₄ ‧‧ ‧ refractive index

300‧‧‧Electrical substrate

310‧‧‧First electrode

320‧‧‧ joint layer

330‧‧‧second electrode

BP‧‧‧conductive bumps

SUB‧‧‧ carrier substrate

1A to 1E are schematic cross-sectional views showing a manufacturing process of a light-emitting diode wafer according to a first embodiment of the present invention.

Fig. 1C' and Fig. 1C" show the different distributions of the doped regions in the mixed substrate, respectively.

2A and 2B are schematic cross-sectional views showing a manufacturing process of a light emitting diode chip according to a second embodiment of the present invention.

2C is a schematic view showing the light emitting diode wafer 100' of the second embodiment applied to a flip chip package structure.

Figure 3 is a schematic illustration of the formation of a doped region in accordance with a third embodiment of the present invention.

4A and FIG. 4B are schematic cross-sectional views showing a manufacturing process of a light-emitting diode wafer according to a fourth embodiment of the present invention.

5A and FIG. 5B are schematic cross-sectional views showing a manufacturing process of a light-emitting diode wafer according to a fifth embodiment of the present invention.

100‧‧‧Light Diode Wafer

110'‧‧‧Mixed substrate

112'‧‧‧ Growth substrate

114'‧‧‧Metal Nitride Film

120'‧‧‧Doped area

130‧‧‧ holes

140'‧‧‧ Semiconductor component layer

142'‧‧‧First type semiconductor layer

144’‧‧‧ active layer

146'‧‧‧Second type semiconductor layer

150' ‧ ‧ ohmic contact layer

160‧‧‧First electrode

170‧‧‧second electrode

Claims (46)

A light-emitting diode wafer comprising: a mixed substrate comprising: a growth substrate; and a metal nitride film disposed on the growth substrate, wherein the metal nitride film has a metal content greater than a nitrogen content, wherein The metal nitride film has a growth surface, wherein the hybrid substrate has a plurality of doped regions extending from the growth surface to the inside of the hybrid substrate; and a semiconductor device layer comprising: a first type semiconductor layer disposed thereon On the grown surface of the metal nitride film; an active layer disposed on the first type semiconductor layer; and a second type semiconductor layer disposed on the active layer. The light-emitting diode chip according to claim 1, wherein the material of the metal nitride film comprises chromium nitride, tantalum nitride, aluminum nitride, gallium nitride, indium nitride, aluminum indium nitride, Aluminum gallium nitride, indium gallium nitride or aluminum gallium indium nitride. The light-emitting diode wafer according to claim 1, wherein the ratio of metal to nitrogen in the metal nitride film is greater than 1. The light-emitting diode wafer according to claim 1, wherein the metal nitride film has a thickness of from 1 nm to 4000 nm. The illuminating diode chip of claim 1, wherein the doped regions have a thickness greater than a thickness of the metal nitride film. The illuminating diode chip of claim 5, wherein the doped regions have a thickness less than or equal to a thickness of the metal nitride film. The luminescent diode wafer of claim 1, wherein the doped regions have a metal or non-metal dopant. The light-emitting diode chip according to claim 7, wherein the non-metal dopant comprises argon, oxygen, helium, hydrogen, nitrogen, carbon, phosphorus, arsenic, magnesium, zinc, lanthanum, cerium, gold, aluminum. The light-emitting diode chip according to claim 1, wherein the doping regions are formed by ion implantation or thermal diffusion. The light-emitting diode chip according to claim 1, wherein the metal nitride film has a refractive index n ₁ , and the grown substrate has a refractive index n ₂ , and the doping in the metal nitride film The refractive index of the region is n ₃ , and the refractive indices of the doped regions in the grown substrate are n ₄ and n ₁ ≠n ₂ ≠n ₃ ≠n ₄ . The light-emitting diode chip according to claim 1, wherein the metal nitride film has a refractive index n ₁ , the growth substrate has a refractive index n ₂ , and the metal nitride film has the same The impurity region has a refractive index of n ₃ and n ₁ ≠n ₂ ≠n ₃ . The light-emitting diode chip of claim 1, wherein a plurality of holes exist between the semiconductor element layer and the mixed substrate, and each of the holes is located above one of the doped regions. The light-emitting diode chip according to claim 1, wherein a plurality of holes exist between the semiconductor element layer and the mixed substrate, and Each of the holes is located above one of the undoped regions. The illuminating diode chip according to claim 1, wherein one of the first type semiconductor layer and the second type semiconductor layer is a P type semiconductor layer, and the first type semiconductor layer and the second type The other of the semiconductor layers is an N-type semiconductor layer. The luminescent diode wafer of claim 1, wherein the active layer has a single or multiple quantum well structure. The illuminating diode chip of claim 1, further comprising: a first electrode electrically connected to the first type semiconductor layer; and a second electrode electrically connected to the second type semiconductor layer. The illuminating diode chip of claim 1, further comprising: an ohmic contact layer disposed between the second electrode and the second type semiconductor layer. The light-emitting diode chip according to claim 1, wherein the doped regions occupy an area of between 30% and 80% of the area of the metal nitride film. A method for fabricating a light-emitting diode wafer, comprising: providing a growth substrate; wherein the metal nitride material is sublimated by the thermal evaporation method to adhere to the growth substrate to form a metal nitride film; Forming a plurality of doped regions in the metal nitride film, and the doped regions extend from the grown surface of the metal nitride film into the mixed substrate And forming a first type semiconductor layer, an active layer and a second type semiconductor layer on the metal nitride film. The method for fabricating a light-emitting diode wafer according to claim 19, wherein the material of the metal nitride film comprises chromium nitride, tantalum nitride, aluminum nitride, gallium nitride, indium nitride, and nitride. Aluminum indium, aluminum gallium nitride, indium gallium nitride or aluminum gallium indium nitride. The method for fabricating a light-emitting diode wafer according to claim 19, wherein the thermal evaporation method comprises electron beam evaporation. The method for fabricating a light-emitting diode wafer according to claim 19, wherein the metal nitride film has a thickness of from 1 nm to 4000 nm. The method for fabricating a light-emitting diode wafer according to claim 19, wherein the doped regions have a thickness greater than a thickness of the metal nitride film. The method for fabricating a light-emitting diode wafer according to claim 19, wherein the doped regions have a thickness less than or equal to a thickness of the metal nitride film. The method of fabricating a light-emitting diode wafer according to claim 19, wherein the doped regions have a metal or non-metal dopant. The method for fabricating a light-emitting diode wafer according to claim 19, further comprising: forming a first electrode on the first type semiconductor layer; and forming a second electrode on the second type semiconductor layer . The method for fabricating a light-emitting diode wafer according to claim 26, further comprising: forming an ohmic contact layer before forming the second electrode on the second type semiconductor layer, wherein the ohmic contact layer is disposed on The second electrode is between the second type semiconductor layer. The method for fabricating a light-emitting diode wafer according to claim 27, further comprising: patterning the ohmic contact layer and the second type semiconductor layer before forming the first electrode on the first type semiconductor layer And the active layer to expose a portion of the first type semiconductor layer. The method for fabricating a light-emitting diode wafer according to claim 27, wherein the doped regions occupy an area of between 30% and 80% of the area of the metal nitride film. A flip chip package structure, comprising: the light emitting diode chip according to claim 1; a plurality of conductive bumps; and a carrier substrate, wherein the light emitting diode chip passes through the conductive bumps Electrically connected to the carrier substrate. The flip chip package structure according to claim 30, wherein the material of the metal nitride film comprises chromium nitride, tantalum nitride, aluminum nitride, gallium nitride, indium nitride, aluminum indium nitride, and nitrogen. Aluminum gallium, indium gallium nitride or aluminum gallium indium nitride. The flip chip package structure of claim 30, wherein the ratio of metal to nitrogen in the metal nitride film is greater than 1. The flip chip package structure of claim 30, wherein the metal nitride film has a thickness of from 1 nm to 4000 nm. The flip chip package structure of claim 30, wherein the doped regions have a thickness greater than a thickness of the metal nitride film. The flip chip package structure of claim 34, wherein the doped regions have a thickness less than or equal to a thickness of the metal nitride film. The flip chip package structure of claim 30, wherein the doped regions have a metal or non-metal dopant. The flip chip package structure of claim 36, wherein the non-metal dopant comprises argon, oxygen, helium, hydrogen, nitrogen, carbon, phosphorus, arsenic, magnesium, zinc, lanthanum, cerium, gold, aluminum. The flip chip package structure of claim 30, wherein the doped regions are formed by ion implantation or thermal diffusion. The flip chip package structure of claim 30, wherein the metal nitride film has a refractive index n ₁ and the growth substrate has a refractive index n ₂ , and the doped regions in the metal nitride film The refractive index is n ₃ , and the doped regions in the grown substrate have a refractive index of n ₄ and n ₁ ≠n ₂ ≠n ₃ ≠n ₄ . The flip chip package structure of claim 30, wherein the metal nitride film has a refractive index n ₁ , the growth substrate has a refractive index n ₂ , and the doping in the metal nitride film The refractive index of the region is n ₃ and n ₁ ≠n ₂ ≠n ₃ . A flip chip package structure as described in claim 30, There are a plurality of holes between the semiconductor device layer and the mixed substrate, and each of the holes is located above one of the doped regions. The flip chip package structure of claim 30, wherein a plurality of holes exist between the semiconductor element layer and the mixed substrate, and each of the holes is located above one of the undoped regions. The flip chip package structure of claim 30, wherein one of the first type semiconductor layer and the second type semiconductor layer is a P type semiconductor layer, and the first type semiconductor layer and the second type semiconductor The other layer is an N-type semiconductor layer. The flip chip package structure of claim 30, wherein the active layer has a single or multiple quantum well structure. The flip chip package structure of claim 30, wherein the light emitting diode chip further comprises: a first electrode electrically connected to the first type semiconductor layer; and a second electrode and the second type The semiconductor layer is electrically connected. The flip chip package structure of claim 30, wherein the light emitting diode chip further comprises: an ohmic contact layer disposed between the second electrode and the second type semiconductor layer.