TWI502748B - Method for fabricating tft array substrate - Google Patents

Method for fabricating tft array substrate Download PDF

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TWI502748B
TWI502748B TW102122142A TW102122142A TWI502748B TW I502748 B TWI502748 B TW I502748B TW 102122142 A TW102122142 A TW 102122142A TW 102122142 A TW102122142 A TW 102122142A TW I502748 B TWI502748 B TW I502748B
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layer
thin film
film transistor
transistor substrate
metal layer
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TW201501323A (en
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Ye Xin Technology Consulting Co Ltd
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薄膜電晶體基板的製造方法 Method for manufacturing thin film transistor substrate

本發明涉及一種薄膜電晶體基板的製造方法。 The present invention relates to a method of fabricating a thin film transistor substrate.

先前的薄膜電晶體基板的製造方法一般包括如下步驟:步驟一:形成柵極金屬層;步驟二:形成柵極電極;步驟三:形成柵極絕緣層;步驟四:形成一個半導體層在該柵極絕緣層上;步驟五:形成一個蝕刻阻擋層在該半導體層上;步驟六:形成一個透明導電層;步驟七:形成一個畫素電極;步驟八:形成源/漏極電極;步驟九:形成一鈍化層的圖案層在該畫素電極、源/漏極電極上。 The manufacturing method of the prior thin film transistor substrate generally comprises the following steps: Step 1: forming a gate metal layer; Step 2: forming a gate electrode; Step 3: forming a gate insulating layer; Step 4: forming a semiconductor layer in the gate On the pole insulating layer; step five: forming an etch barrier layer on the semiconductor layer; step six: forming a transparent conductive layer; step seven: forming a pixel electrode; step eight: forming source/drain electrodes; step nine: A pattern layer forming a passivation layer is on the pixel electrode and the source/drain electrodes.

該薄膜電晶體基板需要採用多道光罩制程,而光罩制程通常較為複雜且成本較高,從而使得製造成本較高。 The thin film transistor substrate requires a multi-pass mask process, and the mask process is usually complicated and costly, which results in high manufacturing cost.

有鑒於此,有必要提供一種制程簡單的薄膜電晶體基板的製造方法。 In view of the above, it is necessary to provide a method for manufacturing a thin film transistor substrate which is simple in process.

一種薄膜電晶體基板的製造方法,其包括:提供一基板;在該基板上依次形成柵極、柵極絕緣層、半導體層、蝕刻阻擋層、透明導電層及金屬層;提供一光阻層,該光阻層覆蓋在該金屬層上,利用一光罩對該光阻層進行曝光顯影,以形成圖案化光阻層,該圖案化光阻層鄰近半導體層的部分較厚,遠離半導體層的部分較 薄,再對金屬層進行蝕刻,直到暴露出部分蝕刻阻擋層;去除剩餘的較薄部分的光阻層,以暴露出部分金屬層;對暴露在外的金屬層進行蝕刻,以暴露出部分該透明導電層;以及去除該光阻層。 A method for manufacturing a thin film transistor substrate, comprising: providing a substrate; sequentially forming a gate electrode, a gate insulating layer, a semiconductor layer, an etch barrier layer, a transparent conductive layer and a metal layer on the substrate; and providing a photoresist layer, The photoresist layer is coated on the metal layer, and the photoresist layer is exposed and developed by using a photomask to form a patterned photoresist layer. The patterned photoresist layer is thicker adjacent to the semiconductor layer and away from the semiconductor layer. Partial comparison Thin, then etching the metal layer until a portion of the etch stop layer is exposed; removing the remaining thin portion of the photoresist layer to expose a portion of the metal layer; etching the exposed metal layer to expose a portion of the transparent layer a conductive layer; and removing the photoresist layer.

在上述薄膜電晶體基板的製造方法中,源極、漏極的形成以及畫素電極的形成只需要一次光阻層,從而節省了一次光阻層的使用,制程簡化,有效地降低了成本。進一步地,由於透明導電層是位於金屬層與柵極絕緣層之間,因此可阻擋金屬層的金屬元素擴散到柵極絕緣層內,從而提升產品的品質。 In the above method for manufacturing a thin film transistor substrate, the formation of the source and the drain and the formation of the pixel electrode require only one photoresist layer, thereby saving the use of the primary photoresist layer, simplifying the process, and effectively reducing the cost. Further, since the transparent conductive layer is located between the metal layer and the gate insulating layer, the metal element of the barrier metal layer is diffused into the gate insulating layer, thereby improving the quality of the product.

100‧‧‧薄膜電晶體基板 100‧‧‧thin film substrate

10‧‧‧基板 10‧‧‧Substrate

20‧‧‧柵極 20‧‧‧Gate

30‧‧‧柵極絕緣層 30‧‧‧Gate insulation

40‧‧‧半導體層 40‧‧‧Semiconductor layer

50‧‧‧蝕刻阻擋層 50‧‧‧ etching barrier

60‧‧‧透明導電層 60‧‧‧Transparent conductive layer

70‧‧‧金屬層 70‧‧‧metal layer

80‧‧‧圖案化光阻層 80‧‧‧ patterned photoresist layer

90‧‧‧保護層 90‧‧‧Protective layer

圖1到圖7是本發明實施方式提供的薄膜電晶體基板的製造方法的剖面示意圖。 1 to 7 are schematic cross-sectional views showing a method of manufacturing a thin film transistor substrate according to an embodiment of the present invention.

圖1到圖6所示為本發明實施例提供的薄膜電晶體基板100的製造方法。該薄膜電晶體基板100的製造方法包括如下步驟: FIG. 1 to FIG. 6 illustrate a method of fabricating a thin film transistor substrate 100 according to an embodiment of the present invention. The manufacturing method of the thin film transistor substrate 100 includes the following steps:

步驟一:請參見圖1,提供一個基板10。該基板10為絕緣基板,其可以為玻璃、石英或者陶瓷等絕緣材料。在本實施例中,該基板10為玻璃基板。 Step 1: Referring to Figure 1, a substrate 10 is provided. The substrate 10 is an insulating substrate, which may be an insulating material such as glass, quartz or ceramic. In the present embodiment, the substrate 10 is a glass substrate.

步驟二:在該基板10上依次形成柵極20、柵極絕緣層30、半導體層40、蝕刻阻擋層50、透明導電層60及金屬層70。其中,該柵極絕緣層30包括氮化矽及/或氧化矽。該透明導電層60為銦錫氧化物薄膜(Indium Tin Oxide,ITO)。該柵極20通過蝕刻形成。在本實施例中,該半導體層40也通過蝕除形成,其為島狀,且位於該柵極20的正上方。該半導體層40的材料包括非晶氧化半導體材 料(Amorphous Oxide Semiconductor,AOS)。 Step 2: A gate electrode 20, a gate insulating layer 30, a semiconductor layer 40, an etching stopper layer 50, a transparent conductive layer 60, and a metal layer 70 are sequentially formed on the substrate 10. The gate insulating layer 30 includes tantalum nitride and/or hafnium oxide. The transparent conductive layer 60 is an Indium Tin Oxide (ITO) film. The gate electrode 20 is formed by etching. In the present embodiment, the semiconductor layer 40 is also formed by etching, which is island-shaped and located directly above the gate electrode 20. The material of the semiconductor layer 40 includes an amorphous oxidized semiconductor material. Amorphous Oxide Semiconductor (AOS).

步驟三:請參見圖2與圖3,提供一光阻層,該光阻層覆蓋在該金屬層70上方。之後,利用一光罩(圖未示)對光阻層80進行曝光顯影,以形成圖案化光阻層80,該圖案化光阻層80鄰近半導體層40的部分較厚,遠離半導體層40的部分較薄,再對該金屬層70進行蝕刻,直到暴露出部分蝕刻阻擋層50。在本實施例中,該光罩為半色調網點光罩(Halftone mask)。該金屬層70的位於該半導體層40上方的部分暴露在外,位於該半導體層40上方的部分被蝕刻掉,從而使部分蝕刻阻擋層50暴露在外。 Step 3: Referring to FIG. 2 and FIG. 3, a photoresist layer is provided, and the photoresist layer is over the metal layer 70. Thereafter, the photoresist layer 80 is exposed and developed by a photomask (not shown) to form a patterned photoresist layer 80. The patterned photoresist layer 80 is thicker adjacent to the semiconductor layer 40, away from the semiconductor layer 40. The portion is thinner and the metal layer 70 is etched until a portion of the etch stop layer 50 is exposed. In this embodiment, the reticle is a halftone mask. A portion of the metal layer 70 above the semiconductor layer 40 is exposed, and a portion above the semiconductor layer 40 is etched away, thereby exposing the portion of the etch stop layer 50.

步驟四:請參見圖4,去除剩餘的較薄部分的圖案化光阻層80,以暴露出部分金屬層70。在本實施例中,以幹蝕刻的方式去除部分剩餘圖案化光阻層80。 Step 4: Referring to FIG. 4, the remaining thinner portion of the patterned photoresist layer 80 is removed to expose a portion of the metal layer 70. In the present embodiment, a portion of the remaining patterned photoresist layer 80 is removed by dry etching.

步驟五:請一併參見圖5,對暴露在外的金屬層70進行蝕刻,以暴露出部分該透明導電層60。在本實施例中,暴露在外的該透明導電層60作為該薄膜電晶體基板的畫素電極。 Step 5: Referring to FIG. 5 together, the exposed metal layer 70 is etched to expose a portion of the transparent conductive layer 60. In the present embodiment, the transparent conductive layer 60 exposed is used as a pixel electrode of the thin film transistor substrate.

步驟六:請一併參見圖6,去除該光阻層80。在本實施例中,位於該半導體層40一側的該金屬層70且與該畫素電極相鄰的部分作為該薄膜電晶體基板的漏極,位於該半導體層40的另一側的該金屬層70作為該薄膜晶體基板的源極。 Step 6: Please refer to FIG. 6 together to remove the photoresist layer 80. In this embodiment, a portion of the metal layer 70 on the side of the semiconductor layer 40 and adjacent to the pixel electrode serves as a drain of the thin film transistor substrate, and the metal is located on the other side of the semiconductor layer 40. Layer 70 serves as the source of the thin film crystal substrate.

步驟七:請參見圖7,形成一個保護層90,覆蓋該金屬層70、透明導電層60以及暴露在外的蝕刻阻擋層50,從而形成薄膜電晶體基板100。 Step 7: Referring to FIG. 7, a protective layer 90 is formed covering the metal layer 70, the transparent conductive layer 60, and the exposed etching barrier layer 50, thereby forming the thin film transistor substrate 100.

在上述薄膜電晶體基板100的製造方法中,源極、漏極的形成以 及畫素電極的形成只需要一個光阻層,從而節省了一次光阻層的使用,制程簡化,有效地降低了成本。 In the above method of manufacturing the thin film transistor substrate 100, the source and the drain are formed in And the formation of the pixel electrode requires only one photoresist layer, thereby saving the use of the primary photoresist layer, simplifying the process, and effectively reducing the cost.

此外,由於透明導電層60是位於金屬層70與柵極絕緣層30之間,因此可阻擋金屬層70的金屬元素擴散到柵極絕緣層30內,從而提升產品的品質。 In addition, since the transparent conductive layer 60 is located between the metal layer 70 and the gate insulating layer 30, the metal element of the barrier metal layer 70 can be diffused into the gate insulating layer 30, thereby improving the quality of the product.

本發明之技術內容及技術特點已揭示如上,然而熟悉本項技術之人士仍可能基於本發明之教示及揭示而作種種不背離本發明精神之替換及修飾。因此,本發明之保護範圍應不限於實施例所揭示者,而應包括各種不背離本發明之替換及修飾,並為以下之申請專利範圍所涵蓋。 The technical and technical features of the present invention have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should be construed as being limited by the scope of the appended claims

100‧‧‧薄膜電晶體基板 100‧‧‧thin film substrate

50‧‧‧蝕刻阻擋層 50‧‧‧ etching barrier

60‧‧‧透明導電層 60‧‧‧Transparent conductive layer

70‧‧‧金屬層 70‧‧‧metal layer

90‧‧‧保護層 90‧‧‧Protective layer

Claims (6)

一種薄膜電晶體基板的製造方法,其包括:提供一基板,在該基板上依次形成柵極、柵極絕緣層、半導體層、蝕刻阻擋層、透明導電層及金屬層;提供一光阻層,該光阻層覆蓋在該金屬層上,利用一光罩對該光阻層進行曝光顯影,以形成圖案化光阻層,該圖案化光阻層鄰近半導體層的部分較厚,遠離半導體層的部分較薄,再對金屬層進行蝕刻,直到暴露出部分蝕刻阻擋層;去除剩餘的較薄部分的光阻層,以暴露出部分金屬層,位於該半導體層一側的該金屬層且與該透明電極相鄰的部分形成該薄膜電晶體基板的漏極,位於該半導體層的另一側的該金屬層形成該薄膜晶體基板的源極;對暴露在外的金屬層進行蝕刻,以暴露出部分該透明導電層,暴露在外的該透明導電層作為該薄膜電晶體基板的畫素電極;以及去除該光阻層。 A method for fabricating a thin film transistor substrate, comprising: providing a substrate on which a gate electrode, a gate insulating layer, a semiconductor layer, an etch barrier layer, a transparent conductive layer and a metal layer are sequentially formed; and a photoresist layer is provided The photoresist layer is coated on the metal layer, and the photoresist layer is exposed and developed by using a photomask to form a patterned photoresist layer. The patterned photoresist layer is thicker adjacent to the semiconductor layer and away from the semiconductor layer. Partially thinner, the metal layer is etched until a portion of the etch stop layer is exposed; the remaining thinner portion of the photoresist layer is removed to expose a portion of the metal layer, the metal layer on one side of the semiconductor layer and An adjacent portion of the transparent electrode forms a drain of the thin film transistor substrate, and the metal layer on the other side of the semiconductor layer forms a source of the thin film crystal substrate; and the exposed metal layer is etched to expose a portion The transparent conductive layer, the transparent conductive layer exposed as the pixel electrode of the thin film transistor substrate; and the photoresist layer removed. 根據申請專利範圍第1項所述之薄膜電晶體基板的製造方法,其中,該半導體層包括非晶氧化半導體材料。 The method for producing a thin film transistor substrate according to the above aspect of the invention, wherein the semiconductor layer comprises an amorphous oxide semiconductor material. 根據申請專利範圍第1項所述之薄膜電晶體基板的製造方法,其中,該透明導電層為銦錫氧化物薄膜。 The method for producing a thin film transistor substrate according to the first aspect of the invention, wherein the transparent conductive layer is an indium tin oxide film. 根據申請專利範圍第1項所述之薄膜電晶體基板的製造方法,其中,該光罩為半色調網點光罩。 The method for producing a thin film transistor substrate according to claim 1, wherein the mask is a halftone dot mask. 根據申請專利範圍第1項所述之薄膜電晶體基板的製造方法,其中,透明導電層位於金屬層與半導體層之間。 The method for producing a thin film transistor substrate according to claim 1, wherein the transparent conductive layer is located between the metal layer and the semiconductor layer. 根據申請專利範圍第1項所述之薄膜電晶體基板的製造方法,其中,在步驟“去除該光阻層”之後,進一步包括如下步驟:形成一個保護層,以覆蓋該金屬層、透明導電層以及暴露在外的蝕刻阻擋層。 The method for manufacturing a thin film transistor substrate according to the first aspect of the invention, wherein after the step of "removing the photoresist layer", the method further comprises the step of forming a protective layer to cover the metal layer and the transparent conductive layer. And an etch stop layer that is exposed.
TW102122142A 2013-06-21 2013-06-21 Method for fabricating tft array substrate TWI502748B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201225302A (en) * 2010-12-01 2012-06-16 Au Optronics Corp Thin film transistor
TW201244113A (en) * 2008-07-31 2012-11-01 Semiconductor Energy Lab Semiconductor device and method for manufacturing the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201244113A (en) * 2008-07-31 2012-11-01 Semiconductor Energy Lab Semiconductor device and method for manufacturing the same
TW201225302A (en) * 2010-12-01 2012-06-16 Au Optronics Corp Thin film transistor

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