TWI502334B - Static frame display from a memory associated with a processor of a data processing device during low activity thereof - Google Patents

Description

Static from the memory associated with it during the low activity of the processor of the data processing device State frame display

The present invention relates generally to data processing apparatus, and more particularly to static frame display from memory associated therewith during low activity of a processor of a data processing apparatus.

A data processing device (for example, a desktop computer, laptop, notebook, server, mobile device) may include a processor communicatively coupled to a memory. The memory may be a temporary storage for display material associated with the frame to be displayed on the display unit of the data processing device. The individual frames to be displayed are not necessarily different from each other during the idle state of the processor. However, one or more engines executing on the processor may still consume power, thereby rendering the data processing device power inefficient.

A method, apparatus, and/or system for displaying a static frame from a memory associated therewith during low activity of a processor of a data processing device is disclosed.

In one aspect, the present invention provides a method comprising: starting with an idle state of the processor via a processor associated with a processor of a data processing device and/or a operating system executing on the data processing device Detecting the idle state based on the base state; and, when detecting the idle state, copying the native display data related to the static frame to be displayed during the idle state and the status information of the data processing device to Among the memory associated with the processor. The method also includes: causing an output resource of the processor to access the copied native display material during the idle state; and converting the copied native display material to a display unit suitable for rendering on the data processing device The format. Further, the method also includes One or more engines of the processor are power gated during the idle state while the output resource and the memory are in the power-on state to reduce power consumption of the data processing device.

The one or more engines of the processor may be video memory engines and/or display engines. The method may further include recovering the power to the one or more engines of the processor upon detecting high activity of the processor based on the stored state information of the data processing device in the memory . The memory may be a frame buffer, a regional memory of the processor, or a memory external to the processor; and/or the processor may be a graphics processing unit (GPU) or a central processing unit ( Central Processing Unit, CPU).

The method may further include interrupting the output resource from accessing the memory connection after recovering power to the one or more engines upon detecting high activity of the processor. The method may also include detecting the processing via a Cyclic Redundancy Check (CRC) between the operating system executing on the data processing device and/or a continuous frame to be displayed on the display unit. The idle state of the device. The copied native display data may include values of display parameters, the values of which include display timing, display resolution, display refresh rate, and/or display color depth.

In another aspect, the present invention provides a data processing apparatus comprising: a memory; a processor communicatively coupled to the memory; and a driver device, and the processor and/or the data processing device The operating system executed on it is associated. The driver device is configured to initially detect an idle state of the processor and to detect a static frame to be displayed during the idle state when the idle state of the processor is detected The native display material located in the processor is copied to the memory along with the status information of the data processing device based on the frame. The driver device is further configured to have an output resource of the processor access the copied native display material in the memory during the idle state of the processor; and convert the copied native display data into a suitable one The format on the display unit of the data processing device is depicted via the processor.

Further, the driver device is further configured to power gate one or more engines during the idle state of the processor while maintaining the output resource and the memory in the power-on state, so as to reduce The power consumption of the data processing device. The data processing device may also be configured to implement the complementary operations discussed above.

In yet another aspect, the present invention discloses a non-temporary medium that can be read via a data processing device and includes instructions that are executable by the data processing device. The non-transitory media includes: detecting, by a processor associated with a processor of a data processing device and/or a operating system executing on the data processing device, based on a start of an idle state of the processor An idle state instruction; and a native display material to be associated with a static frame to be displayed during the idle state when the idle state of the processor is detected, based on the static frame, together with the data The status information of the processing device is copied together to instructions in the memory associated with the processor.

The non-temporary medium further includes: an instruction to allow an output resource of the processor to access the copied native display material in the memory during an idle state of the processor; and to display the copied native display material The instructions are converted to a format suitable for rendering on the display unit of the data processing device via the processor. Further, the non-temporary medium further includes instructions for powering the one or more engines of the processor during the idle state while maintaining the output resource and the memory in the power-on state, to reduce the The power consumption of the data processing device.

The non-temporary medium may also contain instructions to perform the supplemental operations discussed above.

The methods and systems disclosed herein can be implemented by any means for achieving the various aspects and can be performed in the form of machine-readable media having a set of instructions that, when executed by a machine. The machine implements any of the operations disclosed herein. Other features will be apparent from the drawings and the detailed description which follows.

100‧‧‧ data processing device

102‧‧‧Processor

104‧‧‧ memory

106‧‧‧Display unit

110‧‧‧Operating system

112‧‧‧ Native display information

114‧‧‧Output resources

124‧‧‧Status Information

202‧‧‧Video Memory Engine

204‧‧‧Display engine

300‧‧‧ idle state

302‧‧‧Cyclic redundancy check

304‧‧‧Continuous frame

304A‧‧‧ frame

304B‧‧‧ frame

402‧‧‧Regional memory

502‧‧‧Drive devices

The specific embodiments of the present invention have been explained by way of example, and are not limited to the drawings in the drawings, wherein the

The first figure is a schematic diagram of a data processing apparatus in accordance with one or more specific embodiments.

The second figure is a schematic illustration of the components of the processor of the data processing apparatus of the first figure in accordance with one or more embodiments.

The third figure is a schematic diagram of the detection of the idle state of the processor of the data processing apparatus of the first diagram in accordance with one or more embodiments.

The fourth diagram is a schematic diagram of interrupting the connection of an output resource to the regional memory after restoring power to one or more engines of the processor of the data processing apparatus of the first figure.

The fifth diagram is a schematic diagram of the interaction between a driver device and the processor during execution of one or more engines via the processor of the data processing device of the first figure.

The sixth figure is an operation from a memory associated with the processor involved in the display of the static frame during low activity of the processor of the data processing apparatus of the first figure in accordance with one or more embodiments. Detailed processing flow chart.

Other features of particular embodiments of the invention will be apparent from the accompanying drawings.

The example embodiments described below can be used to provide a method, apparatus, and/or system for displaying a static frame from a memory associated therewith during periods of low activity of a processor of a data processing device. The specific embodiments of the present invention have been described with reference to the specific embodiments of the present invention.

The first figure shows a data processing apparatus 100 in accordance with one or more embodiments. In one or more embodiments, data processing apparatus 100 may represent various forms of digital computers, such as laptops, desktops, workstations, notebooks, netbooks, tablets, personal digital assistants (Personal) Digital Assistant, PDA), server, and mobile device (for example, mobile phone). Other examples of data processing apparatus 100 are also within the scope of the exemplary embodiments discussed herein. In one or more embodiments, data processing apparatus 100 may include a processor 102 communicatively coupled to a memory 104 (eg, volatile memory and/or non-volatile memory) (for example In other words, a central processing unit (CPU), a graphics processing unit (GPU), the processor 102 is configured to address a storage location in the memory 104. In one or more embodiments, output data associated with processing via processor 102 may be input to a multimedia processing unit (not shown) configured to implement correlation with the data. Coding/decoding. In one or more embodiments, the output of the multimedia processing unit can be depicted on a display list Element 106 (for example, a liquid crystal display (LCD) display, a cathode ray tube (CRT) screen). The processor 102 shown in the first figure is communicatively coupled to the display unit 106.

Obviously, an operating system 110 can execute on the data processing device 100. The operating system 110 shown in the first figure is stored in a memory 104 (for example, non-volatile memory). In one or more embodiments, processor 102 may be in an idle state; a driver device (eg, a driver software) associated with processor 102 and/or operating system 110 may initiate a side-by-side process The idle state of the device 102. For example, processor 102 may execute one or more engines (eg, modules) thereon prior to the idle state. One or more of the engines mentioned above may be an engine and/or a display engine associated with a video memory. The processor 102 may be executing and depicting associated instructions, for example, three-dimensional (3D) games. In one or more embodiments, once the idle state of the processor 102 is detected based on the stasis of the frame to be displayed, the driver device can and will be in the idle state. The native display material 112 associated with the displayed static frame (for example, a frame of an image) is copied into the memory 104. In one or more embodiments, the status information 124 of the data processing device 100 (for example, the material associated with the status of the data processing device 100, metadata) may be copied to the native display material 112. Memory 104. Now, in one or more embodiments, an output resource 114 (eg, memory; memory 104 or other memory) of processor 102 can access the copied native in memory 104. Display data 112.

In one or more embodiments, the copied native display material 112 can be converted to, for example, via a multimedia interface (not shown) suitable format for rendering on display unit 106. The aforementioned conversion can be achieved via the driver device. In one or more embodiments, the driver device may power-control one or more of its engines during the idle state of the processor 102 while maintaining the output resource 114 and the memory 104 in the power-on state; The aforementioned power gating can reduce the power consumption of the data processing device 100. Explicitly, when the processor 102 is configured to execute a number of engines, it is not required to power gate all of the engines. The power gating can be performed according to system requirements or according to the needs of users of the data processing device 100.

The second figure shows the device of processor 102 in the first figure in accordance with one or more specific embodiments. The second diagram shows video memory engine 202 and display engine 204 as examples, and output resource 114. Obviously, other engines are also within the scope of the exemplary embodiments discussed herein. Once high activity of the processor 102 is detected (eg, via test instructions executed on the processor 102, via a state or parameter of a bus bar (eg, a system bus) coupled by the processor 102), The power of the one or more engines that are power-switched to the processor 102 can be recovered based on the stored status information 124 in the memory 104. The memory 104 may be a frame buffer (not shown), a regional memory of the processor 102, or a memory external to the processor 102. Other forms of memory 104 are also within the scope of the exemplary embodiments discussed herein.

In one or more embodiments, the recovery of power to the one or more engines upon detection of high activity of the processor 102 may interrupt the output resource 114 from accessing the memory 104 (for example Said, the connection of regional memory, frame buffer). The detection of the idle state 300 of the processor 102 is shown in the third figure. In an exemplary embodiment, operating system 110 can detect idle state 300. The driver device can be based on the detection of the idle state 300 performed by the operating system 110 to achieve the processing discussed above. In another example embodiment, the idle state 300 may be via a cyclic redundancy check (CRC) between successive frames 304 (eg, frame 304A, frame 304B) to be displayed on display unit 106. 302 to detect. For example, CRC 302 may be part of a set of test instructions that are executable via processor 102. The idle state 300 can be determined based on the fact that no change is detected between frame 304A and frame 304B.

The fourth diagram is to interrupt the output resource 114 to access the regional memory 402 after restoring power to the one or more engines of the processor 102 (eg, the video memory engine 202 and/or the display engine 204). The connection (for example, the example memory 104). Now, the normal operation can be restarted in the material processing apparatus 100. In one or more embodiments, the copied native display material 112 may include a number of display parameters, such as display timing, display resolution, display refresh rate, and display color depth. Other examples of display parameters are also within the scope of the exemplary embodiments discussed herein.

The fifth figure is shown by executing the (or the like) one or more references via the processor 102. The interaction between the driver device (for example, driver device 502) discussed above and processor 102 during the engine. In one or more embodiments, the driver device 502 can initiate detection of the idle state 300 of the processor 102 and subsequent operations discussed above. The detection can be initiated automatically on the basis of: user intervention on the data processing device 100 (for example, by tapping a button on the user interface, a physical button on the data processing device 100); Execution of the appropriate application for detection; and/or loading of the operating system 110. Other forms of starting up are also within the scope of the exemplary embodiments discussed herein.

The driver device (for example, driver device 502) discussed above or its equivalent software can be stored in memory 104 for downloading via the Internet and then installed on data processing device 100. Alternatively, you can use its external memory. Moreover, the instructions associated with the driver device can be on a non-transitory medium that can be read by the data processing device 100, for example, a compact disc (CD), a digital video disc (Digital Video Disc, DVD), Blu-ray ^TM discs, floppy disk, or disk, ... and so on. The aforementioned instructions may be executed via the material processing apparatus 100.

The set of instructions associated with the driver device or its equivalent software is not limited to the specific embodiments discussed above, and can be implemented, for example, in the operating system 110, application, foreground or background processing, network Stacked, or any combination of them. Other variations are also within the scope of the exemplary embodiments discussed herein.

6 is a memory associated with the processor 102 involved in the display of the static frame during low activity of the processor 102 of the data processing device 100 in accordance with one or more embodiments. Detailed processing flow chart of the operation of 104. In one or more specific embodiments, operation 602 may involve a driver (eg, driver device 502) associated with processor 102 and/or operating system 110 at the beginning of idle state 300 of processor 102. Based on the detection of the idle state 300. In one or more embodiments, operation 604 may involve a native display material 112 associated with a static frame to be displayed during the idle state 300 when the idle state 300 is detected, with the static image Based on the box, it is copied into the memory 104 along with the status information 124 of the data processing device 100.

In one or more embodiments, operation 606 may involve causing output resource 114 of processor 102 to access the copied native in memory 104 during idle state 300. Display data 112. In one or more specific embodiments, operation 608 may involve converting the copied native display material 112 via processor 102 into a format suitable for rendering on display unit 106 of data processing device 100. In one or more embodiments, operation 610 may then involve one or more engines of power gating processor 102 during idle state 300 while maintaining output resource 114 and memory 104 in an on state, so that The power consumption of the data processing device 100 is reduced.

Example scenarios involving concepts associated with the exemplary embodiments discussed herein will now be described. A workstation (example data processing device 100) user may wish to reduce power consumption during the idle state 300 of the processor 102 of the data processing device 100. The (or the like) one or more engines executing on the processor 102 may consume power even during the idle state 300. Therefore, the user may wish to dissipate the aforementioned power inefficiencies by detecting the idle state 300 and performing the subsequent operations discussed above via the driver device 502 enablement. The power consumption through the workstation can be reduced as discussed above based on the detection and subsequent operations.

The specific embodiments of the present invention have been described with reference to the specific embodiments of the present invention, and it is obvious that various modifications and changes can be made to the specific embodiments without departing from the broader spirit of the specific embodiments. category. For example, the various devices and modules described herein may use hardware circuitry, firmware, software, or any combination of hardware, firmware, and software (for example, now non-temporary Machine readable media) to enable and operate. For example, such various electrical structures and methods may use transistors, logic gates, and electrical circuits (for example, Application Specific Integrated Circuitry (ASIC) and/or digital signal processors (Digital) Signal Processor, DSP) circuit system).

Moreover, it should be understood that the various operations, processes, and methods disclosed herein may be machine readable media and/or non-storage media that are now compatible with a data processing system (eg, data processing device 100) and/or Or machine accessible media, and can be implemented in any order (including, for example, using means for achieving various operations).

Accordingly, the specification and drawings are to be regarded as illustrative and not restrictive.

100‧‧‧ data processing device

102‧‧‧Processor

104‧‧‧ memory

106‧‧‧Display unit

110‧‧‧Operating system

112‧‧‧ Native display information

114‧‧‧Output resources

124‧‧‧Status Information

Claims (17)

A method comprising: detecting an idle state of a processor of a data processing device, wherein the idle state is detected based on a cyclic redundancy check (CRC) between consecutive frames on the display unit, and wherein A drive associated with the operating system executing on the data processing device is configured to perform the cyclic redundancy check to detect the idle state; and when the idle state of the processor is detected, the sum will be during the idle state The native display material associated with the displayed static frame is copied together into the memory associated with the processor; an output resource of the processor is accessed by the processor during the idle state of the processor a copied native display material; converting the copied native display material into a format suitable for rendering on a display unit of the data processing device via the processor; and maintaining the output resource and the memory in a powered-on state The power is gated to at least one engine of the processor during an idle state of the processor to reduce power consumption of the data processing device. The method of claim 1, wherein the at least one engine of the processor is at least one of a video memory engine and a display engine. The method of claim 1, further comprising recovering power to the at least one engine of the processor upon detecting a high activity of the processor. The method of claim 3, wherein the memory system associated with the processor is a frame buffer and the processor is a graphics processing unit (GPU). The method of claim 3, further comprising: interrupting the connection of the output resource to the memory after recovering power to the at least one engine after detecting the high activity of the processor. The method of claim 1, wherein the copied native display material comprises a plurality of display parameters, the plurality of display parameters comprising at least one of: display timing, display resolution, display refresh rate, And display the color depth. A data processing device comprising: a memory; a processor communicatively coupled to the memory; and a driver device associated with the operating system executing on the data processing device, the driver device configured to: initiate detection of the processing An idle state in which the idle state is detected based on a cyclic redundancy check (CRC) between consecutive frames on the display unit; and when the idle state of the processor is detected, the idle state is to be idle The static display frame displayed during the state relates to the native display data located in the processor, and is copied into the memory together; an output resource of the processor is accessed to the memory during the idle state of the processor. Copying the native display material; converting the copied native display data into a format suitable for rendering on the display unit of the data processing device via the processor; and maintaining the output resource and the memory in a powered state The medium gates at least one engine of the processor during an idle state of the processor to reduce power consumption of the data processing device. The data processing device of claim 7, wherein the at least one engine of the processor is at least one of a video memory engine and a display engine. The data processing device of claim 7, wherein the driver device is further configured to recover power to the at least one engine of the processor upon detecting a high activity of the processor. The data processing device of claim 9, wherein the memory system is a frame buffer; and the processor is a GPU. The data processing device of claim 9, wherein the driver device is further configured to: interrupt the output resource to access the memory after recovering power to the at least one engine after detecting the high activity of the processor The connection. The data processing device of claim 7, wherein the copied native display material comprises a plurality of display parameters, the plurality of display parameters comprising at least one of the following: Display timing, display resolution, display refresh rate, and display color depth. A non-temporary medium that can be read by a data processing device and includes instructions that can be executed by the data processing device, including: detecting an idle state of a processor of a data processing device, Wherein the idle state is detected based on a cyclic redundancy check (CRC) between successive frames on the display unit, and wherein a driver associated with the operating system executing on the data processing device is configured to execute The cyclic redundancy check detects an instruction of the idle state; and, when detecting the idle state of the processor, copies the native display data related to the static frame to be displayed during the idle state to An instruction in a memory associated with the processor; an instruction to cause an output resource of the processor to access the copied native display material in the memory during an idle state of the processor; Converting the copied native display material into instructions adapted to be formatted on the display unit of the data processing device via the processor; and for maintaining Output of the memory resources to idle state when the processor is in the power-on state of the engine, at least one instruction of the processor during power gated in order to reduce the power consumption of the data processing apparatus. The non-temporary medium of claim 13 includes at least one of a video memory engine and a display engine for powering the processor as the at least one engine. The non-transitory media of claim 13 further includes instructions for recovering power to the at least one engine of the processor upon detecting a high activity of the processor. The non-transitory media as claimed in claim 13 includes: instructions for copying the native display material to the frame buffer. The non-temporary medium of claim 15 further includes: an instruction for interrupting the output resource to access the memory after the power is restored to the at least one engine after detecting the high activity of the processor .