TWI501396B - Power semiconductor device and edge terminal structure thereof - Google Patents

Description

Power semiconductor component and its edge termination structure

SUMMARY OF THE INVENTION The present invention relates to a power semiconductor technology, and more particularly to an edge termination structure for a trench power semiconductor device capable of increasing a breakdown voltage.

Power semiconductor components are typically used in devices that switch mode power supplies or other high speed power switches. In general, the requirements of power semiconductor components, in addition to being able to pass large currents in the active region, are also capable of withstanding large breakdown voltages in the termination region.

Several power semiconductor components have been researched and used, such as Schottky barrier diodes. However, in general, the flat-type Schottky barrier diode has recently developed a trench MOS barrier Schottky diode (TMBS diode) because of the low breakdown voltage. Figure 1.

In FIG. 1 , the trench MOS semi-shelter barrier diode 10 mainly forms an N-e Plating layer 102 on the N+ substrate 100, and then forms a plurality of trenches in the N- epitaxial layer 102. The gate 104 is provided with a gate oxide layer 106 between the trench gate 104 and the N-epitaxial layer 102. A Schottky barrier metal layer 108 and an anode metal 110 are then deposited on the surface of the N- epitaxial layer 102 and the surface of the trench gate 104.

However, FIG. 1 only shows the structure of the active region, and how to design an edge termination structure suitable for the trench type MOS Schott block barrier 10 has been It is one of the research priorities at present, and similar concepts are found in US Patent No. 6,309,929 and US Patent No. 6,396,090.

In addition to the trenched MOS Schottky barrier, such as trench power MOSFETs, trench insulated gate bipolar transistors (trench insulated gate bipolar transistors) Similar power semiconductor components such as trench IGBTs face similar problems.

The present invention provides an edge termination structure of a trench type power semiconductor device capable of increasing a breakdown voltage.

The present invention further provides a trench type power semiconductor device having an edge termination structure capable of increasing a breakdown voltage.

The present invention provides an edge termination structure of a trench power semiconductor device, comprising a substrate, a first electrode, a second electrode, a first field plate and a second field plate, wherein the first and second electrodes are respectively located The surface and back of the substrate. The trench power semiconductor device includes an active region and an edge termination region, and a surface of the substrate of the edge termination region adjacent to the active region has a trench. The first field plate is disposed on the sidewall of the trench and extends toward the tail of the trench, and the first field plate includes at least an L-shaped electric plate, a gate insulating layer under the L-shaped electric plate, and an L-shaped electric plate. The first electrode described above. The second field plate comprises at least an insulating layer and the first electrode above the insulating layer, wherein the insulating layer covers the tail of the trench and extends at least to cover the tail end of the L-shaped electric board.

In an embodiment of the invention, the trench power semiconductor device When the trench type is a TMBS Diode, the first electrode directly contacts the surface of the L-shaped electric board, and the substrate includes a first conductive type substrate and a first formed thereon Conductive epitaxial layer.

In an embodiment of the present invention, when the trench power semiconductor device is a trench type MOS snubber barrier, the thickness of the insulating layer under the second field plate is greater than that under the first field plate. The thickness of the gate insulating layer.

In an embodiment of the present invention, when the trench power semiconductor device is a trench type MOS semi-Schottky barrier diode, when the gate insulating layer extends under the insulating layer of the second field plate, The thickness of the insulating layer and the gate insulating layer of the second field plate is greater than the thickness of the gate insulating layer under the first field plate.

In an embodiment of the invention, when the trench power semiconductor device is a trench type MOS semi-stable barrier diode, the second electrode is a cathode, and the first electrode includes a Schottky barrier. a metal layer and an anode metal layer thereon.

In an embodiment of the invention, when the trench power semiconductor device is a trench insulated gate bipolar transistor (Trench IGBT), the insulating layer completely covers the L-shaped electric board, and the substrate includes a second conductivity type a substrate, a first conductivity type buffer layer formed on the second conductive type substrate, and a first conductive type epitaxial layer formed thereon.

In an embodiment of the invention, when the trench power semiconductor device is a trench insulated gate bipolar transistor, the first electrode is an emitter and the second electrode is a collector.

In an embodiment of the invention, when the trench power semiconductor device is a trench insulated gate bipolar transistor, a conductive plug is passed through The edge layer is electrically connected to the first electrode and the L-shaped electric board. In addition, a barrier layer is also disposed on the surface of the insulating layer and between the conductive plug, the first electrode, and the first field plate and the insulating layer.

In an embodiment of the invention, when the trench power semiconductor device is a trench power MOSFET, the insulating layer completely covers the L-shaped electric board, and the substrate includes a first A conductive type substrate and a first conductive type epitaxial layer formed thereon.

In an embodiment of the invention, when the trench power semiconductor device is a trench power MOS field effect transistor, the first electrode is a source and the second electrode is a drain.

In an embodiment of the invention, when the trench power semiconductor device is a trench power MOS field effect transistor, a conductive plug is electrically connected to the first electrode and the L-shaped electrode through the insulating layer. In addition, a barrier layer is further disposed on the surface of the insulating layer and between the conductive plug, the first electrode, and the first field plate and the insulating layer.

The present invention further provides a trench power semiconductor device comprising the edge termination structure of the trench power semiconductor device, and including a plurality of trench gates in the substrate surface of the active region, and the first electrode includes an active The surface of the substrate.

In another embodiment of the present invention, when the trench power semiconductor device is a trench type insulating gate bipolar transistor or a trench type power MOS field effect transistor, the first electrode and the L shape are electrically connected. In addition to the conductive plug of the electric board, another conductive plug electrically connecting the first electrode and the substrate in the active area through the insulating layer is further included. In addition, on the surface of the insulating layer and in the two conductive plugs There is also a barrier layer between the plug, the first electrode, the first field plate and the insulating layer.

Based on the above, the edge termination structure of the trench power semiconductor device of the present invention can be improved by using the design of the first field plate and the second field plate (such as a metal electrode) covering the first field plate and extending outward. The breakdown voltage of the component.

The above described features and advantages of the present invention will be more apparent from the following description.

The invention provides an edge termination structure of a trench type power semiconductor device, which can be applied to, for example, a trench type gold oxide semi-shelter barrier diode (TMBS Diode), a trench type insulating gate bipolar transistor. Trench-type power semiconductor components such as (Trench IGBT) or trench power MOSFETs (Trench Power MOSFET). Several embodiments are listed below to illustrate the edge termination structure of the present invention.

2A is a schematic cross-sectional view of a trench type MOS Schottky barrier diode (TMBS Diode) in accordance with a first embodiment of the present invention. A trenched oxy-half Schottky barrier diode 20 comprising an active region 20a and an edge termination region 20b is shown in FIG. 2A.

Referring to FIG. 2A, the trench MOS semi-Stereo barrier diode 20 basically includes a substrate 200, a first electrode 202 (ie, an anode) and a second electrode 204 (ie, a cathode). The first electrode 202 is located on the surface 200a of the substrate 200, and the second electrode 204 is disposed on the back surface 200b of the substrate 200. The surface 200a of the substrate 200 of the edge termination region 20b beside the active region 20a has a trench 206. ditch A first field plate 208 and a second field plate 210 are disposed within the slot 206. The first field plate 208 is located on the side wall 206a of the trench 206 and extends toward its tail 206b. The first electrode 202 includes a Schottky barrier metal layer 212 and an anode metal layer 214 thereon, and the first electrode 202 extends from the active region 20a to the tail 206b of the trench 206 and covers the first field plate 208, thus The length of one field plate 208 is smaller than the length of the first electrode 202 in the edge termination region 20b; for example, the length of the first field plate 208 is about 5 μm or more, such as about 5 μm to 20 μm, but the present invention is not limited thereto. The material of the above anode metal layer 220 is a metal material such as AlSiCu.

In FIG. 2A, the first field plate 208 includes an L-shaped electric board 216, a gate insulating layer 218 under the L-shaped electric board 216 and an anode metal layer 214 above the L-shaped electric board 216, wherein the L-shaped electric board 216 The top end 216a is higher than the top 206c of the groove 206. The material of the L-shaped electric board 216 is polycrystalline germanium. The second field plate 210 includes at least one insulating layer 220 and an anode metal layer 214 over the insulating layer 220. The insulating layer 220 covers the tail portion 206b of the trench 206 and extends over the tail end 216b of the L-shaped electric board 216, wherein the insulating layer The material of 220 may be a material for an inner dielectric layer (ILD). The second field plate 210 is electrically connected to the first field plate 208 through the terminal area contact window 20c. Therefore, the length of the first field plate 208 is slightly larger than the length of the terminal contact window 20c, and the length of the second field plate 210 is about 5 μm or more, such as about 5 μm to 20 μm, but the present invention is not limited thereto. Thereby, the depletion region of the trench MOS half-blocking diode 20 is expanded with the first field plate 208 and the second field plate 212 toward the edge of the element to further increase the breakdown voltage.

Referring again to FIG. 2A, since the gate insulating layer 218 in the first field plate 208 extends under the insulating layer 220 of the second field plate 210, the thickness t1 of the gate insulating layer 218 in the first field plate 208 is significantly smaller than the first The gate insulating layer 218 in the two field plates 210 is added to the total thickness t2 of the insulating layer 220. However, if the gate insulating layer 218 in the first field plate 208 does not extend under the insulating layer 220 of the second field plate 210, the thickness t1 of the gate insulating layer 218 should also be less than the thickness t3 of the insulating layer 220. Thereby, since the thicker gate insulating layer 220 of the second field plate 210 can withstand a higher potential difference, the breakdown voltage of the edge termination region 20b can be further improved.

Referring to FIG. 2A, the substrate 200 includes a first conductive type substrate 222 (such as an N+ substrate) and a first conductive type epitaxial layer 224 (such as N-epitaxial) formed thereon. The first electrode 202 directly contacts the surface of the substrate 200a in the active region 20a, and the active region 20a has at least one trench gate 226, wherein the trench gate 226 is a structure composed of polysilicon or metal, of course, the present invention Not limited to this.

2B is a diagram showing the position of the depletion region of the trench type MOS Schottky barrier diode 20 of FIG. 2A in the case where the anode voltage is grounded and the cathode voltage is greater than 0 V (ie, reverse bias). Since the thickness of the insulating layer (and the gate insulating layer) under the second field plate 210 is large, the thick insulating layer (and the gate insulating layer) can withstand a high potential difference, so the second field plate 210 can make the substrate The depletion zone 230 in 200 expands toward the edge of the component, which is also evidenced from the potential line in the depletion zone 230 and under the first field plate 208 and the second field plate 210, so that the breakdown voltage of the component is improved.

Figure 3 is a perspective view of a trench insulated gate in accordance with a second embodiment of the present invention. Schematic diagram of a bipolar transistor (Trench IGBT). A trench insulated gate bipolar transistor 30 comprising an active region 30a and an edge termination region 30b is shown in FIG.

Referring to FIG. 3, the trench insulated gate bipolar transistor 30 basically includes a substrate 300, a first electrode 302 (ie, an emitter) on the surface 300a of the substrate 300, and a second electrode 304 located on the back surface 300b of the substrate 300 (ie, Collector). The first electrode 302 is located on the surface 300a of the substrate 300, and the second electrode 304 is disposed on the back surface 300b of the substrate 300, wherein the material of the second electrode 304 is a metal material such as AlSiCu. The surface 300a of the substrate 300 of the edge termination region 30b beside the active region 30a has a trench 306. A first field plate 308 and a second field plate 310 are disposed within the trench 306. The first electrode 202 extends from the active region 30a to the trench 306 and covers the first field plate 308 such that the length of the first field plate 308 is less than the length of the first electrode 302 within the edge termination region 30b. The first field plate 308 includes an L-shaped electric board 312, a gate insulating layer 314 under the L-shaped electric board 312, and a first electrode electrically connected to the L-shaped electric board 312 via at least one first conductive plug 316. 302, wherein the material of the L-shaped electric board 312 is polycrystalline, and the shape and position of the L-shaped electric board 312 are the same as those of the L-shaped electric board of the first embodiment; the first conductive plug 316 is, for example, a tungsten plug.

Referring to FIG. 3, the second field plate 310 includes at least one insulating layer 318 and a first electrode 302 over the insulating layer 318. The insulating layer 318 covers the tail of the covering trench 306 and completely covers the L-shaped electric board 312, wherein the insulating layer is insulated. The material of layer 318 may be a material of an inner dielectric layer (ILD). The second field plate 310 can be electrically connected to the first field plate 308 through the first conductive plug 316. In addition, there is at least one trench in the surface of the substrate 300a in the active region 30a. The trench gate 320, wherein the trench gate 320 is formed of a polysilicon or a metal, is of course not limited thereto. As for the insulating layer 318, it completely covers the trench gate 320 in the active region 30a. The first electrode 302 can be electrically connected to the substrate 300 in the active region 30a through the insulating layer 318 through the at least one second conductive plug 322. The second conductive plug 322 is, for example, a tungsten plug. The substrate 300 includes a second conductive type substrate 324 (such as a P+ substrate), a first conductive type buffer layer 326 (such as an N+ buffer layer) formed on the second conductive type substrate 324, and a first conductive layer formed thereon. Type epitaxial layer 328 (such as N-epitaxial). In addition, the gate insulating layer 314 may also extend under the insulating layer 318 of the second field plate 310. This gate insulating layer 314 also has a trench gate 320 and a first conductive epitaxial layer 328. There is also a barrier layer 330 on the surface of the insulating layer 318 and between the two conductive plugs 316 and 322, the first electrode 302, the L-shaped electric board 312 and the insulating layer 318, and the material thereof is Ti/TiN. .

4 is a cross-sectional view showing a trench type power MOS field effect transistor in accordance with a third embodiment of the present invention. A trench power MOS field effect transistor 40 comprising an active region 40a and an edge termination region 40b is shown in FIG. 4, and the same reference numerals are used to designate the same or similar components.

Referring to FIG. 4, the trench power MOS field-effect transistor 40 includes a substrate 400, a first electrode 402 (ie, a source) on the surface 400a of the substrate 400, and a second electrode 404 (ie, 汲 on the back surface 400b of the substrate 400). pole). In the present embodiment, the substrate 400 includes a first conductive type substrate 406 (such as an N+ substrate) and a first conductive type epitaxial layer 408 (such as N-epitaxial) formed thereon. to For other components of the third embodiment, reference may be made to the second embodiment, and details are not described herein again.

In summary, the present invention increases the length and thickness of the electric board in the edge termination area by the structural design, thereby expanding the depletion area and further increasing the breakdown voltage.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10, 20‧‧‧ Grooved gold-oxygen semi-swarf barrier diode

20a, 30a, 40a‧‧‧ active area

20b, 30b, 40b‧‧‧ edge terminal area

30‧‧‧Terminated insulated gate bipolar transistor

40‧‧‧Groove power MOS half-field effect transistor

100‧‧‧N+ substrate

102‧‧‧N-plated layer

104, 226, 320‧‧‧ trench gate

106‧‧‧ gate oxide layer

108, 212‧‧‧ Schottky barrier metal layer

110‧‧‧Anode metal

200, 300, 400‧‧‧ substrates

200a, 300a, 400a‧‧‧ surface

200b, 300b, 400b‧‧‧ back

202, 302, 402‧‧‧ first electrode

204, 304, 404‧‧‧ second electrode

206, 306‧‧‧ trench

206a‧‧‧ Sidewall

206b‧‧‧ tail

206c‧‧‧ top

208, 308‧‧‧ first board

210, 310‧‧‧ second board

214‧‧‧Anode metal layer

216, 312‧‧‧L-shaped electric board

216a‧‧‧Top

216b‧‧‧ tail

218, 314‧‧ ‧ gate insulation

220, 318‧‧‧ insulation

222, 406‧‧‧First Conductive Substrate

224, 328, 408‧‧‧ first conductivity type epitaxial layer

230‧‧ ‧ Vacant Zone

316, 322‧‧‧ conductive plug

324‧‧‧Second conductive substrate

326‧‧‧First Conductive Buffer Layer

330‧‧‧Barrier layer

T1, t2, t3‧‧‧ thickness

1 is a schematic view of a conventional trenched gold oxy-semi-blocker barrier diode (TMBS Diode).

2A is a cross-sectional view showing a trench type oxy-half Schottky barrier diode in accordance with a first embodiment of the present invention.

2B is a view showing the position of a depletion region of the trench type oxy-half Schottky barrier diode of FIG. 2A.

3 is a schematic cross-sectional view of a trench insulated gate bipolar transistor (Trench IGBT) in accordance with a second embodiment of the present invention.

4 is a cross-sectional view showing a trench power MOSFET (Trench Power MOSFET) in accordance with a third embodiment of the present invention.

20‧‧‧Grooved gold-oxygen semi-swarf barrier diode

20a‧‧‧active area

20b‧‧‧Edge terminal area

200‧‧‧Substrate

200a‧‧‧ surface

200b‧‧‧back

202‧‧‧First electrode

204‧‧‧second electrode

206‧‧‧ trench

206a‧‧‧ Sidewall

206b‧‧‧ tail

206c‧‧‧ top

208‧‧‧ first board

210‧‧‧ second board

214‧‧‧Anode metal layer

216‧‧‧L-shaped electric board

216a‧‧‧Top

216b‧‧‧ tail

218‧‧‧ gate insulation

220‧‧‧Insulation

222‧‧‧First Conductive Substrate

224‧‧‧First Conductive Epitaxial Layer

226‧‧‧ trench gate

T1, t2, t3‧‧‧ thickness

Claims (26)

An edge termination structure of a trench power semiconductor device, the trench power semiconductor device comprising an active region and an edge termination region, and the edge termination structure comprises: a substrate, the edge termination beside the active region The surface of the substrate has a trench; a first electrode is disposed on the surface of the substrate; a second electrode is disposed on the back surface of the substrate; and a first field plate is disposed on the sidewall of the trench The tail of the trench extends, and the first field plate comprises at least an L-shaped electric board, a gate insulating layer under the L-shaped electric board, and the first electrode on the L-shaped electric board; The field plate includes at least an insulating layer and the first electrode above the insulating layer, wherein the insulating layer covers the tail portion of the trench and extends at least to cover a tail end of the L-shaped electric board; and a barrier layer is located at The surface of the insulating layer. The edge termination structure of the trench power semiconductor device according to claim 1, wherein the trench power semiconductor is a trench type MOS semi-stable barrier diode, the first electrode Directly contacting the surface of the L-shaped electric board, and the substrate comprises: a first conductive type substrate; and a first conductive type epitaxial layer formed on the first conductive type substrate. The edge termination structure of the trench power semiconductor device of claim 2, wherein the second electrode is a cathode, and the first electrode comprises: a Schottky barrier metal layer; and an anode metal layer disposed on the Schottky barrier metal layer. The edge termination structure of the trench power semiconductor device of claim 2, wherein the thickness of the insulating layer of the second field plate is greater than the thickness of the gate insulating layer of the first field plate. The edge termination structure of the trench power semiconductor device of claim 2, wherein the gate insulating layer further comprises a bottom portion of the insulating layer extending to the second field plate, and the second field plate The thickness of the insulating layer plus the gate insulating layer is greater than the thickness of the gate insulating layer of the first field plate. The edge termination structure of the trench power semiconductor device of claim 1, wherein the trench power semiconductor is a trench insulated gate bipolar transistor, the insulating layer completely covers the L-shaped battery a substrate, and the substrate comprises: a second conductive type substrate; a first conductive type buffer layer formed on the second conductive type substrate; and a first conductive type epitaxial layer formed on the first conductive type buffer On the floor. The edge termination structure of the trench power semiconductor device of claim 6, wherein the first electrode is an emitter and the second electrode is a collector. The edge termination structure of the trench power semiconductor device of claim 6, further comprising a conductive plug electrically connected to the first electrode and the L-shaped electrical board through the insulating layer. The edge termination structure of the trench power semiconductor device of claim 8, wherein the barrier layer is located between the conductive plug, the first electrode, the L-shaped electrical board and the insulating layer. The edge termination structure of the trench power semiconductor device according to claim 1, wherein the trench power semiconductor is a trench power MOS field effect transistor, the insulating layer completely covers the L shape An electric board, and the substrate comprises: a first conductive type substrate; and a first conductive type epitaxial layer formed on the first conductive type substrate. The edge termination structure of the trench power semiconductor device of claim 10, wherein the first electrode is a source and the second electrode is a drain. The edge termination structure of the trench power semiconductor device of claim 10, further comprising a conductive plug electrically connected to the first electrode and the L-shaped electrical board through the insulating layer. The edge termination structure of the trench power semiconductor device of claim 12, wherein the barrier layer is located between the conductive plug, the first electrode, the L-shaped electrical board and the insulating layer. A trench power semiconductor device includes an active region and an edge termination region, the trench power semiconductor device comprising: a substrate having a trench on a surface of the substrate in the edge termination region adjacent to the active region a plurality of trench gates located in the surface of the substrate of the active region; a first electrode, the substrate located in the active region and the edge termination region The surface covers the trench gates; a second electrode is disposed on the back surface of the substrate; a first field plate is disposed on the sidewall of the trench and extends toward the tail of the trench, and the first The first plate includes at least one L-shaped electric plate, a gate insulating layer under the L-shaped electric plate, and the first electrode on the L-shaped electric plate; and a second field plate including at least one insulating layer and the The first electrode above the insulating layer, wherein the insulating layer covers the tail portion of the trench and extends at least to cover the tail end of the L-shaped electric board; and a barrier layer is located on the surface of the insulating layer. The trench type power semiconductor device of claim 14, wherein the trench type power semiconductor device is a trench type MOS semi-shelter barrier diode, the first electrode directly contacting the The surface of the L-shaped electric board, and the substrate comprises: a first conductive type substrate; and a first conductive type epitaxial layer formed on the first conductive type substrate. The trench power semiconductor device of claim 15, wherein the second electrode is a cathode, and the first electrode comprises: a Schottky barrier metal layer; and an anode metal layer disposed thereon Schottky barrier metal layer. The trench power semiconductor device of claim 15, wherein the thickness of the insulating layer of the second field plate is greater than the thickness of the gate insulating layer of the first field plate. The trench power semiconductor device of claim 15, wherein the gate insulating layer further comprises the device extending to the second field plate The thickness of the insulating layer plus the gate insulating layer of the second field plate is greater than the thickness of the gate insulating layer of the first field plate. The trench type power semiconductor device according to claim 14, wherein the trench type power semiconductor device is a trench type insulating gate bipolar transistor, the insulating layer completely covers the L-shaped electric board, and The substrate includes: a second conductive type substrate; a first conductive type buffer layer formed on the second conductive type substrate; and a first conductive type epitaxial layer formed on the first conductive type buffer layer. The trench power semiconductor device of claim 19, wherein the first electrode is an emitter and the second electrode is a collector. The trench power semiconductor device of claim 19, further comprising: a first conductive plug electrically connected to the first electrode and the L-shaped electric board through the insulating layer; and a second a conductive plug electrically connected to the first electrode and the substrate in the active region through the insulating layer. The trench type power semiconductor device according to claim 21, wherein the barrier layer is located at the first and second conductive plugs, the first electrode, the L-shaped electric board and the insulating layer between. The trench power semiconductor device of claim 14, wherein the trench power semiconductor component is a trench power MOS field effect transistor, the insulating layer completely covers the L-shaped circuit board, And the base The board includes: a first conductive type substrate; and a first conductive type epitaxial layer formed on the first conductive type substrate. The trench power semiconductor device of claim 23, wherein the first electrode is a source and the second electrode is a drain. The trench power semiconductor device of claim 23, further comprising: a first conductive plug electrically connected to the first electrode and the L-shaped electric board through the insulating layer; and a second a conductive plug electrically connected to the first electrode and the substrate in the active region through the insulating layer. The trench type power semiconductor device according to claim 25, wherein the barrier layer is located at the first and second conductive plugs, the first electrode, the L-shaped electric board and the insulating layer between.