TWI499187B - Control system and method for reducing switching loss in a charge pump - Google Patents

Description

Charge pump control system and method capable of reducing switching loss

The present invention relates to the technical field of a charge pump, and more particularly to a charge pump control system and method that can reduce switching losses.

1 is a block diagram of a conventional charge pump 100 including a control circuit 110, a switching transistor group 120, and a passive component group (Passive device). Group) 130, the control circuit 110 receives M input signals and generates N control signals, where M, N ≧ 1. The N control signals are connected to N switching transistors (not shown) of the switching transistor group 120 to control the turning on and off of the N switching transistors.

The switching transistor group 120 is coupled to the passive component group 130 and an input voltage (VIN). The passive component group 130 includes a flying capacitor and an output decoupling capacitor. The N control signals are used to control the switching sequence of the N switching transistors, thereby increasing the output voltage (V _OUT ) to a desired voltage level.

2 is a detailed circuit diagram of the charge pump of FIG. 1, wherein the control circuit 110 outputs four control signals A, B, C, and D. The switching transistor group 120 includes four switching transistors MP1, MP2, and MP3. MN1, the passive component group 130 includes a flying capacitor C ₀ and an output decoupling capacitor C ₁ . As shown in FIG. 2, the control circuit 110, the switching transistor group 120 and the passive component group 130 form a double voltage charge pump circuit.

In the first phase (Phase 1), the switching transistors MP1 and MN1 of the switching transistor group 120 are turned on, and the switching transistors MP2 and MP3 are turned off. At this time, the input voltage (VIN) is stored on the flying capacitor C ₀ . In the second phase (Phase 2), the switching transistors MP1, MN1 are turned off, and the switching transistors MP2, MP3 are turned on, and the voltage stored to the flying capacitor C ₀ at the first phase (VIN) It is passed to the output (VSP), and the switching transistor MP2 is also connected to the input voltage (VIN), at which point the output voltage (VSP) will be twice the input voltage (VIN).

As can be seen from FIG. 2, the switching transistor of the conventional charging pump adopts a single transistor, and the same switching transistor is used under the condition of the weight and weight of the load, which will form a fixed switching loss. However, the component that affects the most efficiency at light load is the switching loss, which is the most important source of inefficiency of the charge pump in the light load state, and is also a disadvantage of its technology. Therefore, there is still room for improvement in the control system and method of the conventional charging pump.

The object of the present invention is mainly to provide a reduction in switching loss The charge pump control system and method can reduce switching loss (Lighting Loss) at light load to save power consumption.

According to a feature of the present invention, the present invention provides a charge pump control system capable of reducing switching loss, comprising a charge pump, a current detecting circuit, a state determining circuit, and a control unit. The charging pump has an input end, an output end and a switching transistor group, wherein an input voltage is switched by the switching transistor group, the input terminal voltage is boosted, and the output terminal voltage is converted to a pre-charge. Set the voltage level. The current detecting circuit is coupled to the charging pump to sense the input of the charging pump and the output of the output, and generate a detection signal corresponding to the load. The state determining circuit is coupled to the current detecting circuit to generate a determining signal according to the detecting signal generated by the current detecting circuit. The control unit is coupled to the charge pump and the state determination circuit. The control unit receives an input control signal and the determination signal, and generates a first group of switching signals and a second group of switches according to the input control signal and the determination signal. The signal, a third set of switching signals, and a fourth set of switching signals are used to control the turning on and off of the switching transistor group of the charging pump.

According to another feature of the present invention, the present invention provides a control method for a charge pump, comprising the steps of: (A) detecting a current of a charge pump using a current detecting circuit, and generating a current relative to the charge pump via the current detecting circuit One of the load current detection signals, wherein the charge pump has a switching transistor group; (B) using a state determination circuit to generate a determination signal according to the detection signal generated by the current detection circuit; (C) Using a control unit to receive an input control signal and the determination signal, and control the signal according to the input And the determining signal, generating a first group of switching signals, a second group of switching signals, a third group of switching signals, and a fourth group of switching signals to control the turning on and off of the switching transistor group of the charging pump .

100‧‧‧Charging pump

110‧‧‧Control circuit

120‧‧‧Switching the transistor group

130‧‧‧ Passive component group

300‧‧‧Charging pump control system with reduced switching losses

310‧‧‧Charging pump

320‧‧‧ Current detection circuit

330‧‧‧State Judgment Circuit

340‧‧‧Control unit

311, 313, 315, 317‧‧‧ first to fourth sub-switching transistor groups

321‧‧‧Operational Amplifier

323‧‧‧First detection transistor

325‧‧‧Second detection transistor

327‧‧‧ Impedance

Figure 1 is a block diagram of a conventional charge pump.

2 is a detailed circuit diagram of the charge pump of FIG. 1.

3 is a block diagram of a charge pump control system of the present invention that reduces switching losses.

4 is a circuit diagram of a charge pump control system of the present invention that reduces switching losses.

Figure 5 is a circuit diagram of a 2-bit passive charge pump control system that reduces switching losses.

Figure 6 is a flow chart showing a method of controlling a charge pump of the present invention.

3 is a block diagram of a charge pump control system capable of reducing switching loss according to the present invention. The charge pump control system 300 includes a charge pump 310, a current sensing circuit 320, and a state determination circuit. (Status Detector) 330, a control unit (Controller) 340.

Referring to the circuit diagram of the charge pump control system 300 of FIG. 4, the charge pump 310 has an input terminal (Vin), an output terminal (VSP), a switching transistor group (311, 313, 315, 317), and a fly. A Flying Capacitor C ₀ and an Output Capacitor C _{1 are} used to switch an input voltage (Vin) by the switching transistor group to boost the input voltage (Vin).转换 Convert the output voltage to a preset voltage level.

The current detecting circuit 320 is coupled to the charging pump 310 to sense the input of the charging pump (Vin) and the output (VSP), and generate a detection signal (V _SENSE ) corresponding to the load. .

The state determining circuit 330 is coupled to the current detecting circuit 320, and generates a determining signal (V _C ) according to the detecting signal (V _SENSE ) generated by the current detecting circuit.

The control unit 340 is coupled to the charge pump 310 and the state determination circuit 330. The control unit 340 receives an input control signal (M) and the determination signal (V _C ), and generates a signal according to the input control signal and the determination signal. The first group of switching signals, a second group of switching signals, a third group of switching signals, and a fourth group of switching signals are used to control the turning on and off of the switching transistor group of the charging pump 310.

4 is a circuit diagram of a charge pump control system 300 of the present invention that reduces switching losses. As shown in FIG. 4, the charge pump 310 has an input terminal (Vin), an output terminal (VSP), a switching transistor group (311, 313, 315, 317), and a flying capacitor (Flying Capacitor) C _{0 .} and an output capacitor voltage regulator (Decoupling capacitor) C _1, a first switch S1 and a second switch S2, the group of the switching transistor (311,313,315,317) coupled to the flying capacitor to the output C ₀ stabilizing capacitance C _1, with which the switching transistor group (311,313,315, 317) is turned on and off, the charge and discharge (charge / discharge) of the flying capacitor C _0, the output of the further stabilization capacitor ( decoupling Capacitor) C a first terminal (T11) ₁ produces a voltage corresponding to the magnification.

The foregoing switching transistor group (311, 313, 315, 317) includes first to fourth sub-switching groups 311, 313, 315, 317, and the first to fourth group switching signals A1~ AN, B1 to BN, E1 to EN, and D1 to DN are respectively applied to the first to fourth sub-switching transistor groups 311, 313, 315, and 317.

The first and the third sub-switching transistor groups 311, 315 are coupled to a first end T01 of the flying capacitor C ₀ , and the second and fourth sub-switching transistor groups 313 , 317 are coupled to the flying cross a second terminal of capacitor C T02 _0, and the output of the first regulator capacitor C is connected to terminal T11 ₁ to the output terminal (the VSP), and coupled to the third sub-group of the switching transistor 315, a second end thereof T12 is connected to a low potential (GND).

A first end T21 of the first switch S1 is coupled to the first end T01 of the flying capacitor C ₀ , and a second end T22 is coupled to the current detecting circuit 320 , a first of the second switch S2 Terminal T31 is coupled to the input terminal (Vin) and a second terminal T32 is coupled to the second terminal T22 of the first switch S1.

As shown in FIG. 4, the first sub-switching transistor group 311 includes N PMOS transistors MP11 to MP1N, and N is a positive integer. The gates of the N PMOS transistors MP11~MP1N are respectively connected to the first group of switching signals A1~AN. The sources of the N PMOS transistors MP11 to MP1N are connected to the input terminal (Vin). The drains of the N PMOS transistors MP11 to MP1N are connected to the first terminal T01 of the flying capacitor C ₀ . The widths (W/L ratio) of the transistors MP10 to MP1N in the first sub-switching transistor group 311 are the same.

The second sub-switching transistor group 313 includes N PMOS transistors MP21 to MP2N. The gates of the N PMOS transistors MP21~MP2N are respectively connected to the second group of switching signals B1~BN. The sources of the N PMOS transistors MP11 to MP1N are connected to the input terminal (Vin). The drains of the N PMOS transistors MP21 to MP2N are connected to the second terminal T02 of the flying capacitor C ₀ . The widths (W/L ratio) of the transistors MP21 to MP2N in the second sub-switching transistor group 313 are the same.

The third sub-switching transistor group 315 includes N PMOS transistors MP31 to MP3N. The gates of the N PMOS transistors MP31~MP3N are respectively connected to the third group of switching signals E1~EN. The sources of the N PMOS transistors MP31 MP MP3N are connected to the first terminal T01 of the flying capacitor C ₀ . The drains of the N PMOS transistors MP31 to MP3N are connected to the output terminal (VSP). The widths (W/L ratio) of the transistors MP31 to MP3N in the third sub-switching transistor group 315 are the same.

The fourth sub-switching transistor group 317 includes N NMOS transistors MN11 MN MN1N. The gates of the N NMOS transistors MN11 MV MV1N are respectively connected to the fourth group of switching signals D1 DN DN. The sources of the N NMOS transistors MN11 MV MV1N are connected to a low potential (GND). The drains of the N NMOS transistors MN11 MV MV1N are connected to the second terminal T02 of the flying capacitor C ₀ . The widths (W/L ratio) of the transistors MN11 to MV1N in the fourth sub-switching transistor group 317 are the same.

The current detecting circuit 320 includes an operational amplifier (amplifier) 321 , a first detecting transistor 323 , a second detecting transistor 325 , and an impedance 327 . The source of the first detecting transistor 323 is connected to the input terminal (Vin), the gate thereof is connected to the low potential (GND), and the drain is connected to the drain of the second detecting transistor 325 and the gate a non-inverting input terminal (+) of the operational amplifier 321 , an inverting input terminal (−) of the operational amplifier 321 is connected to the second terminal T22 of the first switch S1 , and an output terminal thereof is connected to the second terminal A gate of the detecting transistor 325 is connected. The source of the second detecting transistor 325 is connected to a first end of the impedance 327, and a second end of the impedance 327 is connected to the low potential (GND). Since the first detecting transistor 323 is a PMOS transistor and the gate thereof is connected to the low potential (GND), the first detecting transistor 323 is always in an on state, so the first detecting transistor 323 The voltage of the source is the voltage at the input (Vin). The operational amplifier 321 compares the voltage of the input terminal (Vin) with the voltage of the second terminal T22 of the first switch S1 to generate the detection signal (V _SENSE ).

The state judging circuit 330 includes at least one comparator and at least one reference reference, and the at least one comparator is configured to output the detecting signal and the at least one reference level to the current detecting circuit 320. (Voltage reference) to make a comparison, and then generate the judgment signal.

The control unit 340 controls the first group of switching signals A1~AN, the second group of switching signals B1~BN, the third group of switching signals E1~EN, and the fourth group of switching signals D1 in a first phase. ~DN for charging the flying capacitor C ₀ by the first end of the flying capacitor. The control unit 340 controls the first group of switching signals A1~AN, the second group of switching signals B1~BN, the third group of switching signals E1~EN, and the fourth group of switching signals in a second phase. D1~DN for charging the flying capacitor by the second end of the flying capacitor C ₀ .

In the first phase (Phase 1), the second and third sub-switching transistor groups 313 and 315 are turned off, and at least one of the first and fourth sub-switching transistor groups 311 and 317 is switched. Turn on. At this time, the input voltage (VIN) is stored on the flying capacitor C ₀ . In the second phase (Phase 2), the first and fourth sub-switching transistor groups 311, 317 are all turned off, and the second and third sub-switching transistor groups 313, 315 are at least one switching transistor turned on. . At this time, the voltage (VIN) stored in the first phase (Phase 1) to the flying capacitor C ₀ is transmitted to the output terminal (VSP), and the PMOS transistor of the second sub-switching transistor group 313 is added. The MP21~MP2N terminal is also connected to the input voltage (VIN), and the output voltage (VSP) will be twice the input voltage (VIN).

In this embodiment, the width-to-length ratio (W/L ratio) of the transistors in the first sub-switching transistor group is the same, and the width-to-length ratio of the transistors in the second sub-switching transistor group (W/L) The ratio is the same, the width-to-length ratio (W/L ratio) of the transistors in the third sub-switching transistor group is the same, and the width-to-length ratio (W/L ratio) of the transistors in the fourth sub-switching transistor group is the same The same, therefore, when a transistor is turned on, a current I can be supplied, and when the transistor is fully turned on, a current N × I can be supplied. When in heavy load, the relevant transistors can all be turned on to enable a large current (eg, N×I) to charge the flying capacitor C ₀ . When at light load, only a portion of the transistor can be turned on to charge a small current (eg, 1×I) to the flying capacitor C ₀ .

During the switching process, when the PMOS transistor MP11 is turned on, the corresponding PMOS transistor MP21 is turned off, so the first switch S1 will be turned on, and the second switch S2 is turned off, and the current detecting circuit 320 will be turned off. The current and voltage flowing through the switching transistor are sensed, wherein the sensing switching transistor can be any switching transistor in the switching transistor group, and the detection signal corresponding to the load is generated (V _SENSE ).

The state determination circuit 330 receives the detection signal (VSENSE). The state judging circuit 330 includes at least one comparator and at least one reference reference, wherein the at least one comparator outputs the detection signal (V _SENSE ) output by the current detecting circuit 320 At least one reference reference is compared to generate the determination signal Vc.

The number K of comparators of the state determination circuit 330 is related to the number of N transistors in the sub-switching transistor group, wherein it can be expressed by the formula K = log ₂ ( N ). For example, when there are 8 transistors in the sub-switching transistor group, three comparators are required at this time. The state determining circuit 330 generates a K-bit of the determination signal (Vc) according to the detection signal (V _SENSE ) and the reference level (V _REF1 ~V _REFK ), where K is the number of comparators, A decision signal (Vc) connection is applied to the control unit for generating a corresponding control signal, and is also used to determine how much transistor to be turned on or off for optimal performance.

When the PMOS transistor MP11 is turned off, the corresponding PMOS transistor MP21 is turned on, so the first switch S1 will be turned off, and the second switch S2 is turned on, and there is no need to sense the switching transistor voltage. Flow to avoid malfunctions.

Since the most important factor affecting the efficiency of the charge pump is the conduction loss (Conduction Loss), the most influential factor at the light load is the switching loss (Switching Loss), so more transistor conduction is used during heavy load. In order to reduce its conduction loss and use less transistor conduction at light loads to reduce its switching loss, thereby improving the conversion efficiency of the charge pump at light loads.

In this embodiment, the width-to-length ratio (W/L ratio) of the transistors in the switching transistor group is the same. In other embodiments, the first sub-switching transistor group to the fourth sub-switching transistor group are The width-to-length ratio of the transistor can also be a binary weight, and the corresponding control signal can be completed by those skilled in the art based on the foregoing description of the present invention, and therefore will not be described again.

Figure 5 is a circuit diagram of a 2-bit charge pump control system 300 that reduces switching losses. As shown in FIG. 5, the state judging circuit 330 uses two comparators for generating the 2-bit decision signal Vc.

Figure 6 is a flow chart showing a method of controlling a charge pump of the present invention. Please refer to the circuit diagram of the aforementioned charge pump control system 300. First, in step (A), a current detecting circuit (Current Sensing) 320 is used to detect a current of a charge pump 310, and the current detecting circuit 320 generates a corresponding charging pump (Charge Pump). One of the 310 detection signals V _SENSE , wherein the charge pump 310 has a switching transistor group.

In the step (B), a state detection circuit (Status Detector) 330 is used to generate a determination signal Vc according to the detection signal V _SENSE generated by the current detection circuit 320.

In the step (C), a control unit (Controller) 340 is used to receive an input control signal (M) and the determination signal Vc, and generate a first according to the input control signal (M) and the determination signal (Vc). a switching signal A1~AN, a second group of switching signals B1~BN, a third group of switching signals E1~EN, and a fourth group of switching signals D1~DN to control the switching transistor of the charging pump 310 The group is turned on and off, wherein the control unit 340 is responsive to an output (VSP) load of the charge pump 310 to turn on the number of transistors in the switching transistor group. When the output load is large, more switching transistors in the switching transistor group are turned on, and when the output terminal is small, fewer switching transistors in the switching transistor group are turned on.

Comparing the prior art of FIG. 2 with the technique of FIG. 4, the conventional technology uses the same current to charge the flying capacitor regardless of the load or the load, and the load is not taken into consideration, which easily causes switching loss. However, in the present invention, when the load at the output is large, more switching transistors in the switching transistor group are turned on, charging the flying capacitor with a larger current, and when the output is under load, the switching transistor There are fewer switching transistors in the group that are turned on, charging the flying capacitors with a smaller current, thereby reducing switching losses.

It can be seen from the above description that the present invention is a circuit and method for improving light load efficiency by adding a light-load improvement function to a switched charge pump, thereby reducing switching power. The switching loss generated by the crystal when switching the clock. The invention will charge the pump The switching transistor is subdivided into four sub-switching transistors, and the current detecting circuit 320 is used to detect the current load. The current detecting circuit 320 generates a signal corresponding to one of the loads according to the magnitude of the current flowing through the switching transistor. The control unit 340 further controls the number of required operations of the sub-switching transistor, and causes more sub-switching transistors to operate during a large load, and reduces the number of sub-switching transistor operations at a small load, thereby switching the control circuit. Loss, so you can achieve the function of improving light load efficiency.

The above-mentioned embodiments are merely examples for convenience of description, and the scope of the claims is intended to be limited to the above embodiments.

310‧‧‧Charging pump

320‧‧‧ Current detection circuit

330‧‧‧State Judgment Circuit

340‧‧‧Control unit

311, 313, 315, 317‧‧‧ first to fourth sub-switching transistor groups

321‧‧‧Operational Amplifier

323‧‧‧First detection transistor

325‧‧‧Second detection transistor

327‧‧‧ Impedance

Claims (19)

A charge pump control system capable of reducing switching loss, comprising: a charge pump having an input end, an output end, and a switching transistor group, wherein an input voltage is switched by using the switching transistor group for The voltage of the input terminal is boosted, and the voltage of the output terminal is converted to a predetermined voltage level; a current detecting circuit is coupled to the charging pump for sensing the input end of the charging pump and the output The load of the terminal, which in turn generates a detection signal corresponding to the load; a state determination circuit is coupled to the current detection circuit, and generates a determination signal according to the detection signal generated by the current detection circuit; a control unit coupled to the charge pump and the state determination circuit for generating a first set of switching signals, a second set of switching signals, and a third set of switching signals according to the input control signal and the determining signal And a fourth group of switching signals to control the turning on and off of the switching transistor group of the charge pump. The charge pump control system capable of reducing switching loss as described in claim 1 wherein the charge pump further comprises a flying capacitor and an output voltage stabilizing capacitor, the switching transistor group being coupled to the flying capacitor and the The output voltage stabilizing capacitor is used to charge and discharge the flying capacitor by using the switching transistor group to be turned on and off, and a voltage corresponding to the power is generated at a first end of the output voltage stabilizing capacitor. The charge pump control system capable of reducing switching loss as described in claim 2, wherein the switching transistor group includes a first sub-switching transistor group to a fourth sub-switching transistor group, the first group The switching signal to the fourth group of switching signals respectively connect the first sub-switching transistor group to the fourth sub-switching transistor group. The charge pump control system capable of reducing switching loss as described in claim 3, wherein the first sub-switching transistor group and the third sub-switching transistor group are coupled to a first end of the flying capacitor The second and fourth sub-switching transistor groups are coupled to a second end of the flying capacitor, and the first end of the output stabilizing capacitor is coupled to the output and coupled to the third sub-switching In the crystal group, the second end of the output voltage stabilizing capacitor is connected to a low potential. The charge pump control system as claimed in claim 4, wherein the charge pump further comprises a first switch and a second switch, a first end of the first switch being coupled to the fly a second end of the first switch is coupled to the current detecting circuit, and a first end of the second switch is coupled to the input end, and a second end of the second switch is coupled To the second end of the first switch. The charge pump control system capable of reducing switching loss as recited in claim 5, wherein the control unit controls the first group of switching signals, the second group of switching signals, and the third The group switching signal and the fourth group of switching signals are used to charge the flying capacitor by the first end of the flying capacitor, and the control unit controls the first group of switching signals in a second phase, The second group of switching signals, the third group of switching signals, and the fourth group of switching signals are used to charge the flying capacitor by the second end of the flying capacitor. The charge pump control system capable of reducing switching loss as described in claim 6 wherein, in the first phase, the second sub-switching transistor group and the third sub-switching transistor group are turned off. At least one switching transistor of the first sub-switching transistor group and the fourth sub-switching transistor group is turned on. The charge pump control system capable of reducing switching loss as described in claim 7 wherein, in the second phase, the first sub-switching transistor group and the fourth sub-switching transistor group are turned off. At least one switching transistor of the second sub-switching transistor group and the third sub-switching transistor group is turned on. The charge pump control system for reducing switching loss as described in claim 3, wherein the current detecting circuit comprises an operational amplifier, a first detecting transistor, a second detecting transistor, and a An impedance, wherein a source of the first detecting transistor is connected to the input end, a gate of the first detecting transistor is connected to the low potential, and a drain of the first detecting transistor is connected to the a second detection transistor having a drain and a non-inverting input of the operational amplifier, an inverting input of the operational amplifier being coupled to the second end of the first switch, an output of the operational amplifier being coupled to a gate of the second detecting transistor, a source of the second detecting transistor is connected to a first end of the impedance, and a second end of the impedance is connected to the low potential. a charge pump control system capable of reducing switching loss as recited in claim 9 wherein the operational amplifier compares the input voltage (Vin) with the voltage of the second end of the first switch to generate the Detection signal. A charge pump control system capable of reducing switching loss as recited in claim 9 wherein the state determination circuit includes at least one comparator and at least one reference level, the at least one comparator outputting the current detection circuit The detection signal is compared with the at least one reference level to generate the determination signal. The charge pump control system capable of reducing switching loss as described in claim 3, wherein the width and length ratio of the transistors in the first sub-switching transistor group are the same, and the second sub-switching transistor group The width-to-length ratio of the transistor is the same, the width-to-length ratio of the transistors in the third sub-switching transistor group is the same, and the width-to-length ratio of the transistors in the fourth sub-switching transistor group is the same. A charge pump control system capable of reducing switching loss as described in claim 3, wherein a width-to-length ratio of a transistor in the first sub-switching transistor group is binary weighting, and the second sub-switching transistor group The width to length ratio of the inner transistor is binary weighted, and the width to length ratio of the transistor in the third sub-switching transistor group Binary weighting, and the width to length ratio of the transistors in the fourth sub-switching transistor group are binary weighted. A charge pump control system capable of reducing switching loss as recited in claim 11 wherein, when the load at the output is large, a plurality of switching transistors in the switching transistor group are turned on, and when the output is When the load on the terminal is small, fewer switching transistors in the switching transistor group are turned on. A charge pump control system capable of reducing switching loss as described in claim 11 wherein, when the output terminal is heavily loaded, the transistors of the switching transistor group are all turned on for enabling a large current to The flying capacitor is charged, and when the output is lightly loaded, a portion of the transistor in the switching transistor group is turned on to allow a smaller current to charge the flying capacitor. A charging pump control method includes the steps of: (A) detecting a current of a charging pump by using a current detecting circuit, and generating a detection signal corresponding to the charging pump via the current detecting circuit, wherein the charging The pump has a switching transistor group; (B) using a state determining circuit to generate a determining signal according to the detecting signal generated by the current detecting circuit; and (C) using a control unit to receive an input control signal And the determining signal, and generating, according to the input control signal and the determining signal, a first group of switching signals, a second group of switching signals, a third group of switching signals, and a fourth group of switching signals for controlling the The switching transistor group of the charge pump is turned on and off. The control method of the charging pump according to claim 16, wherein the control unit is configured to turn on the number of transistors in the switching transistor group according to a load of an output end of the charging pump. The method for controlling a charging pump according to claim 17, wherein when the load at the output end is large, the switching transistor group has more The switching transistor is turned on, and when the load at the output is small, fewer switching transistors are turned on in the switching transistor group. The method for controlling a charging pump according to claim 17, wherein when the output terminal is heavily loaded, the transistors of the switching transistor group are all turned on, so that a large current is applied to the flying capacitor. Charging, and when the output is lightly loaded, a portion of the transistors in the switching transistor group are turned on to allow a smaller current to charge the flying capacitor.