TWI497174B - Multi-domain vertical alignment liquid crystal display panel - Google Patents

Description

Multi-zone vertical alignment liquid crystal display panel

The present invention relates to a multi-region vertical alignment liquid crystal display panel, and more particularly to a multi-region vertical alignment liquid crystal display panel which utilizes a bump pattern to improve the alignment of liquid crystal molecules and a transparent electrode pattern to improve electric field distribution.

With the introduction of large-size liquid crystal display panels, liquid crystal display panels must have wide viewing angle characteristics to meet the needs of use. Therefore, a multi-domain vertical alignment (MVA) liquid crystal display panel having a wide viewing angle characteristic has become a mainstream product of a large-sized flat display panel.

Please refer to FIG. 1 , which is a schematic diagram of a conventional multi-region vertical alignment liquid crystal display panel. As shown in FIG. 1 , the multi-region vertical alignment liquid crystal display panel 10 includes a first substrate 12 and a second substrate 14 , and liquid crystal molecules 16 are filled between the first substrate 12 and the second substrate 14 . The first substrate 12 includes a plurality of thin film transistors (not shown), a plurality of pixel electrodes 18 are disposed on the first substrate 12, a plurality of first bumps 20 are disposed on the pixel electrodes 18, and a first The alignment film 22 covers the first bump 20 and the pixel electrode 18. The second substrate 14 includes a common electrode 24 and a plurality of second bumps 26, and a second alignment film 28 covers the second bumps 26 and the common electrode 24.

As shown in FIG. 1, by the arrangement of the first bumps 20 and the second bumps 26, the liquid crystal molecules 16 are tilted in different directions in the pixel regions of the multi-region vertical alignment liquid crystal display panel 10, so that one can be The pixel area forms a plurality of display areas. In this way, a wide viewing angle can be obtained.

Although the conventional multi-region vertical alignment liquid crystal display panel has a wide viewing angle, the arrangement of liquid crystal molecules is affected by the structure of the bumps in the vicinity of the bump structure, and it is easy to cause image retention when displaying a picture. Please refer to FIG. 2, which illustrates the image sticking phenomenon of the conventional multi-region vertical alignment liquid crystal display panel. As shown in FIG. 2, in the case where the conventional multi-region vertical alignment liquid crystal display panel is to sequentially display the black screen D1, the gray screen D2, the black and white mosaic screen D3, and the white screen D4, the white screen D4 is not aligned by the liquid crystal molecules. It is not good to display properly, but it causes image sticking.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-region vertical alignment liquid crystal display panel which utilizes a bump pattern to improve alignment ability of liquid crystal molecules and which utilizes a transparent electrode pattern to improve electric field distribution.

In order to achieve the above object, the present invention provides a multi-region vertical alignment liquid crystal display panel comprising an array substrate, a color filter substrate, arranged in parallel with the array substrate, and a plurality of transparent electrode patterns disposed on the array substrate surface. One side of the color filter substrate. The array substrate includes a plurality of scan lines and a plurality of data lines, and the scan lines and the data lines define a plurality of pixel regions on the array substrate. Each of the transparent electrode patterns corresponds to each of the pixel regions, and each of the transparent electrode patterns includes a V-shaped slit having two outer end points and an intermediate end point, and the two outer end points are oriented The same data line, and the intermediate end point are generally located between the two adjacent data lines, and the intermediate end point and the two adjacent data lines respectively have a distance. Furthermore, the V-shaped slit further has a plurality of fine slits located at an inner side and an outer side of the V-shaped slit, wherein the outer side of the V-shaped slit is adjacent to the data line The fine slits have different lengths.

To achieve the above objective, the present invention provides a multi-region vertical alignment liquid crystal display panel comprising an array substrate, a color filter substrate, arranged in parallel with the array substrate, and a plurality of bump patterns disposed on the color filter. The sheet substrate faces one side of the array substrate. The array substrate includes a plurality of scan lines and a plurality of data lines, and the scan lines and the data lines define a plurality of pixel regions on the array substrate. Each of the bump patterns includes a main bump corresponding to each of the pixel regions, and at least one bump wing corresponding to the data line or the scan line, and connected to at least one end of the main bump, and each The main bump includes a first protrusion connected to one side of each of the main bumps.

The following is a detailed description of the invention and the accompanying drawings. However, the drawings are for reference only and are not intended to limit the invention.

Please refer to FIG. 3 to FIG. 6 . FIG. 3 to FIG. 6 are schematic diagrams showing the layout of a multi-region vertical alignment liquid crystal display panel according to a preferred embodiment of the present invention, wherein FIG. 3 is a layout diagram of the array substrate, FIG. 4 . FIG. 5 is a schematic view showing the layout of the color filter substrate, and FIG. 6 is a schematic view showing the layout of the color filter substrate and the array substrate. It is worth noting that in order to highlight the features of the present invention, only the single pixel region is illustrated in Figures 3 through 6. As shown in FIG. 3 to FIG. 6 , the multi-region vertical alignment liquid crystal display panel 80 of the present embodiment includes an array substrate 30 , a color filter substrate 50 and an array substrate 30 arranged in parallel, and a liquid crystal layer (not shown). Shown between the array substrate 30 and the color filter substrate 50.

As shown in FIG. 3, the array substrate 30 includes a plurality of scan lines 32, 32' and a plurality of data lines 34, 34'. The scan lines 32, 32' and the data lines 34, 34' define a plurality on the array substrate 30. The pixel area 36. Each of the pixel regions 36 further includes a plurality of storage capacitor bus lines 38 disposed in parallel with the scan lines 32, 32' and extending through the pixel regions 36.

The array substrate 30 further includes a plurality of transparent electrode patterns 40 disposed on one side of the array substrate 30 facing the color filter substrate 50 and corresponding to each of the pixel regions 36. Each transparent electrode pattern 40 includes a plurality of slits obliquely intersecting the scan lines 32, 32' and the data lines 34, 34', wherein the slits comprise V-shaped slits symmetrically to the storage capacitor wires 38. (V-shaped slit) 42, and a strip slit, wherein the V-shaped slit 42 has a complete V-shape. As shown in Fig. 4, the V-shaped slit 42 has two outer end points 42a, 42b and an intermediate end point 42c, and the two outer end points 42a, 42b of the V-shaped slit 42 are oriented toward the data line 34', and in the middle. The end point 42c is generally located between the two adjacent data lines 34, 34', and the intermediate end point 42c has a distance from the adjacent data lines 34, 34'. The inner side 421 and the outer side 422 of the V-shaped slit 42 each include a plurality of fine slits 44 distributed on the inner side 421 and the outer side 422 of the V-shaped slit 42, wherein the V-shaped The fine slits 44 on the outer side 422 of the slit 42 and adjacent to the data line 34' have different lengths. More precisely, the fine slits 44 have a length that is incremented and then decreased in this region, i.e., the fine slits 44 closer to the data line 34' have varying lengths. Also, one of the outer sides is parallel to the data line, and the thin slits located at the outer side of the V-shaped slit and adjacent to the outer end have different lengths. Further, the fine slits 44 are completely distributed in this portion of the inner side 421 and the outer side 422 of the V-shaped slit 42. In the present embodiment, the fine slits 44 located on the inner side 421 of the V-shaped slit 42 have different lengths of design, but are not limited thereto and may be designs having the same length. In addition, the other slits of the transparent electrode pattern 40 may also include a design of fine slits as needed. Further, as shown in FIG. 3, in the left dotted line areas A10 and A11, the fine slits 44 have a length which is incremented and then decreased, that is, the fine slit 44 which is closer to the data line 34 has a varying length, the dotted line area A10 and The fine slits 44 in the dashed area A11 may be symmetric structures that are symmetric to the storage capacitor wires 38.

As shown in FIG. 5, the color filter substrate 50 includes a black matrix pattern 52 corresponding to the scan lines 32, 32' of the array substrate 30, the data lines 34, 34' and the storage capacitor wires 38, and a plurality of bumps. The pattern 54 is disposed on one side facing the array substrate 30. Each bump pattern 54 includes at least one main bump 54a corresponding to each pixel region 36, and at least one bump wing 54b corresponding to each data line 34, 34' or each scan line 32, 32', the bump wing 54b is coupled to at least one end of the main bump 56a, and the main bump 54a and the bump wing 54b have an acute angle α. The main bump 54a includes a first protrusion 56a connected to one side 541 of the main bump 54a, and the distance d1 of the first protrusion 56a from the end point of the corresponding main bump 54a is about 8 to 15 micrometers. And preferably 10 microns. The main protrusion 54a further includes a second protrusion 56b connected to the same side 541 of the main protrusion 54a and the first protrusion 56a, and the distance d2 of the second protrusion 56b from the corresponding first protrusion 56a. It is about 20 to 50 microns and is preferably 27 to 30 microns.

In addition, the main protrusion 54a further includes a third protrusion 56c and a fourth protrusion 56d connected to the other side 542 of the main protrusion 54a relative to the first protrusion 56a and the second protrusion 56b, and The three protrusions 56c are disposed corresponding to the first protrusions 56a, and the fourth protrusions 56d are disposed corresponding to the second protrusions 56b. In this embodiment, the length of the first protrusion 56a, the second protrusion 56b, the third protrusion 56c and the fourth protrusion 56d is about 1.5 micrometers, but is not limited thereto, and the cross-sectional or top-view shape thereof may be Rectangular, triangular, polygonal or semi-circular, etc., while the first protrusion 56a, the second protrusion 56b, the third protrusion 56c and the fourth protrusion 56d may have the same shape or different shapes.

As shown in FIG. 6, the bump pattern 54 of the color filter substrate 50 is provided corresponding to the transparent electrode pattern 40 of the array substrate 30. To be precise, the main bumps 54a of the bump patterns 54 are arranged in a parallel staggered manner with the slits of the transparent electrode patterns 40.

Please refer to FIG. 7 and FIG. 8 together with reference to FIG. 6. FIG. 7 is a cross-sectional view of the multi-zone vertical alignment liquid crystal display panel 80 of the present invention taken along line AA' of FIG. 6, FIG. A cross-sectional view of the multi-region vertical alignment liquid crystal display panel 80 of the present invention along a tangent line BB' of FIG. As shown in FIG. 7, in a region farther from the data line 34', the main bump 54a is located directly above the transparent electrode pattern 40, that is, the main bump 54a and the V-shaped slit 42 are staggered. The liquid crystal layer 82 disposed between the array substrate 30 and the color filter substrate 50 is formed in a multi-region alignment. As shown in Fig. 8, in the region closer to the data line 34', since the length of the fine slit 44 is increased, the main bump 54a is aligned with the edge of the transparent electrode pattern 40 to exert an effect of improving the electric field distribution.

In summary, the present invention has a design of protrusions at specific positions of the bump pattern, and this design helps the liquid crystal molecules to pour to a predetermined position when a voltage is applied, so that the liquid crystal molecules are not arranged poorly. . In addition, the present invention adds a fine slit design with an increasing length near the data line, which can effectively reduce the influence of the transverse electric field at the edge of the transparent electrode pattern, and can also effectively improve the alignment of the liquid crystal molecules. It is worth noting that the bump design and subtlety of the present invention are The slit design can be applied separately depending on the requirements, or applied to a multi-zone vertical alignment liquid crystal display panel.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10‧‧‧Multi-zone vertical alignment LCD panel

12‧‧‧First substrate

14‧‧‧second substrate

16‧‧‧liquid crystal molecules

18‧‧‧ pixel electrodes

20‧‧‧First bump

22‧‧‧First alignment film

24‧‧‧Common electrode

26‧‧‧second bump

28‧‧‧Second alignment film

30‧‧‧Array substrate

32, 32'‧‧‧ scan lines

34, 34’‧‧‧Information line

36‧‧‧Photo District

38‧‧‧Storage capacitor wire

40‧‧‧Transparent electrode pattern

42‧‧‧V-shaped slit

42a, 42b‧‧‧ outer end points

42c‧‧‧ intermediate endpoint

421‧‧‧ inside side

422‧‧‧ outside side

44‧‧‧Small slits

50‧‧‧Color filter substrate

52‧‧‧Black matrix pattern

54‧‧‧Bump pattern

54a‧‧‧ main bumps

54b‧‧‧Bumped Wings

541‧‧‧ side

542‧‧‧ side

56a‧‧‧First protrusion

56b‧‧‧Second protrusion

56c‧‧‧ Third protrusion

56d‧‧‧fourth protrusion

80‧‧‧Multi-zone vertical alignment LCD panel

82‧‧‧Liquid layer

A10, A11‧‧‧ dotted area

FIG. 1 is a schematic view of a conventional multi-region vertical alignment liquid crystal display panel.

Figure 2 illustrates the image sticking phenomenon of a conventional multi-region vertical alignment liquid crystal display panel.

3 to 6 are schematic views showing the layout of a multi-region vertical alignment liquid crystal display panel according to a preferred embodiment of the present invention.

Figure 7 is a cross-sectional view showing the multi-zone vertical alignment liquid crystal display panel of the present invention taken along a tangent AA' of Fig. 6.

Figure 8 is a cross-sectional view of the multi-zone vertical alignment liquid crystal display panel of the present invention taken along line BB' of Figure 6.

32, 32’. . . Scanning line

34, 34’. . . Data line

36. . . Graphic area

38. . . Storage capacitor wire

40. . . Transparent electrode pattern

42. . . V-shaped slit

44. . . Fine slit

52. . . Black matrix pattern

54. . . Bump pattern

54a. . . Main bump

54b. . . Bump wing

56a. . . First protrusion

56b. . . Second protrusion

56c. . . Third protrusion

56d. . . Fourth protrusion

80. . . Multi-zone vertical alignment liquid crystal display panel

Claims (4)

A multi-region vertical alignment liquid crystal display panel comprises: an array substrate comprising a plurality of scan lines and a plurality of data lines, wherein the scan lines and the data lines define a plurality of pixel regions on the array substrate; a filter substrate disposed in parallel with the array substrate; a liquid crystal layer disposed between the array substrate and the color filter substrate; and a plurality of transparent electrode patterns disposed on the array substrate facing the color filter One side of the substrate corresponds to each of the pixel regions, and each of the transparent electrode patterns includes a V-shaped slit having two outer end points and one intermediate end point, and the two outer end points are oriented toward the same The data line, and the intermediate end point is substantially located between the two adjacent data lines, and the intermediate end point and the two adjacent data lines respectively have a distance, the V-shaped slit includes a plurality of fine slits distributed on one inner side and one outer side of the V-shaped slit, one of the outer sides being parallel to the data lines, wherein the outer side of the V-shaped slit is located This part is close to the The outer end of such fine slits have different lengths. The multi-zone vertical alignment liquid crystal display panel of claim 1, wherein the lengths of the fine slits located on the outer side of the V-shaped slit and adjacent to the data line are incremented. The multi-zone vertical alignment liquid crystal display panel of claim 1, wherein the array substrate further comprises a plurality of storage capacitor wires parallel to the scan lines and penetrating the pixel regions, and the V-shaped slits are Symmetrical to the storage capacitor wires. The multi-zone vertical alignment liquid crystal display panel of claim 1, wherein the fine slits are completely distributed on the inner side and the outer side of the V-shaped slit.