TWI490676B - Current calibration circuit and current calibration method for adjusting current input generated from current source, and ramp generator - Google Patents

Current calibration circuit and current calibration method for adjusting current input generated from current source, and ramp generator Download PDF

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TWI490676B
TWI490676B TW102126341A TW102126341A TWI490676B TW I490676 B TWI490676 B TW I490676B TW 102126341 A TW102126341 A TW 102126341A TW 102126341 A TW102126341 A TW 102126341A TW I490676 B TWI490676 B TW I490676B
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current
input
switch control
control signal
switch
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TW102126341A
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TW201504781A (en
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Ping Hung Yin
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Himax Imaging Inc
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調整電流源所產生之電流輸入的電流校正電路及電流校正方 法,以及斜波產生器Current correction circuit and current correction method for adjusting current input generated by current source Method, and ramp generator

本發明係關於電流校正,尤指一種用以調整電流源所產生之電流輸入的電流校正電路,以及其相關的電流校正方法及斜波產生器。The present invention relates to current correction, and more particularly to a current correction circuit for adjusting the current input generated by a current source, and its associated current correction method and ramp generator.

斜波產生器(ramp generator)的斜波線性度(ramp linearity)及斜波斜率(ramp slope)之準確性可藉由提供穩定的電流源來提升。由於能帶隙參考電壓(bandgap reference voltage)可提供穩定的電壓源,故可透過電阻性元件來將能帶隙參考電壓轉換為所需之電流,然而,電阻性元件之阻抗值仍會產生些微的變化,造成依據能帶隙參考電壓所產生之電流亦有所變動,進而影響斜波產生器的性能。The ramp linearity of the ramp generator and the accuracy of the ramp slope can be improved by providing a stable current source. Since the bandgap reference voltage provides a stable voltage source, the bandgap reference voltage can be converted to the required current through the resistive element. However, the resistance value of the resistive element still slightly The change causes the current generated by the bandgap reference voltage to also vary, which in turn affects the performance of the ramp generator.

因此,需要一種可使電流源穩定地提供電流輸入的設計機制,來解決上述問題。Therefore, there is a need for a design mechanism that allows a current source to stably provide a current input to solve the above problems.

有鑒於此,本發明的目的之一在於提供一種用以調整電流源所產生之電流輸入的電流校正電路,以及其相關的電流校正方法及斜波產生器,來解決上述問題。In view of the above, it is an object of the present invention to provide a current correcting circuit for adjusting a current input generated by a current source, and a related current correcting method and a ramp generator to solve the above problems.

依據本發明之一實施例,其揭示一種用以調整一電流源所產生之一電流輸入的電流校正電路。該電流校正電路包含一處理功能方塊以及一調整功能方塊。該處理功能方塊係耦接於該電流源,用以接收一預定參考電壓輸入及該電流輸入,並依據該預定參考電壓輸入與該電流輸入來產生一處理結果。該調整功能方塊係耦接於該處理功能方塊及該電流源,用以依據該處理結果來產生一調整訊號至該電流源以調整該電流輸入,以使該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值。In accordance with an embodiment of the invention, a current correction circuit for adjusting a current input generated by a current source is disclosed. The current correction circuit includes a processing function block and an adjustment function block. The processing function block is coupled to the current source for receiving a predetermined reference voltage input and the current input, and generating a processing result according to the predetermined reference voltage input and the current input. The adjustment function block is coupled to the processing function block and the current source for generating an adjustment signal to the current source to adjust the current input according to the processing result, so that the current input is different from the predetermined reference voltage. There is a predetermined ratio between the sizes of the inputs.

依據本發明之另一實施例,其另揭示一種用以調整一電流源所產生之一電流輸入的電流校正方法。電流校正方法包含下列步驟:依據一預定參考電壓輸入與該電流輸入來產生一處理結果;以及依據該處理結果來產生一調整訊號至該電流源以調整該電流輸入,以使該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值。According to another embodiment of the present invention, a current correction method for adjusting a current input generated by a current source is disclosed. The current calibration method includes the steps of: generating a processing result according to a predetermined reference voltage input and the current input; and generating an adjustment signal to the current source according to the processing result to adjust the current input to make the current input There is a predetermined ratio between the magnitude of the predetermined reference voltage input.

依據本發明之另一實施例,其另揭示一種斜波產生器。該斜波產生器包含一電流源、一電流校正電路以及一斜波產生電路。該電流源係用以產生一電流輸入。該電流校正電路係用以調整該電流源所產生之該電流輸入。該斜波產生電路係耦接於該電流源,用以依據經由該電流校正電路調整後之該電流輸入來產生一斜波訊號。該電流校正電路包含一處理功能方塊以及一調整功能方塊。該處理功能方塊係耦接於該電流源,用以接收一預定參考電壓輸入及該電流輸入,並依據該預定參考電壓輸入與該電流輸入來產生一處理結果。該調整功能方塊係耦接於該處理功能方塊及該電流源,用以依據該處理結果來產生一調整訊號至該電流源以調整該電流輸入,以使該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值。According to another embodiment of the present invention, a ramp generator is further disclosed. The ramp generator includes a current source, a current correction circuit, and a ramp generation circuit. The current source is used to generate a current input. The current correction circuit is configured to adjust the current input generated by the current source. The ramp generating circuit is coupled to the current source for generating a ramp signal according to the current input adjusted by the current correcting circuit. The current correction circuit includes a processing function block and an adjustment function block. The processing function block is coupled to the current source for receiving a predetermined reference voltage input and the current input, and generating a processing result according to the predetermined reference voltage input and the current input. The adjustment function block is coupled to the processing function block and the current source for generating an adjustment signal to the current source to adjust the current input according to the processing result, so that the current input is different from the predetermined reference voltage. There is a predetermined ratio between the sizes of the inputs.

本發明所揭示之電流校正電路可依據預定參考電壓輸入(例如, 能帶隙參考電壓)來調整電流輸入,進而降低/消弭電阻性元件之變動對電流輸入的影響,故可提升斜波產生器的性能(例如,斜波線性度或斜波斜率)。The current correction circuit disclosed in the present invention can be input according to a predetermined reference voltage (for example, The bandgap reference voltage is used to adjust the current input, thereby reducing/reducing the effect of variations in the resistive component on the current input, thereby improving the performance of the ramp generator (eg, ramp linearity or ramp slope).

100、200、400‧‧‧電流校正電路100, 200, 400‧‧‧ current correction circuit

110、210、410‧‧‧處理功能方塊110, 210, 410‧‧‧ processing function blocks

120、220‧‧‧調整功能方塊120, 220‧‧‧Adjustment function block

212、412‧‧‧控制單元212, 412‧‧‧Control unit

214、414‧‧‧核心單元214, 414‧‧‧ core unit

216、226‧‧‧放大器216, 226‧ ‧ amplifier

600‧‧‧斜波產生器600‧‧‧ ramp generator

602‧‧‧斜波產生電路602‧‧‧ ramp generation circuit

CR‧‧‧電流源CR‧‧‧current source

SW1、SW2、SW3、SW4、SW5、SW6‧‧‧切換開關SW1, SW2, SW3, SW4, SW5, SW6‧‧‧ switch

C、C1、C2、C3‧‧‧電容C, C1, C2, C3‧‧‧ capacitor

NS、N1、N2‧‧‧端點NS, N1, N2‧‧‧ endpoints

V_R‧‧‧參考電壓端V_R‧‧‧ reference voltage terminal

P_1、P_2、P_A、P_B‧‧‧輸入埠P_1, P_2, P_A, P_B‧‧‧ input埠

P_OUT、P_C‧‧‧輸出埠P_OUT, P_C‧‧‧ output埠

第1圖為本發明廣義的電流校正電路之一實施例的功能方塊示意圖。BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a functional block diagram of one embodiment of a current correction circuit of the present invention.

第2圖為本發明用以調整一電流源所產生之一電流輸入的電流校正電路之一實施例的示意圖。Figure 2 is a schematic diagram of one embodiment of a current correction circuit for adjusting a current input generated by a current source.

第3圖為用來控制第2圖所示之複數個切換開關的複數個開關控制訊號之一實作範例的訊號時序圖。Figure 3 is a timing diagram of an example of a practical example of a plurality of switch control signals for controlling a plurality of switchers shown in Figure 2.

第4圖為本發明用以調整一電流源所產生之一電流輸入的電流校正電路之另一實施例的示意圖。Figure 4 is a schematic illustration of another embodiment of a current correction circuit for adjusting a current input generated by a current source.

第5圖為用來控制第4圖所示之複數個切換開關的複數個開關控制訊號之一實作範例的訊號時序圖。Figure 5 is a timing diagram of an example of a practical example of a plurality of switch control signals for controlling a plurality of switchers shown in Figure 4.

第6圖為本發明斜波產生器之一實施例的功能方塊示意圖。Figure 6 is a functional block diagram of an embodiment of a ramp generator of the present invention.

請參閱第1圖,第1圖係為本發明廣義的電流校正電路之一實施例的功能方塊示意圖。電流校正電路(current calibration circuit)100係用以調整一電流源CR所產生之一電流輸入I_IN,其包含一處理功能方塊(processing block)110以及一調整功能方塊(adjusting block)120。由第1圖可知,處理功能方塊110係耦接於電流源CR,用以接收一預定參考電壓輸入V_IN及電流輸入I_IN,並依據預定參考電壓輸入V_IN與電流輸入I_IN來產生一處理結果PR。調整功能方塊120係耦接於處理功能方塊110及電流源CR,用以依據處理結果PR來產生一調整訊號(adjusting signal)S_A至電流源CR以調整電流輸入I_IN,以使電流輸入I_IN的大小與預定參考電壓輸入V_IN的大小之間具有一預定比值。於一實作範例中,預定參考電壓輸入 V_IN可為一能帶隙參考電壓。Please refer to FIG. 1. FIG. 1 is a functional block diagram of an embodiment of a current correction circuit according to the present invention. The current calibration circuit 100 is used to adjust a current input I_IN generated by a current source CR, and includes a processing block 110 and an adjustment block 120. As shown in FIG. 1 , the processing function block 110 is coupled to the current source CR for receiving a predetermined reference voltage input V_IN and a current input I_IN, and generates a processing result PR according to the predetermined reference voltage input V_IN and the current input I_IN. The adjustment function block 120 is coupled to the processing function block 110 and the current source CR for generating an adjustment signal S_A to the current source CR according to the processing result PR to adjust the current input I_IN to input the current input I_IN. There is a predetermined ratio between the magnitude of the predetermined reference voltage input V_IN. In a practical example, a predetermined reference voltage input V_IN can be a bandgap reference voltage.

舉例來說(但本發明並不侷限於此),可將欲調整之電流輸入I_IN轉換為一電壓訊號,以及對預定參考電壓輸入V_IN與該電壓訊號進行比較來產生處理結果PR(例如,兩者之間的電壓差),接下來,調整功能方塊120會依據處理結果PR來產生調整訊號S_A(例如,一電壓訊號或一電流訊號)至電流源CR以調整電流輸入I_IN。於一實作範例中,電流輸入I_IN所對應之該電壓訊號的電壓值最後可被調整為等於預定參考電壓輸入V_IN的電壓值。於另一實作範例中,可透過將調整訊號S_A(例如,一電壓訊號或一電流訊號)傳遞至電流源CR之一電流鏡分支(current mirror branch)來調整電流輸入I_IN。請注意,以上僅供說明之需,並非用來做為本發明之限制,也就是說,只要是採用對一預定參考電壓輸入(例如,一能帶隙參考電壓)與欲調整之一電流輸入進行處理以產生一處理結果,進而依據該處理結果來產生一調整訊號至該電流源以調整該電流輸入,以使調整後之電流輸入維持在穩定的電流值(例如,該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值)的電流校正機制,均遵循本發明之發明精神。進一步的說明詳述如下。For example (but the invention is not limited thereto), the current input I_IN to be adjusted can be converted into a voltage signal, and the predetermined reference voltage input V_IN is compared with the voltage signal to generate a processing result PR (for example, two Next, the adjustment function block 120 generates an adjustment signal S_A (for example, a voltage signal or a current signal) to the current source CR according to the processing result PR to adjust the current input I_IN. In a practical example, the voltage value of the voltage signal corresponding to the current input I_IN may be finally adjusted to be equal to the voltage value of the predetermined reference voltage input V_IN. In another implementation example, the current input I_IN can be adjusted by transmitting an adjustment signal S_A (eg, a voltage signal or a current signal) to a current mirror branch of the current source CR. Please note that the above is for illustrative purposes only and is not intended to be a limitation of the present invention, that is, as long as it is used for a predetermined reference voltage input (for example, a bandgap reference voltage) and one of the current inputs to be adjusted. Processing is performed to generate a processing result, and according to the processing result, an adjustment signal is generated to the current source to adjust the current input, so that the adjusted current input is maintained at a stable current value (for example, the magnitude of the current input is A current correction mechanism having a predetermined ratio between the predetermined reference voltage inputs is in accordance with the inventive spirit of the present invention. Further explanation is detailed below.

請參閱第2圖,第2圖係為本發明用以調整一電流源CR所產生之一電流輸入I_IN的電流校正電路之一實施例的示意圖。電流校正電路200包含一處理功能方塊210以及一調整功能方塊220,其中第1圖所示之處理功能方塊110可採用處理功能方塊210來實作出,以及第1圖所示之調整功能方塊120可採用調整功能方塊220來實作出。處理功能方塊210包含一控制單元(control unit)212、一核心單元(core unit)214、第一電容C1、第一切換開關(switch)SW1及第二切換開關SW2。第一電容C1係耦接於核心單元214與一第一特定端點N1之間,其中核心單元214係針對電流輸入I_IN 及預定參考電壓V_IN輸入進行處理以儲存一輸出結果R_O至第一電容C1,再調整輸出結果R_O以使第一電容C1儲存處理結果PR。由第2圖可知,核心單元214包含一放大器(amplifier)216、一第二電容C2、一第三電容C3、一第三切換開關SW3、一第四切換開關SW4、一第五切換開關SW5以及一第六切換開關SW6。由第2圖可知,放大器216係具有一第一輸入埠P_1、一第二輸入埠P_2以及一輸出埠P_OUT,其中第二輸入埠P_2耦接至一參考電壓端V_R(例如,具有一定電壓(constant voltage)或一接地電壓(ground voltage)之電壓端)。第二電容C2係耦接於第一輸入埠P_1與輸出埠P_OUT之間,以及第三電容C2係耦接於第一輸入埠P_1與一第二特定端點N2之間。控制單元212係用以產生複數個開關控制訊號(switch control signal)S_C1~S_C6,其中複數個開關控制訊號S_C1~S_C6分別用來控制複數個切換開關SW1~SW6閉合/導通(open/turned on)與開啟/斷開(closed/turned off),更具體地說,第一切換開關SW1係用以依據第一開關控制訊號S_C1來選擇性地將第一特定端點N1耦接至參考電壓端V_R;第二切換開關SW2係用以依據第二開關控制訊號S_C2來選擇性地將第一特定端點N1耦接至調整功能方塊220;第三切換開關SW3係依據第三開關控制訊號S_C3來選擇性地將電流源CR耦接至第一輸入埠P_1;第四切換開關SW4係依據第四開關控制訊號S_C4來選擇性地將預定參考電壓輸入V_IN耦接至第二特定端點N2;第五切換開關SW5係依據第五開關控制訊號S_C5來選擇性地將第一輸入埠P_1耦接至輸出埠P_OUT;以及第六切換開關SW6係依據第六開關控制訊號S_C6來選擇性地將第二特定端點N2耦接至參考電壓端V_R。Please refer to FIG. 2, which is a schematic diagram of an embodiment of a current correction circuit for adjusting a current input I_IN generated by a current source CR. The current correction circuit 200 includes a processing function block 210 and an adjustment function block 220. The processing function block 110 shown in FIG. 1 can be implemented by using the processing function block 210, and the adjustment function block 120 shown in FIG. 1 can be The adjustment function block 220 is used to make it. The processing function block 210 includes a control unit 212, a core unit 214, a first capacitor C1, a first switch SW1, and a second switch SW2. The first capacitor C1 is coupled between the core unit 214 and a first specific end point N1, wherein the core unit 214 is for the current input I_IN. And processing the predetermined reference voltage V_IN input to store an output result R_O to the first capacitor C1, and then adjusting the output result R_O to cause the first capacitor C1 to store the processing result PR. As shown in FIG. 2, the core unit 214 includes an amplifier 216, a second capacitor C2, a third capacitor C3, a third switch SW3, a fourth switch SW4, and a fifth switch SW5. A sixth switch SW6. As shown in FIG. 2, the amplifier 216 has a first input 埠P_1, a second input 埠P_2, and an output 埠P_OUT, wherein the second input 埠P_2 is coupled to a reference voltage terminal V_R (for example, having a certain voltage ( Constant voltage) or the voltage terminal of a ground voltage). The second capacitor C2 is coupled between the first input 埠P_1 and the output 埠P_OUT, and the third capacitor C2 is coupled between the first input 埠P_1 and a second specific end point N2. The control unit 212 is configured to generate a plurality of switch control signals S_C1~S_C6, wherein the plurality of switch control signals S_C1~S_C6 are respectively used to control a plurality of switch switches SW1~SW6 to be closed/turned on (open/turned on) And the first switch SW1 is configured to selectively couple the first specific end point N1 to the reference voltage terminal V_R according to the first switch control signal S_C1. The second switch SW2 is configured to selectively couple the first specific end point N1 to the adjustment function block 220 according to the second switch control signal S_C2; the third switch SW3 is selected according to the third switch control signal S_C3 The current source CR is coupled to the first input port _1P_1; the fourth switch switch SW4 selectively couples the predetermined reference voltage input V_IN to the second specific end point N2 according to the fourth switch control signal S_C4; The switch SW5 selectively couples the first input 埠P_1 to the output 埠P_OUT according to the fifth switch control signal S_C5; and the sixth switch SW6 selectively selects the second specific according to the sixth switch control signal S_C6 Node N2 is coupled to a reference voltage terminal V_R.

於此實施例中,調整功能方塊220係包含一放大器226以及一電容C。放大器226係具有複數個輸入埠P_A及P_B,以及一輸出埠P_C,其中輸入埠P_A用以接收處理結果PR,輸出埠P_C用以輸出調整訊號S_A,以及輸入埠P_B耦接至參考電壓端V_R。另外,電容C係耦接於輸入埠P_A 與輸出埠P_C之間。請連同第3圖來參閱第2圖,其中第3圖係為用來控制第2圖所示之複數個切換開關SW1~SW6的複數個開關控制訊號S_C1~S_C6之一實作範例的訊號時序圖。於此實作範例中,當一開關控制訊號係處於一第一電壓準位(例如,高電壓準位)時,該開關控制訊號所控制的切換開關會被閉合/導通,以及當該開關控制訊號係處於一第二電壓準位(例如,低電壓準位)時,該開關控制訊號所控制的切換開關會被開啟/斷開。於一設計變化中,複數個切換開關SW1~SW6亦可被設定閉合/導通於複數個開關控制訊號S_C1~S_C6處於低電壓準位時。In this embodiment, the adjustment function block 220 includes an amplifier 226 and a capacitor C. The amplifier 226 has a plurality of inputs 埠P_A and P_B, and an output 埠P_C, wherein the input 埠P_A is used to receive the processing result PR, the output 埠P_C is used to output the adjustment signal S_A, and the input 埠P_B is coupled to the reference voltage terminal V_R. . In addition, the capacitor C is coupled to the input port _P_A Between the output 埠P_C and the output. Please refer to FIG. 2 together with FIG. 3, wherein FIG. 3 is a signal timing sequence for controlling one of the plurality of switch control signals S_C1 to S_C6 of the plurality of switch switches SW1 to SW6 shown in FIG. Figure. In this implementation example, when a switch control signal is at a first voltage level (eg, a high voltage level), the switch controlled by the switch control signal is turned on/on, and when the switch is controlled When the signal is at a second voltage level (for example, a low voltage level), the switch controlled by the switch control signal is turned on/off. In a design change, a plurality of switch switches SW1~SW6 can also be set to be closed/conducted when a plurality of switch control signals S_C1~S_C6 are at a low voltage level.

舉例來說(但本發明並不侷限於此),在電流輸入I_IN被轉換為一電壓訊號的情形下,當第一切換開關SW1、第三切換開關SW3及第四切換開關SW4均處於閉合狀態(closed),而第二切換開關SW2、第五切換開關SW5及第六切換開關SW6均處於開啟狀態(open)時(亦即,於時間點T1之後),核心單元214係利用電流輸入I_IN對第二電容C2充電以於輸出埠P_OUT產生一電壓訊號,以及利用第二電容C2、第三電容C3及放大器216所組成的電路來於輸出埠P_OUT產生對應預定參考電壓輸入V_IN的另一電壓訊號,也就是說,輸出埠P_OUT之電壓值係由電流輸入I_IN以及預定參考電壓輸入V_IN所貢獻。於一實作範例中,當參考電壓端V_R係為一接地端(ground)時,則上述之另一電壓訊號之電壓值係為-V_IN×(C3/C2),因此,儲存於第一電容C1之輸出結果R_O(亦即,輸出埠P_OUT之電壓值)可視為該電壓訊號與預定參考電壓輸入V_IN之間的一電壓差。For example, (but the invention is not limited thereto), when the current input I_IN is converted into a voltage signal, when the first switch SW1, the third switch SW3, and the fourth switch SW4 are both closed (closed), while the second changeover switch SW2, the fifth changeover switch SW5, and the sixth changeover switch SW6 are both in an open state (ie, after time point T1), the core unit 214 utilizes a current input I_IN pair The second capacitor C2 is charged to generate a voltage signal at the output 埠P_OUT, and a circuit composed of the second capacitor C2, the third capacitor C3 and the amplifier 216 is used to generate another voltage signal corresponding to the predetermined reference voltage input V_IN at the output 埠P_OUT. That is, the voltage value of the output 埠P_OUT is contributed by the current input I_IN and the predetermined reference voltage input V_IN. In a practical example, when the reference voltage terminal V_R is a ground, the voltage value of the other voltage signal is -V_IN×(C3/C2), and therefore, is stored in the first capacitor. The output result R_O of C1 (that is, the voltage value of the output 埠P_OUT) can be regarded as a voltage difference between the voltage signal and the predetermined reference voltage input V_IN.

當第三切換開關SW3及第四切換開關SW4均由開啟狀態切換至閉合狀態,而第一切換開關S1仍處於閉合狀態時(亦即,時間點T2之後),儲存於第一電容C1之輸出結果R_O可趨於穩定。當第一切換開關SW1、第三切換開關SW3及第四切換開關SW4均處於開啟狀態時(亦即,時間點T3 之後),由於電容具有維持固定跨壓(voltage drop)的特性,故核心單元214可藉由調整輸出埠P_OUT之電壓值(亦即,輸出結果R_O)來改變第一特定端點N1之電位(亦即,處理結果PR)。更具體地說,於時間點T4之後,第二切換開關SW2、第五切換開關SW5及第六切換開關SW6均由開啟狀態切換至閉合狀態,因此,輸出埠P_OUT之電壓值係被調整為參考電壓端V_R之電壓(例如,一接地電壓),以及第一電容C1可將第一特定端點N1之電位(亦即,處理結果PR)輸出至調整功能方塊220以供後續調整操作。舉例來說,在參考電壓端V_R係為一接地端的情形下,當第一特定端點N1未耦接至參考電壓端V_R時(例如,於時間點T4),核心單元214可輸出一接地電壓來作為輸出結果R_O以使第一電容C1儲存處理結果PR,因此,核心單元214可將輸出埠P_OUT之電壓值自上述之該電壓差(例如,-1伏特(volt))調整為該接地電壓(例如,0伏特),使得第一特定端點N1之電位也會有該電壓差的調整幅度(例如,1伏特),因此,調整功能方塊220可依據所接收的電流輸入I_IN與預定參考電壓輸入V_IN之間差異的資訊(亦即,上述之該電壓差)來產生調整訊號S_A以調整電流輸入I_IN。When the third switch SW3 and the fourth switch SW4 are both switched from the on state to the closed state, and the first switch S1 is still in the closed state (that is, after the time point T2), the output is stored in the first capacitor C1. As a result, R_O tends to be stable. When the first switch SW1, the third switch SW3, and the fourth switch SW4 are both in an open state (ie, time point T3) Thereafter, since the capacitor has a characteristic of maintaining a fixed voltage drop, the core unit 214 can change the potential of the first specific end point N1 by adjusting the voltage value of the output 埠P_OUT (ie, the output result R_O) ( That is, the result is PR). More specifically, after the time point T4, the second changeover switch SW2, the fifth changeover switch SW5, and the sixth changeover switch SW6 are all switched from the on state to the closed state, and therefore, the voltage value of the output 埠P_OUT is adjusted as a reference. The voltage of the voltage terminal V_R (eg, a ground voltage), and the first capacitor C1 may output the potential of the first specific terminal N1 (ie, the processing result PR) to the adjustment function block 220 for subsequent adjustment operations. For example, in the case where the reference voltage terminal V_R is a ground terminal, when the first specific terminal point N1 is not coupled to the reference voltage terminal V_R (for example, at the time point T4), the core unit 214 can output a ground voltage. As the output result R_O, the first capacitor C1 stores the processing result PR. Therefore, the core unit 214 can adjust the voltage value of the output 埠P_OUT from the voltage difference (for example, -1 volt) to the ground voltage. (for example, 0 volts), such that the potential of the first specific terminal N1 also has an adjustment range of the voltage difference (for example, 1 volt), therefore, the adjustment function block 220 can input the I_IN and the predetermined reference voltage according to the received current. The information of the difference between V_IN (that is, the voltage difference described above) is input to generate the adjustment signal S_A to adjust the current input I_IN.

如上所述,在時間點T4之後,調整功能方塊220可接收第一特定端點N1之電位(亦即,處理結果PR),換言之,輸入埠P_A會接收到第一特定端點N1之電位。於此實施例中,調整功能方塊220可視為一積分器電路(integrator circuit),因此,輸出埠P_C之電位(亦即,調整訊號S_A)可隨輸入埠P_A之電位(亦即,處理結果PR)來調整以達到穩定電流輸入I_IN的目的。另外,第二切換開關SW2可於第五切換開關SW5由閉合狀態切換至開啟狀態之後(如時間點T5所示),由閉合狀態切換至開啟狀態(如時間點T6所示)。於一實作範例中,電流校正電路200可重複執行調整電流輸入I_IN之操作,直到調整功能方塊220所接收的處理結果PR指示已無需調整電流輸入I_IN(例如,調整後的第一特定端點N1之電位仍為該接地電 壓)為止。換言之,電流輸入I_IN的大小與預定參考電壓輸入V_IN的大小之間係具有該預定比值。值得注意的是,以上僅供說明之需,並非用來做為本發明之限制。於一設計變化中,將參考電壓端V_R耦接於非接地電壓之定電壓亦是可行的。於另一設計變化中,亦可將預定參考電壓輸入V_IN轉換為一電流訊號,以供核心單元214對該電流訊號與電流輸入I_IN進行處理。As described above, after time point T4, the adjustment function block 220 can receive the potential of the first specific end point N1 (i.e., the processing result PR), in other words, the input 埠P_A receives the potential of the first specific end point N1. In this embodiment, the adjustment function block 220 can be regarded as an integrator circuit. Therefore, the potential of the output 埠P_C (ie, the adjustment signal S_A) can follow the potential of the input 埠P_A (ie, the processing result PR) ) to adjust to achieve the purpose of stabilizing the current input I_IN. In addition, the second changeover switch SW2 can be switched from the closed state to the open state (as indicated by the time point T6) after the fifth changeover switch SW5 is switched from the closed state to the open state (as indicated by the time point T5). In an implementation example, the current correction circuit 200 may repeatedly perform the operation of adjusting the current input I_IN until the processing result PR received by the adjustment function block 220 indicates that the current input I_IN has not been adjusted (eg, the adjusted first specific endpoint) The potential of N1 is still the grounding current Press). In other words, the predetermined ratio of the magnitude of the current input I_IN to the magnitude of the predetermined reference voltage input V_IN. It is to be noted that the above description is for illustrative purposes only and is not intended to be a limitation of the invention. In a design change, it is also feasible to couple the reference voltage terminal V_R to a constant voltage of a non-ground voltage. In another design change, the predetermined reference voltage input V_IN can also be converted into a current signal for the core unit 214 to process the current signal and the current input I_IN.

由以上可知,於較佳實施例中,複數個開關控制訊號S_C1~S_C6之間的關係可簡單歸納如下:第四開關控制訊號S_C4及第六開關控制訊號S_C6係為非重疊訊號,第三開關控制訊號S_C3及第五開關控制訊號S_C5係為非重疊訊號,第一開關控制訊號S_C1、第三開關控制訊號S_C3及第四開關控制訊號S_C4係至少部分重疊,以及第二開關控制訊號S_C2、第五開關控制訊號S_C5及第六開關控制訊號S_C6係至少部分重疊。另外,第一切換開關SW1係於第三切換開關SW3與第四切換開關SW4由閉合狀態切換至開啟狀態之後,才會由閉合狀態切換至開啟狀態。第二切換開關SW2係於第五切換開關SW5由閉合狀態切換至開啟狀態之後,才會由閉合狀態切換至開啟狀態。It can be seen from the above that in the preferred embodiment, the relationship between the plurality of switch control signals S_C1~S_C6 can be simply summarized as follows: the fourth switch control signal S_C4 and the sixth switch control signal S_C6 are non-overlapping signals, and the third switch The control signal S_C3 and the fifth switch control signal S_C5 are non-overlapping signals, and the first switch control signal S_C1, the third switch control signal S_C3, and the fourth switch control signal S_C4 are at least partially overlapped, and the second switch control signal S_C2, The five-switch control signal S_C5 and the sixth switch control signal S_C6 are at least partially overlapped. In addition, the first changeover switch SW1 is switched from the closed state to the open state after the third changeover switch SW3 and the fourth changeover switch SW4 are switched from the closed state to the open state. The second changeover switch SW2 is switched from the closed state to the open state after the fifth changeover switch SW5 is switched from the closed state to the open state.

請注意,使用第2圖所示之處理功能方塊210的電路架構來實作第1圖所示之處理功能方塊110僅作為範例說明,換言之,任何可對預定參考電壓輸入V_IN與電流輸入I_IN進行處理並據以產生挾帶預定參考電壓輸入V_IN與電流輸入I_IN之資訊的處理結果PR的電路架構均可被第1圖所示之處理功能方塊110所採用;同樣地,使用第2圖所示之調整功能方塊220的電路架構來實作第1圖所示之調整功能方塊120僅作為範例說明,換言之,任何可依據處理結果PR來調整電流輸入I_IN的電路架構均可被第1圖所示之調整功能方塊120所採用。這些設計上的變化均落入本發明之範疇。Please note that the processing function block 110 shown in FIG. 1 is implemented by using the circuit architecture of the processing function block 210 shown in FIG. 2 as an example. In other words, any predetermined reference voltage input V_IN and current input I_IN can be performed. The circuit architecture for processing and generating the processing result PR for the information of the predetermined reference voltage input V_IN and the current input I_IN can be used by the processing function block 110 shown in FIG. 1; similarly, as shown in FIG. The circuit structure of the adjustment function block 220 is implemented as an adjustment function block 120 shown in FIG. 1 for illustrative purposes only. In other words, any circuit structure that can adjust the current input I_IN according to the processing result PR can be shown in FIG. The adjustment function block 120 is adopted. These design variations are within the scope of the invention.

再者,由於第2圖所示之處理功能方塊210與調整功能方塊220的電路架構僅是本發明電流校正電路的一種可行實施方式,因此,以上所述切換開關以及開關控制訊號的個數僅供說明之需,並非用來做為本發明之限制,只要能同樣達到產生一個挾帶預定參考電壓輸入V_IN與電流輸入I_IN之資訊的處理結果PR,切換開關以及開關控制訊號的個數並不侷限於第2圖所示之個數。請參閱第4圖,第4圖係為本發明用以調整一電流源CR所產生之一電流輸入I_IN的電流校正電路之另一實施例的示意圖,其中電流校正電路400之架構係基於第1圖以及第2圖所示之電流校正電路的架構。由第4圖可知,電流校正電路400包含第1圖所示之調整功能方塊120,以及一處理功能方塊410。此外,處理功能方塊410係包含一控制單元412、一核心單元414,以及第2圖所示之第一電容C1、第一切換開關SW1及第二切換開關SW2。相似地,核心單元414針對電流輸入I_IN及預定參考電壓V_IN輸入進行處理以儲存一輸出結果R_O至第一電容C1,再調整輸出結果R_O以使第一電容C1儲存處理結果PR。控制單元412係用以產生複數個開關控制訊號,其至少包含一第一開關控制訊號S_C1及一第二開關控制訊號S_C2,其中第一開關控制訊號S_C1及第二開關控制訊號S_C2係分別用來控制第一切換開關SW1以及第二切換開關SW2之閉合/導通與開啟/斷開,更具體地說,第一切換開關SW1係用以依據第一開關控制訊號S_C1來選擇性地將第一特定端點N1耦接至一參考電壓端V_R(例如,具有一定電壓或一接地電壓之電壓端),以及第二切換開關SW1係用以依據第二開關控制訊號S_C2來選擇性地將第一特定端點N1耦接至調整功能方塊120。Moreover, since the circuit structure of the processing function block 210 and the adjustment function block 220 shown in FIG. 2 is only one possible implementation manner of the current correction circuit of the present invention, the number of the switching switch and the switch control signal described above is only For the purpose of illustration, it is not intended to be a limitation of the present invention. As long as the processing result PR of generating a predetermined information of the predetermined reference voltage input V_IN and the current input I_IN can be achieved, the number of the switch and the switch control signal is not Limited to the number shown in Figure 2. Please refer to FIG. 4, which is a schematic diagram of another embodiment of a current correction circuit for adjusting a current input I_IN generated by a current source CR. The architecture of the current correction circuit 400 is based on the first The diagram and the architecture of the current correction circuit shown in FIG. As can be seen from FIG. 4, the current correction circuit 400 includes an adjustment function block 120 shown in FIG. 1 and a processing function block 410. In addition, the processing function block 410 includes a control unit 412, a core unit 414, and a first capacitor C1, a first switch SW1, and a second switch SW2 shown in FIG. Similarly, the core unit 414 processes the current input I_IN and the predetermined reference voltage V_IN input to store an output result R_O to the first capacitor C1, and then adjusts the output result R_O to cause the first capacitor C1 to store the processing result PR. The control unit 412 is configured to generate a plurality of switch control signals including at least a first switch control signal S_C1 and a second switch control signal S_C2, wherein the first switch control signal S_C1 and the second switch control signal S_C2 are respectively used Controlling the closing/turning on and off of the first switching switch SW1 and the second switching switch SW2, more specifically, the first switching switch SW1 is configured to selectively select the first specific according to the first switching control signal S_C1 The terminal N1 is coupled to a reference voltage terminal V_R (for example, a voltage terminal having a certain voltage or a ground voltage), and the second switch SW1 is configured to selectively select the first specific component according to the second switch control signal S_C2 End point N1 is coupled to adjustment function block 120.

請連同第5圖來參閱第4圖,其中第5圖係為用來控制第4圖所示之複數個切換開關SW1~SW2的複數個開關控制訊號S_C1~S_C2之一實作範例的訊號時序圖。舉例來說(但本發明並不侷限於此),在電流輸入I_IN被轉換為一電壓訊號的情形下,當第一切換開關S1處於閉合狀態而第二切換 開關SW2處於開啟狀態時(亦即,於時間點T1之後),核心單元414可將該電壓訊號與預定參考電壓輸入V_IN之間的一電壓差儲存至第一電容C1,也就是說,端點NS之電位(亦即,輸出結果R_O)會趨近於該電壓差;當第一切換開關SW1處於開啟狀態時(亦即,於時間點T2之後),核心單元214可藉由調整端點NS之電位(亦即,輸出結果R_O)來改變第一特定端點N1之電位(亦即,處理結果PR);以及當第一切換開關SW1處於開啟狀態而第二切換開關SW2處於閉合狀態時(亦即,於時間點T3之後),在核心單元214調整端點NS之電位(亦即,輸出結果R_O)之後,第一電容C1可將第一特定端點N1之電位(亦即,處理結果PR)輸出至調整功能方塊120以供後續調整操作。請注意,於時間點T3之後才執行調整端點NS之電位(亦即,輸出結果R_O)的操作亦是可行的。Please refer to Figure 4 together with Figure 5, where Figure 5 is the signal timing for the implementation of one of the plurality of switch control signals S_C1~S_C2 used to control the plurality of switches SW1~SW2 shown in Figure 4. Figure. For example (but the invention is not limited thereto), in the case where the current input I_IN is converted into a voltage signal, when the first switching switch S1 is in the closed state and the second switching When the switch SW2 is in the on state (that is, after the time point T1), the core unit 414 can store the voltage difference between the voltage signal and the predetermined reference voltage input V_IN to the first capacitor C1, that is, the end point. The potential of NS (ie, the output result R_O) will approach the voltage difference; when the first switch SW1 is in the on state (ie, after time point T2), the core unit 214 can adjust the endpoint NS. a potential (ie, an output result R_O) to change a potential of the first specific end point N1 (ie, a processing result PR); and when the first changeover switch SW1 is in an on state and the second changeover switch SW2 is in a closed state ( That is, after the time point T3), after the core unit 214 adjusts the potential of the terminal NS (that is, the output result R_O), the first capacitor C1 can set the potential of the first specific end point N1 (ie, the processing result) PR) is output to adjustment function block 120 for subsequent adjustment operations. Note that it is also feasible to perform the operation of adjusting the potential of the terminal NS (i.e., outputting the result R_O) after the time point T3.

如上所述,電流校正電路400之切換開關的操作以及訊號的儲存/傳遞可簡單歸納如下:當第一特定端點N1耦接至參考電壓端V_R以及第一特定端點N1未耦接至調整功能方塊120時,第一電容C1會儲存輸出結果R_O;以及當第一特定端點N1未耦接至參考電壓端V_R時,第一電容C1會儲存處理結果PR,並於第一特定端點N1耦接至調整功能方塊時120,第一電容C1會輸出處理結果PR至調整功能方塊120。此外,於較佳的實施例中,第一開關控制訊號S_C1及第二開關控制訊號S_C2係為非重疊訊號。此外,在參考電壓端V_R係為一接地端的情形下,當第一特定端點N1未耦接至參考電壓端V_R時,核心單元414可輸出一接地電壓來作為輸出結果R_O以使第一電容C1儲存處理結果PR。由於熟習技藝者在閱讀關於第1圖~第3圖的說明之後,應可輕易地了解電流校正電路400之運作細節,故進一步的說明在此便不再贅述。As described above, the operation of the switch of the current correcting circuit 400 and the storage/transfer of the signal can be simply summarized as follows: when the first specific end point N1 is coupled to the reference voltage terminal V_R and the first specific end point N1 is not coupled to the adjustment When the function block 120 is used, the first capacitor C1 stores the output result R_O; and when the first specific end point N1 is not coupled to the reference voltage terminal V_R, the first capacitor C1 stores the processing result PR and is at the first specific end point. When N1 is coupled to the adjustment function block 120, the first capacitor C1 outputs the processing result PR to the adjustment function block 120. In addition, in the preferred embodiment, the first switch control signal S_C1 and the second switch control signal S_C2 are non-overlapping signals. In addition, in a case where the reference voltage terminal V_R is a ground terminal, when the first specific terminal end N1 is not coupled to the reference voltage terminal V_R, the core unit 414 can output a ground voltage as the output result R_O to make the first capacitor. C1 stores the processing result PR. Since the skilled artisan can easily understand the operation details of the current correcting circuit 400 after reading the descriptions of FIGS. 1 to 3, further description will not be repeated here.

請參閱第6圖,第6圖係為本發明斜波產生器(ramp generator) 之一實施例的功能方塊示意圖。斜波產生器600包含(但並不侷限於)一電流源CR、前述之電流校正電路100/200/400以及一斜波產生電路(ramp generator circuit)602。電流源CR係用以產生一電流輸入I_IN,以及電流校正電路100/200/400係用以調整電流源CR所產生之電流輸入I_IN。斜波產生電路602係耦接於電流源CR,用以依據經由電流校正電路100/200/400調整後之電流輸入I_IN來產生一斜波訊號(ramp signal)S_R。由於熟習技藝者在閱讀關於第1圖~第5圖的說明之後,應可輕易地了解斜波產生器600的運作細節,故進一步的說明在此便不再贅述。Please refer to FIG. 6. FIG. 6 is a ramp generator of the present invention. A functional block diagram of one embodiment. The ramp generator 600 includes, but is not limited to, a current source CR, the aforementioned current correction circuit 100/200/400, and a ramp generator circuit 602. The current source CR is used to generate a current input I_IN, and the current correction circuit 100/200/400 is used to adjust the current input I_IN generated by the current source CR. The ramp generating circuit 602 is coupled to the current source CR for generating a ramp signal S_R according to the current input I_IN adjusted by the current correcting circuit 100/200/400. Since the skilled artisan can easily understand the operation details of the ramp generator 600 after reading the descriptions of FIGS. 1 to 5, further description will not be repeated here.

綜合上述,本發明所揭示之電流校正電路可依據預定參考電壓輸入(例如,能帶隙參考電壓)來調整電流輸入,進而降低/消弭電阻性元件之變動對電流輸入的影響,故可提升斜波產生器的性能(例如,斜波線性度或斜波斜率)。In summary, the current correction circuit disclosed in the present invention can adjust the current input according to a predetermined reference voltage input (for example, a bandgap reference voltage), thereby reducing/reducing the influence of the variation of the resistive component on the current input, thereby improving the slope. The performance of the wave generator (for example, ramp linearity or ramp slope).

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100‧‧‧電流校正電路100‧‧‧ Current correction circuit

110‧‧‧處理功能方塊110‧‧‧Processing function block

120‧‧‧調整功能方塊120‧‧‧Adjustment function block

CR‧‧‧電流源CR‧‧‧current source

Claims (13)

一種用以調整一電流源所產生之一電流輸入的電流校正電路,包含:一處理功能方塊,耦接於該電流源,用以接收一預定參考電壓輸入及該電流源所產生之該電流輸入,並依據該預定參考電壓輸入與該電流源所產生之該電流輸入來產生一處理結果;以及一調整功能方塊,耦接於該處理功能方塊及該電流源,用以依據該處理結果來產生一調整訊號至該電流源以調整該電流源所產生之該電流輸入,以使該電流源所產生之該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值。 A current correction circuit for adjusting a current input generated by a current source, comprising: a processing function block coupled to the current source for receiving a predetermined reference voltage input and the current input generated by the current source And generating a processing result according to the predetermined reference voltage input and the current input generated by the current source; and an adjustment function block coupled to the processing function block and the current source for generating according to the processing result An adjustment signal is applied to the current source to adjust the current input generated by the current source such that a magnitude of the current input generated by the current source has a predetermined ratio between the magnitude of the predetermined reference voltage input. 如申請專利範圍第1項所述之電流校正電路,其中該處理功能方塊包含:一控制單元,用以產生複數個開關控制訊號,其中該複數個開關控制訊號至少包含一第一開關控制訊號及一第二開關控制訊號;一核心單元;一第一電容,耦接於該核心單元與一第一特定端點之間,其中該核心單元針對該電流輸入及該預定參考電壓輸入進行處理以儲存一輸出結果至該第一電容,再調整該輸出結果以使該第一電容儲存該處理結果;一第一切換開關,用以依據該第一開關控制訊號來選擇性地將該第一特定端點耦接至一參考電壓端;以及一第二切換開關,用以依據該第二開關控制訊號來選擇性地將該第一特定端點耦接至該調整功能方塊。 The current correction circuit of claim 1, wherein the processing function block comprises: a control unit for generating a plurality of switch control signals, wherein the plurality of switch control signals comprise at least a first switch control signal and a second switch control signal; a core unit; a first capacitor coupled between the core unit and a first specific terminal, wherein the core unit processes the current input and the predetermined reference voltage input for storage And outputting the result to the first capacitor, and adjusting the output result to cause the first capacitor to store the processing result; a first switching switch for selectively selecting the first specific end according to the first switch control signal The point is coupled to a reference voltage terminal; and a second switch is configured to selectively couple the first specific terminal to the adjustment function block according to the second switch control signal. 如申請專利範圍第2項所述之電流校正電路,其中當該第一特定端點耦接至該參考電壓端以及該第一特定端點未耦接至該調整功能方塊時,該第一電容會儲存該輸出結果;以及當該第一特定端點未耦接至該參考電壓端 時,該第一電容會儲存該處理結果,並於該第一特定端點耦接至該調整功能方塊時,該第一電容會輸出該處理結果至該調整功能方塊。 The current correction circuit of claim 2, wherein the first capacitor is coupled to the reference voltage terminal and the first specific terminal is not coupled to the adjustment function block, the first capacitor The output result is stored; and when the first specific endpoint is not coupled to the reference voltage terminal The first capacitor stores the processing result, and when the first specific end is coupled to the adjustment function block, the first capacitor outputs the processing result to the adjustment function block. 如申請專利範圍第2項所述之電流校正電路,其中該第一開關控制訊號及該第二開關控制訊號係為非重疊訊號。 The current correction circuit of claim 2, wherein the first switch control signal and the second switch control signal are non-overlapping signals. 如申請專利範圍第2項所述之電流校正電路,其中該參考電壓端係為一接地端,以及當該第一特定端點未耦接至該參考電壓端時,該核心單元輸出一接地電壓來作為該輸出結果以使該第一電容儲存該處理結果。 The current correction circuit of claim 2, wherein the reference voltage terminal is a ground terminal, and when the first specific terminal is not coupled to the reference voltage terminal, the core unit outputs a ground voltage As the output result, the first capacitor stores the processing result. 如申請專利範圍第2項所述之電流校正電路,其中該複數個開關控制訊號另包含一第三開關控制訊號、一第四開關控制訊號、一第五開關控制訊號以及一第六開關控制訊號;以及該核心單元包含:一放大器,具有一第一輸入埠、一第二輸入埠以及一輸出埠,其中該第二輸入埠耦接至該參考電壓端;一第二電容,耦接於該第一輸入埠與該輸出埠之間;一第三電容,耦接於該第一輸入埠與一第二特定端點之間;一第三切換開關,依據該第三開關控制訊號來選擇性地將該電流源耦接至該第一輸入埠;一第四切換開關,依據該第四開關控制訊號來選擇性地將該預定參考電壓輸入耦接至該第二特定端點;一第五切換開關,依據該第五開關控制訊號來選擇性地將該第一輸入埠耦接至該輸出埠;以及一第六切換開關,依據該第六開關控制訊號來選擇性地將該第二特定端點耦接至該參考電壓端。 The current correction circuit of claim 2, wherein the plurality of switch control signals further comprise a third switch control signal, a fourth switch control signal, a fifth switch control signal, and a sixth switch control signal. And the core unit includes: an amplifier having a first input port, a second input port, and an output port, wherein the second input port is coupled to the reference voltage terminal; a second capacitor coupled to the a first input port and the output port; a third capacitor coupled between the first input port and a second specific terminal; a third switch switch selectively selected according to the third switch control signal Coupling the current source to the first input port; a fourth switch switch selectively coupling the predetermined reference voltage input to the second specific end point according to the fourth switch control signal; The switch is configured to selectively couple the first input port to the output port according to the fifth switch control signal; and a sixth switch switch to selectively select the second block according to the sixth switch control signal The fixed end is coupled to the reference voltage terminal. 如申請專利範圍第6項所述之電流校正電路,其中該第四開關控制訊號及該第六開關控制訊號係為非重疊訊號,該第三開關控制訊號及該第五開關控制訊號係為非重疊訊號,該第一開關控制訊號、該第三開關控制訊號及該第四開關控制訊號係至少部分重疊,以及該第二開關控制訊號、該第五開關控制訊號及該第六開關控制訊號係至少部分重疊。 The current correction circuit of claim 6, wherein the fourth switch control signal and the sixth switch control signal are non-overlapping signals, and the third switch control signal and the fifth switch control signal are non-overlapping signals. The first switch control signal, the third switch control signal, and the fourth switch control signal are at least partially overlapped, and the second switch control signal, the fifth switch control signal, and the sixth switch control signal system At least partially overlap. 如申請專利範圍第7項所述之電流校正電路,其中於該第三切換開關與該第四切換開關由閉合狀態切換至開啟狀態之後,該第一切換開關才會由閉合狀態切換至開啟狀態。 The current correction circuit of claim 7, wherein the first switch is switched from the closed state to the open state after the third switch and the fourth switch are switched from the closed state to the open state. . 如申請專利範圍第7項所述之電流校正電路,其中於該第五切換開關由閉合狀態切換至開啟狀態之後,該第二切換開關才會由閉合狀態切換至開啟狀態。 The current correction circuit of claim 7, wherein the second switch is switched from the closed state to the open state after the fifth switch is switched from the closed state to the open state. 如申請專利範圍第1項所述之電流校正電路,其中該調整功能方塊包含:一放大器,具有一第一輸入埠、一第二輸入埠以及一輸出埠,其中該第一輸入埠用以接收該處理結果,該輸出埠用以輸出該調整訊號,以及該第二輸入埠耦接至一參考電壓端;以及一電容,耦接於該第一輸入埠與該輸出埠之間。 The current correction circuit of claim 1, wherein the adjustment function block comprises: an amplifier having a first input port, a second input port, and an output port, wherein the first input port is configured to receive As a result of the processing, the output is used to output the adjustment signal, and the second input port is coupled to a reference voltage terminal; and a capacitor is coupled between the first input port and the output port. 如申請專利範圍第1項所述之電流校正電路,其中該預定參考電壓輸入係為一能帶隙參考電壓。 The current correction circuit of claim 1, wherein the predetermined reference voltage input is an energy bandgap reference voltage. 一種用以調整一電流源所產生之一電流輸入的電流校正方法,包含:依據一預定參考電壓輸入與該電流源所產生之該電流輸入來產生一處理結果;以及 依據該處理結果來產生一調整訊號至該電流源以調整該電流源所產生之該電流輸入,以使該電流源所產生之該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值。 A current correction method for adjusting a current input generated by a current source, comprising: generating a processing result according to a predetermined reference voltage input and the current input generated by the current source; And generating, according to the processing result, an adjustment signal to the current source to adjust the current input generated by the current source, such that a magnitude of the current input generated by the current source and a magnitude of the predetermined reference voltage input are Predetermined ratio. 一種斜波產生器,包含:一電流源,用以產生一電流輸入;一電流校正電路,用以調整該電流源所產生之該電流輸入,包含:一處理功能方塊,耦接於該電流源,用以接收一預定參考電壓輸入及該電流源所產生之該電流輸入,並依據該預定參考電壓輸入與該電流源所產生之該電流輸入來產生一處理結果;以及一調整功能方塊,耦接於該處理功能方塊及該電流源,用以依據該處理結果來產生一調整訊號至該電流源以調整該電流源所產生之該電流輸入,以使該電流源所產生之該電流輸入的大小與該預定參考電壓輸入的大小之間具有一預定比值;以及一斜波產生電路,耦接於該電流源,用以依據經由該電流校正電路調整後之該電流輸入來產生一斜波訊號。A ramp generator includes: a current source for generating a current input; and a current correction circuit for adjusting the current input generated by the current source, comprising: a processing function block coupled to the current source Receiving a predetermined reference voltage input and the current input generated by the current source, and generating a processing result according to the predetermined reference voltage input and the current input generated by the current source; and an adjustment function block, coupling Connected to the processing function block and the current source for generating an adjustment signal to the current source according to the processing result to adjust the current input generated by the current source, so that the current generated by the current source is input. a predetermined ratio between the size and the predetermined reference voltage input; and a ramp generating circuit coupled to the current source for generating a ramp signal according to the current input adjusted by the current correcting circuit .
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