TWI489787B - Analog digital converter - Google Patents

Description

Analog digital converter

This invention relates to an analog digital converter, and more particularly to an analog digital converter that can be applied to different types of capacitive sensing elements simultaneously.

In order to make electronic products more humane and meet the needs of consumers, many different types of capacitive sensing elements are thus designed in the same electronic product to provide users with a variety of different sensing functions. For example, in general smart phones, most of them have at least sensing functions such as touch sensing, shaking sensing, and hand-held direction sensing. Among them, the function of the touch sensing can be achieved by the technology of the touch panel, and the function of the shaking sensing and the hand-held direction sensing can be realized by the technology of the gravity sensor.

Since various types of capacitive sensing components need to use an analog digital converter (ADC) to convert the analog sensing signal of the capacitive sensing component into a digital signal, so as to make the back end of the microprocessor (microcontroller unit , MCU) for signal processing. However, depending on the type of sensing, the capacitive sensing component must generally perform signal processing using different analog-to-digital converters and microprocessors, respectively. To integrate more than two types of capacitive sensing components, at least two analog-to-digital converters and microprocessors must be utilized. As a result, not only will the cost of circuit design be wasted, but also the area of the circuit layout will increase, which is contrary to the trend of miniaturization of electronic products today.

The invention provides an analog digital converter which can be simultaneously applied to convert analog analog signals of different types of capacitive sensing elements into corresponding digital signals.

The present invention provides an analog digital converter adapted to couple at least two different types of capacitive sensing elements. The analog digital converter includes a signal generating unit, a switch module, and a conversion unit. The signal generating unit generates the first control signal and the second control signal. The switch module is coupled to the signal generating unit. The switch module receives one of the first control signal and the second control signal in response to the multiplex switching means, and outputs an analog sensing signal of one of the capacitive sensing elements according to the switching. The conversion unit is coupled to the switch module. The conversion unit receives the analog sensing signal to convert the analog sensing signal into a digital signal.

In an embodiment of the invention, the capacitive sensing component includes a single capacitive sensing component and a differential capacitive sensing component, and the switching module includes a plurality of switching circuits. Each switch module has an input end and an output end. The input ends of the respective switch circuits are coupled to the respective ends of the capacitive sensing elements, and the output ends of the plurality of switch circuits are coupled to the conversion unit. Wherein, when the analog digital converter performs analog digital conversion on a single capacitive sensing component, the switching circuit coupled to the single capacitive sensing component switches its switching configuration according to the first control signal to output a sense of analogy of the single capacitive sensing component. Test signal. When the analog digital converter performs analog digital conversion on the differential capacitive sensing component, the switching circuit coupled to the differential capacitive sensing component switches its switch configuration according to the second control signal. The analog sensing signal of the differential capacitive sensing component is output.

In an embodiment of the invention, the signal generating unit selectively outputs the first control signal or the second control signal to the corresponding switch circuit by using a multiplexing switching method, so that the switch module outputs the analogy of the single capacitive sensing element in sequence. The analog sensing signal of the sensing signal and the differential capacitance sensing component.

In an embodiment of the invention, the first control signal and the second control signal respectively comprise a plurality of switching signals, and each of the switching circuits comprises a first switch, a second switch, a third switch and a fourth switch. The first switch has a first end and a second end, the first end of which is coupled to the driving voltage, and the second end of which is coupled to the input end of the switching circuit. The second switch has a first end and a second end, the first end of which is coupled to the input end of the switch circuit, and the second end of which is coupled to the ground voltage. The third switch has a first end and a second end, the first end of which is coupled to a first reference voltage, and the second end of which is coupled to the input end of the switch circuit. The fourth switch has a first end and a second end, the first end of which is coupled to the input end of the switch circuit, and the second end of which is coupled to the output end of the switch circuit. The first switch, the second switch, the third switch, and the fourth switch respectively determine whether to be turned on according to the corresponding switching signal, so as to switch to a switch configuration conforming to the single capacitive sensing element or the differential capacitive sensing element.

In an embodiment of the invention, the single capacitive sensing component is a sensing unit of the touch panel.

In an embodiment of the invention, the differential capacitance sensing element is a gravity sensor.

In an embodiment of the invention, the conversion unit includes an integrator, a comparator, a flip-flop, and a counter. The integrator has a positive input and a negative input And the output end, the positive input end is coupled to the second reference voltage, and the negative input end is coupled to the switch module to receive the analog sense signal, wherein the integrator outputs the integral signal according to the second reference voltage and the analog sense signal. The comparator has a positive input terminal, a negative input terminal and an output terminal, wherein the positive input terminal is coupled to the second reference voltage, and the negative input terminal is coupled to the output terminal of the integrator to receive the integrated signal, wherein the comparator is configured according to the second reference voltage The integral signal outputs a comparison signal. The flip-flop has an input end and an output end, and the input end is coupled to the output end of the comparator to receive the comparison signal, wherein the flip-flop outputs a logic level according to the comparison signal and the clock signal. The counter has an input end and an output end, and the input end is coupled to the output end of the flip-flop, wherein the counter counts the clock signal according to the logic level, and outputs the digital signal at the output end thereof.

In an embodiment of the invention, the first control signal includes a discharge enable signal, and the conversion unit further includes a discharge control unit. The discharge control unit is coupled between the negative input end of the integrator and the output end of the flip-flop to discharge the negative input end of the integrator according to the logic level, wherein the type of the capacitive sensing element is a single capacitive sense When the component is measured, the discharge control unit is enabled according to the discharge enable signal.

Based on the above, the analog-to-digital converter of the embodiment of the present invention uses the switch module to change the switch configuration of the switch circuit according to the corresponding control signal, so that the analog digital converter can be simultaneously applied to the single capacitive sensing component and the difference. The analog sensing signal of the dynamic capacitance sensing component is converted into a digital signal, thereby saving the cost of the circuit design and the area of the circuit layout.

It is to be understood that the foregoing general description and claims

The embodiment of the invention provides an analog-to-digital converter, which can convert the analog sensing signals of the single capacitive sensing component and the differential capacitive sensing component into digital signals by using the same circuit architecture, thereby making use of the analog digital The converter's sensing system can further increase the area of the circuit layout and the cost of circuit design to increase commercial competitiveness. In order to make the content of the present invention easier to understand, the following specific embodiments are illustrative of the embodiments of the present invention. In addition, wherever possible, the elements and/

FIG. 1 is a schematic diagram of a sensing system according to an embodiment of the invention. Referring to FIG. 1 , the sensing system 10 includes a sensing module 50 , an analog digital converter 100 , and a microcontroller 150 . The sensing module 50 includes at least two different types of capacitive sensing elements, such as the capacitive sensing element 50_1 and the capacitive sensing element 50_2, wherein the capacitive sensing element 50_1 and the capacitive sensing element 50_2 respectively generate an analogy according to the sensing result thereof. Sensing signals s_a1 and s_a2. The analog-to-digital converter 100 is coupled to each of the capacitive sensing elements 50_1 and 50_2 of the sensing module 50 for converting the analog sensing signal s_a1 of the capacitive sensing component 50_1 into a corresponding digital signal s_d1, or sensing the capacitance. The analog sensing signal s_a2 of the component 50_2 is converted into a corresponding digital signal s_d2. The microcontroller 150 is coupled to the analog digital converter 100. The microcontroller 150 receives the digital signal s_d1/s_d2 generated by the analog-to-digital converter 100 for digital signal processing, and generates a corresponding control action according to the result of the digital signal processing.

In this embodiment, the sensing system 10 can convert the analog sensing signals s_a1 and s_a2 transmitted by different types of capacitive sensing elements into corresponding digital signals s_d1 and s_d2, and perform signal processing to generate corresponding control actions. Here, the capacitive sensing elements 50_1 and 50_2 in the sensing module 50 can be, for example, a single capacitive sensor or a differential capacitive sensing sensor. The single capacitive sensing component is, for example, a sensing unit on the capacitive touch panel, and the differential capacitive sensing component is, for example, a sensor such as a G sensor or a pressure sensor. However, the invention is not limited to this.

In addition, the digital converter 100 can utilize various analog-to-digital conversion methods to implement its signal conversion mechanism, such as a sigma-delta modulation ADC, a successive approximation ADC, and a direct conversion type (direct). -conversion ADC), integral (integrating ADC) or time-interleaved ADC, etc., the invention is not limited thereto.

In a general sensing system, if the analog sensing signal of the single capacitive sensing component and the differential capacitive sensing component is to be converted into a corresponding digital signal, the conventional analog digital is different due to the different operation modes of the capacitive sensing component. The converter cannot convert the two types of analog sensing signals at the same time, so the conventional sensing system must at least use two analog digital conversion circuits to process the analog sensing signals of the single capacitive sensing component and the differential capacitive sensing component.

However, in this embodiment, the architecture of the analog-to-digital converter 100 can be simultaneously applied to convert the capacitive sensing element 50_1 and the battery having different types. The analog sensing signal of the capacitive sensing element 50_2. Therefore, the sensing system 10 can not only perform analog conversion between the analog sensing signal and the digital signal for different types of capacitive sensing elements 50_1 and 50_2, but also can utilize the multiplex switching method to sequentially process the capacitive sensing. The analog sensing signals of the components 50_1 and 50_2 do not need to use two different circuits to process the sensing signals transmitted by the two different types of capacitive sensing components.

In order to explain the present embodiment more clearly, FIG. 2 is a schematic diagram of an analog-to-digital converter 200 according to an embodiment of the present invention. Referring to FIG. 2, the analog-to-digital converter 200 is adapted to couple at least two different types of capacitive sensing elements, where a single capacitive sensing component 60_1 and a differential capacitive sensing component 60_2 are taken as an example, and analog digital conversion is used. The device 200 includes a signal generating unit 210, a switch module 220, and a converting unit 230. The signal generating unit 210 generates the first control signal s_c1 and the second control signal s_c2. The switch module 220 is coupled to the signal generating unit 210, and receives one of the first control signal s_c1 and the second control signal s_c2 in response to the multiplexing switching means, and outputs a sense of analogy of the single capacitive sensing element 60_1 according to the switching. The analog signal s_a1 or the analog sensing signal s_a2 of the differential capacitance sensing element 60_2. The conversion unit 230 is coupled to the switch module 220 and receives one of the analog sensing signal s_a1 and the analog sensing signal s_a2 to convert the analog sensing signal s_a1 into a corresponding digital signal s_d1, or convert the analog sensing signal s_a2 into Corresponding digital signal s_d2.

In order to enable the analog-to-digital converter 200 to convert the analog sensing signals of different types of capacitive sensing elements, the switch module 220 includes a plurality of switching circuits 222_1 222 222_n, where n is a positive integer and can be based on the designer's needs. Change it yourself. The input terminals IT1~ITn of the respective switch circuits 222_1~222_n are respectively coupled to the respective ends of the capacitive sensing elements. When the analog-to-digital converter 200 is coupled to the single-capacitance sensing component 60_1 and the differential-capacitance sensing component 60_2, the two ends of the single-capacitance sensing component 60_1 having two ends are respectively coupled to the input of the switch circuit 222_1 and the switch circuit 222_2. The terminals IT1 and IT2, and the three ends of the three-terminal differential capacitance sensing component 60_2 are respectively coupled to the input terminals IT3~IT5 of the switch circuits 222_3~222_5. In addition, the output terminals OT of the respective switch circuits 222_1 222 222_n are commonly coupled to the conversion unit 230.

For the different types of capacitive sensing components, when the analog digital converter 200 performs analog digital conversion on the single capacitive sensing component 60_1, the signal generating unit 210 outputs the first control signal s_c1 to couple the single capacitive sensing component. The switch circuit 222_1 of 60_1 and the switch circuit 222_2. Therefore, the switch circuits 222_1 and 222_2 respectively switch their switch configurations according to the first control signal s_c1, so that the single capacitive sensing component 60_1 can perform the sensing operation normally, and the analog sensing signal s_a1 is output via the switch circuits 222_1 and 222_2. The conversion unit 230 is configured to output the analog sensing signal s_a1 of the single capacitive sensing element 60_1.

On the other hand, when the analog-to-digital converter 200 performs analog-to-digital conversion on the differential capacitance sensing component 60_2, the switching circuit 222_3, the switching circuit 222_4, and the switching circuit 222_5 coupled to the differential capacitive sensing component 60_2 will be in accordance with the second control. The signal s_c2 switches its switch configuration, respectively, so that the differential capacitance sensing component 60_2 can normally perform a sensing operation to output the analog sensing signal s_a2 of the differential capacitive sensing component 60_2.

Specifically, when the analog-to-digital converter 200 is coupled to the single capacitive sensing component 60_1 and the differential capacitive sensing component 60_2, the signal generating unit 210 selectively outputs the first control signal s_c1 by using a multiplexing switching means. Or the second control signal s_c2 to the corresponding switch circuit 222_1~222_5, so that the switch module 220 sequentially outputs the analog sense signal s_a1 of the single capacitive sensing component 60_1 and the analog sensing signal s_a2 of the differential capacitive sensing component 60_2. .

For example, the signal generating unit 210 can output the first control signal s_c1 to the switch circuits 222_1 and 222_2 first by sequentially switching the output signals. The switch circuits 222_1 and 222_2 respectively switch their switch configurations according to the first control signal s_c1, and output the analog sense signal s_a1 to the conversion unit 230 via the switch circuits 222_1 and 222_2, so that the conversion unit 230 converts the analog sense signal s_a1 into Corresponding digital signal s_d1.

Then, after the conversion of the analog sensing signal s_a1 is completed, the signal generating unit 210 switches the output to output the second control signal s_c2 and the second control signal s_c2 to the switch circuits 222_3 222 222_5. Therefore, the switch circuits 222_3~222_5 respectively switch their switch configurations according to the second control signal s_c2, and output the analog sense signal s_a2 to the conversion unit 230 via the switch circuits 222_3~222_5, so that the conversion unit 230 compares the analog sense signal s_a2. Converted to the corresponding digital signal s_d2.

Further, FIG. 3 is a circuit diagram of an analog-to-digital converter 300 according to an embodiment of the invention. In FIG. 3, each of the switch circuits 322_1 322 322_n is composed of a circuit structure of a plurality of switches, wherein the first control signal s_c1 and the second control signal s_c2 are in this embodiment. The system includes switching signals corresponding to the respective switches. Further, in the present embodiment, the conversion unit 330 is exemplified by an analog digital conversion architecture of a triangular integral modulation type, but the present invention is not limited thereto.

Referring to FIG. 3 , the switch circuit 322 is taken as an example. The switch circuit 322 includes a first switch SW_11 , a second switch SW_12 , a third switch SW_13 , and a fourth switch SW_14 . The first end of the first switch SW_11 is coupled to the driving voltage VR1, and the second end thereof is coupled to the input terminal IT1 of the switching circuit 322_1. The first end of the second switch SW_12 is coupled to the input terminal IT1, and the second end thereof is coupled to the ground voltage VR2. The first end of the third switch is coupled to the first reference voltage VR3, and the second end thereof is coupled to the input terminal IT1. The first end of the fourth switch is coupled to the input terminal IT1, and the second end of the fourth switch is coupled to the output terminal OT. The first switch SW_11, the second switch SW_12, the third switch SW_13, and the fourth switch SW_14 respectively determine whether to be turned on according to the corresponding switching signals s_11, s_12, s_13, and s_14, so as to be switched to be matched with the analog digital converter. The switch configuration of the capacitive sensing element. Similarly, in the remaining switch circuits 322_2-322_n, the switches are also coupled to each other by the electrical connection relationship of the first switch SW_11 to the fourth switch SW_14 of the switch circuit 322_1, and the switch is correspondingly Controlled by the signal.

The conversion unit 330 includes an integrator 332, a comparator 334, a flip-flop 336, and a counter 338. The integrator 332 has a positive input, a negative input, and an output. The positive input terminal of the integrator 332 is coupled to the second reference voltage VR4, and the negative input terminal is coupled to the switch module 320 to receive the analog sensing signal s_a, wherein the integrator 332 senses the second reference voltage VR4 according to the second reference voltage The signal outputs the integral signal s_i. Comparator 334 has a positive input, a negative input, and an output. The positive input terminal of the comparator 334 is also coupled to the second reference voltage VR4, and the negative input terminal is coupled to the output end of the integrator 332 to receive the integrated signal s_i, wherein the comparator outputs a comparison signal according to the second reference voltage VR4 and the integrated signal s_i. S_c. The input end of the flip-flop 336 is coupled to the output of the comparator 334 to receive the comparison signal s_c, and the flip-flop 336 outputs the logic level 1g at its output according to the clock signal CLK. The input of the counter 338 is coupled to the output of the flip flop 336. The counter 338 further counts the clock signal CLK according to the logic level 1g, and outputs the digital signal s_d at its output according to the counting result.

Specifically, the analog sensing signal s_a transmitted by the capacitive sensing component is generally a voltage level corresponding to a change in the capacitance of the capacitive sensing component. Therefore, when the integrator 332 receives the analog sensing signal s_a of the capacitive sensing element via the switch module 320, it can integrate the analog sensing signal s_a according to the second reference voltage VR4, so that the integrator 332 The output outputs a time domain s_i associated with the time domain.

When the voltage level of the integrated signal s_i is gradually decreased to be lower than the second reference voltage VR4 according to the integral analog sensing signal s_a, the comparator 334 outputs an enabled comparison signal s_c such that the flip-flop 336 is based on The clock signal CLK and the comparison signal s_c generate an enabled logic level 1g, for example, logic 1, thus causing the counter 338 to start counting the pulse period of the clock signal CLK according to the enabled logic level 1g, and according to this The digital signal s_d corresponding to the analog sensing signal s_a is outputted by the count value.

In addition, in order to enable the conversion unit 330 to perform conversion of analog sensing signals of various different capacitive sensing elements, the converting unit 330 further includes a discharging control unit DCU. The discharge control unit DCU is coupled between the negative input terminal of the integrator 332 and the output terminal of the flip-flop 336 for discharging the negative input terminal of the integrator 332 according to the logic level 1g. The discharge control unit DCU is enabled according to the discharge enable signal s_de and the flip-flop output signal 1g in the first control signal s_c1.

When the type of the capacitive sensing component coupled to the digital converter 300 is a single capacitive sensing component, for example, a sensing unit on the capacitive touch panel. Since this type of single capacitive sensing component is controlled, the corresponding control signal is used to alternately drive the capacitive sensing component to periodically output the sensing signal. Therefore, the conversion unit 330 needs to operate by repeating the process of charge conversion and discharge.

In detail, when the logic level 1g is the enabled logic level, the discharge control unit DCU will discharge the negative input terminal of the integrator 332 according to the logic level 1g so that the integral signal s_i of the output of the integrator 332 The voltage level is increased. When the integral signal s_i rises above the second reference voltage VR4, the comparator 334 outputs the disabled comparison signal s_c such that the flip-flop 336 generates an disabled logic level 1g according to the clock signal CLK and the comparison signal s_c. For example, it is a logic 0, so that the counter 338 stops counting the pulse period of the clock signal CLK according to the disable logic level 1g and stops the discharge operation of the discharge control unit.

It should be noted that when the capacitive sensing component coupled to the analog-to-digital converter 300 is a differential capacitive sensing component, it does not need to be discharged. The mechanism to convert its analog sensing signal. Therefore, the discharge enable signal s_de is not included in the second control signal s_c2, so in the analog digital conversion operation of the differential capacitance sensing element, the discharge control unit DCU is not enabled.

In order to further illustrate the signal control flow when the analog-to-digital converter of the embodiment of the present invention is coupled to different types of capacitive sensing elements, the sensing capacitance of the projected capacitive touch panel is used as a single An example of a capacitive sensing element, and an example of using a gravity sensor as a differential capacitive sensing element to illustrate the signal control flow of an embodiment of the present invention.

First, in terms of the sensing capacitance of the projected capacitive touch panel, it can be further divided into a self-capacitance and a mutual capacitance sensing driving method. Therefore, in this embodiment, the signal control flow of the self-capacitance sensing and the mutual capacitance sensing in the circuit architecture of the same analog-to-digital converter will be respectively described according to the different sensing modes, as shown in FIG. 4 and FIG. 5a. As shown in Figure 5b.

4 is a schematic diagram of an analog-to-digital converter 400 in accordance with an embodiment of the present invention. Referring to FIG. 4, the analog-to-digital converter 400 is coupled to the two ends of the sensing capacitor 70_1 via the input terminals IT1 and IT2 of the switching circuits 422_1 and 422_2, respectively. The sensing capacitor 70_1 can be a sensing capacitor of a self-capacitive or mutual capacitive touch panel. In addition, the circuit architecture of the analog-to-digital converter 400 is the same as that described in FIG. 3, and thus will not be described herein.

When the sensing capacitor 70_1 is a self-inductive capacitor, each of the switching signals s_11~s_24 in the first control signal s_c1 is as shown in FIG. 5a. FIG. 5a is a timing diagram of a first control signal according to an embodiment of the invention. In this embodiment In the middle, each open relationship is turned on according to the switching signal of the high level, and is cut off according to the switching signal of the low level, but the invention is not limited thereto.

Referring to FIG. 4 and FIG. 5 a , the first switch SW_11 and the fourth switch SW_14 of the switch circuit 422_1 are periodically turned on or off according to the corresponding switching signals s_11 and s_14, respectively. The switching signal s_22 corresponding to the second switch SW_22 is always at a high level, and the second switch SW_22 is always turned on. In addition, the remaining switching signals s_12, s_13, s_21, s_23, and s_24 are all low-level, and the switches controlled by the respective switching signals s_12, s_13, s_21, s_23, and s_24 are turned off.

In other words, since the switching signals s_11 and s_14 are mutually inverted signals, when the first switch SW_11 is turned on, the fourth switch SW_14 will be correspondingly turned off; otherwise, when the first switch SW_11 is turned off according to the switching signal s_11, then The fourth switch SW_14 is turned on according to the switching signal s_14, thereby switching the charging of the sensing capacitor 70_1 or outputting the analog sensing signal s_a.

From the viewpoint of timing, the switching signals s_11 and s_14 are in a period of period t1 and t2. During the period t1, the first switch SW_11 is turned on according to the high-level switching signal s_11, and the fourth switch SW_14 is turned off according to the low-level switching signal s_14, and the second switch SW_22 is turned on to couple one end of the sensing capacitor 70_1. Ground voltage VR2. At this time, the switch modules 422_1 and 422_2 and the sensing capacitor 70_1 may be equivalent to a state in which the sensing capacitor 70_1 is charged by the driving voltage VR1.

When the sensing capacitor 70_1 is completed during the period t2, the switching signal The s_11 transition state is a low level, and the switching signal s_14 is turned to a high level, so that the first switch SW_11 is turned off, and the fourth switch SW_14 is turned on. Therefore, the capacitive sensing component 70_1 can output the analog sensing signal s_a to the converting unit 430 through the switching module 422_1 for analog digital conversion and output the digital signal s_d.

In detail, the sensing method of the self-capacitive touch panel outputs a corresponding sensing signal by sensing a change in capacitance between the electrode and the ground in the touch panel. In this embodiment, the switch module 422_2 is constant to conduct the second switch SW_22, and the input terminal IT2 is coupled to the ground voltage VR2, that is, the electrode coupled to the input terminal IT2 in the touch panel is grounded to sense the capacitor. The 70_1 is equivalent to a self-capacitance sensing circuit architecture, and realizes self-capacitance sensing driving and signal conversion by switching signals according to timing switching.

On the other hand, when the sensing capacitor 70_1 is a mutual inductance capacitor, each of the switching signals s_11~s_24 in the first control signal s_c1 is as shown in FIG. 5b. FIG. 5b is a timing diagram of a first control signal according to another embodiment of the present invention.

Referring to FIG. 4 and FIG. 5b simultaneously, the first switch SW_11 and the fourth switch SW_14 of the switch circuit 422_1 are periodically turned on or off according to the corresponding switching signals s_11 and s_14, respectively. Moreover, the third switch SW_23 and the fourth switch SW_24 of the switch module 422_2 are also periodically turned on or off according to the corresponding switching signals s_23 and s_24. In addition, the switching signals s_11 and s_23 corresponding to the first switch SW_11 of the switch module 422_1 and the third switch SW_23 of the switch module 422_2 are in phase. Here, the remaining switching signals s_13, s_14, s_21 and s_22 are all low level, and The switches controlled by the respective switching signals s_13, s_14, s_21 and s_22 are turned off.

In other words, since the switching signals s_11 and s_23 and the switching signals s_12 and s_24 are respectively the same periodic signal, and the switching signals s_11 and s_23 and the switching signals s_12 and s_24 are mutually inverted. Therefore, when the first switch SW_11 and the third switch SW_23 are turned on, the second switch SW_12 and the fourth switch SW_24 will be correspondingly turned off; otherwise, when the first switch SW_11 and the third switch SW_23 are turned off, the second switch SW_12 and the second switch The four switches SW_24 are turned on according to the switching signals s_12 and s_24, respectively, thereby switching the charging of the sensing capacitor 70_1 or outputting the analog sensing signal s_a.

From the viewpoint of timing, the switching signals s_11, s_12, s_23, and s_24 are in a period of period t3 and t4. During the period t3, the first switch SW_11 and the third switch SW_23 are respectively turned on according to the high-level switching signals s_11 and s_23, and the second switch SW_12 and the fourth switch SW_24 are turned off according to the low-level switching signals s_12 and s_24, respectively. At this time, the switch modules 422_1 and 422_2 and the sensing capacitor 70_1 may be equivalent to a state in which the sensing capacitor 70_1 is charged by using the driving voltage VR1 and the first reference voltage VR3.

When the sensing capacitor 70_1 is completed, the switching signals s_11 and s_23 are turned to a low level, and the switching signals s_12 and s_24 are turned to a high level, so that the first switch SW_11 and the third switch SW_23 are turned off. The second switch SW_12 is electrically connected to the fourth switch SW_14. Therefore, the capacitive sensing component 70_1 can pass the analog sensing signal s_a through the switch module. The 422_2 is output to the conversion unit 430 for analog-to-digital conversion and outputs the digital signal s_d.

In detail, the sensing method of the mutual-capacitive touch panel outputs a corresponding sensing signal by sensing a change in the capacitance value between the electrodes in the touch panel. In this embodiment, the switch module 422_1 and the switch module 422_2 switch their switch configurations correspondingly, and the sense capacitor 70_1 is equivalent to the circuit structure of the mutual capacitance sensing, and the switching signal is switched according to the timing. Drive and signal conversion for mutual capacitive sensing.

FIG. 6 is a schematic diagram of an analog-to-digital converter 600 according to an embodiment of the invention. In the embodiment, the differential capacitance sensing element is exemplified by the gravity sensor 70_2. The gravity sensor 70_2 has two capacitors C1 and C2 arranged in different directions. Moreover, the gravity sensor 70_2 can change the capacitance value of the capacitors C1 and C2 by the acceleration during the movement, thereby detecting the direction of the offset.

Referring to FIG. 6, the analog-to-digital converter 600 is coupled to the three ends of the gravity sensor 70_2 via input terminals IT1, IT2, and IT3 of the switch circuits 622_1, 622_2, and 622_3, respectively. The circuit architecture of the analog-to-digital converter 600 is also the same as that described in FIG. 3, and thus is not described herein again.

The second control signal s_c2 includes a plurality of switching signals, each of which is turned on according to the switching signal of the high level, and is turned off according to the switching signal of the low level, but the invention is not limited thereto.

In this embodiment, the first switch SW_11 and the third switch SW_13 of the switch module 622_1, the third switch SW_23 and the fourth switch SW_24 of the switch module 622_2, and the first switch of the switch module 622_3 The SW_31 and the third switch SW_33 are periodically turned on or off according to the corresponding switching signals s_11, s_13, s_23, s_24, s_31, and s_33, respectively. In addition, the remaining switching signals s_12, s_14, s_21, s_22, s_32, and s_34 are all low-level, and the switches controlled by the respective switching signals s_12, s_14, s_21, s_22, s_32, and s_34 are turned off.

As shown in FIG. 7a, FIG. 7a is a timing diagram of a second control signal according to an embodiment of the present invention. In the present embodiment, the operation timing of the analog-to-digital converter 600 is described in the case where the capacitor C1 and the capacitor C2 are equal. The switching signals s_11, s_13, s_23, s_24, s_31, and s_33 are based on the logic level 1g. The period t5 to t8 is one cycle. The signal levels of the switching signals s_11, s_13, s_23, s_24, s_31, and s_33 are controlled by the clock signal CLK and the logic level 1g output by the flip-flop 636.

Referring to FIG. 6 and FIG. 7a simultaneously, in the initial state of the embodiment, the voltage level at the output of the integrator 632 is equal to the second reference voltage VR4. Therefore, the logic level 1g is at a high level in the initial state. During the period t5, it is assumed that the clock signal CLK and the logic level 1g are both at a high level, so the first switch SW_11 and the third switches SW_23 and SW_33 are respectively turned on according to the high-level switching signals s_11, s_23 and s_33, and the first The three switches SW_13, the fourth switch SW_24 and the first switch SW_31 are turned off according to the low-level switching signals s_13, s_24 and s_33, respectively. At this time, since the capacitor C2 is short-circuited by the first reference voltage VR3, the switch modules 622_1, 622_2 and 622_3 and the gravity sensor 70_2 can be equivalent to use the driving voltage VR1 to enter the capacitor C1 in the gravity sensor 70_2. Line charging status.

During the period t6, the signal generating unit 610 turns the switching signals s_11 and s_23 to a low level according to the low-level clock signal CLK and the logic level 1g of the high level, and the switching signals s_13 and s_24 are turned into The high level is such that the first switch SW_11 and the third switch SW_23 are turned off, and the third switch SW_13 and the fourth switch SW_24 are turned on. At this time, the capacitor C1 will be completely discharged to the integral capacitor (not shown) in the integrator 632 according to the current switch configuration, so that the voltage level of the integrated signal s_i is related to the ratio of the capacitance C1 and the integral capacitance. The function gradually increases.

During the entry period t7, the voltage level of the integration signal s_i will be greater than the second reference voltage VR4, so that the comparator 634 outputs the disabled comparison signal s_c to shift the logic level 1g to the low level. Therefore, during the period t7, the signal generating unit 610 shifts the switching signal s_31 to a high level according to the high-level clock signal CLK and the low-level logic level 1g, and the s_33 transitions to a low level. Therefore, the capacitor C2 can be charged by the driving voltage VR1, and the charging current of the capacitor C2 will flow through the integrating capacitor of the integrator 632. At this time, the voltage level of the integral signal s_i will gradually decrease according to the difference between the capacitor C1 and the capacitor C2. In the case where the capacitor C1 of the present embodiment is equal to the capacitor C2, when the period t7 ends, the voltage level of the integral signal s_i will fall to be equal to the second reference voltage VR4.

Then, during the period t8, the signal generating unit 610 will switch the switching signals s_23 and s_33 to a high level during the period t8 according to the low level clock signal CLK and the low level logic level 1g, and the switching signal s_24 And s_31 transition to a low level during the period t8, so that the third switch SW_13, SW_23 Corresponding to SW_33, capacitor C2 will discharge according to the current switch configuration. At this time, since the voltage level of the integration signal s_i has returned to the initial state, that is, it is equal to the second reference voltage VR4. Therefore, at the beginning of the next period, the analog-to-digital converter 600 will perform the analog-to-digital conversion using the same operations as the periods t5~t8.

In other words, in the case where the capacitor C1 is equal to the capacitor C2, the conversion unit 630 equalizes the period t5~t6 of the high level in the logic level 1g of one cycle according to the analog sense signal s_a to the period t7~t8 of the low level. Therefore, the counter 638 calculates that the high level period has the same count value as the low level period during the period of one logic level 1g, and further knows that the gravity sensor 70_2 does not generate an offset at this time.

On the other hand, as shown in FIG. 7b, FIG. 7b shows a timing diagram of the second control signal according to another embodiment of the present invention. For example, as shown in FIG. 7b, the offset of the gravity sensor 70_2 causes the capacitor C1 to be larger than the capacitor C2. . In this embodiment, the switching signals s_11, s_13, s_23, s_24, s_31, and s_33 are based on the logic level 1g and the period t5 to t10 is one cycle. The signal levels of the switching signals s_11, s_13, s_23, s_24, s_31, and s_33 are similarly controlled by the clock signal CLK and the logic level 1g output by the flip-flop 636.

In FIG. 7b, the operation sequence is shown as an example in which the capacitance value of the capacitor C1 is twice the capacitance value of the capacitor C2, but the invention is not limited thereto. In addition, in the case where the capacitor C1 is larger than the capacitor C2, the operation of the period t5 and the period t6 is the same as described above, and thus will not be described again.

Please refer to FIG. 6 and FIG. 7b at the same time, during the period t7, the signal generation list Similarly, the element 610 rotates the switching signal s_31 to a high level according to the high level clock signal CLK and the low level logic level 1g, and the s_33 transition state is a low level, so that the capacitor C2 is enabled by The driving voltage VR1 is charged, and the voltage level of the integrating signal s_i is a function related to the difference between the capacitance C1 and the capacitance C2.

During the entry period t7, the voltage level of the integration signal s_i will be greater than the second reference voltage VR4, so that the comparator 634 outputs the disabled comparison signal s_c to shift the logic level 1g to the low level. Therefore, during the period t7, the signal generating unit 610 shifts the switching signal s_31 to a high level according to the high level clock signal CLK and the low level logic level 1g, and the switching signal s_33 transitions to a low level. Bit, so capacitor C2 can be charged by driving voltage VR1. Since the capacitance C1 at this time is greater than the capacitance C2, the voltage level of the integration signal s_i is still greater than the second reference voltage VR4 during the period t7, and does not return to the initial state.

After the discharge of the period t8, since the voltage level of the integration signal s_i is still greater than the second reference voltage VR4, the logic level 1g is not changed. Therefore, during the period t9, the signal generating unit 610 shifts the respective switching signals according to the high-level clock signal CLK and the low-level logic level 1g, so that the switching switch is configured to be the same as the switch configuration of the period t7. The capacitor C2 is charged again. At this time, the voltage level of the integration signal s_i continues to decrease gradually, so that when the period t9 ends, the voltage level of the integration signal s_i returns to the second reference voltage VR4.

Therefore, after the discharge of the period t10, since the voltage level of the integral signal s_i has returned to the initial state, it starts in the next period. The analog-to-digital converter 600 will repeat the same operation as the period t5~t10 for analog-to-digital conversion.

In other words, in the case where the capacitor C1 is larger than the capacitor C2, the conversion unit 630 sets the period t5~t6 of the high level of the logic level 1g of one cycle to be less than the low level period t7~t10 according to the analog sense signal s_a. Therefore, the counter 638 calculates that the count value during the high level period is less than the count value during the low level period in the period of one logic level 1g, and further knows that the gravity sensor 70_2 does not generate an offset at this time. In addition, through the above description, those skilled in the art should be able to infer that the operation of the capacitor C1 is smaller than the capacitor C2, and therefore will not be described again.

It should be noted that, in the signal conversion process of the differential capacitance sensing component, the conversion unit does not need to perform the analog digital conversion by the discharge mechanism, so the discharge enable signal is not included in the second control signal s_c2. S_de. Therefore, when the analog-to-digital converter converts the differential capacitance sensing element 70_2, the discharge control unit DCU does not generate an action. On the other hand, once the analog-to-digital converter performs signal conversion on the single capacitive sensing component 70_1, the signal generating unit switches the output of the first control signal s_c1 including the discharge enable signal, thereby enabling the discharge control unit DCU to be enabled. The corresponding discharge operation is performed.

In addition, the first reference voltage VR3 and the second reference voltage VR4 may be reference voltages having the same voltage level in this embodiment. However, in other embodiments, the designer can adjust the voltage levels of the first reference voltage VR3 and the second reference voltage VR4 according to their design requirements, respectively, so that the first reference voltage VR3 and the second reference voltage VR4 have different Voltage The present invention is not limited thereto.

In summary, the analog-to-digital converter of the embodiment of the present invention uses the switch module to change the switch configuration of the switch circuit according to the corresponding control signal, so that the analog digital converter can be simultaneously applied to the single capacitive sensing component. The analog sensing signal with the differential capacitive sensing component is converted into a digital signal. In addition, the analog-to-digital converter of the embodiment of the present invention can simultaneously control a plurality of different types of capacitive sensing components by multiplexing, thereby saving the cost of the circuit design and the area of the circuit layout.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧Sensing system

50‧‧‧Sensor module

50_1, 50_2‧‧‧ capacitive sensing components

60_1‧‧‧Single Capacitance Sensing Element

60_2‧‧‧Differential Capacitance Sensing Element

70_1‧‧‧Sense Capacitance

70_2‧‧‧Gravity Sensor

100, 200, 300, 400, 600‧‧‧ analog digital converters

150‧‧‧Microcontroller

210, 310, 410, 610‧‧‧ signal generation unit

220, 320, 420, 620‧‧‧ switch modules

222_1~222_n, 322_1~322_n, 422_1, 422_2, 622_1, 622_2, 622_3‧‧‧ switch circuit

230, 330, 430, 630‧‧ conversion units

332, 432, 632‧‧ ‧ integrator

334, 434, 634 ‧ ‧ comparator

336, 436, 636‧ ‧ positive and negative

338, 438, 638‧‧ ‧ counter

IT1~ITn‧‧‧ input

OT‧‧‧ output

C1, C2‧‧‧ capacitor

SW_11~SW_n1‧‧‧ first switch

SW_12~SW_n2‧‧‧Second switch

SW_13~SW_n3‧‧‧third switch

SW_14~SW_n4‧‧‧fourth switch

During the period of t1~t8‧‧

VR1‧‧‧ drive voltage

VR2‧‧‧ Grounding voltage

VR3‧‧‧ first reference voltage

VR4‧‧‧second reference voltage

CLK‧‧‧ clock signal

S_11~s_n4‧‧‧Switch signal

S_a, s_a1, s_a2‧‧‧ analog analog signal

S_c1‧‧‧First control signal

S_c2‧‧‧second control signal

S_d, s_d1, s_d2‧‧‧ digital signal

S_i‧‧‧Integral signal

S_c‧‧‧ comparison signal

1g‧‧‧logical level

DCU‧‧‧Discharge Control Unit

The following drawings are a part of the specification of the invention, and illustrate the embodiments of the invention

FIG. 1 is a schematic diagram of a sensing control module 100 according to an embodiment of the invention.

2 is a schematic diagram of an analog to digital converter 200 in accordance with an embodiment of the present invention.

FIG. 3 is a circuit diagram of an analog-to-digital converter 300 according to an embodiment of the invention.

FIG. 4 illustrates an analog-to-digital converter 400 according to an embodiment of the invention. Circuit diagram.

FIG. 5a is a timing diagram of a first control signal according to an embodiment of the invention.

FIG. 5b is a timing diagram of a first control signal according to another embodiment of the present invention.

FIG. 6 is a schematic circuit diagram of an analog-to-digital converter 600 according to an embodiment of the invention.

FIG. 7a is a timing diagram of a second control signal according to an embodiment of the invention.

FIG. 7b is a timing diagram of a second control signal according to another embodiment of the present invention.

60_1‧‧‧Single Capacitance Sensing Element

60_2‧‧‧Differential Capacitance Sensing Element

200‧‧‧ analog digital converter

210‧‧‧Signal generating unit

220‧‧‧Switch Module

222_1~222_n‧‧‧Switch circuit

230‧‧‧ conversion unit

IT1~ITn‧‧‧ input

OT‧‧‧ output

S_a1, s_a2‧‧‧ analog analog signal

S_c1‧‧‧First control signal

S_c2‧‧‧second control signal

S_d1, s_d2‧‧‧ digital signal

Claims (8)

An analog-to-digital converter is adapted to be coupled to at least two different types of capacitive sensing elements, the analog-to-digital converter comprising: a signal generating unit for generating a first control signal and a second control signal; The group is coupled to the signal generating unit, and receives one of the first control signal and the second control signal in response to a multiplexing switch, and outputs one of the capacitive sensing elements according to the switching The analog sensing signal is coupled to the switching module, and the analog sensing signal is received to convert the analog sensing signal into a digital signal. The analog-to-digital converter of claim 1, wherein the capacitive sensing component comprises a single capacitive sensing component and a differential capacitive sensing component, and the switching module comprises: a plurality of switching circuits, each of the switches The circuit has an input end and an output end, and the input end of each of the switch circuits is coupled to each end of the capacitive sensing element, and the output end of the switch circuit is coupled to the conversion unit, wherein When the analog-to-digital converter performs the analog-to-digital conversion of the single capacitive sensing component, the switching circuits coupled to the single capacitive sensing component are switched according to the first control signal to output the analogy of the single capacitive sensing component. a test signal, wherein when the analog-to-digital converter performs analog-to-digital conversion on the differential capacitance sensing component, the switching circuits coupled to the differential capacitive sensing component are switched according to the second control signal to output the The analog sensing signal of the differential capacitive sensing component. The analog digital converter of claim 2, wherein the signal generating unit selectively outputs the first control signal or the second control signal to the corresponding switch circuits by using the multiplexing switch The switch module sequentially outputs the analog sensing signal of the single capacitive sensing component and the differential capacitive sensing component. The analog digital converter of claim 2, wherein the first control signal and the second control signal respectively comprise a plurality of switching signals, and each of the switching circuits comprises: a first switch, the first The second end is coupled to the input end, the second end of the second switch is coupled to the input end, and the second end is coupled to a ground voltage; a third switch is The first end is coupled to the first reference voltage, and the second end is coupled to the input end; and a fourth switch is coupled to the input end, and the second end is coupled to the output end, wherein The first switch, the second switch, the third switch, and the fourth switch respectively determine whether to be turned on according to the corresponding switching signals to switch to meet the single capacitive sensing element or the differential capacitance sensing Switch configuration of the component. The analog digital converter of claim 2, wherein the single capacitive sensing component is at least a sensing unit of the capacitive touch panel. The analog digital converter of claim 2, wherein the differential capacitance sensing element is at least a gravity sensor. The analog-to-digital converter of claim 1, wherein the conversion unit comprises: an integrator having a positive input terminal, a negative input terminal and an output terminal, wherein the positive input terminal is coupled to a second reference voltage, The negative input terminal is coupled to the switch module to receive the analog sensing signal, wherein the integrator outputs an integral signal according to the second reference voltage and the analog sensing signal; a comparator having a positive input terminal and a negative input terminal And a positive input end coupled to the second reference voltage, and a negative input end coupled to the output end of the integrator to receive the integrated signal, wherein the comparator outputs the integrated signal according to the second reference voltage a comparison signal; a flip-flop having an input end and an output end, wherein the input end is coupled to the output end of the comparator to receive the comparison signal, wherein the flip-flop outputs a logic according to the comparison signal and a clock signal output And a counter having an input end and an output end, the input end of which is coupled to the output end of the flip-flop, wherein the counter counts the clock signal according to the logic level, and inputs the clock signal The output signal is output from the out end. The analog-to-digital converter of claim 7, wherein the capacitive sensing component comprises a single capacitive sensing component, the first control signal comprises a discharge enable signal, and the conversion unit further comprises: a discharge control unit, coupled between the negative input end of the integrator and the output end of the inverter, for discharging the negative input end of the integrator according to the logic level, wherein when the analog digital conversion When analog-to-digital conversion is performed on the single capacitive sensing element, the discharge control unit is enabled according to the discharge enable signal.