TWI487257B - A power supply device for suppressing surge current - Google Patents

A power supply device for suppressing surge current Download PDF

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TWI487257B
TWI487257B TW102113593A TW102113593A TWI487257B TW I487257 B TWI487257 B TW I487257B TW 102113593 A TW102113593 A TW 102113593A TW 102113593 A TW102113593 A TW 102113593A TW I487257 B TWI487257 B TW I487257B
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power
input
power supply
switch
coupled
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TW201409911A (en
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Fsp Powerland Technology Inc
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Description

抑制突波電流之電源供應裝置Power supply device for suppressing surge current

本發明是有關於一種電源供應裝置,且特別是有關於一種抑制突波電流之電源供應裝置。The present invention relates to a power supply device, and more particularly to a power supply device for suppressing surge current.

一般電子設備在開機通電瞬間會出現較大的突波電流,而突波電流產生的時間非常短(約為微秒級),且突波電流會隨著電路的等效電容值的增加而增加,使得該突波電流遠大於穩態的輸入電流而對電子設備造成損害,因而需要過電流保護電路進行抑制。Generally, the electronic equipment will have a large surge current when it is turned on, and the surge current is generated for a very short time (about microseconds), and the surge current will increase as the equivalent capacitance of the circuit increases. Therefore, the surge current is much larger than the steady-state input current and causes damage to the electronic device, and thus an overcurrent protection circuit is required for suppression.

然而,一般輸入端為通用輸入的通信電源在其輸入為直流時,突波電流的幅值係遠大於電子設備的過電流保護電路之設定值,而觸發電子設備的過電流保護,造成電子設備無法開機。However, when the input power is a universal input power supply, when the input is DC, the amplitude of the surge current is much larger than the set value of the overcurrent protection circuit of the electronic device, and the overcurrent protection of the electronic device is triggered, resulting in the electronic device. Can not boot.

有鑒於此,本發明提供一種抑制突波電流之電源供應裝置,其可以有效地解決先前技術所述及的問題。In view of the above, the present invention provides a power supply device that suppresses a surge current, which can effectively solve the problems described in the prior art.

基於上述,本發明之一示範性實施例提供一種抑制突波電流之電源供應裝置,係包括:一主電路以及一控制電路。其中該主電路係包括一電力輸入端、一整流電路、一功率因數校正轉換器、一直流轉直流轉換器、一功率因數校正控制器及一輔助電源,而該電力輸入端係輸出一電源至該整流電路,該整流電路係整流該電源並輸出至該功率因數校正轉換器,該直流轉直流轉換器之一端與該輔助電源之一端並聯且耦接該功率因數校正轉換器之另一端,而功率因數校正控制器之輸出端係輸出一控制訊號至該功率因數校正轉換器以控制該功率因數校正轉換器;其中該控制電路係接收該輔助電源所提供之輸出電壓,且該控制電路係接收該電力輸入端之電源以判斷該電力輸入 端的輸入電壓類型,在該電力輸入端的該電源建立且經過該控制電路判斷後之一延時時間,提供一工作電源至該功率因數校正控制器以使該主電路運作,藉以在該電力輸入端的該電源初建立時,該功率因數校正轉換器呈關斷而抑制該突波電流的大小。Based on the above, an exemplary embodiment of the present invention provides a power supply device for suppressing a surge current, comprising: a main circuit and a control circuit. The main circuit includes a power input terminal, a rectifier circuit, a power factor correction converter, a DC-DC converter, a power factor correction controller, and an auxiliary power source, and the power input terminal outputs a power source to the a rectifying circuit that rectifies the power source and outputs the power to the power factor correction converter, one end of the DC to DC converter being connected in parallel with one end of the auxiliary power source and coupled to the other end of the power factor correction converter, and power The output of the factor correction controller outputs a control signal to the power factor correction converter to control the power factor correction converter; wherein the control circuit receives an output voltage provided by the auxiliary power source, and the control circuit receives the Power supply at the power input to determine the power input The input voltage type of the terminal, at a power delay of the power input terminal and a delay time after the control circuit determines, providing a working power supply to the power factor correction controller to operate the main circuit, thereby at the power input end When the power supply is initially established, the power factor correction converter is turned off to suppress the magnitude of the surge current.

於本發明的一示範性實施例中,該控制電路包括一輸入電壓識別單元,係與該電力輸入端並聯連接,而接收該電力輸入端之電源以判斷該電力輸入端的輸入電壓類型,以及一供電控制單元,係接收該輸入電壓識別單元提供之識別訊號及該輔助電源所提供之輸出電壓,而在該電力輸入端的該電源建立後之該延時時間輸出該工作電源至該功率因數校正控制器。In an exemplary embodiment of the present invention, the control circuit includes an input voltage identifying unit connected in parallel with the power input terminal, and receiving power of the power input terminal to determine an input voltage type of the power input terminal, and a The power supply control unit receives the identification signal provided by the input voltage identification unit and the output voltage provided by the auxiliary power source, and outputs the working power to the power factor correction controller at the delay time after the power supply of the power input terminal is established. .

於本發明的一示範性實施例中,該輸入電壓識別單元包括一輸入端,係與該電力輸入端耦接以取樣電力輸入端的輸入電壓;以及一第一比較器,其第一輸入端係接收該輸入端傳送之一取樣訊號,而該第一比較器之第二輸入端係接收一設定之第一參考電壓值,該第一比較器之輸出端係耦接一電容及該供電控制單元,而可輸出該識別訊號至該供電控制單元。In an exemplary embodiment of the invention, the input voltage identification unit includes an input coupled to the power input to sample an input voltage of the power input, and a first comparator having a first input Receiving a sampling signal transmitted by the input end, and the second input end of the first comparator receives a set first reference voltage value, and the output end of the first comparator is coupled to a capacitor and the power supply control unit And the identification signal can be output to the power supply control unit.

於本發明的一示範性實施例中,該供電控制單元包括一電壓調節電路,係耦接該輔助電源,以接收該輔助電源所提供之輸出電壓;以及一延時電路,係耦接該電壓調節電路,以將該輸出電壓透過該電壓調節電路充電至該延時電路,而在該電力輸入端的該電源建立後之該延時時間輸出該工作電源至該功率因數校正控制器。In an exemplary embodiment of the present invention, the power supply control unit includes a voltage regulation circuit coupled to the auxiliary power source to receive an output voltage provided by the auxiliary power source, and a delay circuit coupled to the voltage regulation And a circuit for charging the output voltage to the delay circuit through the voltage regulating circuit, and outputting the working power to the power factor correction controller at the delay time after the power input of the power input terminal is established.

於本發明的一示範性實施例中,該延時電路包括:一第一延時電容、一第二延時電容、一第一開關、第二比較器以及一第二開關,其中該第一延時電容之一端係與該第一開關之一端串聯連接,而該第一延時電容之另一端係並聯連接該第二延時電容之一端且耦接該第二比較器之第一輸入端,第一開關之另一端係並聯連接該第二延時電容之另一端且耦接一接地端,而該第二比較器之第二輸入端係接收一設定之第二參考電壓值,該第二比較器之輸出端係耦接該第二開關之控制端。In an exemplary embodiment of the invention, the delay circuit includes: a first delay capacitor, a second delay capacitor, a first switch, a second comparator, and a second switch, wherein the first delay capacitor One end is connected in series with one end of the first switch, and the other end of the first delay capacitor is connected in parallel to one end of the second delay capacitor and coupled to the first input end of the second comparator, the other of the first switch One end is connected in parallel to the other end of the second delay capacitor and coupled to a ground end, and the second input end of the second comparator receives a set second reference voltage value, and the output end of the second comparator The control end of the second switch is coupled.

於本發明的一示範性實施例中,該電壓調節電路包括:第一電阻以及第二電阻,該第一電阻之一端係耦接該輔助電源,而該第一電阻之另一端係串聯連接該第二電阻以將該輸出電壓充電至該延時電路。In an exemplary embodiment of the present invention, the voltage regulating circuit includes: a first resistor and a second resistor, one end of the first resistor is coupled to the auxiliary power source, and the other end of the first resistor is connected in series A second resistor charges the output voltage to the delay circuit.

於本發明的一示範性實施例中,該第一開關之控制端係耦接該輸入電壓識別單元以接收該識別訊號。In an exemplary embodiment of the invention, the control end of the first switch is coupled to the input voltage identifying unit to receive the identification signal.

於本發明的一示範性實施例中,該供電控制單元更包括一第三開關,該第三開關之控制端係耦接該第二開關之閘極,而該第三開關之第一端係耦接該輔助電源,而該第三開關之第二端係耦接該功率因數校正控制器。In an exemplary embodiment of the present invention, the power supply control unit further includes a third switch, the control end of the third switch is coupled to the gate of the second switch, and the first end of the third switch is The auxiliary power supply is coupled, and the second end of the third switch is coupled to the power factor correction controller.

於本發明的一示範性實施例中,該取樣訊號係傳送至一第三比較器之第一輸入端,而該第三比較器之第二輸入端係接收一第三參考電壓值,該取樣訊號與第三參考電壓值經過第三比較器之比較而控制一第四開關的啟閉,而該第四開關之一端係耦接一接地端,該第四開關之另一端係耦接該供電控制單元。In an exemplary embodiment of the invention, the sampling signal is transmitted to a first input end of a third comparator, and the second input end of the third comparator receives a third reference voltage value, the sampling The signal and the third reference voltage value are compared with the third comparator to control the opening and closing of a fourth switch, and one end of the fourth switch is coupled to a ground end, and the other end of the fourth switch is coupled to the power supply. control unit.

基於上述,本發明所提之抑制突波電流之電源供應裝置係利用該控制電路判斷該電力輸入端的輸入電壓類型,而在該電力輸入端的該電源建立且經過該控制電路判斷後之一延時時間,提供一工作電源至該功率因數校正控制器以使該主電路運作,藉以在該電力輸入端的該電源初建立時,該功率因數校正轉換器呈關斷而抑制該突波電流的大小。因此,當該控制電路判斷輸入電壓類型為直流電壓時,係經過一延時時間後提供工作電源至該功率因數校正控制器,使該功率因數校正轉換器延時開啟,而可抑制突波電流的大小,藉此可有效避免觸發電子設備的過電流保護。Based on the above, the power supply device for suppressing the surge current of the present invention uses the control circuit to determine the type of the input voltage of the power input terminal, and the power supply terminal at the power input terminal is established and the delay time is determined by the control circuit. Providing a working power supply to the power factor correction controller to operate the main circuit, wherein the power factor correction converter is turned off to suppress the magnitude of the surge current when the power supply is initially established. Therefore, when the control circuit determines that the input voltage type is a DC voltage, the operating power is supplied to the power factor correction controller after a delay time, so that the power factor correction converter is turned on, and the magnitude of the surge current can be suppressed. In this way, the overcurrent protection of the triggering electronic device can be effectively avoided.

應瞭解的是,上述一般描述及以下具體實施方式僅為例示性及闡釋性的,其並不能限制本發明所欲主張之範圍。It is to be understood that the foregoing general description and claims

10‧‧‧主電路10‧‧‧ main circuit

101‧‧‧整流電路101‧‧‧Rectifier circuit

102‧‧‧功率因數校正轉換器102‧‧‧Power Factor Correction Converter

103‧‧‧直流轉直流轉換器103‧‧‧DC to DC converter

104‧‧‧功率因數校正控制器104‧‧‧Power Factor Correction Controller

105‧‧‧輔助電源105‧‧‧Auxiliary power supply

ab‧‧‧電力輸入端Ab‧‧‧Power input

11‧‧‧控制電路11‧‧‧Control circuit

111‧‧‧輸入電壓識別單元111‧‧‧Input voltage identification unit

a’b’‧‧‧輸入端A’b’‧‧‧ input

A21、A31、A41‧‧‧比較器A21, A31, A41‧‧‧ comparator

C21、C31、C32‧‧‧電容C21, C31, C32‧‧‧ capacitors

R21、R22、R23、R31~R38、R41、R42‧‧‧電阻R21, R22, R23, R31~R38, R41, R42‧‧‧ resistance

D21、D22、D23、D31‧‧‧二極體D21, D22, D23, D31‧‧‧ diodes

ZD21‧‧‧齊納二極體ZD21‧‧‧Zina diode

REF1‧‧‧第一參考電壓值REF1‧‧‧ first reference voltage value

A‧‧‧取樣訊號A‧‧‧Sampling signal

112‧‧‧供電控制單元112‧‧‧Power Control Unit

Q31、Q32、Q33、Q41‧‧‧開關Q31, Q32, Q33, Q41‧‧ ‧ switch

VCC‧‧‧功率因數校正控制器輸入端VCC‧‧‧Power Factor Correction Controller Input

VCP‧‧‧輔助電源輸出端VCP‧‧‧Auxiliary power output

G‧‧‧識別訊號G‧‧‧ identification signal

REF2‧‧‧第二參考電壓值REF2‧‧‧ second reference voltage value

REF3‧‧‧第三參考電壓值REF3‧‧‧ third reference voltage value

第一圖繪示為本發明一示範性實施例之電源供應裝置的示意圖。The first figure shows a schematic diagram of a power supply device according to an exemplary embodiment of the invention.

第二圖繪示為第一圖中輸入電壓識別單元111的示意圖。The second figure is a schematic diagram of the input voltage identification unit 111 in the first figure.

第三圖繪示為第一圖中供電控制單元112的示意圖。The third figure is a schematic diagram of the power supply control unit 112 in the first figure.

第四圖繪示為第三圖中延時電容C31、C32之放電迴路的示意圖。The fourth figure is a schematic diagram of the discharge loop of the delay capacitors C31 and C32 in the third figure.

現將詳細參考本發明之示範性實施例,在附圖中說明所述示範性實施例之實例。另外,凡可能之處,在圖式及實施方式中使用相同標號的元件/構件代表相同或類似部分。DETAILED DESCRIPTION OF THE INVENTION Reference will now be made in detail to the exemplary embodiments embodiments In addition, wherever possible, the same reference numerals in the drawings

第一圖繪示為本發明一示範性實施例之抑制突波電流之電源供應裝置的示意圖。請參照第一圖,抑制突波電流之電源供應裝置包括:一主電路10以及一控制電路11。其中,該主電路10係包括一電力輸入端ab、一整流電路101、一功率因數校正轉換器102、一直流轉直流轉換器103、一功率因數校正控制器104及一輔助電源105,而該電力輸入端ab係輸出一電源至該整流電路101,該整流電路101係整流該電源並輸出至該功率因數校正轉換器102,該直流轉直流轉換器103之一端與該輔助電源105之一端並聯且耦接該功率因數校正轉換器102之另一端,而功率因數校正控制器104之輸出端係輸出一控制訊號至該功率因數校正轉換器102以控制該功率因數校正轉換器102。The first figure shows a schematic diagram of a power supply device for suppressing surge current according to an exemplary embodiment of the invention. Referring to the first figure, the power supply device for suppressing the surge current includes: a main circuit 10 and a control circuit 11. The main circuit 10 includes a power input terminal ab, a rectifier circuit 101, a power factor correction converter 102, a DC-DC converter 103, a power factor correction controller 104, and an auxiliary power source 105. The input terminal ab outputs a power source to the rectifier circuit 101, and the rectifier circuit 101 rectifies the power source and outputs the power to the power factor correction converter 102. One end of the DC-to-DC converter 103 is connected in parallel with one end of the auxiliary power source 105. The other end of the power factor correction converter 102 is coupled, and the output of the power factor correction controller 104 outputs a control signal to the power factor correction converter 102 to control the power factor correction converter 102.

而該控制電路11係接收該輔助電源105所提供之輸出電壓VCP,並接收該電力輸入端ab之電源以判斷該電力輸入端ab的輸入電壓類型,在該電力輸入端ab的該電源建立且經過該控制電路11判斷後之一延時時間,提供一工作電源VCC至該功率因數校正控制器104以使該主電路10運作,藉以在該電力輸入端ab的該電源初建立時,該功率因數校正轉換器104呈關斷而抑制該突波電流的大小。The control circuit 11 receives the output voltage VCP provided by the auxiliary power source 105, and receives the power of the power input terminal ab to determine the input voltage type of the power input terminal ab. The power supply at the power input terminal ab is established and After the control circuit 11 determines a delay time, a working power source VCC is supplied to the power factor correction controller 104 to operate the main circuit 10, so that the power factor is established when the power source of the power input terminal ab is initially established. The correction converter 104 is turned off to suppress the magnitude of the surge current.

於本示範性實施例中,該控制電路11係包括一輸入電壓識別單元111以及一供電控制單元112,其中該輸入電壓識別單元111係與該電力輸入端ab並聯連接,而接收該電力輸入端ab之電源以判斷該電力輸入端ab的輸入電壓類型;該供電控制單元112係接收該輸入電壓識別單元111提供之識別訊號G及該輔助電源105所提供之 輸出電壓VCP而在該電力輸入端ab的該電源建立後之該延時時間輸出該工作電源VCC至該功率因數校正控制器104。In the present exemplary embodiment, the control circuit 11 includes an input voltage identifying unit 111 and a power supply control unit 112, wherein the input voltage identifying unit 111 is connected in parallel with the power input terminal ab, and receives the power input terminal. The power source of ab is used to determine the input voltage type of the power input terminal ab; the power supply control unit 112 receives the identification signal G provided by the input voltage identification unit 111 and the auxiliary power source 105. The output voltage VCP is output to the power factor correction controller 104 at the delay time after the power supply of the power input terminal ab is established.

於本示範性實施例中,當電源開啟時,該供電控制單元112經一延時時間T後提供工作電源VCC至該功率因數校正控制器104,使該功率因數校正轉換器102延時開啟,亦即在電源開啟後至一延時時間內該功率因數校正轉換器102是關閉的,因此功率因數校正轉換器102內部及後端的電容不會運作,使得電路的等效電容值減小,藉此可抑制突波電流的大小。In the present exemplary embodiment, when the power is turned on, the power supply control unit 112 provides the working power VCC to the power factor correction controller 104 after a delay time T, so that the power factor correction converter 102 is turned on, that is, The power factor correction converter 102 is turned off after the power is turned on until a delay time, so the capacitances inside and behind the power factor correction converter 102 do not operate, so that the equivalent capacitance value of the circuit is reduced, thereby suppressing The magnitude of the surge current.

更清楚來說,第二圖繪示為第一圖中輸入電壓識別單元111的示意圖,請合併參照第一圖與第二圖,該輸入電壓識別單元111包括:一輸入端a’b’、一比較器A21、一電容C21、以及,其中該輸入端a’b’係與該電力輸入端ab耦接,並將電力輸入端ab的輸入電壓Vin透過電阻R21、R22分壓而輸出一取樣訊號A至該比較器A21之第一輸入端,而該比較器A21係比較該取樣訊號A與第二輸入端所接收之一設定之第一參考電壓值REF1,其中該比較器A21之輸出端係透過一二極體D23充電至該電容C21,且該電容C21係與該電阻R23並聯後耦接至該供電控制單元112,而根據該電容C21的充電狀態提供該識別訊號G至該供電控制單元112,該電阻R23係提供一放電迴路給該電容C21。More specifically, the second figure is a schematic diagram of the input voltage identifying unit 111 in the first figure. Please refer to the first figure and the second figure. The input voltage identifying unit 111 includes: an input terminal a'b', a comparator A21, a capacitor C21, and the input terminal a'b' is coupled to the power input terminal ab, and the input voltage Vin of the power input terminal ab is divided by the resistors R21 and R22 to output a sample. The signal A is connected to the first input end of the comparator A21, and the comparator A21 compares the first reference voltage value REF1 set by the sample signal A and the second input terminal, wherein the output of the comparator A21 is The capacitor C21 is charged to the capacitor C21 through a diode D23, and the capacitor C21 is coupled in parallel with the resistor R23 and coupled to the power supply control unit 112, and the identification signal G is provided according to the state of charge of the capacitor C21 to the power supply control. In unit 112, the resistor R23 provides a discharge loop to the capacitor C21.

於本示範性實施例中,當電力輸入端ab的輸入電壓Vin為直流電壓時,該取樣訊號A係為一穩態直流電壓而恆大於該第一參考電壓值REF1,使得該比較器A21之輸出端係恆充電至該電容C21,而會輸出一高電平(High,1)的識別訊號G至該供電控制單元112;當電力輸入端ab的輸入電壓Vin為交流電壓時,該取樣訊號A係為一時高時低的交流電壓,使該輸入電壓Vin只有在部分時間大於該第一參考電壓值REF1,而使得該比較器A21之輸出端只有在部份時間會充電至該電容C21,該電容C21的充電量較少,而會輸出一低電平(Low,0)的識別訊號G至該供電控制單元112。In the present exemplary embodiment, when the input voltage Vin of the power input terminal ab is a DC voltage, the sampling signal A is a steady-state DC voltage and is always greater than the first reference voltage value REF1, so that the comparator A21 The output terminal is constantly charged to the capacitor C21, and a high level (High, 1) identification signal G is outputted to the power supply control unit 112; when the input voltage Vin of the power input terminal ab is an alternating current voltage, the sampling signal is The system A is a high-time low-low AC voltage, so that the input voltage Vin is only partially greater than the first reference voltage value REF1, so that the output of the comparator A21 is charged to the capacitor C21 only for part of the time. The capacitor C21 is charged less, and a low level (Low, 0) identification signal G is output to the power supply control unit 112.

另一方面,第三圖繪示為第一圖中供電控制單元112的 示意圖,請合併參照第一圖與第三圖,該供電控制單元112包括:一電壓調節電路以及一延時電路,該電壓調節電路係耦接該輔助電源105,以接收該輔助電源105所提供之輸出電壓VCP,而該延時電路係耦接該電壓調節電路,以將該輸出電壓VCP透過該電壓調節電路充電至該延時電路,而輸出一具有延時時間的工作電源VCC至該功率因數校正控制器104。On the other hand, the third figure is shown as the power supply control unit 112 in the first figure. Referring to the first and third figures, the power supply control unit 112 includes: a voltage regulation circuit and a delay circuit coupled to the auxiliary power source 105 to receive the auxiliary power source 105. Outputting a voltage VCP, and the delay circuit is coupled to the voltage regulating circuit to charge the output voltage VCP to the delay circuit through the voltage regulating circuit, and output a working power supply VCC having a delay time to the power factor correction controller 104.

其中,該延時電路係包括:延時電容C31、延時電容C32、開關Q31~Q33以及比較器A31,其中該延時電容C32之一端係與該開關Q33之一端串聯連接,而該延時電容C32之另一端係並聯連接該延時電容C31之一端且耦接該比較器A31之第一輸入端,開關Q33之另一端係並聯連接該延時電容C31之另一端且耦接一接地端,而該比較器A31之第二輸入端係接收一第二參考電壓值REF2,其中該第二參考電壓值REF2係該輸出電壓VCP經過電阻R36、R37分壓而得到,該比較器A31之輸出端係耦接該開關Q32之控制端,其中該開關Q33之控制端係耦接該輸入電壓識別單元111之電容C21以接收該識別訊號G,而該開關Q31的控制端係經由電阻R33耦接該開關Q32,而該開關Q31之第一端係耦接該輔助電源105,而該開關Q31之第二端係耦接該功率因數校正控制器104。The delay circuit includes: a delay capacitor C31, a delay capacitor C32, switches Q31~Q33, and a comparator A31, wherein one end of the delay capacitor C32 is connected in series with one end of the switch Q33, and the other end of the delay capacitor C32 Connected to one end of the delay capacitor C31 in parallel and coupled to the first input end of the comparator A31, the other end of the switch Q33 is connected in parallel to the other end of the delay capacitor C31 and coupled to a ground, and the comparator A31 The second input terminal receives a second reference voltage value REF2, wherein the second reference voltage value REF2 is obtained by dividing the output voltage VCP through the resistors R36 and R37, and the output end of the comparator A31 is coupled to the switch Q32. a control terminal, wherein the control terminal of the switch Q33 is coupled to the capacitor C21 of the input voltage identifying unit 111 to receive the identification signal G, and the control terminal of the switch Q31 is coupled to the switch Q32 via the resistor R33, and the switch The first end of the Q31 is coupled to the auxiliary power source 105, and the second end of the switch Q31 is coupled to the power factor correction controller 104.

而該電壓調節電路係包括:電阻R34以及電阻R35,該電阻R34之一端係耦接該輔助電源105,而該電阻R34之另一端係串聯連接該電阻R35以將該輸出電壓VCP充電至該延時電路之延時電容C31及延時電容C32,其中該延時電路之比較器A31係比較第二參考電壓值REF2與延時電容C32、延時電容C31之電壓,當該延時電容C31、延時電容C32之電壓高於該第二參考電壓值REF2時,該比較器A31係輸出一控制訊號以導通開關Q32以及開關Q31,輔助電源105係提供該輸出電壓VCP至該供電控制單元112,而在該電力輸入端ab的該電源建立後之該延時時間輸出該工作電源VCC至該功率因數校正控制器104。The voltage regulating circuit includes a resistor R34 and a resistor R35. One end of the resistor R34 is coupled to the auxiliary power source 105, and the other end of the resistor R34 is connected in series to the resistor R35 to charge the output voltage VCP to the delay. The delay capacitor C31 and the delay capacitor C32 of the circuit, wherein the comparator A31 of the delay circuit compares the voltage of the second reference voltage value REF2 with the delay capacitor C32 and the delay capacitor C31, when the voltage of the delay capacitor C31 and the delay capacitor C32 is higher than When the second reference voltage value REF2 is used, the comparator A31 outputs a control signal to turn on the switch Q32 and the switch Q31, and the auxiliary power source 105 supplies the output voltage VCP to the power supply control unit 112, and at the power input terminal ab The delay time after the power source is established outputs the operating power source VCC to the power factor correction controller 104.

於本示範性實施例中,當識別訊號G為一低電平(Low,0) 的識別訊號G時,該開關Q33係會關斷,該輸出電壓VCP充電至該延時電路之延時電容C31,而在一延時時間t後由於該延時電容C31被充飽,使得該延時電容C31之電壓高於該第二參考電壓值REF2,該比較器A31係輸出一控制訊號以導通開關Q32以及開關Q31,輔助電源105係提供該輸出電壓VCP至該供電控制單元112,而在該電力輸入端ab的該電源建立後之該延時時間t輸出該工作電源VCC至該功率因數校正控制器104,藉此,該功率因數校正控制器104即會開始有供電且正常運作。In the present exemplary embodiment, when the identification signal G is a low level (Low, 0) When the identification signal G is detected, the switch Q33 is turned off, and the output voltage VCP is charged to the delay capacitor C31 of the delay circuit, and after a delay time t, the delay capacitor C31 is fully charged, so that the delay capacitor C31 The voltage is higher than the second reference voltage value REF2, the comparator A31 outputs a control signal to turn on the switch Q32 and the switch Q31, and the auxiliary power source 105 provides the output voltage VCP to the power supply control unit 112, and at the power input end The delay time t after the power supply of the ab is established outputs the operating power supply VCC to the power factor correction controller 104, whereby the power factor correction controller 104 starts to be powered and operates normally.

於本示範性實施例中,當識別訊號G為一高電平(High,1)的識別訊號G時,該開關Q33係會開通,該輸出電壓VCP充電至該延時電路之延時電容C31及延時電容C32,而在一延時時間t’後由於該延時電容C31及延時電容C32被充飽,使得該延時電容C31及該延時電容C32之電壓高於該第二參考電壓值REF2,該比較器A31係輸出一控制訊號以導通開關Q32以及開關Q31,輔助電源105係提供該輸出電壓VCP至該供電控制單元112,而在該電力輸入端ab的該電源建立後之該延時時間t’輸出該工作電源VCC至該功率因數校正控制器104,藉此,該功率因數校正控制器104即會開始有供電且正常運作。其中,上述之延時時間的延時控制單位係由該電阻R34、電阻R35、延時電容C32以及延時電容C31來決定,當開關Q33開通時延時時間t’長,而當開關Q33關斷時延時時間t短,於本示範性實施例中將延時時間t’設計在十秒至二十秒之間。In the exemplary embodiment, when the identification signal G is a high level (High, 1) identification signal G, the switch Q33 is turned on, and the output voltage VCP is charged to the delay circuit C31 and the delay of the delay circuit. Capacitor C32, and after a delay time t', because the delay capacitor C31 and the delay capacitor C32 are fully charged, the voltage of the delay capacitor C31 and the delay capacitor C32 is higher than the second reference voltage value REF2, the comparator A31 Is outputting a control signal to turn on the switch Q32 and the switch Q31, the auxiliary power source 105 provides the output voltage VCP to the power supply control unit 112, and outputs the operation at the delay time t' after the power supply of the power input terminal ab is established. The power supply VCC is passed to the power factor correction controller 104 whereby the power factor correction controller 104 will begin to be powered and functioning properly. The delay control unit of the delay time is determined by the resistor R34, the resistor R35, the delay capacitor C32 and the delay capacitor C31. When the switch Q33 is turned on, the delay time t′ is long, and when the switch Q33 is turned off, the delay time t is Short, in the present exemplary embodiment, the delay time t' is designed to be between ten seconds and twenty seconds.

在此值得一提的是,該輸出電壓VCP充飽該延時電容C31及延時電容C32所需的延時時間t’會比充飽該延時電容C31所需的延時時間t長,因此延時時間t’>延時時間t,亦即當電力輸入端ab的輸入電壓Vin為直流電壓時,而在該電力輸入端ab的該電源建立後之該延時時間t’輸出該工作電源VCC至該功率因數校正控制器104,而當電力輸入端ab的輸入電壓Vin為交流電壓時,而在該電力輸入端ab的該電源建立後之該延時時間t輸出該工作電源VCC至該功率因數校正控制器104。因此在輸入電壓Vin為直流電壓時,而在該電力輸入 端ab的該電源建立後之該延時時間t’輸出該工作電源VCC至該功率因數校正控制器104,使該功率因數校正轉換器102延時開啟,使得電路的等效電容值減小,藉此可抑制突波電流的大小,避免觸發直流電子設備的過電流保護,同時不影響交流輸入時的開機速度。It is worth mentioning that the delay time t' required for the output voltage VCP to fully charge the delay capacitor C31 and the delay capacitor C32 is longer than the delay time t required to fully charge the delay capacitor C31, so the delay time t' > delay time t, that is, when the input voltage Vin of the power input terminal ab is a DC voltage, and the delay time t' after the power supply of the power input terminal ab is outputted to output the working power source VCC to the power factor correction control When the input voltage Vin of the power input terminal ab is an AC voltage, the operating power source VCC is output to the power factor correction controller 104 at the delay time t after the power source of the power input terminal ab is established. Therefore, when the input voltage Vin is a DC voltage, and at the power input The delay time t' after the power supply of the terminal ab is established, the working power supply VCC is outputted to the power factor correction controller 104, so that the power factor correction converter 102 is turned on, so that the equivalent capacitance value of the circuit is reduced. It can suppress the magnitude of the surge current and avoid triggering the overcurrent protection of the DC electronic device without affecting the startup speed of the AC input.

於本示範性實施例中,第四圖繪示為第三圖中延時電容C31與延時電容C32之放電迴路的示意圖,請合併參照第二圖至第四圖,該放電迴路係包括:比較器A41、開關Q41、電阻R41以及電阻R42,其中該比較器A41之第一輸入端係接收該取樣訊號A,該比較器A41之第二輸入端係接收一第三參考電壓值REF3,該取樣訊號A與第三參考電壓值REF3經過比較器A41之比較而控制該開關Q41的啟閉,而該開關Q41之控制端係透過電阻R41與比較器A41之輸出端耦接,該開關Q41之一端係耦接一接地端,該開關Q41之另一端係透過一電阻R42耦接該供電控制單元112之延時電容C31、C32。當該電力輸入端ab的輸入電壓Vin為0時,該取樣訊號A係為0,該比較器A41比較取樣訊號A與第三參考電壓值REF3後係輸出一高電平(High,1)訊號,而使該開關Q41導通,藉此,該延時電路之延時電容C31、C32係接地,使延時電容C31、C32放電,而不影響電子設備的下次開機;其中,當電力輸入端ab的輸入電壓Vin為0時,該供電控制單元112不會輸出工作電源VCC至該功率因數校正控制器104,因此該功率因數校正控制器104不會運作。In the exemplary embodiment, the fourth figure is a schematic diagram of the discharge circuit of the delay capacitor C31 and the delay capacitor C32 in the third figure. Referring to the second to fourth figures, the discharge circuit includes: a comparator A41, a switch Q41, a resistor R41, and a resistor R42, wherein the first input terminal of the comparator A41 receives the sampling signal A, and the second input terminal of the comparator A41 receives a third reference voltage value REF3, the sampling signal A and the third reference voltage value REF3 are compared to the comparator A41 to control the opening and closing of the switch Q41, and the control terminal of the switch Q41 is coupled to the output end of the comparator A41 through the resistor R41, one end of the switch Q41 The other end of the switch Q41 is coupled to the delay capacitors C31 and C32 of the power supply control unit 112 through a resistor R42. When the input voltage Vin of the power input terminal a is 0, the sampling signal A is 0, and the comparator A41 compares the sampling signal A with the third reference voltage value REF3 to output a high level (High, 1) signal. The switch Q41 is turned on, whereby the delay capacitors C31 and C32 of the delay circuit are grounded, so that the delay capacitors C31 and C32 are discharged without affecting the next startup of the electronic device; wherein, when the input of the power input terminal ab When the voltage Vin is 0, the power supply control unit 112 does not output the operating power source VCC to the power factor correction controller 104, so the power factor correction controller 104 does not operate.

綜上所述,依上文所揭示之內容,本發明確實可達到發明之預期目的,其利用該控制電路判斷該電力輸入端的輸入電壓類型,在該電力輸入端的該電源建立且經過該控制電路判斷後之一延時時間,提供一工作電源至該功率因數校正控制器以使該主電路運作,藉以在該電力輸入端的該電源初建立時,該功率因數校正轉換器呈關斷而抑制該突波電流的大小,藉此可有效避免觸發電子設備的過電流保護,確實具有實用價值無疑,而具備產業利用性、新穎性及進步性要件,爰依法提出發明專利申請。In summary, according to the above disclosure, the present invention can indeed achieve the intended purpose of the invention, which utilizes the control circuit to determine the type of input voltage of the power input terminal, the power source at the power input terminal is established and passes through the control circuit. Determining a delay time, providing a working power supply to the power factor correction controller to operate the main circuit, so that when the power supply of the power input is initially established, the power factor correction converter is turned off to suppress the protrusion The magnitude of the wave current can effectively avoid the overcurrent protection of the triggering electronic device, and it has practical value, and has the industrial utilization, novelty and progressive requirements, and the invention patent application is filed according to law.

雖然本發明已以上述示範性實施例揭露如上,然其並非 用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視內附之申請專利範圍所界定者為準。Although the present invention has been disclosed above in the above exemplary embodiments, it is not The scope of the present invention is to be construed as limiting the scope of the invention, and the scope of the present invention is intended to be limited by the scope of the invention. The definition is final.

另外,本發明的任一實施例或申請專利範圍不須達成本發明所揭露之全部目的或優點或特點。此外,摘要部分和標題僅是用來輔助專利文件搜尋之用,並非用來限制本發明之權利範圍。In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

10‧‧‧主電路10‧‧‧ main circuit

101‧‧‧整流電路101‧‧‧Rectifier circuit

102‧‧‧功率因數校正轉換器102‧‧‧Power Factor Correction Converter

103‧‧‧直流轉直流轉換器103‧‧‧DC to DC converter

104‧‧‧功率因數校正控制器104‧‧‧Power Factor Correction Controller

105‧‧‧輔助電源105‧‧‧Auxiliary power supply

ab‧‧‧電力輸入端Ab‧‧‧Power input

11‧‧‧控制電路11‧‧‧Control circuit

111‧‧‧輸入電壓識別單元111‧‧‧Input voltage identification unit

112‧‧‧供電控制單元112‧‧‧Power Control Unit

Claims (9)

一種抑制突波電流之電源供應裝置,係包括:一主電路,係包括一電力輸入端、一整流電路、一功率因數校正轉換器、一直流轉直流轉換器、一功率因數校正控制器及一輔助電源,其中該電力輸入端係輸出一電源至該整流電路,而該整流電路係整流該電源並輸出至該功率因數校正轉換器,該直流轉直流轉換器之一端與該輔助電源之一端並聯且耦接該功率因數校正轉換器之另一端,而該功率因數校正控制器之輸出端係輸出一控制訊號至該功率因數校正轉換器以控制該功率因數校正轉換器;以及一控制電路,其中該控制電路係接收該輔助電源所提供之輸出電壓,且該控制電路係接收該電力輸入端之電源以判斷該電力輸入端的輸入電壓類型,在該電力輸入端的該電源建立且經過該控制電路判斷後之一延時時間,提供一工作電源至該功率因數校正控制器以使該主電路運作,藉以在該電力輸入端的該電源初建立時,該功率因數校正轉換器呈關斷而抑制該突波電流的大小。 A power supply device for suppressing a surge current includes: a main circuit comprising a power input terminal, a rectifier circuit, a power factor correction converter, a DC-DC converter, a power factor correction controller, and an auxiliary device a power source, wherein the power input terminal outputs a power source to the rectifier circuit, and the rectifier circuit rectifies the power source and outputs the power to the power factor correction converter, and one end of the DC to DC converter is connected in parallel with one end of the auxiliary power source The other end of the power factor correction converter is coupled, and the output of the power factor correction controller outputs a control signal to the power factor correction converter to control the power factor correction converter; and a control circuit, wherein the The control circuit receives the output voltage provided by the auxiliary power source, and the control circuit receives the power source of the power input terminal to determine the input voltage type of the power input terminal, after the power source of the power input terminal is established and judged by the control circuit One delay time, providing a working power supply to the power factor correction controller The operation of the main circuit, whereby when the power in the early establishment of the power input of the power factor correction converter was turned off and the magnitude of the inrush current is suppressed. 如申請專利範圍第1項所述之抑制突波電流之電源供應裝置,其中該控制電路包括:一輸入電壓識別單元,係與該電力輸入端並聯連接,而接收該電力輸入端之電源以判斷該電力輸入端的輸入電壓類型;以及一供電控制單元,係接收該輸入電壓識別單元提供之識別訊號及該輔助電源所提供之輸出電壓,而在該電力輸入端的該電源建立後之該延時時間輸出該工作電源至該功率因數校正控制器。 The power supply device for suppressing surge current according to claim 1, wherein the control circuit comprises: an input voltage identification unit connected in parallel with the power input end, and receiving power of the power input terminal to determine The input voltage type of the power input terminal; and a power supply control unit receives the identification signal provided by the input voltage identification unit and the output voltage provided by the auxiliary power source, and outputs the delay time after the power source is established at the power input end The operating power is supplied to the power factor correction controller. 如申請專利範圍第2項所述之抑制突波電流之電源供應裝置,其中該輸入電壓識別單元包括:一輸入端,係與該電力輸入端耦接以取樣電力輸入端的輸入電壓;以及 一第一比較器,其第一輸入端係接收該輸入端傳送之一取樣訊號,而該第一比較器之第二輸入端係接收一設定之第一參考電壓值,該第一比較器之輸出端係耦接一電容及該供電控制單元,而可輸出該識別訊號至該供電控制單元。 The power supply device for suppressing surge current according to claim 2, wherein the input voltage identification unit comprises: an input coupled to the power input to sample an input voltage of the power input; a first comparator, the first input receiving the sampling signal transmitted by the input terminal, and the second input terminal of the first comparator receiving a set first reference voltage value, the first comparator The output end is coupled to a capacitor and the power supply control unit, and the identification signal can be output to the power supply control unit. 如申請專利範圍第2項所述之抑制突波電流之電源供應裝置,其中該供電控制單元包括:一電壓調節電路,係耦接該輔助電源,以接收該輔助電源所提供之輸出電壓;以及一延時電路,係耦接該電壓調節電路,以將該輸出電壓透過該電壓調節電路充電至該延時電路,而在該電力輸入端的該電源建立後之該延時時間輸出該工作電源至該功率因數校正控制器。 The power supply device for suppressing surge current according to claim 2, wherein the power supply control unit comprises: a voltage regulating circuit coupled to the auxiliary power source to receive an output voltage provided by the auxiliary power source; a delay circuit is coupled to the voltage regulating circuit to charge the output voltage to the delay circuit through the voltage regulating circuit, and output the working power to the power factor at the delay time after the power input of the power input terminal is established. Correct the controller. 如申請專利範圍第4項所述之抑制突波電流之電源供應裝置,其中該延時電路包括:一第一延時電容、一第二延時電容、一第一開關、第二比較器以及一第二開關,其中該第一延時電容之一端係與該第一開關之一端串聯連接,而該第一延時電容之另一端係並聯連接該第二延時電容之一端且耦接該第二比較器之第一輸入端,第一開關之另一端係並聯連接該第二延時電容之另一端且耦接一接地端,而該第二比較器之第二輸入端係接收一設定之第二參考電壓值,該第二比較器之輸出端係耦接該第二開關之控制端。 The power supply device for suppressing surge current according to claim 4, wherein the delay circuit comprises: a first delay capacitor, a second delay capacitor, a first switch, a second comparator, and a second a switch, wherein one end of the first delay capacitor is connected in series with one end of the first switch, and the other end of the first delay capacitor is connected in parallel to one end of the second delay capacitor and coupled to the second comparator An input end, the other end of the first switch is connected in parallel to the other end of the second delay capacitor and coupled to a ground, and the second input of the second comparator receives a set second reference voltage value, The output end of the second comparator is coupled to the control end of the second switch. 如申請專利範圍第4項所述之抑制突波電流之電源供應裝置,其中該電壓調節電路包括:第一電阻以及第二電阻,該第一電阻之一端係耦接該輔助電源,而該第一電阻之另一端係串聯連接該第二電阻以將該輸出電壓充電至該延時電路。 The power supply device for suppressing surge current according to claim 4, wherein the voltage regulating circuit comprises: a first resistor and a second resistor, wherein one end of the first resistor is coupled to the auxiliary power source, and the first The other end of a resistor is connected in series with the second resistor to charge the output voltage to the delay circuit. 如申請專利範圍第5項所述之抑制突波電流之電源供應裝置,其 中,該第一開關之控制端係耦接該輸入電壓識別單元以接收該識別訊號。 A power supply device for suppressing surge current as described in claim 5, The control end of the first switch is coupled to the input voltage identifying unit to receive the identification signal. 如申請專利範圍第4項所述之抑制突波電流之電源供應裝置,其中該供電控制單元更包括:一第三開關,該第三開關之控制端係耦接該第二開關,而該第三開關之第一端係耦接該輔助電源,而該第三開關之第二端係耦接該功率因數校正控制器。 The power supply device for suppressing a surge current according to the fourth aspect of the invention, wherein the power supply control unit further includes: a third switch, the control end of the third switch is coupled to the second switch, and the The first end of the third switch is coupled to the auxiliary power source, and the second end of the third switch is coupled to the power factor correction controller. 如申請專利範圍第3項所述之抑制突波電流之電源供應裝置,其中該取樣訊號係傳送至一第三比較器之第一輸入端,而該第三比較器之第二輸入端係接收一第三參考電壓值,該取樣訊號與第三參考電壓值經過第三比較器之比較而控制一第四開關的啟閉,而該第四開關之一端係耦接一接地端,該第四開關之另一端係耦接該輔助電源。The power supply device for suppressing surge current according to claim 3, wherein the sampling signal is transmitted to a first input end of a third comparator, and the second input end of the third comparator is received. a third reference voltage value, the sampling signal is compared with the third reference voltage value through a third comparator to control the opening and closing of a fourth switch, and one end of the fourth switch is coupled to a ground end, the fourth The other end of the switch is coupled to the auxiliary power source.
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