TWI485991B - Ghost key detecting circuit and related method - Google Patents

Ghost key detecting circuit and related method Download PDF

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TWI485991B
TWI485991B TW098111409A TW98111409A TWI485991B TW I485991 B TWI485991 B TW I485991B TW 098111409 A TW098111409 A TW 098111409A TW 98111409 A TW98111409 A TW 98111409A TW I485991 B TWI485991 B TW I485991B
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voltage value
coupled
return
lines
resistance
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TW098111409A
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TW201037978A (en
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Chiung Chih Huang
wen tong Liu
Kuo Fu Kuo
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Lite On Electronics Guangzhou
Lite On Technology Corp
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鬼鍵偵測電路及其相關方法Ghost key detection circuit and related method

本發明係指一種鬼鍵偵測電路(user interface apparatus),尤指一種具有按鍵矩陣結構的鍵盤及其相關方法。The present invention refers to a user interface apparatus, and more particularly to a keyboard having a key matrix structure and related methods.

目前說來,為了避免使用過多的接線而致使鍵盤本身的製造成本增加以及實際組裝時的不便利性,習知的鍵盤多採用按鍵矩陣(key matrix)的方式進行設計。對於採用按鍵矩陣進行設計的鍵盤而言,由於按鍵矩陣本身物理特性的關係,鬼鍵(ghost key)的發生便會成為習知鍵盤設計時無法忽略的因素。At present, in order to avoid the use of excessive wiring, the manufacturing cost of the keyboard itself is increased and the inconvenience in actual assembly, the conventional keyboard is mostly designed by means of a key matrix. For a keyboard designed with a key matrix, due to the physical characteristics of the key matrix itself, the occurrence of a ghost key can become a factor that cannot be ignored in conventional keyboard design.

一般來說,為了要避免鬼鍵發生,往往不得不增加按鍵矩陣的規模,或者是不得不以二極體將每個按鍵加以區隔,然而,如此的作法皆將大幅提高鍵盤本身的製造成本。In general, in order to avoid ghost keys, it is often necessary to increase the size of the button matrix, or to have to separate each button with a diode. However, such a method will greatly increase the manufacturing cost of the keyboard itself. .

因此,本發明的目的之一在於提出一種具有新穎性設計的鬼鍵偵測電路,以避免發生鬼鍵,其並享有較低製造成本的功效。Therefore, one of the objects of the present invention is to propose a ghost key detection circuit with a novel design to avoid ghost keys, which enjoys lower manufacturing cost.

依據本發明的一實施例,其係揭露一種鬼鍵偵測電路。該鬼鍵偵測電路包含有帶有一預定阻值的複數個開關元件、至少一組掃描線、至少一組回報線以及一準位偵測電路,其中該組回報線係與該組掃描線彼此交會並分別耦接於該複數個開關元件,且該 準位偵測電路係耦接於該組回報線,並用來偵測對該組回報線上之量測電壓值以指示出該組掃描線上對應於該組回報線之至少一開關元件係處於不導通狀態或導通狀態。According to an embodiment of the invention, a ghost key detection circuit is disclosed. The ghost key detection circuit includes a plurality of switching elements with a predetermined resistance value, at least one set of scan lines, at least one set of return lines, and a level detecting circuit, wherein the set of return lines and the set of scan lines are mutually Intersection and respectively coupled to the plurality of switching elements, and the The level detecting circuit is coupled to the set of return lines and configured to detect the measured voltage values on the set of return lines to indicate that at least one of the switching elements on the set of scan lines corresponding to the set of return lines is non-conductive State or conduction state.

依據本發明的實施例,其另揭露一種使用於一鬼鍵偵測電路的方法。該鬼鍵偵測電路至少具有帶有一預定阻值的複數個開關元件、至少一組掃描線與至少一組回報線,該組回報線係與該組掃描線彼此交會並分別耦接於該複數個開關元件。該方法包含有以下步驟:對該組回報線上之至少一量測電壓值執行準位偵測;當該組回報線中至少一回報線上之一量測電壓值大於或等於一參考電壓值時,產生一邏輯準位訊號以指示出一目前掃描線上對應於該回報線之一開關元件係處於不導通狀態;以及當該回報線上之該量測電壓值小於該參考電壓值時,產生該邏輯準位訊號以指示出該目前掃描線上對應於該回報線之該開關元件係處於導通狀態。According to an embodiment of the invention, a method for using a ghost key detection circuit is further disclosed. The ghost key detection circuit has at least a plurality of switching elements with a predetermined resistance value, at least one set of scan lines and at least one set of return lines, and the set of return lines and the set of scan lines intersect each other and are respectively coupled to the plurality of Switching elements. The method includes the following steps: performing level detection on at least one measured voltage value on the set of return lines; when one of the measured returns on at least one of the set of return lines is greater than or equal to a reference voltage value, Generating a logic level signal to indicate that a switching element corresponding to the return line on the current scan line is in a non-conducting state; and generating a logic level when the measured voltage value on the return line is less than the reference voltage value The bit signal indicates that the switching element corresponding to the return line on the current scan line is in an on state.

為清楚了解本發明的技術手段以及本發明所能夠解決的問題,於下先簡述鬼鍵發生的成因。請參照第1圖,第1圖是一般鍵盤所具有的標準二乘二按鍵矩陣100的示意圖。按鍵矩陣100包含有形成井字型(double cross)結構的四個按鍵,即分別對應的薄膜開關元件SW1 ~SW4 。這其中,每一薄膜開關元件SW1 ~SW4 皆具有一第一端與一第二端。當對應於一薄膜開關元件(例如SW1 )的按鍵被按下時,其第一端會與其第二端相接觸,而使得該薄膜開關元件處於導通狀態(on),進而導致掃描線(scan line)X1 會與回報線(return line)Y1 導通。基於此現象,依據回報線(return line)Y1 上的訊號,而得知開關元件SW1 所對應的按鍵目前是否被按下。反之,當對應於該薄膜開關元件的按鍵並未被按下時,其第一端則不會與第二端相接觸,因而該薄膜開關元件會處於不導通狀態(off),回報線(return line)Y1 上亦沒有訊號傳遞。In order to clearly understand the technical means of the present invention and the problems that can be solved by the present invention, the cause of the occurrence of ghost keys will be briefly described below. Please refer to FIG. 1. FIG. 1 is a schematic diagram of a standard two by two button matrix 100 of a general keyboard. The key matrix 100 includes four buttons forming a double cross structure, that is, correspondingly corresponding thin film switching elements SW 1 to SW 4 . Each of the membrane switching elements SW 1 -SW 4 has a first end and a second end. When the key corresponding to a membrane switch element (e.g., SW 1) is pressed, a first end of the second end will be in contact therewith, such that the membrane switch element in a conductive state (ON), leading to a scan line (scan Line) X 1 will be turned on with the return line Y 1 . Based on this phenomenon, it is known from the signal on the return line Y 1 whether the button corresponding to the switching element SW 1 is currently pressed. Conversely, when the button corresponding to the membrane switching element is not pressed, the first end thereof is not in contact with the second end, and thus the membrane switching element is in a non-conducting state (off), return line (return) Line) There is no signal transmission on Y 1 .

然而,正因為上述按鍵矩陣100的物理特性,只要上述開關元件SW1 ~SW4 中任三個所對應的按鍵被按下時,就算剩餘的第四個按鍵實際上並未被按下,仍將錯誤判斷第四個按鍵被按下。這種實際上未被按下但卻被誤判已被按下的按鍵,即稱之為鬼鍵。具體來說,請參照第2A圖~第2D圖,其係分別顯示第1圖所示之按鍵矩陣100中鬼鍵現象的可能成因。如第2A圖所示,當開關元件SW1 ~SW3 被導通時,掃描線X2 與回報線Y2 會因另一導通路徑(即經由開關元件SW1 ~SW3 的黑色粗線條)而導通,使得開關元件SW4 亦處於導通狀態,因而誤判開關元件SW4 所對應之按鍵被按下(亦即發生鬼鍵)。另外,如第2B圖所示,當開關元件SW2 ~SW4 皆因其所對應的按鍵被按下時,開關元件SW2 ~SW4 將提供另一導通路徑,導致掃描線X1 與回報線Y1 導通,而誤判開關元件SW1 所對應的按鍵被按下。此外,如第2C圖所示, 由導通的開關元件SW1 、SW3 、SW4 所提供的另一導通路徑,將使得掃描線X1 與回報線Y2 導通,因而誤判開關元件SW2 所對應的按鍵被按下;再者,如第2D圖所示,當掃描線X2 與回報線Y1 被導通時,將誤判開關元件SW3 所對應的按鍵被按下。However, because of the physical characteristics of the key matrix 100, as long as the switching element SW to any key corresponding to three 1 ~ SW 4 is pressed, even if the remaining fourth key is not actually pressed, will The fourth button is incorrectly judged to be pressed. This button, which is not actually pressed but has been misjudged and has been pressed, is called a ghost key. Specifically, please refer to FIGS. 2A to 2D, which respectively show the possible causes of the ghost key phenomenon in the key matrix 100 shown in FIG. 1. As shown in FIG. 2A, when the switching elements SW 1 to SW 3 are turned on, the scanning line X 2 and the return line Y 2 are turned on by another conduction path (ie, a thick black line via the switching elements SW 1 to SW 3 ). Therefore, the switching element SW 4 is also in an on state, and thus the button corresponding to the switching element SW 4 is erroneously pressed (ie, a ghost key occurs). In addition, as shown in FIG. 2B, when the switching elements SW 2 to SW 4 are pressed by their corresponding buttons, the switching elements SW 2 to SW 4 will provide another conduction path, resulting in the scanning line X 1 and the return. The line Y 1 is turned on, and the button corresponding to the misjudgment switching element SW 1 is pressed. Furthermore, as shown in FIG section 2C, the switching element SW is turned to 1, SW 3, and a second conduction path SW 4 is provided, will be such that the scanning line X 1 and the return line Y 2 is turned on, and thus false switching element SW 2 Suo The corresponding button is pressed; further, as shown in FIG. 2D, when the scanning line X 2 and the return line Y 1 are turned on, it is erroneously determined that the button corresponding to the switching element SW 3 is pressed.

本發明所提出的新穎設計將可以避免產生上述的鬼鍵問題,亦即,本發明可真正區別出按鍵是否實際上被按下。請參照第3圖,第3圖是本發明一實施例之鬼鍵偵測電路300的示意圖。鬼鍵偵測電路300在本實施例中係為一薄膜鍵盤(membrane keyboard),而其包含有分別具有阻值RC 之至少一組掃描線(包括第一掃描線S1 與一第二掃描線S2 )、至少一組回報線(包括第一回報線R1 與一第二回報線R2 )、帶有一預定阻值RB 的複數個開關元件305a~305d、具有阻值RA 之兩電阻元件310a與310b、定義有參考電壓值Vth 之準位偵測電路315以及一處理器320,其中第一掃描線S1 、第二掃描線S2 、第一回報線R1 與第二回報線R2 係彼此交會且分別耦接於開關元件305a~305d,形成如第3圖中所示之井字型結構,而開關元件305a~305d中每一開關元件皆具有一第一端與一第二端,該第一、第二端中至少會有一端(例如第一端)塗佈有一特定導電材料(在本實施例中例如是導電碳墨(Carbon)),使得每一開關元件係具有預定阻值RB ,開關元件305a與305b的第一端係耦接至第一掃描線S1 ,其第二端則分別耦接至第一回報線R1 與第一回報線R2 ,而開關元件305c與305d的第一端 係耦接至第二掃描線S2 ,其第二端則分別耦接至第一回報線R1 與第一回報線R2 ,此外,開關元件305a、305c的第二端係經由第一回報線R1 而耦接至電阻元件310a,而開關元件305b、305d的第二端係經由第二回報線R2 而耦接至電阻元件310b,電阻元件310a、310b的另一端則耦接至一電壓源。如第3圖所示,準位偵測電路315係耦接於第一、第二回報線R1 與R2 ,其可偵測第一、第二回報線R1 與R2 上之量測電壓值,以指示出掃描線S1與S2上對應於回報線R1 與R2 的各開關元件305a~305d的狀態(處於不導通狀態或導通狀態)。The novel design proposed by the present invention can avoid the above-mentioned ghost key problem, that is, the present invention can truly distinguish whether the key is actually pressed. Please refer to FIG. 3, which is a schematic diagram of a ghost key detection circuit 300 according to an embodiment of the present invention. In this embodiment, the ghost key detection circuit 300 is a membrane keyboard, and includes at least one set of scan lines (including a first scan line S 1 and a second scan) respectively having a resistance R C . a line S 2 ), at least one set of return lines (including a first return line R 1 and a second return line R 2 ), a plurality of switching elements 305a-305d having a predetermined resistance R B , having a resistance R A two resistive elements 310a and 310b, is defined with the reference voltage level V th of the detecting circuit 315 and a processor 320, wherein the first scan line S 1, a second scan line S 2, a first of R 1 and return line The two return lines R 2 intersect each other and are respectively coupled to the switching elements 305a to 305d to form a well-shaped structure as shown in FIG. 3, and each of the switching elements 305a to 305d has a first end. And a second end, at least one of the first and second ends (eg, the first end) is coated with a specific conductive material (in this embodiment, for example, a conductive carbon ink), such that each switch based element having a predetermined resistance value R B, to the first end of the switching elements 305a and 305b line coupled to the first scan line S 1, of which Ends respectively coupled to the first return line R 1 and the first return line R 2, whereas the switching element 305c and the line 305d of the first end coupled to the second scan line S 2, a second terminal respectively coupled to the The first return line R 1 and the first return line R 2 , in addition, the second ends of the switching elements 305a, 305c are coupled to the resistive element 310a via the first return line R 1 and the second of the switching elements 305b, 305d The end is coupled to the resistive element 310b via the second return line R 2 , and the other end of the resistive element 310 a , 310 b is coupled to a voltage source. As shown in FIG. 3, the level detecting circuit 315 is coupled to the first and second return lines R 1 and R 2 , and can detect the measurement on the first and second return lines R 1 and R 2 . voltage value to indicate that the corresponding scan lines S1 and S2 on state 305a ~ 305d in the return line R 1 and R 2 each switching element (in a non-conductive state or a conductive state).

簡單來說,在本發明之實施例中,基於電阻元件310a與310b、數個開關元件305a~305d、第一掃描線S1 與一第二掃描線S2 本身的阻值,只要開關元件305a~305d的導通狀態(即相對按鍵的被按壓狀態)有所變化,便會影響第一、第二回報線R1 與R2 上的量測電壓值,使得準位偵測電路315基於參考電壓值Vth 與量測電壓值的比較可偵測出開關元件305a~305d所對應之按鍵的按壓狀態。基於前述的井字結構,當一按鍵所對應的開關元件並非因為該按鍵被按下而導通時,其相對的量測電壓值會因為導通路徑通過另外三個開關元件而得到較多的分壓,因而大於或等於參考電壓值Vth ,而當一按鍵所對應的開關元件係因為該按鍵被按下而導通時,其相對的量測電壓值因為導通路徑的不同而得到較少的分壓,因而會小於參考電壓值Vth ,是故,藉由比較量測電壓 值與參考電壓值Vth ,可得知按鍵的按壓狀態。Briefly, in the embodiment of the present invention, based on 310b, a plurality of switching elements 305a ~ 305d, a first scan line and a second scan line S-value resistor element 310a 1 S 2 itself, as long as the switching element 305a ~ 305d conducting state (i.e., opposite the keys depressed state) vary, it will affect the first, second return line R 1 and the voltage value measured on the 2 R, such that the level detecting circuit 315 based on the reference voltage The comparison of the value Vth with the measured voltage value detects the pressed state of the button corresponding to the switching elements 305a-305d. Based on the aforementioned well-word structure, when the switching element corresponding to a button is not turned on because the button is pressed, the relative measured voltage value is more divided by the conduction path through the other three switching elements. Therefore, it is greater than or equal to the reference voltage value V th , and when the switching element corresponding to a button is turned on because the button is pressed, the relative measured voltage value is less divided due to the difference in the conduction path. Therefore, it is smaller than the reference voltage value V th . Therefore, by comparing the measured voltage value with the reference voltage value V th , the pressed state of the button can be known.

為了正確地判別出實際的按鍵狀態,準位偵測電路315分別對第一、第二回報線R1 與R2 上的量測電壓值執行一準位偵測運作,來藉此判斷對應於每一開關元件實際的按鍵狀態。具體來說,當準位偵測電路315判定第一回報線R1 上的量測電壓值大於或等於一參考電壓值Vth 時,準位偵測電路315即會產生第一邏輯準位訊號SL ,以指示出一目前掃描線(例如S1 )上對應於第一回報線R1 的開關元件305a係處於不導通狀態,亦即開關元件305a所對應的按鍵並未被按下。反之,當第一回報線R1 上的量測電壓值小於參考電壓值Vth 時,準位偵測電路315指示出開關元件305a處於導通狀態,亦即,開關元件305a所對應的按鍵係被按下。因此,耦接於準位偵測電路315的處理器320即可依據準位偵測電路315所產生的第一、第二邏輯準位訊號SL 與SL ’來判斷對應於每一開關元件實際的按鍵狀態而不會有鬼鍵發生。In order to correctly determine the actual button state, the level detecting circuit 315 performs a level detecting operation on the measured voltage values on the first and second return lines R 1 and R 2 respectively, thereby determining that the corresponding The actual button state of each switching element. Specifically, when the level detecting circuit 315 determines that the measured voltage value on the first return line R 1 is greater than or equal to a reference voltage value V th , the level detecting circuit 315 generates the first logic level signal. S L , to indicate that the switching element 305 a corresponding to the first return line R 1 on a current scan line (for example, S 1 ) is in a non-conducting state, that is, the button corresponding to the switching element 305 a is not pressed. On the contrary, when the measured voltage value on the first return line R 1 is less than the reference voltage value V th , the level detecting circuit 315 indicates that the switching element 305a is in an on state, that is, the button corresponding to the switching element 305a is Press. Thus, coupled to the level detector circuit 315 to a processor 320 according to the first and second logic level signals S L and S L level detector circuit 315 'generated by the switching element corresponding to each determination The actual button state does not occur with ghost keys.

為了使準位偵測電路315能夠基於參考電壓值Vth 偵測出第一、第二回報線R1 與R2 上的電壓相對的變化,可利用其內部電晶體與外部第一、第二回報線R1 與R2 電性連接關係定義出參考電壓值Vth 。詳細而言,參考電壓值Vth 係設計為耦接於第一回報線R1 之第一電晶體Q1 、耦接於第一電晶體Q1 之第三電晶體Q3 的臨界電壓。以第一電晶體Q1 與第二電晶體Q2 所組成的第一偵測模組來說,當第一回報線R1 的量測電壓值大於或等於第一電晶體Q1 的 臨界電壓(即參考電壓值Vth )時,第一電晶體Q1 會導通並將其集極電壓拉低,致使第二電晶體Q2 因基極-射極的跨壓未能超過其臨界電壓(或稱導通電壓)而未導通。此時,第一邏輯準位訊號SL 會具有一高邏輯準位,而表示第一回報線R1 上之開關元件305a與305c的其中之一所對應到的按鍵並未被按下。反之,當第一回報線R1 的量測電壓值小於參考電壓值Vth 時,第一電晶體Q1 並不會導通,但因開路的關係會致使第二電晶體Q2 的基極-射極跨壓超過其導通電壓,而讓第二電晶體Q2 本身被導通。此時,第一邏輯準位訊號SL 會具有一低邏輯準位,而表示第一回報線R1 上之開關元件305a與305c的其中之一所對應到的按鍵已被按下。第一電晶體Q3 與第二電晶體Q4 所組成的第二偵測模組的操作則與上述的第一偵測模組相似,在此不另贅述。因此,依據上述第一電晶體Q1 或Q3 的導通與否,即可輸出具有不同邏輯準位的訊號來表示按鍵是否被按下。當準位偵測電路315基於參考電壓值Vth 偵測出第一、第二回報線R1 與R2 上的電壓相對的變化時,其相對產生的邏輯準位訊號SL ,可用來判斷對應每一開關元件305a~305d之按鍵的狀態。In order to make the level detecting circuit 315 can detect based on a reference voltage value V th of a first, opposite the second change in the voltage on the return line 2 R 1 and R, which can be used outside of the first transistor and the interior, the second The electrical connection relationship between the return lines R 1 and R 2 defines a reference voltage value V th . In detail, the reference voltage value V th is designed to be coupled to the first transistor Q 1 of the first return line R 1 and the threshold voltage of the third transistor Q 3 coupled to the first transistor Q 1 . In the first detecting module composed of the first transistor Q 1 and the second transistor Q 2 , when the measured voltage value of the first return line R 1 is greater than or equal to the threshold voltage of the first transistor Q 1 (ie, reference voltage value V th ), the first transistor Q 1 is turned on and its collector voltage is pulled low, so that the second transistor Q 2 fails to exceed its threshold voltage due to the base-emitter cross-voltage ( Or turn-on voltage) and not turned on. At this time, the first logic level signal S L will have a high logic level, and the button corresponding to one of the switching elements 305a and 305c on the first return line R 1 is not pressed. Conversely, when the measured voltage value of the first return line R 1 is less than the reference voltage value V th , the first transistor Q 1 does not conduct, but the open circuit relationship causes the base of the second transistor Q 2 - The emitter cross voltage exceeds its turn-on voltage, leaving the second transistor Q 2 itself turned on. At this time, the first logic level signal S L will have a low logic level, and the button corresponding to one of the switching elements 305a and 305c on the first return line R 1 has been pressed. The operation of the second detecting module of the first transistor Q 3 and the second transistor Q 4 is similar to that of the first detecting module, and is not described herein. Thus, according to the first transistor Q is turned on or not. 1 or Q can output signals having different 3 logic level to indicate whether the key is pressed. When the level detecting circuit 315 detects the relative change of the voltages on the first and second return lines R 1 and R 2 based on the reference voltage value V th , the relative generated logical level signal S L can be used to determine Corresponding to the state of the keys of each of the switching elements 305a to 305d.

請參照第4圖,第4圖是第3圖所示之鬼鍵偵測電路300的等效電路示意圖。如第4圖所示,當第一掃描線S1 動作時,其連接到的電壓SCAN1 會係一低電壓,而在本發實施例中此係形同於耦接於地。當第二掃描線S2 動作時,其連接到的電壓SCAN2 亦係 為一低電壓,本發實施例中亦係形同耦接至地。如第4圖所示,開關元件305a~305d皆處於不導通的狀態時,供應電壓VDD 會在第一、第二掃描線S1 、S2 動作時,分別透過電阻元件310a與310b來導通第一電晶體Q1 與Q3 ,使得第一、第二邏輯準位訊號SL 、SL ’如前所述會具有高邏輯準位。如此,處理器320即依據第一、第二掃描線S1 、S2 何者啟動以及訊號SL 、SL ’的邏輯準位來判斷對應每一開關元件之按鍵的狀態。Please refer to FIG. 4, which is an equivalent circuit diagram of the ghost key detecting circuit 300 shown in FIG. As shown in FIG. 4, when the operation of the first scan lines S 1, which is connected to the voltage lines SCAN 1 will be a low voltage, while in the present embodiment, this is tantamount to a line coupled to the ground. When the second scan line S 2 is activated, the voltage SCAN 2 connected thereto is also a low voltage, which is also coupled to the ground in the embodiment. As shown in FIG. 4, when the switching elements 305a to 305d are both in a non-conducting state, the supply voltage V DD is turned on through the resistance elements 310a and 310b when the first and second scanning lines S 1 and S 2 are activated. The first transistors Q 1 and Q 3 are such that the first and second logic level signals S L , S L ' have a high logic level as described above. In this manner, the processor 320 determines the state of the button corresponding to each switching element according to which of the first and second scan lines S 1 , S 2 is activated and the logic levels of the signals S L , S L '.

第5圖~第8圖則分別繪示第3圖所示之開關元件305a~305d所對應之按鍵分別被按下時的等效電路。為了簡化說明書內容,在此僅以第5圖來說明之,由於其餘第6圖~第8圖的電路操作原理係與第5圖的電路操作原理相似,故在此不多贅述。Fig. 5 to Fig. 8 respectively show equivalent circuits when the keys corresponding to the switching elements 305a to 305d shown in Fig. 3 are respectively pressed. In order to simplify the description, only the fifth figure is illustrated here. Since the circuit operation principle of the remaining 6th to 8th drawings is similar to the circuit operation principle of FIG. 5, it will not be described here.

如第5圖所示,由於僅開關元件305a所對應之按鍵被按下而其餘按鍵未被按下,所以供應電壓VDD 仍會在第二掃描線S2 動作時,透過電阻元件310b來導通第一電晶體Q3 ,使得第二邏輯準位訊號SL ’具有高邏輯準位。然而,第一回報線R1 上的量測電壓值VR1 在第一掃描線S1 動作時會因為分壓的關係而由下列等式所決定:VR1 =VDD ×(RB +RC )/(RA +RB +RC )基於上述關係,當僅開關元件305a未導通時,,使得第一回報線R1 上的量測電壓值VR1 小於第一電晶體Q1 的臨界電壓(亦即參考電壓值Vth ),因此,第一電晶體Q1 將不會導通,而第一邏輯準位 訊號SL 會具有低邏輯準位,故前述的處理器320可知道實際上僅開關元件305a所對應的按鍵被按下;上述VR1 與Vth 的關係可表示成如下:VR1 =VDD ×(RB +RC )/(RA +RB +RC )<Vth 一般來說,可將阻值RA 設計為極大於阻值RB 與RC ,以使得分壓後的電壓值VR1 會小於第一電晶體Q1 的臨界電壓VthAs shown in FIG. 5, since only the button corresponding to the switching element 305a is pressed and the remaining buttons are not pressed, the supply voltage V DD is still turned on through the resistive element 310b when the second scanning line S 2 is activated. The first transistor Q 3 has a second logic level signal S L ' with a high logic level. However, the measured voltage value V R1 on the first return line R 1 is determined by the following equation due to the partial pressure when the first scanning line S 1 is operated: V R1 =V DD ×(R B +R C ) / ( R A + R B + R C ) based on the above relationship, when only the switching element 305a is not turned on, so that the measured voltage value V R1 on the first return line R 1 is smaller than that of the first transistor Q 1 threshold voltage (i.e., the reference voltage value V th), therefore, the first transistor Q 1 will not be turned on, and the first logic level signal S L will have a low logic level, so that the processor 320 may know the actual The button corresponding to only the switching element 305a is pressed; the relationship between V R1 and V th can be expressed as follows: V R1 = V DD × (R B + R C ) / (R A + R B + R C ) <V th In general, the resistance value R A can be designed to be greater than the resistance values R B and R C such that the divided voltage value V R1 will be smaller than the threshold voltage V th of the first transistor Q 1 .

請參照第9圖,其所繪示為第3圖之開關元件305b~305d所對應的按鍵皆被按下而剩餘開關元件305a所對應的按鍵未被按下時的等效電路;第9圖的等效電路中關於阻值RA 、RB 與RC 的部分電路可被更精簡成第10圖所示之電路示意圖,以及第11A圖~第11B圖則分別繪示第一、第二掃描線S1 與S2 動作時第10圖所示之電路的等效電路示意圖。如第11B圖所示,當第二掃描線S2 動作時,電壓SCAN2 係形同一接地準位而電壓SCAN1 則形同一供應電壓準位(例如VDD ),此時電壓值VR1 與VR2 係等於VDD ×(RB +RC )/(RA +RB +RC ),如前所述,VDD ×(RB +RC )/(RA +RB +RC )會低於預定臨界電壓Vth ,而藉由上述準位偵測電路315的運作,處理器320即可正確判斷出開關元件305c與305d所對應的按鍵被按下。另一方面,如第11A圖所示,當第一掃描線S1 動作時,電壓SCAN1 係形同一接地準位而電壓SCAN2 則形同一供應電壓準位(例如VDD ),此時電壓值VR1 與VR2 會不同,其中電壓值VR2 會等於VDD ×(RB +RC )/(RA +RB +RC ), 而電壓值VR1 因為分壓的關係會由下列等式所決定:VR1 =VDD ×(3×RB +RC )/(RA +3×RB +RC )Please refer to FIG. 9 , which is an equivalent circuit when the buttons corresponding to the switching elements 305 b 305 305 of FIG. 3 are pressed and the buttons corresponding to the remaining switching elements 305 a are not pressed; FIG. 9 The circuit of the equivalent circuit for the resistance values R A , R B and R C can be further reduced to the circuit diagram shown in FIG. 10, and the first and second diagrams are respectively shown in FIGS. 11A to 11B. An equivalent circuit diagram of the circuit shown in FIG. 10 when the scanning lines S 1 and S 2 are operated. As shown in FIG. 11B, when the second scan line S 2 operates, the voltage SCAN 2 forms the same ground level and the voltage SCAN 1 forms the same supply voltage level (for example, V DD ), at which time the voltage value VR 1 and VR 2 is equal to V DD ×(R B +R C )/(R A +R B +R C ), as previously described, V DD ×(R B +R C )/(R A +R B +R C ) will be lower than the predetermined threshold voltage Vth , and by the operation of the above-mentioned level detecting circuit 315, the processor 320 can correctly judge that the buttons corresponding to the switching elements 305c and 305d are pressed. On the other hand, as shown on FIG. 11A, when the operation of the first scan lines S 1, the voltage of the same shape lines SCAN 1 and a ground level voltage of the same shape then the SCAN 2 the supply voltage level (e.g., V DD), when the voltage The value VR 1 and VR 2 will be different, wherein the voltage value VR 2 will be equal to V DD ×(R B +R C )/(R A +R B +R C ), and the voltage value VR 1 due to the partial pressure relationship will be Determined by the following equation: V R1 =V DD ×(3×R B +R C )/(R A +3×R B +R C )

由此可知,此時量測電壓值VR1 的數值係由阻值RA 、開關元件305b~305d的預定阻值RB 與掃描線S2 的阻值RC 的關係所決定。所以,當按鍵矩陣中任三個按鍵被按下而一剩餘按鍵未被按下時,雖然該剩餘按鍵所對應的一開關元件會因為另一導電路徑而被判定為導通狀態,然而,此導電路徑所造成的回報線量測電壓值會與該剩餘按鍵實際被按下時之導電路徑所造成的回報線量測電壓值有所不同,因此,本實施例可適當地設計阻值RA 、RB 與RC ,使得此時的量測電壓值VR 1大於或等於電晶體Q1的臨界電壓(亦即參考電壓值Vth ),因此,電晶體Q1 將會導通,而第一邏輯準位訊號SL 具有高邏輯準位,故前述的處理器320可知道實際上僅開關元件305a所對應的按鍵並未被按下;上述VR1 與Vth 的關係可表示成如下:VR1 =VDD ×(3×RB +RC )/(RA +3×RB +RC )≧Vth From this, it can be seen that the value of the measured voltage value V R1 at this time is determined by the relationship between the resistance value R A , the predetermined resistance value R B of the switching elements 305b to 305d, and the resistance value R C of the scanning line S 2 . Therefore, when any three buttons in the button matrix are pressed and a remaining button is not pressed, although a switch component corresponding to the remaining button is determined to be in a conductive state due to another conductive path, the conductive The return line measurement voltage value caused by the path is different from the return line measurement voltage value caused by the conductive path when the remaining button is actually pressed. Therefore, in this embodiment, the resistance value R A can be appropriately designed. R B and R C such that the measured voltage value V R 1 at this time is greater than or equal to the threshold voltage of the transistor Q1 (ie, the reference voltage value V th ), therefore, the transistor Q 1 will be turned on, and the first logic The level signal S L has a high logic level, so the aforementioned processor 320 can know that only the button corresponding to the switching element 305a is not pressed; the relationship between V R1 and V th can be expressed as follows: V R1 =V DD ×(3×R B +R C )/(R A +3×R B +R C )≧V th

因此,藉由適當地設計阻值RA 、RB 與RC 以及經由準位偵測電路315中電晶體穩定的操作,本實施例之鬼鍵偵測電路300可達到如下的效果:當形成一井字型結構之按鍵中的任三個按鍵被按下而一剰餘按鍵未被按下時,鬼鍵偵測電路300可正確地判斷出該剰餘按鍵實際上並未被按下,亦即,鬼鍵偵測電路300的設計不會因為井字型結構本身的物理特性而造成誤判,故可避免發 生鬼鍵。Therefore, by appropriately designing the resistance values R A , R B and R C and the operation of the transistor stabilization in the level detecting circuit 315, the ghost key detecting circuit 300 of the present embodiment can achieve the following effects: when formed When any one of the buttons of a well font structure is pressed and a remaining button is not pressed, the ghost key detecting circuit 300 can correctly determine that the remaining button is not actually pressed. That is, the design of the ghost key detection circuit 300 does not cause misjudgment due to the physical characteristics of the well-type structure itself, so that ghost keys can be avoided.

此外,在另一實施例中,準位偵測電路315中的電晶體Q1 ~Q4 亦可利用場效電晶體(Field Effect Transistor,FET)來實作之。再者,在其他實施例中,第一、第二偵測模組的部分運作亦可利用運算放大器來實施之;請參照第12圖,其所繪示為第3圖所示之準位偵測電路315的另一實施變化。如圖所示,上述的第一、第二偵測模組係分別以運算放大器OP1 與OP2 來實作,其中運算放大器OP1 與OP2 係作為比較器來使用,以比較器OP1 來說,其具有耦接於參考電壓值Vth 之一反向輸入端、用來接收第一回報線R1 上之量測電壓值VR1 的一非反向輸入端以及用來產生第一邏輯準位訊號SL 的一輸出端,當第一回報線上的量測電壓值VR1 大於參考電壓值Vth 時,比較器OP1 會輸出具有高邏輯準位的第一邏輯準位訊號SL ,以及當第一回報線上的量測電壓值VR1 小大於參考電壓值Vth 時,比較器OP1 會輸出具有低邏輯準位的第一邏輯準位訊號SL ,而比較器OP2 的操作則與比較器OP1 的操作相似。因此,由上可知,以運算放大器來實現準位偵測電路315,亦可使後續的處理器320判斷出井字型結構之按鍵是否實際上被按下;此一實施方式亦屬於本發明的範疇。另外,在另一實施例中,亦可將前述第一、第二偵測模組的其中之一以第3圖所示之第一電晶體與第二電晶體來實現,而將第一、第二偵測模組的其中另一以運算放大器來加以實現,換言之,在本發明的實施例中,第一、第二 偵測模組中的至少其一會利用第一電晶體、第二電晶體與相關的電阻來實現,而第一、第二偵測模組中的至少其一會利用運算放大器來實現;前述的種種實施變化皆符合本發明的精神。In addition, in another embodiment, the transistors Q 1 -Q 4 in the level detecting circuit 315 can also be implemented by using a Field Effect Transistor (FET). Furthermore, in other embodiments, part of the operation of the first and second detection modules can also be implemented by using an operational amplifier; please refer to FIG. 12, which is illustrated as the level detection shown in FIG. Another implementation variation of measurement circuit 315. As shown, the first and second detection modules are implemented by operational amplifiers OP 1 and OP 2 , respectively, wherein operational amplifiers OP 1 and OP 2 are used as comparators to compare comparators OP 1 . For example, it has an inverting input coupled to one of the reference voltage values V th , a non-inverting input for receiving the measured voltage value V R1 on the first return line R 1 , and used to generate the first An output terminal of the logic level signal S L , when the measured voltage value V R1 on the first return line is greater than the reference voltage value V th , the comparator OP 1 outputs a first logic level signal S having a high logic level L , and when the measured voltage value V R1 on the first return line is smaller than the reference voltage value V th , the comparator OP 1 outputs a first logic level signal S L having a low logic level, and the comparator OP 2 The operation is similar to that of the comparator OP 1 . Therefore, it can be seen from the above that the level detecting circuit 315 is implemented by an operational amplifier, and the subsequent processor 320 can also determine whether the button of the well type structure is actually pressed; this embodiment also belongs to the scope of the present invention. . In addition, in another embodiment, one of the first and second detecting modules may be implemented by the first transistor and the second transistor shown in FIG. 3, and the first, The second detection module is implemented by an operational amplifier. In other words, in the embodiment of the present invention, at least one of the first and second detection modules utilizes the first transistor and the second The transistor and the associated resistor are implemented, and at least one of the first and second detection modules is implemented by an operational amplifier; the foregoing various implementation variations are in accordance with the spirit of the present invention.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100‧‧‧按鍵矩陣100‧‧‧Key Matrix

300‧‧‧鬼鍵偵測電路300‧‧‧ ghost key detection circuit

305a~305d‧‧‧開關元件305a~305d‧‧‧Switching elements

310a、310b‧‧‧電阻元件310a, 310b‧‧‧resistive components

315‧‧‧準位偵測電路315‧‧ ‧ level detection circuit

320‧‧‧處理器320‧‧‧ processor

第1圖為鍵盤所具有之標準二乘二按鍵矩陣的示意圖。Figure 1 is a schematic diagram of a standard two by two button matrix with a keyboard.

第2A圖~第2D圖為第1圖所示之按鍵矩陣發生鬼鍵之可能情形的示意圖。Fig. 2A to Fig. 2D are schematic diagrams showing a possible situation in which a key matrix of the key matrix shown in Fig. 1 has a ghost key.

第3圖為本發明一實施例之鬼鍵偵測電路的示意圖。FIG. 3 is a schematic diagram of a ghost key detection circuit according to an embodiment of the present invention.

第4圖為第3圖所示之鬼鍵偵測電路的等效電路示意圖。Fig. 4 is a schematic diagram showing an equivalent circuit of the ghost key detecting circuit shown in Fig. 3.

第5圖為當第3圖所示之第一開關元件所對應之按鍵被按下時鬼鍵偵測電路的等效電路示意圖。Fig. 5 is a schematic diagram showing an equivalent circuit of the ghost key detecting circuit when the button corresponding to the first switching element shown in Fig. 3 is pressed.

第6圖為當第3圖所示之第二開關元件所對應之按鍵被按下時鬼鍵偵測電路的等效電路示意圖。Fig. 6 is a schematic diagram showing an equivalent circuit of the ghost key detecting circuit when the button corresponding to the second switching element shown in Fig. 3 is pressed.

第7圖為當第3圖所示之第三開關元件所對應之按鍵被按下時鬼鍵偵測電路的等效電路示意圖。Fig. 7 is a schematic diagram showing an equivalent circuit of the ghost key detecting circuit when the button corresponding to the third switching element shown in Fig. 3 is pressed.

第8圖為當第3圖所示之第四開關元件所對應之按鍵被按下時鬼鍵偵測電路的等效電路示意圖。Fig. 8 is a schematic diagram showing an equivalent circuit of the ghost key detecting circuit when the button corresponding to the fourth switching element shown in Fig. 3 is pressed.

第9圖為當第3圖所示之第二、第三、第四開關元件所對應的按 鍵被按下而剩餘的第一開關元件所對應的按鍵未被按下時鬼鍵偵測電路的等效電路示意圖。Figure 9 is a view corresponding to the second, third, and fourth switching elements shown in Fig. 3. The equivalent circuit diagram of the ghost key detection circuit when the key is pressed and the remaining corresponding switch element is not pressed.

第10圖為第9圖所示之等效電路的簡化電路圖。Figure 10 is a simplified circuit diagram of the equivalent circuit shown in Figure 9.

第11A圖~第11B圖為當第一、第二掃描線動作時第10圖所示之簡化等效電路的操作示意圖。11A to 11B are schematic diagrams showing the operation of the simplified equivalent circuit shown in Fig. 10 when the first and second scanning lines are operated.

第12圖為第3圖所示之準位偵測電路的另一實施變化示意圖。Fig. 12 is a view showing another variation of the implementation of the level detecting circuit shown in Fig. 3.

300‧‧‧鬼鍵偵測電路300‧‧‧ ghost key detection circuit

305a~305d‧‧‧開關元件305a~305d‧‧‧Switching elements

310a、310b‧‧‧電阻元件310a, 310b‧‧‧resistive components

315‧‧‧準位偵測電路315‧‧ ‧ level detection circuit

320‧‧‧處理器320‧‧‧ processor

Claims (11)

一種鬼鍵偵測電路,其包含有:帶有一預定阻值的複數個開關元件;至少一組掃描線(scan line);至少一組回報線(return line),該組回報線係與該組掃描線彼此交會並分別耦接於該複數個開關元件;一準位偵測電路,耦接於該組回報線,用來偵測該組回報線上之量測電壓值,以指示出該組掃描線上對應於該組回報線之至少一開關元件係處於不導通或導通狀態,該準位偵測電路包含有:一第一偵測模組,耦接於該第一回報線,用來接收該第一回報線上之一量測電壓值以產生該第一邏輯準位訊號;以及一第二偵測模組,耦接於該第二回報線,用來接收該第二回報線上之一量測電壓值以產生該第二邏輯準位訊號;其中,該第一、第二偵測模組中至少其一包含有:一第一電晶體,具有耦接於一供應電壓之一第一端、耦接於一接地準位之一第二端與耦接於一回報線之一控制端,其中該參考電壓值係該第一電晶體之臨界電壓;以及一第二電晶體,具有用來產生一邏輯準位訊號之一第一端、耦接於該接地準位之一第二端與耦接於該第一電晶體之該第一端的一控制端。 A ghost key detection circuit includes: a plurality of switching elements with a predetermined resistance; at least one set of scan lines; at least one set of return lines, the set of return lines and the set The scan lines are coupled to each other and coupled to the plurality of switching elements; a level detecting circuit is coupled to the set of return lines for detecting the measured voltage values on the set of return lines to indicate the set of scans The at least one switching component on the line corresponding to the set of return lines is in a non-conducting or conducting state, the level detecting circuit includes: a first detecting module coupled to the first return line for receiving the One of the first return lines measures the voltage value to generate the first logic level signal; and a second detection module is coupled to the second return line for receiving one of the second reward lines a voltage value to generate the second logic level signal; wherein at least one of the first and second detection modules includes: a first transistor having a first end coupled to a supply voltage, Coupling to a second end of a grounding level and coupling to a return a control terminal, wherein the reference voltage value is a threshold voltage of the first transistor; and a second transistor having a first end for generating a logic level signal coupled to the ground level A second end is coupled to a control end of the first end of the first transistor. 如申請專利範圍第1項所述之鬼鍵偵測電路,其中該組回報線上之至少一電壓值大於或等於該參考電壓值時,目前掃描線上對應於該組回報線之該至少一開關元件係處於不導通狀態。 The ghost key detecting circuit of claim 1, wherein the at least one switching component corresponding to the set of return lines on the current scan line when the at least one voltage value on the set of return lines is greater than or equal to the reference voltage value The system is in a non-conducting state. 如申請專利範圍第1項所述之鬼鍵偵測電路,其中該組回報線 上之至少一電壓值小於該參考電壓值時,目前掃描線上對應於該組回報線之該至少一開關元件係處於導通狀態。 Such as the ghost key detection circuit described in claim 1, wherein the set of return lines When at least one of the voltage values is less than the reference voltage value, the at least one switching element corresponding to the set of return lines on the current scan line is in an on state. 如申請專利範圍第1項所述之鬼鍵偵測電路,其另包含有:一處理器,耦接於該準位偵測電路,用來依據該準位偵測電路所產生之第一、第二邏輯準位訊號,以判斷對應每一開關元件之按鍵的狀態。 The ghost key detection circuit of claim 1, further comprising: a processor coupled to the level detecting circuit for generating the first one according to the level detecting circuit The second logic level signal is used to determine the state of the button corresponding to each switching element. 如申請專利範圍第1項所述之鬼鍵偵測電路,其另包含有:複數個電阻元件,每一電阻元件分別具有一第一阻值且並分別耦接於該組回報線;其中每一開關元件之第一、第二端中至少一端塗佈有一特定導電材料(conductive material)使得每一開關元件各自具有該預定阻值,而該組掃描線分別具有一第三阻值;以及當該複數個開關元件中三個開關元件處於導通狀態而一剰餘開關元件處於不導通狀態時,該剰餘開關元件所對應之一回報線上之一量測電壓值基於一電阻元件之第一阻值、該三個開關元件之預定阻值與該組掃描線之第三阻值的關係而大於或等於該參考電壓值。 The ghost key detection circuit of claim 1, further comprising: a plurality of resistance elements, each of the resistance elements having a first resistance value and coupled to the set of return lines respectively; At least one end of the first and second ends of a switching element is coated with a specific conductive material such that each switching element has the predetermined resistance value, and the set of scan lines respectively have a third resistance value; When three of the plurality of switching elements are in an on state and one of the remaining switching elements is in a non-conducting state, one of the measured voltage values on one of the return lines corresponding to the remaining switching elements is based on the first resistance of the one of the resistive elements The value, the predetermined resistance of the three switching elements, and the third resistance of the set of scan lines are greater than or equal to the reference voltage value. 如申請專利範圍第1項所述之鬼鍵偵測電路,其另包含有:複數個電阻元件,分別具有一第一阻值且並分別耦接於該組回報線;其中每一開關元件之第一、第二端中至少一端塗佈有一特定導電材料使得每一開關元件各自具有該預定阻值,而該組掃描線分別具有一第三阻值;以及當對應於該組回報線之該至少一開關元件處於導通狀態時,該開關元件所對應之一回報線上的量測電壓值基於該第一阻值、該開關元件之預定阻值與該組掃描線之第三阻值的關係而小於該參考電壓值。 The ghost key detection circuit of claim 1, further comprising: a plurality of resistance elements each having a first resistance value and coupled to the set of return lines respectively; wherein each of the switching elements is At least one end of the first and second ends is coated with a specific conductive material such that each of the switching elements has the predetermined resistance value, and the set of scan lines respectively have a third resistance value; and when corresponding to the set of return lines When the at least one switching element is in an on state, the measured voltage value on one of the return lines corresponding to the switching element is based on the first resistance value, a predetermined resistance value of the switching element, and a third resistance value of the set of scan lines. Less than the reference voltage value. 如申請專利範圍第1項所述之鬼鍵偵測電路,其中該第一、第二偵測模組中至少其一包含有:一比較器,具有耦接於該參考電壓值之一反向輸入端、用來接收一回報線上之一量測電壓值的一非反向輸入端與用來產生一邏輯準位訊號之一輸出端。 The ghost key detection circuit of claim 1, wherein at least one of the first and second detection modules comprises: a comparator having a reverse coupled to the reference voltage value An input, a non-inverting input for receiving a measured voltage value on a return line, and an output for generating a logic level signal. 一種使用於一鬼鍵偵測電路之方法,該鬼鍵偵測電路至少具有帶有一預定阻值的複數個開關元件、一準位偵測電路,該準位偵測電路包含有:一第一偵測模組,耦接於該第一回報線,用來接收該第一回報線上之一量測電壓值以產生該第一邏輯準位訊號;以及一第二偵測模組,耦接於該第二回報線,用來接收該第二回報線上之一量測電壓值以產生該第二邏輯準位訊號;該第一、第二偵測模組中至少其一包含有:一第一電晶體,具有耦接於一供應電壓之一第一端、耦接於一接地準位之一第二端與耦接於一回報線之一控制端;該參考電壓值係該第一電晶體之臨界電壓;以及一第二電晶體,具有用來產生一邏輯準位訊號之一第一端、耦接於該接地準位之一第二端與耦接於該第一電晶體之該第一端的一控制端、至少一組掃描線與至少一組回報線,該組回報線係與該組掃描線彼此交會並分別耦接於該複數個開關元件,以及該方法包含有:對該組回報線上之至少一量測電壓值執行準位偵測;其中,當該組回報線中至少一回報線上之一量測電壓值大於或等於一參考電壓值時,指示出目前掃描線上對應於該回報線之一開關元件係處於不導通狀態;以及其中,當該回報線上之該量測電壓值小於該參考電壓值時,產生該邏輯準位訊號以指示出該目前掃描線上對應於該回報線之 該開關元件係處於導通狀態。 A method for detecting a ghost key detecting circuit, the ghost key detecting circuit having at least a plurality of switching elements with a predetermined resistance value and a level detecting circuit, the level detecting circuit comprising: a first The detection module is coupled to the first return line for receiving a measured voltage value on the first return line to generate the first logic level signal; and a second detecting module coupled to the second detecting module The second return line is configured to receive a measured voltage value on the second return line to generate the second logic level signal; at least one of the first and second detecting modules includes: a first The transistor has a first end coupled to a supply voltage, a second end coupled to a ground level, and a control end coupled to a return line; the reference voltage is the first transistor a threshold voltage; and a second transistor having a first end for generating a logic level signal, a second end coupled to the ground level, and the first end coupled to the first transistor a control end of one end, at least one set of scan lines and at least one set of return lines, the set of return lines And the set of scan lines intersect each other and are respectively coupled to the plurality of switch elements, and the method includes: performing level detection on the at least one measured voltage value on the set of return lines; wherein, when the set of return lines is When the measured voltage value of the at least one return line is greater than or equal to a reference voltage value, indicating that the switching element corresponding to the return line on the current scan line is in a non-conducting state; and wherein the measurement is performed on the return line When the voltage value is less than the reference voltage value, the logic level signal is generated to indicate that the current scan line corresponds to the return line The switching element is in an on state. 如申請專利範圍第8項所述之方法,其另包含有:依據該邏輯準位訊號來判斷對應於該開關元件之一按鍵的狀態。 The method of claim 8, further comprising: determining, according to the logic level signal, a state corresponding to a button of the switching element. 如申請專利範圍第8項所述之方法,其中該鬼鍵偵測電路另包含有複數個電阻元件,每一電阻元件分別具有一第一阻值且並分別耦接於該組回報線;以及,當該複數個開關元件中三個開關元件處於導通狀態而一剩餘開關元件處於不導通狀態時,該剰餘開關元件所對應之一回報線上的一量測電壓值由於一電阻元件之第一阻值、該三個開關元件之預定阻值與該組掃描線之第三阻值的關係而大於或等於該參考電壓值。 The method of claim 8, wherein the ghost key detection circuit further comprises a plurality of resistance elements, each of the resistance elements having a first resistance value and coupled to the set of return lines respectively; When three of the plurality of switching elements are in an on state and the remaining ones are in a non-conducting state, a measured voltage value on a return line corresponding to the remaining switching elements is first due to a resistive element The resistance value, the predetermined resistance of the three switching elements, and the third resistance of the set of scan lines are greater than or equal to the reference voltage value. 如申請專利範圍第8項所述之方法,其中該鬼鍵偵測電路另包含有複數個電阻元件,每一電阻元件分別具有一第一阻值且並分別耦接於該組回報線;以及,當對應於該回報線之該開關元件處於導通狀態時,該開關元件所對應之該回報線上的該量測電壓值由於一電阻元件之第一阻值、該開關元件之預定阻值與該組掃描線之第三阻值的關係而小於該參考電壓值。 The method of claim 8, wherein the ghost key detection circuit further comprises a plurality of resistance elements, each of the resistance elements having a first resistance value and coupled to the set of return lines respectively; When the switching element corresponding to the return line is in an on state, the measured voltage value on the return line corresponding to the switching element is due to a first resistance value of a resistive element, a predetermined resistance value of the switching element, and the The relationship of the third resistance of the group scan line is smaller than the reference voltage value.
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