TWI484764B - Transmitter and transceiver having the same in an rfid system - Google Patents

Description

Transmitter in radio frequency identification system and transceiver including the same

SUMMARY OF THE INVENTION The present invention generally relates to a transmitter, and more particularly to a transceiver for a radio frequency identification (RFID) system including the transmitter.

RFID technology is now commonplace and is used in a variety of industries, such as electronic payments, security, and inventory counts. Figure 1 shows the structure of a conventional reader 1 in an RFID system. The reader 1 may include a directional coupler 10 having four turns (101, 102, 103, and 104), an antenna 11, a transmitter portion 12, and a receiver portion 13. The transmitter unit 12 includes an oscillator 121, a surface acoustic wave (SAW) device 122, an amplifier 123, a first diode 124, and a forward power calibration controller 125. The receiver unit 13 includes a second diode 131, an amplifier 132 and a comparator 133.

A signal from the transmitter portion 12 can be transmitted to the antenna 11 via the directional coupler 10. However, the four-way directional coupler 10 may significantly attenuate the signal from the transmitter portion 12, and thus the attenuated signals transmitted by the antenna 11 may not have sufficient power to activate an electronic tag (not shown).

Still referring to FIG. 1, first diode 124 and forward power calibration controller 125 form a feedback path to monitor the output power and maintain the amplitude of the transmitted RF signal at a desired level. A complex feedback mechanism must be developed to assist the first diode 124 and the forward power calibration controller 125 to control the output power. Furthermore, when designing the feedback mechanism, it takes a lot of work to solve the problem of stability.

Therefore, it is necessary to utilize a simplified circuit to provide a cost effective Rate device.

An example of the present invention can provide an emitter in an RFID system, the transmitter comprising a signal generator having a PIN diode and generating a first signal, and a cathode connected to the PIN diode a direction unit; and an antenna connected to the direction unit, wherein the signal generator has a first terminal configured to receive a first control signal to control a frequency band of the first signal, and a second terminal, the setting Receiving a second control signal to control a modulation depth of the first signal.

Some examples of the present invention may also provide a transmitter in an RFID system, the transmitter including a signal generator and a direction unit, the signal generator having a carrier generator, an amplifier for receiving a carrier signal from the carrier generator, a PIN diode comprising an anode connected to an output of the amplifier, and a bias circuit having a first terminal for receiving a first control signal to control a frequency band of the carrier signal, a second The terminal is connected to an anode of the PIN diode and the output of the amplifier, and a third terminal is connected to a cathode of the PIN diode, and the direction unit is connected to the cathode of the PIN diode.

Some examples of the present invention may also provide a transceiver in an RFID system, the transceiver including a signal generator having a PIN diode and generating a first signal, and a cathode connected to the PIN diode a direction unit; and a receiving circuit connected to the direction unit, wherein the signal generator comprises a first terminal configured to receive a first control signal to control a frequency band of the first signal, and a second The terminal is configured to receive a second control signal to control a modulation depth of the first signal.

Other features and advantages of the present invention will be set forth in the description which follows. It can also be learned by practicing the invention. The features and advantages of the present invention will be understood and attained by the <RTIgt;

It is to be understood that the foregoing general descriptions

Reference will now be made in detail to the embodiments of the invention, Wherever possible, the same reference numerals will be used to refer to the

2A is a block diagram of a transmitter 2 in an RFID system in accordance with one example of the present invention. Referring to FIG. 2A, the transmitter 2 can include a micro control unit (MCU) 3, a digital processor 4, a signal generator 20, a direction unit 5, and an antenna 6.

The digital processor 4 can be connected to the MCU 3. The signal generator 20 can be connected between the digital processor 4 and the direction unit 5. The direction unit 5 can be connected to the antenna 6, whereby a signal can be transmitted to a tag 7. In another example, the digital processor 4 and the MCU 3 can be integrated into a control circuit (not shown).

The signal generator 20 can include a carrier generator 201, an amplifier 202, a diode 203, and a bias circuit 204. The digital processor 4 can be coupled to a first terminal of the bias circuit 204. A second terminal of the biasing circuit 204 can be coupled to the anode of the diode 203 and an output of the amplifier 202. A third terminal of the biasing circuit 204 can be coupled to the cathode of the diode 203. Amplifier 202 can have an input terminal that can be coupled to carrier generator 201. The third terminal of the biasing circuit 204 and the cathode of the diode 203 are connectable to the directional unit 5.

The carrier generator 201 can generate a signal TS1 having a frequency of f _ts1 , which can then be transmitted to the amplifier 202 . The amplifier 202 can receive the signal TS1, then amplify the voltage and/or power of the signal TS1, and thereby output an amplified signal TS2, which can be transmitted to the diode 203. In another example, the frequency f _ts1 can be, but is not limited to, approximately 433.92 megahertz (MHz), and the amplifier 202 can linearly amplify the signal TS1. In yet another example, the frequency f _ts1 can be, but is not limited to, approximately 915 MHz.

The diode 203 can be, but is not limited to, a PIN (p-intrinsic-n) dipole. The digital processor 4, which is controlled by the MCU 3, can transmit a control signal to the bias circuit 204 to change the voltage level across the diode 203, which in turn can change the impedance of the diode 203. In this manner, the amplitude of the signal TS2 can be varied to perform an Amplitude-shift-keying (ASK) modulation on the signal TS2. The diode 203 can output and transmit an ASK modulation signal TS3 to the direction unit 5. The direction unit 5 can process the signal TS3 and transmit a signal TS4 to the antenna 6. This signal TS4 can be transmitted by the antenna 6 to the tag 7.

A fourth terminal of the biasing circuit 204 can be coupled to a terminal VM that can supply at least one voltage level to the fourth terminal of the biasing circuit 204. For example, the terminal VM can supply a relatively low voltage level to the bias circuit 204 such that the signal generator 20 can perform ASK modulation with a 75% modulation depth. In another example, the terminal VM can supply a relatively high voltage level to the bias circuit 204 such that the signal generator 20 performs ASK modulation with a 50% modulation depth. In another example, the terminal VM can be eliminated and the fourth terminal of the biasing circuit 204 can be connected to the digital processor 4.

Figure 2B further illustrates a block diagram of the transmitter 2 of Figure 2A in accordance with an exemplary embodiment of the present invention. Referring to FIG. 2B, the bias circuit 204 can include a variable resistor VR, two resistors R1 and R2, two inductors L1 and L2, a switch SW and a transistor Q1.

The variable resistor VR can have a terminal connected to a voltage terminal VDD that supplies a direct current (DC) voltage level. The other terminal of the variable resistor VR is connectable to the resistor R1 and the switch SW connected in parallel. The switch SW can be connected to the digital processor 4. The resistor R2 is connectable to the resistor R1 and the inductor L1 connected in series. The inductor L1 can have one end of the anode connected to the output of the amplifier 202 and the diode 203. The inductor L2 may have one terminal of the cathode and direction unit 5 connected to the diode 203, and another terminal to be grounded. The transistor Q1 can have a first terminal connected to the terminal VM. The transistor Q1 may further have a second terminal and a third terminal, and the resistor R2 may be connected between the second and third terminals of the transistor Q1. In one example, the transistor Q1 can be, but not limited to, a complementary metal-oxide-semiconductor (CMOS) transistor. In another example, the switch SW and the transistor Q1 can be, but not limited to, a transistor fabricated by an integrated circuit (IC) process.

This control signal from the digital processor 4 can be used to turn the switch SW on/off. When the switch SW is off (open circuit), the signal generator 20 can perform the ASK modulation. In other words, the digital processor 4 can determine whether the signal generator 20 is to perform the ASK modulation. The terminal VM can supply a relatively low voltage level to the transistor O1 such that the signal generator 20 can perform ASK modulation with a 75% modulation depth. In another example, the terminal VM can supply a relatively high voltage level to the transistor O1 such that the signal generator 20 performs ASK modulation with a 50% modulation depth. In another example, the terminal VM can be excluded and the transistor Q1 can be connected to the digital processor 4.

In one example, the resistance of the variable resistor VR ranges from 10 Ω to 50 kΩ, the resistance of each of the resistors R1 and R2 is 10 kΩ, and the inductance of each of the inductors L1 and L2 is 100 Ω. nH (Nano-Henry). However, the values of the above resistance and inductance can be varied in another example to change the modulation depth.

Figure 3 is a block diagram of a transceiver 2' in an RFID system in accordance with one example of the present invention. Referring to FIG. 3, the transceiver 2' may include an MCU 3', a digital processor 4', a signal generator 20', a direction unit 5', and an antenna 6', which are similar to those illustrated with reference to FIG. 2A. The MCU 3, the digital processor 4, the signal generator 20, the direction unit 5 and the antenna 6 are described, except that a memory 8 and a receiving circuit 30 to the transceiver 2' can be added. The three-turn direction unit 5' does not cause a large signal attenuation compared to the four-turn directional coupler 10 of FIG.

The receiving circuit 30 can be connected between the direction unit 5' and the MCU 3'. In one example, the receiving circuit 30 can be, but is not limited to, a detecting circuit, which can include a diode, an operational (OP) amplifier, and a comparator (not shown). The diode, the operational amplifier and the comparator can be coupled in series to demodulate the signal received by the antenna 6'.

Receiver circuit 30 can rectify the signal received from antenna 6&apos; and remove the carrier from the rectified signal to obtain an envelope of the rectified signal. The receiving circuit 30 can additionally demodulate the envelope to produce a demodulated signal. Thereby, the material obtained from the signal received from the antenna 6' can be obtained by the MCU 3'.

The memory 8 can be connected to the MCU 3'. In one example, memory 8 can be, but is not limited to, a non-volatile memory and can be programmed. Memory 8 can include a first field that can contain a first set of identification information. The memory 8 can also include a second field that can contain a second set of identification information. The first and second sets of identification information may include, but are not limited to, a series of numbers and/or symbols. The first set of identification information may be permanent, and the second set of identification information may be changed. In another example, the memory 8 can be replaced by two independent memories to separately store the first set of identification information and the first Two sets of identification information. In still other examples, memory 8 can be integrated into MCU 3' or digital processor 4' into a single wafer.

In an example, the MCU 3' can access the memory 8 and obtain the first and second sets of identification information. The MCU 3' and the digital processor 4' control the signal generator 20' to generate a signal TS5 containing information about the first and second sets of identification information. The direction unit 5' can process the signal TS5 and can also transmit a signal TS6 to the servo 9 via the antenna 6'. In another example, the signal TS5 can be transmitted by another interface to the server 9, such as an Ethernet, Universal Serial Bus (USB), or Bluetooth. In yet another example, the MCU 3&apos; obtains the first and second sets of identification information and transmits them to the server 9, such as a USB or Bluetooth interface, by wire or wireless connection.

The server 9 can recognize the first and/or second set of identification information. If the identification information is recognized, the server 9 can use the first and/or second sets of identification information to generate a third set of identification information. The server 9 can transmit a signal containing the third set of identification information to the transceiver 2', wherein the signal can be demodulated by the receiving circuit 30, so that the MCU 3' can obtain the third set of identification information and store the information. In the second field of memory 8. The third set of identification information can be used to identify the transceiver 2' in the next communication. In this manner, the transceiver 2' is authenticated during the information upload or download process.

Both the transmitter 2 shown in Figs. 2A and 2B and the transceiver 2' shown in Fig. 3 use an open loop control instead of the complex feedback control circuit illustrated with reference to Fig. 1.

Those skilled in the art should be aware that changes can be made to the above examples without departing from the broad inventive concepts. Therefore, it is understood that the invention is not limited to the specific examples of the invention, but is intended to cover the modifications of the invention and the scope of the invention as defined by the appended claims.

In addition, in describing a representative example of the present invention, the present specification may The method and/or process of the present invention is represented by a particular sequence of steps; however, since the scope of the method or process is not tied to the particular order of steps set forth herein, the method or process should not be limited by the The specific sequence of steps is described. It is also possible to be familiar with the sequence of other steps as a person skilled in the art. Therefore, the specific order of steps set forth in this specification should not be construed as limiting the scope of the application. In addition, the scope of application for the method and/or process of the present invention should not be limited to the implementation of the order of the steps in the written form, which is readily understood by those skilled in the art, and the order may be changed and still It is intended to be within the spirit and scope of the invention.

1‧‧‧Reader

2‧‧‧transmitter

2'‧‧‧ transceiver

3‧‧‧Micro Control Unit

3’‧‧‧Micro Control Unit

4‧‧‧Digital Processor

4'‧‧‧Digital Processor

5‧‧‧ Directional unit

5’‧‧‧Three Directions Unit

6‧‧‧Antenna

6’‧‧‧Antenna

7‧‧‧ label

7’‧‧‧ label

8‧‧‧ memory

9‧‧‧Server

10‧‧‧four-way directional coupler

11‧‧‧Antenna

12‧‧‧Transmitter Department

13‧‧‧ Receiver Department

20‧‧‧Signal Generator

20’‧‧‧Signal Generator

30‧‧‧ receiving circuit

101, 102, 103, 104‧‧‧埠

121‧‧‧Oscillator

122‧‧‧Surface acoustic wave device

123‧‧‧Amplifier

124‧‧‧First Diode

125‧‧‧ Forward Power Leveling Controller

131‧‧‧second diode

132‧‧‧Amplifier

133‧‧‧ comparator

201‧‧‧Carrier generator

201’‧‧‧Carrier Generator

202‧‧‧Amplifier

202’‧‧Amplifier

203‧‧‧ diode

203’‧‧‧ diode

204‧‧‧Bias circuit

204'‧‧‧ Bias circuit

The foregoing summary of the invention, as well as the above detailed description For the purposes of illustration of the present invention, various drawings are illustrated in the drawings. However, it should be understood that the invention is not limited to the precise arrangements and devices disclosed.

In the drawings: FIG. 1 is a block diagram of a conventional reader 1 in an RFID system; FIG. 2A is a block diagram of a transmitter 2 in an RFID system according to an example of the present invention; FIG. 2B is further illustrated according to the present invention. In the example of the invention, a block diagram of the transmitter 2 shown in FIG. 2A is shown; FIG. 3 is a block diagram of a transceiver 2' in the RFID system according to an example of the present invention.

2‧‧‧transmitter

3‧‧‧Micro Control Unit

4‧‧‧Digital Processor

5‧‧‧ Directional unit

6‧‧‧Antenna

7‧‧‧ label

20‧‧‧Signal Generator

201‧‧‧Carrier generator

202‧‧‧Amplifier

203‧‧‧ diode

204‧‧‧Bias circuit

Claims (20)

A transmitter in an RFID system, the transmitter comprising: a signal generator having a PIN diode and a bias circuit and generating a first signal; a direction unit coupled to the PIN diode a cathode; and an antenna connected to the direction unit, wherein the signal generator comprises a first terminal configured to receive a first control signal to control a frequency band of the first signal, and a second terminal Is configured to receive a second control signal to control a modulation depth of the first signal, and the bias circuit has a first port connected to the first terminal, and one connected to the PIN diode a second turn of the anode and a third turn connected to the cathode of the PIN diode. The transmitter of claim 1, wherein the signal generator comprises an amplifier having an output coupled to the anode of the PIN diode. The transmitter of claim 2, wherein the signal generator comprises: a carrier generator coupled to an input of the amplifier, the bias circuit having the output coupled to the output of the amplifier Second. The transmitter of claim 3, wherein the bias circuit further comprises a fourth port connected to the second terminal. The transmitter of claim 4, wherein the bias circuit further comprises: a variable resistor provided with a voltage level; a switch connected in series to the variable resistor, and electrically Coupled to the first terminal of the bias circuit; a first resistor connected in parallel to the switch; a second resistor connected in series to the first resistor; a first inductor having a first terminal connected to the second resistor, And a second terminal electrically coupled to the second terminal of the bias circuit; and a second inductor having a first terminal electrically coupled to the third terminal of the bias circuit A second terminal, wherein the second terminal is grounded. The transmitter of claim 5, wherein the bias circuit further comprises a transistor having a first terminal electrically coupled to the fourth terminal of the bias circuit, a second terminal and a third terminal, wherein the second resistor is connected between the second and third terminals. The emitter of claim 6, wherein the transistor is a complementary metal oxide semiconductor (CMOS) transistor. A transmitter in an RFID system, the transmitter comprising: a signal generator comprising: a carrier generator; an amplifier for receiving a carrier signal from the carrier generator; a PIN diode having An anode connected to an output of the amplifier; and a bias circuit having a first terminal for receiving a first control signal for controlling a frequency band of the carrier signal, and a connection to the PIN diode An anode and a second terminal of the output of the amplifier, and a third terminal connected to a cathode of the PIN diode; and a directional unit connected to the cathode of the PIN diode. The transmitter of claim 8, wherein the bias circuit further comprises a fourth terminal for receiving a second control signal to control the A modulation depth of the carrier signal. The transmitter of claim 9, wherein the bias circuit further comprises: a variable resistor provided with a voltage level; a switch connected in series to the variable resistor, and electrically a first terminal coupled to the bias circuit; a first resistor connected in parallel to the switch; a second resistor connected in series to the first resistor; a first inductor having a first terminal connected to the second resistor, and a second terminal electrically coupled to the second terminal of the bias circuit; and a second inductor electrically coupled to the bias One of the third terminals of the circuit is a first terminal and a second terminal, wherein the second terminal is grounded. The transmitter of claim 10, wherein the bias circuit further comprises a transistor having a first terminal electrically connected to the fourth terminal of the bias circuit, a second terminal and a third terminal, wherein the second resistor is connected between the second and third terminals. The emitter of claim 11, wherein the transistor is a complementary metal oxide semiconductor (CMOS) transistor. A transceiver in an RFID system, the transceiver comprising: a signal generator having a PIN diode and a bias circuit and generating a first signal; a direction unit coupled to the PIN diode a cathode; and a receiving circuit coupled to the direction unit, wherein the signal generator includes a first terminal configured to receive a first control signal to control a frequency band of the first signal, and a second a terminal configured to receive a second control signal to control a modulation depth of the first signal, and the bias circuit has a first port connected to the first terminal and connected to the PIN diode a second crucible of an anode and a third crucible connected to the cathode of the PIN diode. A transceiver as claimed in claim 13 wherein the signal generator comprises an amplifier having an output coupled to the anode of the PIN diode. The transceiver of claim 14, wherein the signal generator further comprises: a carrier generator coupled to an input of the amplifier, the bias circuit having the output coupled to the output of the amplifier Second. The transceiver of claim 15, wherein the bias circuit further comprises a fourth port connected to the second terminal. The transceiver of claim 15 or 16, wherein the bias circuit further comprises: a variable resistor provided with a voltage level; a switch connected in series to the variable resistor, and Electrically coupled to the first turn of the bias circuit; a first resistor connected in parallel to the switch; a second resistor connected in series to the first resistor; a first inductor, The first terminal is connected to the second resistor, and the second terminal is electrically coupled to the second terminal of the bias circuit; and a second inductor is electrically coupled to the second terminal One of the third terminals of the bias circuit is a first terminal and a second terminal, wherein the second terminal is grounded. The transceiver of claim 17, wherein the bias circuit further comprises a transistor having the electrical coupling to the bias circuit The fourth terminal is a first terminal, a second terminal, and a third terminal, wherein the second resistor is connected between the second and third terminals. The transceiver of claim 13 further includes a memory, wherein a first group of information and a second group of information are stored in the memory, and the first and second groups of information are transmitted to the first server. A transceiver as claimed in claim 19, wherein a third set of information relating to the first and second sets of information is received and stored in the memory.