TWI481837B - Devices and methods for eliminating pop noise - Google Patents

Description

Surge elimination device and method for eliminating surge

The present invention relates to an apparatus and method, and more particularly to a surge elimination apparatus and a method of using the same to eliminate a surge.

In the design of audio of various portable electronic devices such as personal computers, mobile phones, and personal digital assistants (PDAs), the surge problem has always been one of the problems that plague people.

Generally, the glitch originates from the following situations: a sudden wave generated when an audio accessory is inserted; when the audio accessory is inserted, a glitch is generated due to poor design of the audio accessory itself; the two glitch passes through one of the mobile phones When digital signal processing (DSP) is used for filtering, the filtering performance of the DSP is insufficient, and the glitch is not cleaned, etc.; because of the switching of the audio path, such as switching the channel into a headset, a Bluetooth headset, The audio accessory output such as a microphone generates a glitch; the adjustment of the sound produces a glitch and the like. Because the first three cases caused the glitch caused by the audio accessory, the first three cases are attributed to the first type of glitch, and the latter two cases are attributed to the second type of glitch.

However, whether it is the first type of glitch or the second type of glitch, the generation of the glitch is not allowed by the user.

In view of this, it is necessary to provide a device that can effectively eliminate the glitch.

In addition, it is also necessary to provide a method of eliminating surges using the device.

A surge elimination device includes a processing module, a surge eliminating circuit, and a storage module, wherein the surge eliminating circuit and the storage module are electrically connected to the processing module, respectively, the surge eliminating circuit The utility model includes a control terminal and a surge elimination chip. The storage module stores a flow for driving the surge cancellation circuit. The processing module determines whether the input audio signal has a glitch, and if there is no glitch, controls the The voltage of the control terminal of the surge cancellation circuit is a first level, and the audio signal is not affected by the surge cancellation chip. If there is a surge, the processing module determines the type of the surge, the surge The type includes a first type of glitch generated when switching an audio accessory and a second type of glitch generated when the sound is adjusted. After the processing module determines the type of the glitch, the corresponding process in the storage module is executed and controlled. The voltage at the control terminal is at a second level to drive the surge cancellation circuit to cancel the glitch.

A method for eliminating a glitch, comprising the steps of: the processing module determining a type of the glitch; and when determining that the glitch is a first type of glitch, the processing module runs a first process, The first process includes: the processing module generates an interrupt signal; the processing module runs an auxiliary process, and controls the voltage of the control terminal to be a second level to drive the surge cancellation circuit to cancel the surge; The module determines whether an audio accessory is stable; if stable, the audio accessory enters a stable state; if unstable, the audio accessory enters an initial state, and waits for a next interrupt signal; when determining that the hop is a first In the second type of surge, the processing module runs a second process, the second process includes: the processing module runs an auxiliary process, and controls the voltage of the control terminal to be a second level to drive the surge cancellation The circuit eliminates the glitch; The module sets an audio path gain and other parameters; the processing module stops running the satellite process.

Compared with the prior art, the spur elimination device sets different spur waves by setting a spur elimination circuit and different driving processes for different types of glitch. Elimination can effectively avoid problems such as incomplete elimination of the surge and poor audio output in the prior art, so that the user can enjoy a perfect sound quality.

100‧‧‧ Surge Elimination Device

10‧‧‧Processing module

20‧‧‧ Surge Elimination Circuit

30‧‧‧ Storage Module

12‧‧‧CPU

14‧‧‧ Analog Digital Converter

16‧‧‧Time unit

18‧‧‧ interrupt timer

22‧‧‧Control end

23‧‧‧ Surge Elimination Wafer

24‧‧‧ input

26‧‧‧ first output

28‧‧‧second output

S1‧‧‧first source

S2‧‧‧Second source

G1‧‧‧ first gate

G2‧‧‧second gate

D1‧‧‧First bungee

C1‧‧‧first capacitor

C2‧‧‧second capacitor

D2‧‧‧second bungee

1 is a functional block diagram of a preferred embodiment of the surge removing device of the present invention; FIG. 2 is a circuit diagram of a surge eliminating circuit in a preferred embodiment of the surge removing device of the present invention; FIG. 3 is a preferred embodiment of the surge removing device of the present invention. FIG. 4 is a flow chart of the operation of the auxiliary processing in the preferred embodiment of the surge removing device of the present invention; FIG. 5 is a flowchart of a preferred embodiment of the surge removing device of the present invention; FIG. 6 is a flowchart of the second process of the preferred embodiment of the surge removing device of the present invention.

Referring to FIG. 1, the present invention discloses a surge elimination device 100 for eliminating a surge in a portable electronic device such as a mobile phone or a PDA. In the present embodiment, the application of the surge canceling apparatus 100 to a mobile phone will be described as an example.

The surge removing device 100 provided by the preferred embodiment of the present invention includes a processing module 10, a surge removing circuit 20, and a memory module 30. The processing module 10 is electrically connected to the surge eliminating circuit 20 and the storage module 30 respectively. A flow for driving the surge canceling circuit 20 is stored in the memory module 30. After determining the type of the glitch, the processing module 10 runs a corresponding flow in the storage module 30 and drives the glitch canceling circuit 20 to cancel the glitch.

Referring to FIG. 1 , the processing module 10 includes a CPU 12 , an analog-to-digital converter 14 , a timing unit 16 , and an interrupt timer 18 . The analog-to-digital converter 14, the timing unit 16, and the interrupt timer 18 are electrically connected to the CPU 12, respectively. The CPU 12 is configured to determine whether an audio component includes a glitch component and a type of the glitch, and control the operation of the analog converter 14 and the like. The analog to digital converter 14 is used to read the voltage of an audio accessory. The timing unit 16 is configured to set the operating time of the surge cancellation circuit 20. The interrupt timer 18 is used to calculate the time at which the analog to digital converter 14 reads the audio accessory voltage.

Referring to FIG. 2, the surge cancellation circuit 20 is disposed between a mobile phone auxiliary output terminal (not shown) and an audio output terminal (not shown). The auxiliary output terminal outputs an audio signal, and the surge cancellation circuit 20 is used for final filtering of the audio signal before final output to ensure that the audio output outputs a non-surge audio signal. The surge cancellation circuit 20 includes a control terminal 22, a surge canceling chip 23, an input terminal 24, a first output terminal 26, and a second output terminal 28. The control terminal 22 is controlled by the CPU 12, and the surge cancellation chip 23 can be a field effect transistor of the type NTZD3154N or other wafer or circuit having the same characteristics that can be used to eliminate the surge, which specifically includes six pins. The first source S1 and the second source S2 of the surge eliminating chip 23 are both grounded. The first gate G1 and the second gate G2 of the surge eliminating chip 23 are both Electrically connected to the control terminal 22. The first drain D1 is electrically connected to the input terminal 24 and forms a node (not labeled). The node is electrically connected to the first output terminal 26 by a first capacitor C1 for filtering. The second drain D2 is connected in series with the second output terminal 28 by a second capacitor C2, and the second capacitor C2 is used for filtering. The input terminal 24 is electrically connected to the auxiliary output terminal; the first output terminal 26 and the second output terminal 28 are respectively configured to output left and right channel signals respectively, and respectively, the left channel and the right channel of the mobile phone are electrically connected. connection.

When the CPU 12 determines that the audio signal includes a glitch component, the CPU 12 controls the voltage of the control terminal 22 to be a high level. At this time, when the audio signal passes through the glitch canceling chip 23, the spur component is grounded. That is, the glitch is eliminated, so that the first output terminal 26 and the second output terminal 28 output an audio signal that does not contain a glitch. When the CPU 12 determines that the audio signal does not include the glitch component, the CPU 12 controls the voltage of the control terminal 22 to be a low level. At this time, the audio signal is not affected by the undulation chip 23, that is, the first The output of an output 26 and the second output 28 is still the original audio signal.

The storage module 30 stores a first process for driving the surge cancellation circuit 20, a second process, and an auxiliary process that can be invoked by the first process and the second process. When the CPU 12 determines that it belongs to the first type of glitch, the first process is executed, and the spur elimination circuit 20 is driven to cancel the first type of glitch; when the CPU 12 determines that it belongs to the second type of glitch, the second process is executed. The glitch canceling circuit 20 is driven to cancel the second type of glitch.

Referring to FIG. 3, the CPU 12 is configured to determine whether the audio signal includes a glitch component, determine the type of the glitch, and invoke a corresponding process to eliminate the glitch, which specifically includes the following steps.

Step S3: The CPU 12 determines whether the audio signal includes a glitch, and if it is determined that the glitch is included, the step S4 is performed; if not, the step S5 is performed.

Step S4: The CPU 12 determines the type of the glitch. If it is determined that it belongs to the first type of glitch, step S6 is performed, and if it is determined to belong to the second type of glitch, step S7 is performed.

Step S5: The CPU 12 controls the voltage of the control terminal 22 in the surge cancellation circuit 20 to be low, that is, the audio signal is not affected when passing through the surge cancellation circuit 20. At the same time, returning to step S3, it is continued to determine whether there is a glitch in the audio signal.

Step S6: The CPU 12 runs the first process.

Step S7: The CPU 12 runs the second process.

4 is a working flow chart of the auxiliary process. When the CPU 12 runs the auxiliary process, the audio signal includes a glitch, so the CPU 12 controls the voltage output of the control terminal 22 in the glitch canceling circuit 20 to a high level. Further, the surge cancel circuit 20 cancels the glitch. When the CPU 12 stops running the auxiliary flow, the CPU 12 controls the voltage output of the control terminal 22 in the surge cancellation circuit 20 to output a low level, that is, the audio signal is not affected when passing through the surge cancellation circuit 20. When the CPU 12 runs the affiliate process, it specifically includes the following steps.

Step S11: The CPU 12 controls the voltage of the control terminal 22 to be a high level.

Step S12: The timing unit 16 is activated, and the surge cancellation circuit 20 starts to operate. Because the voltage of the control terminal 22 of the surge cancellation circuit 20 is at a high level at this time, the surge cancellation circuit 20 grounds the spur component in the input terminal 24 to output to the first output terminal 26 and The audio signal of the two output terminals 28 does not contain a surge component.

Step S13: The timing time N of the timing unit 16 arrives.

Step S14: The CPU 12 confirms whether the voltage of the control terminal 22 is still at a high level. If yes, it indicates that the voltage of the control terminal 22 is always at a high level during the timing of the timing unit 16, so that the glitch is eliminated. At this time, step S15 will be executed; if not, it indicates that the CPU 12 does not make the voltage of the control terminal 22 high, and then returns to step S11 to continue to control the voltage of the control terminal 22, and thus loops until the burst Wave elimination.

Step S15: The setting is completed.

Referring to FIG. 5, when the CPU 12 determines that it belongs to the first type of glitch, the first process will be executed, that is, the following steps S20-S30 are initiated to eliminate the first type of glitch.

Step S20: Here, the state of the audio accessory after the audio accessory is not inserted and the audio accessory is unplugged is defined as an initial state, and the state of the audio accessory is defined as a steady state when the audio accessory is fully inserted, and the voltage in the steady state is defined as A stable voltage. Because the first type of glitch is caused by the audio accessory, for the CPU 12, the insertion and removal of the audio accessory is an interruption, so the CPU 12 will generate an interrupt signal to process the interrupt.

Step S21: The CPU 12 runs the auxiliary flow, that is, controls the voltage of the control terminal 22 to switch to a high level, so that the surge cancellation circuit 20 cancels the glitch.

Subsequently, in order to ensure accurate judgment that the glitch has been eliminated, the CPU 12 will separately perform the determination in two ways, that is, perform step S22 and step S23 simultaneously.

Step S22: The CPU 12 detects whether there is still an interrupt generation. When the detection and the interrupt are generated, since the insertion of the audio accessory only generates an interrupt, it is explained that when the surge cancellation circuit 20 is triggered to operate to eliminate the glitch, The audio accessory has been unplugged, and step S24 will be executed at this time, and when it is confirmed that no interruption is generated, step S25 is performed.

Step S23: Start the interrupt timer 18, and start counting the time when the analog digital converter 14 reads the voltage of the audio accessory. The time is n, and the time n is a following analog digital converter 14 to read the audio accessory. The variable of the number of voltage changes.

Step S24: Since the CPU 12 has confirmed that the interrupt is generated, that is, the audio accessory has been pulled out, the surge eliminating circuit 20 is not required to operate to eliminate the glitch at this time, so the CPU 12 will stop the auxiliary process and return to the initial state. status.

Step S25: Since the CPU 12 has confirmed that no interruption is generated, it indicates that no audio accessory has generated an interruption, so it will confirm that the audio accessory is in a steady state and execute step S28.

Step S26: The analog digital converter 14 reads the voltage of the audio accessory.

Step S27: The CPU 12 determines whether the voltage of the audio accessory is the stable voltage. If yes, it indicates that the audio accessory has been fully inserted. At this time, step S28 is performed, and if not, step S29 is performed.

Step S28: The determination is combined with step S25, because the step S25 has determined that the audio accessory is in a stable state, that is, both steps S25 and S28 determine that the audio accessory is in a stable state, and therefore proceeds to step S30.

Step S29: The CPU 12 determines whether the time n at which the analog digital converter 14 reads the voltage of the audio accessory is less than the timing time N of the timing unit 16, and if so, it indicates that the surge cancellation circuit 20 is still executing, and will return at this time. In step S26, the voltage of the audio accessory is read again; if not, it indicates that the surge cancellation circuit 20 has been executed, and the voltage of the audio accessory is still not stable, that is, the audio accessory has been pulled out. At this time, the process returns to step S24, that is, the CPU 12 stops the operation of the subsidiary flow to prevent the audio signal from being destroyed, and the audio accessory returns to the initial state.

Step S30: The CPU 12 stops running the auxiliary process to prevent the audio signal of the cancelled surge from being destroyed, and the audio accessory enters a stable state.

Referring to FIG. 6, when the CPU 12 determines that it belongs to the second type of glitch, the second flow will be executed, that is, the following steps S31-S34 are started to eliminate the second type of glitch.

Step S31: Since the CPU 12 has judged that it belongs to the second type of glitch, the CPU 12 will run the affiliation flow, that is, drive the spur elimination circuit 20 to eliminate some glitch generated during the audio switching process or during the sound adjustment process. .

Step S32: After eliminating the glitch, set the audio gain and other parameters to correctly switch the audio path and adjust the sound.

Step S33: After setting the parameters, stop running the auxiliary process to prevent the audio signal of the cancelled surge from being destroyed.

Step S34: The process ends.

Referring to FIG. 1 together, when the surge removing device 10 is used to eliminate the glitch, the CPU 12 first determines whether there is a glitch, and if not, controls the voltage output of the control terminal 22 of the glitch canceling circuit 20 to be low. Leveling, while continuing to judge, if any, the CPU 12 continues to determine the type of the glitch, and then runs a corresponding process according to the type of the judgment, that is, when the CPU 12 determines that the type of the glitch is the first type described above. And running the first process, when the CPU 12 determines that the type of the hop is the second type described above, the second process is executed, and the CPU 12 runs the first process and the second process to combine the auxiliary process. At the same time, the surge cancellation circuit 20 is driven to cancel the first type of surge and the second type of surge, respectively.

Obviously, the surge canceling device 100 sets different driving processes for different types of surges by providing a surge canceling circuit 20, and the driving processes combine the burst cancellation In addition to the circuit to eliminate different types of surges, it can effectively avoid the problem of incomplete wave elimination and poor audio output in the prior art, so that users can enjoy a perfect sound quality.

In addition, various modifications, additions and substitutions in other forms and details may be made by those skilled in the art. It is a matter of course that various modifications, additions and substitutions made in accordance with the spirit of the invention are included in the scope of the invention as claimed.

100‧‧‧ Surge Elimination Device

10‧‧‧Processing module

20‧‧‧ Surge Elimination Circuit

30‧‧‧ Storage Module

12‧‧‧CPU

14‧‧‧ Analog Digital Converter

16‧‧‧Time unit

18‧‧‧ interrupt timer

Claims (9)

A surge removing device is improved in that the surge removing device comprises a processing module, a surge eliminating circuit and a storage module, and the surge eliminating circuit and the storage module are respectively associated with the processing The module is electrically connected, the surge elimination circuit includes a control terminal and a surge elimination chip, and the storage module stores a flow for driving the surge cancellation circuit, and the processing module determines the input. Whether there is a glitch in the audio signal, if there is no glitch, the voltage of the control terminal of the glitch canceling circuit is controlled to be a first level, and the audio signal is not affected by the glitch eliminating the chip, if there is a glitch, Determining a glitch type by the processing module, the hop type includes a first type of glitch generated when an audio accessory is switched, and a second type of glitch generated when the sound is adjusted, and the processing module determines the glitch After the type of wave, the corresponding process in the storage module is operated, and the voltage of the control terminal is controlled to be a second level to drive the surge cancellation circuit to cancel the surge. The surge cancellation device of claim 1, wherein the processing module comprises a CPU, an analog-to-digital converter, a timing unit, and an interrupt timer, the analog digital converter, the timing unit, and The interrupt timer is electrically connected to the CPU, the CPU determines the type of the surge, the analog digital converter reads the voltage of an audio accessory, and the timing unit sets the operation of the surge cancellation circuit. At the time, the interrupt timer calculates the time at which the analog digital converter reads the audio accessory voltage. The surge elimination device of claim 2, wherein the surge cancellation circuit further includes an input terminal, a first output terminal, and a second output terminal, wherein the voltage of the control terminal is used by the CPU The input end is configured to input an audio signal, and the first output end and the second output end respectively output left and right channel signals. The surge removing device according to claim 3, wherein the surge removing chip is respectively And electrically connected to the control terminal, the input terminal, the first output terminal, and the second output terminal. The surge elimination device of claim 4, wherein the surge canceling chip is NTZD3154N, and includes a first source, a second source, a first gate, and a second gate. a first drain and a second drain, the first source and the second source are grounded, and the first gate and the second gate are electrically connected to the control end, respectively, the first The drain is electrically connected to the input end and forms a node, the node is electrically connected to the first output end, and the second drain is electrically connected to the second output end. The spur elimination device of claim 5, wherein the spur elimination circuit further includes a first capacitor and a second capacitor, wherein the node and the first output are by the first The capacitors are connected in series, and the second drain and the second output are connected in series by the second capacitor. The surge elimination device of claim 2, wherein the storage module stores a first flow for eliminating the first type of surge, and a second flow for eliminating the second type of surge. And an affiliate process, where the affiliate process is invoked by the first process and the second process. A method for eliminating a glitch, which is applied to a spur wave canceling device according to any one of claims 1 to 7, which comprises the steps of: a. the processing module determines the type of the glitch; b. When the hop is determined to be a first type of glitch, the processing module runs a first process step, the first process includes: the processing module generates an interrupt signal; and the processing module runs an auxiliary process Controlling the voltage of the control terminal to a second level to drive the surge cancellation circuit to cancel the surge; the processing module determines whether an audio accessory is stable; if stable, the audio accessory enters a stable state, If unstable, the audio accessory enters an initial state and waits for a next interrupt signal; when it is determined that the glitch is a second type of glitch, the processing module runs a second process step The second process includes: the processing module runs an auxiliary process, and controls a voltage of the control terminal to be a second level to drive the surge cancellation circuit to cancel the glitch; and the processing module sets an audio Path gain and other parameters; the processing module stops running the satellite process. The method for canceling a surge according to claim 8, wherein determining whether the audio accessory is stable includes a step of detecting whether there is an interrupt signal and determining whether the voltage of the audio accessory is a stable voltage In the step, the two steps are performed simultaneously, and it is determined that the audio accessory is stable only when it is detected that there is no interrupt signal and it is judged that the voltage of the audio accessory is the stable voltage.