TWI480735B - Micro-processor with an anti-copy function, chip programming system thereof and electronic device - Google Patents

Description

Microprocessor chip with anti-copy function and its chip burning system and electronic device

This invention relates to a microprocessor chip, and more particularly to a microprocessor chip having an anti-copy function.

Most electronic information products have microprocessor chips. The microprocessor chip has a central processing unit and a memory. The wafer manufacturer or chip designer will load a bootloader program into the memory (ROM) during each microprocessor chip wafer burning process, referred to as LDROM, such as Basic Input Output. System, BIOS), and the user will burn the user program (application program) into another memory (ROM), referred to as APROM, in the process of burning, in order to prevent competitors from cracking the copy, most A lock bit parameter (lock bit) is burned in the LDROM during the burning of the chip to prevent cracking and copying. However, the single lock code parameter is very easy to be cracked, and all the related products can be applied as long as one of them is cracked. . The code executed by the central processor is usually placed in memory. Therefore, the copy protection of the code in the microprocessor chip is very important. However, the progress and convenience of the copying tool today make the code or copyright material that has been developed for several months, and it is too late to apply for a patent, and may be copied in an instant. And a large number of manufacturing, resulting in considerable losses for developers.

The invention provides a microprocessor chip with anti-copy function, comprising a garbled generating unit, an encryption unit, a storage unit module and a control unit. The garbled singleton is produced and detailed with the following figures:

In the process of burning the code to the memory, the invention encrypts the original code with the garbled value generated by the random, and burns the encrypted data into the memory. Due to the garbled value, different encryption results can still be generated for the same original code.

Even if someone has stolen the encrypted data in the microprocessor chip, the different microprocessor chips have different encrypted data, and the original code cannot be known. Moreover, since the garbled values are randomly generated and there is no regularity, the thief cannot push the garbled value and crack the original code. Therefore, the security of the code can be greatly improved.

Additionally, the microprocessor chip of the present invention has a locking function. When a person who is interested in trying to unlock the function, the microprocessor chip immediately erases or modifies the code in the memory, so that the person who is interested can not read the correct code.

In a possible embodiment, in order to improve security, the above two functions (garbled encryption function and locking function) can be integrated into a microprocessor chip to obtain a microprocessor chip with anti-copy function. However, in other embodiments, a microprocessor chip having only a single function (such as garbled encryption or locking) can still achieve anti-copy functionality.

First Embodiment: FIG. 1 is a system architecture diagram of a microprocessor chip 100 of the present invention. In this embodiment, the microprocessor chip 100 includes a garbled generating unit 110, an encryption unit 120, a storage module 150, and a control unit 140. As shown in the figure, the storage module 150 includes a first storage unit 130, a second storage unit 132, and a third storage unit 134. The first storage unit 130 is a boot program in this embodiment. LDROM), the second storage unit 132 is a configuration memory (Configure ROM) in this embodiment, and the third storage unit 134 is a user program memory (APROM) in the embodiment, wherein the first storage unit 130, The second storage unit 132 and the third storage unit 134 are both connected to the control unit 140. The garbled generating unit 110 is also connected to the encryption unit 120 and the second storage unit 132. The encryption unit 120 is connected to the first storage unit 130. The control unit 140 includes a central processing unit 141 and an access controller 142, wherein the access controller 142 has the function of a decoder.

When the recording process is burned, the garbled generating unit 110 provides a garbled value VA _R to the encryption unit 120 and the second storage unit 132 in a random manner. At this time, the encryption unit 120 will burn one of the original code PCs. _O combines with the garbled value VA _R to perform an encryption operation, thereby generating an encrypted data PC _EN into the first storage unit 130. The present invention does not limit the internal architecture of the garbled generating unit 110. In a possible embodiment, the garbled generating unit 110 is a 32-bit counter. Since the counter can generate different count values at different times, each wafer has a different garbled value VA each time the wafer is burned. _R. The present invention does not limit the encryption method of the encryption unit 120. The encryption method as long as the encrypted material PC _{EN is} not equal to the original code PC _O can be applied to the encryption unit 120.

2 is a flow chart of the wafer reading data of the present invention. The flow chart discloses how the wafers burned by the method of preventing theft by the method of the present invention read data and how to perform copy protection. Referring to FIG. 1 at the same time, when the control unit 140 is to read the encrypted data PC _EN , the central processing unit 141 issues an access command SCOM to the access controller 142. The access controller 142 accesses the encrypted data PC _EN stored by the first storage unit 130 and the garbled value VA _R stored by the second storage unit 132 according to the access command S _COM (step S210), via the access controller 142. comparing the second storage unit 132 is stored in the distortion value among the distortion of the encrypted data VA _R PC _EN VA _R values are the same (step S220), if the comparison result is the same, the decrypted result (i.e., the original program The code PC _O ) is supplied to the central processing unit 141 (step S230). The central processing unit 141 then executes the original code PC _O and executes an application software stored in the third storage unit 134. If the comparison result is different, the microprocessor chip 100 is suspected of being cracked. At this time, the central processing unit 141 performs a destructive action on some or all of the data stored in the third storage unit 134 (step S240). ), in order to avoid the intention of people to steal the relevant code and related settings. And each chip has a different garbled value VA _R , so even if the pirate cracks the garbled value VA _{R of the} single chip (in this case, some or all of the data stored in the third storage unit 134 has been destroyed), it cannot be borrowed. The garbled value VA _{R is known} to be cracked on other chips, so that the rigorous anti-theft design can be made for the customer (wafer designer) at the time of wafer burning by the burning method provided by the present invention.

Second Embodiment: Please refer to FIG. 3, in addition, in order to improve the degree of encryption of the wafer during programming, the wafer manufacturer requires the customer to provide a key value VA _K . The key value VA _{K may be} stored in the third storage unit 334 or other storage unit. When the microprocessor chip 300 is burned, the encryption unit 320 will burn one of the original code PC _O and garbled characters. The value VA _R and the key value VA _{K are} combined to perform an encryption operation, thereby generating a more complex encryption level PC _EN into the first storage unit 330.

When the control unit 340 is to read the encrypted material PC _EN , the central processing unit 341 issues an access command S _COM to the access controller 342. The access controller 342 accesses the encrypted data PC _EN stored by the first storage unit 330, the garbled value VA _R stored by the second storage unit 332, and the key stored by the third storage unit 334 according to the access command S _COM . value VA _K, via an access controller 342 for the same hash value ratio is VA _R key value and the distortion value among VA _K VA _R VA _K and key value data with the PC _EN encryption unit 332 stored in the second storage If the result of the comparison is the same, the decrypted result (ie, the original code PC _O ) is supplied to the central processing unit 341. The central processing unit 341 then executes the original code PC _O and executes a user program stored in the third storage unit 334. If the comparison result is different, the microprocessor chip 300 is suspected of being cracked. At this time, the central processing unit 341 erases some or all of the data stored in the third storage unit 334 to destroy the destructive action. Avoid people who are interested in stealing relevant code and related settings. In this way, in addition to improving the difficulty of competitors to crack, chip manufacturers are more customer-oriented ways to serve customers.

Third Embodiment: Referring to FIG. 4, when the microprocessor chip 400 is programmed, a specific comparison parameter PC _{ES is} stored in the second storage unit 432 in advance, except for the first embodiment and the second embodiment. In addition to the comparison mode of the embodiment, when the microprocessor chip 400 is mounted on an electronic device 600, the microprocessor chip 400 receives at least one external circuit component 500 input to the microprocessor when the electronic device 600 operates. The external data PC _{Ed of the} wafer 400, the control unit 440 compares whether the parameter in the external data PC _Ed is the same as the specific comparison parameter PC _ES stored in the second storage unit 432. If the comparison result is the same, the decrypted The result (i.e., the original code PC _O ) is supplied to the central processing unit 441. The central processing unit 441 executes the original code PC _O and executes a user program stored in the third storage unit 434. If the comparison results are different, it represents that the microprocessor chip 400 has been removed and installed into other electronic devices. At the same time, it also represents that the microprocessor chip 400 has a cracking concern, and the central processor 441 will The destructive action is erased on some or all of the data stored in the third storage unit 434.

In addition, the garbled values VA _R generated by the garbled generating unit in the microchip 400 are not the same during the burning recording process at different times. For example, suppose that two micro-processed wafers are to be burned. When the first micro-processed wafer is burned, the garbled generating unit in the first micro-processed wafer generates a first garbled value, and when the second micro-processed wafer is burned, the garbled generating unit in the second micro-processed wafer generates a The second garbled value. In this embodiment, the first garbled value is different from the second garbled value.

Since the first and second microprocessor chips have different garbled values, two different cryptographic data can be generated for the same original code. The two different encrypted data can be stored in the corresponding storage unit and can be accessed by the corresponding control unit. Therefore, even if the person who has the heart has cracked the first micro-processed chip, the same garbled value cannot be used to steal the code in the second micro-processed chip, thereby improving the difficulty of the competitor's cracking.

Furthermore, the invention does not limit the internal architecture of the first and second microprocessor wafers. In a possible embodiment, the cells within the first and second microprocessor wafers have the same or different circuit architecture. For example, the circuit architecture of the garbled generating unit within the first microprocessor chip may be the same or different than the circuit architecture of the garbled generating unit within the second microprocessor chip. Similarly, the circuit architecture of the encryption unit, the storage module, and the control unit in the first microprocessor chip may be the same or different from the circuit architecture of the encryption unit, the storage module, and the control unit in the second microprocessor chip.

Unless otherwise defined, all terms (including technical and scientific terms) are used in the ordinary meaning Moreover, unless expressly stated, the definition of a vocabulary in a general dictionary should be interpreted as consistent with the meaning of an article in its related art, and should not be interpreted as an ideal state or an overly formal voice.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100, 300, 400. . . Microprocessor chip

110, 310, 410. . . Garble generating unit

120, 320, 420. . . Encryption unit

150, 350, 450. . . Storage module

130, 132, 134, 330, 332, 334, 430, 432, 434. . . Storage unit

140, 340, 440. . . control unit

141, 341, 441. . . CPU

142, 342, 442. . . Access controller

500. . . External circuit component

600. . . Electronic device

S210~S240. . . step

VA _R . . . Garbled value

PC _O . . . Original code

PC _EN . . . Encrypted data

VA _K . . . Key value

S _COM . . . Access command

PC _ES . . . Comparison parameter

PC _Ed . . . External data

Figure 1 is a diagram showing one possible system architecture of a microprocessor chip of the present invention.

Figure 2 is a flow chart of the wafer reading data of the present invention.

Figures 3 and 4 are diagrams of other possible system architectures for the microprocessor chip of the present invention.

100. . . Microprocessor chip

110. . . Garble generating unit

120. . . Encryption unit

130. . . First storage unit

132. . . Second storage unit

134. . . Third storage unit

140. . . control unit

141. . . CPU

142. . . Access controller

150. . . Storage module

VA _R . . . Garbled value

PC _O . . . Original code

PC _EN . . . Encrypted data

S _COM . . . Access command

Claims (21)

A microprocessor chip with anti-copy function includes: a garbled generating unit for providing a first garbled value; an cryptographic unit for encrypting the first garbled value with an original code for generating an encryption Data storage module storing the first garbled value and the encrypted data; and a control unit accessing the storage module for capturing and decrypting the encrypted data and operating according to the decrypted result. The microprocessor chip with anti-copy function according to claim 1, wherein the garble generating unit is a counter. The microprocessor chip of the anti-copying function of claim 1, wherein the storage module comprises: a first storage unit for storing the encrypted data; and a second storage unit for storing the a first garbled value; and a third storage unit for storing a user program. The microprocessor chip with anti-copy function as described in claim 3, wherein the first storage unit stores a boot program, and the third storage unit stores a user program. The microprocessor chip having anti-copy function according to claim 3, wherein the control unit comprises: a central processing unit that issues an access command; and an access controller, according to the access command, Accessing the data stored in the storage module to compare whether the garbled value in the encrypted data stored in the first storage unit is equal to the first garbled value stored in the second storage unit. The microprocessor chip with anti-copy function according to claim 5, wherein the garbled value in the encrypted data stored by the first storage unit is the same as the first stored in the second storage unit a garbled value, the access controller captures and decrypts the encrypted data stored by the first storage unit, and provides the decrypted result to the central processor, the central processor performs the decrypted result and the a user program; wherein, when the garbled value in the encrypted data stored by the first storage unit is different from the first garbled value stored in the second storage unit, the central processing unit is configured by the third storage unit The stored user program is erased and destroyed. The microprocessor chip with anti-copy function as described in claim 3, wherein the third storage unit further stores a key value. The microprocessor chip with anti-copy function according to claim 7, wherein the encryption unit further encrypts the key value with the first garbled value and the original code to generate the encrypted data. . The microprocessor chip having anti-copy function according to claim 8, wherein the control unit comprises: a central processing unit that issues an access command; and an access controller, according to the access command, Accessing the data stored in the storage module to compare whether the garbled value and the key value in the encrypted data stored in the first storage unit are the same as the first garbled code stored in the second storage unit The value and the key value stored by the third storage unit. A chip burning system, comprising: a first chip, comprising: a first garbled generating unit, configured to provide a first garbled value during a burning recording process; and a first cryptographic unit, the first cryptographic unit a garbled value and a first original path The code is encrypted to generate a first encrypted data; a first storage module stores the first garbled value and the first encrypted data; and a first control unit accesses the first storage module, The method for capturing and decrypting the first encrypted data, and operating according to the decrypted result. The wafer burning system of claim 10, wherein the first garbled generating unit is a counter. The chip storage system of claim 10, wherein the first storage module comprises: a first storage unit for storing the first encrypted data; and a second storage unit for storing the first a garbled value; and a third storage unit for storing a user program. The wafer burning system of claim 12, wherein the first storage unit stores a boot program, and the third storage unit stores a user program. The wafer burning system of claim 12, wherein the first control unit comprises: a central processing unit that issues an access command; and an access controller that accesses the access command according to the access control command The data stored by the first storage module is used to compare whether the first garbled value in the first encrypted data stored in the first storage unit is the same as the first garbled value stored in the second storage unit. . The chip burning system of claim 14, wherein the garbled value in the first encrypted data stored by the first storage unit is the same as the first garbled value stored in the second storage unit. The access controller captures and decrypts the first encrypted data stored by the first storage unit, and provides the decrypted result to the central processor, and the central processor performs the decrypted result and the use. Program The central processor stores the garbled value in the first encrypted data stored by the first storage unit different from the first garbled value stored in the second storage unit. The user program erases the damage. The wafer burning system of claim 12, wherein the third storage unit further stores a key value. The chip burning system of claim 16, wherein the encryption unit further encrypts the key value with the first garbled value and the first original code to generate the first encrypted data. The wafer burning system of claim 17, wherein the first control unit comprises: a central processing unit that issues an access command; and an access controller that accesses the access command according to the access control command The data stored in the first storage module is used to compare whether the garbled value and the key value in the first encrypted data stored in the first storage unit are the same as the first stored in the second storage unit. The garbled value and the key value stored by the third storage unit. The chip burning system of claim 10, further comprising a second chip, the second chip comprising: a second garbled generating unit for providing a second garbled value during the burning process, wherein The second garbled value is different from the first garbled value; a second cryptographic unit encrypts the second garbled value and a second original code during the burning process to generate a second encrypted data; a second storage module storing the second garbled value and the second encrypted data; and a second control unit accessing the second storage module for capturing and decrypting the second encrypted data, and decrypting according to the second The result is after the result. The wafer burning system of claim 19, wherein the first and second garbled generating units have the same circuit structure, the first and second cryptographic units have the same circuit structure, and the first and second storages The modules have the same circuit structure, and the first and second control units have the same circuit structure. An electronic device comprising: at least one external circuit component providing an external data; and a microprocessor chip comprising: a garbled generating unit for providing a garbled value; an cryptographic unit, the garbled value and an original program The code is encrypted to generate an encrypted data; a storage module includes: a first storage unit for storing the encrypted data; a second storage unit for storing the garbled value and a specific comparison data; and a third storage a unit storing a user program; and a control unit comparing whether the parameter in the external data and the specific comparison parameter stored in the second storage unit are the same, if the parameter in the external data is the same as the second And the specific comparison parameter stored by the storage unit decrypts the encrypted data, and performs the decrypted result and the user program, if the parameter in the external data is different from the specific comparison stored in the second storage unit When the parameter is used, the control unit erases the user program stored in the third storage unit.