TWI478476B - Compensation of average inductor current control using variable reference voltage - Google Patents

Compensation of average inductor current control using variable reference voltage Download PDF

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TWI478476B
TWI478476B TW101131750A TW101131750A TWI478476B TW I478476 B TWI478476 B TW I478476B TW 101131750 A TW101131750 A TW 101131750A TW 101131750 A TW101131750 A TW 101131750A TW I478476 B TWI478476 B TW I478476B
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voltage
valley
inductor
current
average
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TW201409913A (en
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Yung I Chang
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Alpha & Omega Semiconductor Cayman Ltd
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Description

平均電感電流式電壓補償控制裝置及其控制方法Average inductor current type voltage compensation control device and control method thereof

本發明係有關一種控制技術,特別是關於一種平均電感電流式電壓補償控制裝置及其控制方法。The present invention relates to a control technique, and more particularly to an average inductor current type voltage compensation control device and a control method thereof.

電壓轉換器依類型不同大致可分為數種,交流轉交流(AC/AC)轉換器、交流轉直流(AC/DC)轉換器、直流轉直流(DC/DC)轉換器以及直流轉交流(DC/AC);其中,就直流轉直流(DC/DC)轉換器而言,在許多電子電路中,常有一些電子元件需要雙電源以上的電源供電,例如液晶顯示器、電壓比較器、運算放大器等,或是由於多組電子元件的工作電壓各不相同有多組不同電位的需求,此時便需要有直流轉直流轉換器來獲取想要的電壓。Voltage converters can be roughly divided into several types according to different types, AC to AC converters, AC to DC converters, DC to DC converters, and DC to DC (DC). /AC); Among them, in the case of DC-to-DC converters, in many electronic circuits, there are often some electronic components that require power supplies other than dual power supplies, such as liquid crystal displays, voltage comparators, operational amplifiers, etc. Or because multiple sets of electronic components have different operating voltages and different sets of different potentials, a DC-to-DC converter is needed to obtain the desired voltage.

如第1圖所示,直流轉直流轉換器10包含一電容12、一二極體14、一電感16、一電晶體開關18與一電阻20,其中電晶體開關18之開關狀態受一迴授控制器22所控制。在電晶體開關18導通(ON)階段,輸入電源24會有電流流過電感16,使能量儲存在電感16上;而當電晶體開關18接收到截止訊號時,電晶體開關18截止(OFF),此時電感16上的感應電流會釋放到電阻20上以穩定維持電壓的輸出。迴授控制器22可以偵測電感16上之電流,並藉此去控制電晶體開關18,其中迴授控制器22產生用來控制電晶體開關18之控制訊號,與電感16上之電流波形如第2圖所示。在電感電流之波形中,其波峰電流值等於二倍平均電感電流值減去波谷電流值,且在上述控制訊號中,低準位電壓之時間區間是固定的。利用上述負迴授控制方式,當輸入電源24增加到數百伏特時,波峰電流值與波谷電流值將不再保持固定而產生變動,且為了固定平均電感電流,當波谷電流值愈低,波峰電流值愈高;當波谷電流值愈高,波峰電流值愈低。此外,量測波形如第3圖所示,其中虛線波形為電晶體開關18之源極電壓波形,其 下方依序為通過二極體串26之電流波形與電感電流波形。由此可知,電感電流之峰值與谷值是不斷在變動的。As shown in FIG. 1 , the DC-to-DC converter 10 includes a capacitor 12 , a diode 14 , an inductor 16 , a transistor switch 18 , and a resistor 20 . The switching state of the transistor switch 18 is controlled by a feedback. Controlled by controller 22. During the ON state of the transistor switch 18, the input power source 24 has a current flowing through the inductor 16 to store energy on the inductor 16; and when the transistor switch 18 receives the cutoff signal, the transistor switch 18 is turned off (OFF). At this time, the induced current on the inductor 16 is discharged to the resistor 20 to stabilize the output of the sustain voltage. The feedback controller 22 can detect the current on the inductor 16 and thereby control the transistor switch 18, wherein the feedback controller 22 generates a control signal for controlling the transistor switch 18, and a current waveform on the inductor 16 such as Figure 2 shows. In the waveform of the inductor current, the peak current value is equal to the double average inductor current value minus the valley current value, and in the above control signal, the time interval of the low level voltage is fixed. With the above negative feedback control method, when the input power source 24 is increased to several hundred volts, the peak current value and the valley current value will no longer remain fixed and vary, and in order to fix the average inductor current, the lower the valley current value, the peak The higher the current value; the higher the valley current value, the lower the peak current value. In addition, the measurement waveform is as shown in FIG. 3, wherein the dotted waveform is the source voltage waveform of the transistor switch 18, Below is the current waveform and inductor current waveform through the diode string 26. It can be seen that the peak value and the valley value of the inductor current are constantly changing.

因此,本發明係在針對上述之困擾,提出一種平均電感電流式電壓補償控制裝置及其控制方法,以解決習知所產生的問題。Therefore, the present invention has been made in view of the above problems, and an average inductor current type voltage compensation control apparatus and a control method thereof are provided to solve the problems caused by the conventional method.

本發明之主要目的,在於提供一種平均電感電流式電壓補償控制裝置及其控制方法,其係利用電感上的至少兩相鄰時間點之一平均谷值電壓,與對應二倍電感之平均電感電流之二倍外部電壓,以固定電感上之峰值電流,且無須感應高電壓端(high side)的感應電流,並同時避免受到直流對直流轉換器內之獨立電感影響,以提高電壓調整的準確度。The main object of the present invention is to provide an average inductor current type voltage compensation control device and a control method thereof, which utilize an average valley voltage of at least two adjacent time points on an inductance, and an average inductor current corresponding to a double inductor. Two times the external voltage to fix the peak current on the inductor, and does not need to sense the high side of the induced current, and at the same time avoid the independent inductance in the DC-to-DC converter to improve the accuracy of voltage adjustment. .

為達上述目的,本發明提供一種平均電感電流式電壓補償控制裝置,包含一谷值電壓取樣保持單元,透過一直流對直流轉換器中之電子開關連接此直流對直流轉換器中之一電感,並接收電感上的至少兩相鄰時間點之至少二谷值電流,並將其轉換為一平均谷值電壓。谷值電壓取樣保持單元與直流對直流轉換器中之電子開關同時透過一比較器連接一參考電壓產生器,其係並接收對應二倍電感之平均電感電流之二倍外部電壓,以將其減去平均谷值電壓,產生一參考電壓來控制電子開關,以藉此使電感上之峰值電流保持定值。To achieve the above objective, the present invention provides an average inductor current type voltage compensation control apparatus including a valley voltage sampling and holding unit for connecting an inductance of the DC-to-DC converter through an electronic switch in a DC-to-DC converter. And receiving at least two valley currents of at least two adjacent time points on the inductor and converting them into an average valley voltage. The valley voltage sampling and holding unit and the electronic switch in the DC-DC converter are simultaneously connected to a reference voltage generator through a comparator, which receives and receives twice the external voltage corresponding to the average inductor current of the double inductor to reduce it. The average valley voltage is de-energized to produce a reference voltage to control the electronic switch to thereby maintain a constant peak current across the inductor.

本發明亦提供一種平均電感電流式電壓補償控制方法,其係控制一直流對直流轉換器,此直流對直流轉換器包括一電子開關與一電感。首先,接收對應二倍電感之平均電感電流之二倍外部電壓與電感上的至少兩相鄰時間點之至少二谷值電流,並將至少二谷值電流轉換為一平均谷值電壓。接著,將二倍外部電壓減去平均谷值電壓,以輸出控制電子開關之一參考電壓。The invention also provides an average inductor current type voltage compensation control method for controlling a DC-to-DC converter, the DC-DC converter comprising an electronic switch and an inductor. First, receiving at least two external current voltages corresponding to the average inductor current of the double inductor and at least two valley currents at at least two adjacent time points on the inductor, and converting at least the two valley currents into an average valley voltage. Next, the average external voltage is subtracted from the average valley voltage to output a reference voltage of one of the control electronic switches.

茲為使 貴審查委員對本發明之結構特徵及所達成之功效更有進一步之瞭解與認識,謹佐以較佳之實施例圖及配合詳細之說明,說明如後:For a better understanding and understanding of the structural features and the achievable effects of the present invention, please refer to the preferred embodiment and the detailed description.

由於電感漣波電流受到谷值電感電流加上峰值電感電流總和的一半所控制,此即表示峰值電感電流Ipeak係等於二倍平均電感電流Iavg減掉谷值電感電流Ivally,如式(1)所示。但本發明為了固定峰值電感電流Ipeak,因此將上述谷值電感電流Ivally修改為相鄰至少兩時間點之谷值電感電流Iv1、Iv2之平均,如式(2)所示,以避免將谷值電感電流Ivally之變動計算進去。根據上述原理,本發明將對應二倍電感之平均電感電流之二倍外部電壓Vext,減去電感上的至少兩相鄰時間點之谷值電壓Vh1、Vh2之平均值,此平均值即谷值電壓Vh1、Vh2之平均谷值電壓,相減後可得到一參考電壓Vref,如式(3)所示,並據此固定峰值電感電流Ipeak。Since the inductor chopping current is controlled by the valley inductor current plus half of the sum of the peak inductor currents, this means that the peak inductor current Ipeak is equal to twice the average inductor current Iavg minus the valley inductor current Ivally, as in equation (1). Show. However, in order to fix the peak inductor current Ipeak, the present invention modifies the above-mentioned valley inductor current Ivally to the average of the valley inductor currents Iv1 and Iv2 adjacent to at least two time points, as shown in the formula (2), to avoid the valley value. The variation of the inductor current Ivally is calculated. According to the above principle, the present invention subtracts the average value of the valley voltages Vh1 and Vh2 of at least two adjacent time points on the inductance corresponding to the external voltage Vext of the average inductor current of the double inductor, and the average value is the valley value. The average valley voltages of the voltages Vh1 and Vh2 are subtracted to obtain a reference voltage Vref, as shown in the equation (3), and the peak inductor current Ipeak is fixed accordingly.

Ipeak=2*Iavg-Ivally (1)Ipeak=2*Iavg-Ivally (1)

Ipeak=2*Iavg-(Iv1+Iv2)/2 (2)Ipeak=2*Iavg-(Iv1+Iv2)/2 (2)

Vref=2*Vext-(Vh1+Vh2)/2 (3)Vref=2*Vext-(Vh1+Vh2)/2 (3)

以下請參閱第4圖。本發明連接一固定截止時間之直流對直流轉換器28,其中包含一電感30與一電子開關,在本實施例中,此電子開關以電晶體開關32為例。本發明包含一谷值電壓取樣保持單元34與一參考電壓產生器36,谷值電壓取樣保持單元34透過電晶體開關32連接電感30,並接收電感30上的至少兩相鄰時間點之至少二谷值電流,並將其轉換為一平均谷值電壓。參考電壓產生器36連接谷值電壓取樣保持單元34與電晶體開關32,並接收對應二倍電感30之平均電感電流Iave之二倍外部電壓Vext,以將其減去平均谷值電壓,產生一參考電壓Vref。電感30、谷值電壓取樣保持單元34、參考電壓產生器36與電晶體開關32皆連接一比較器38,其係接收參考電壓Vref與電感30之電感電壓,並依據其比較結果,控制電晶體開關32,以藉此使峰值電流保持定值。Please refer to Figure 4 below. The present invention is coupled to a DC-to-DC converter 28 having a fixed off-time, comprising an inductor 30 and an electronic switch. In the present embodiment, the electronic switch is exemplified by a transistor switch 32. The present invention includes a valley voltage sample and hold unit 34 and a reference voltage generator 36. The valley voltage sample and hold unit 34 is coupled to the inductor 30 through the transistor switch 32 and receives at least two adjacent time points on the inductor 30. The valley current is converted to an average valley voltage. The reference voltage generator 36 is connected to the valley voltage sample holding unit 34 and the transistor switch 32, and receives twice the external voltage Vext corresponding to the average inductor current Iave of the double inductor 30 to subtract the average valley voltage thereof to generate a Reference voltage Vref. The inductor 30, the valley voltage sample and hold unit 34, the reference voltage generator 36 and the transistor switch 32 are all connected to a comparator 38, which receives the reference voltage Vref and the inductor voltage of the inductor 30, and controls the transistor according to the comparison result. Switch 32 is thereby used to maintain the peak current constant.

換言之,本發明之運作過程如下。首先,參考電壓產生器36接收對應二倍電感30之平均電感電流Iave之二倍外部電壓Vext,同時, 谷值電壓取樣保持單元34接收電感30上的至少兩相鄰時間點之至少二谷值電流,並將至少二谷值電流轉換為一平均谷值電壓。接著,參考電壓產生器36將接收到的二倍外部電壓Vext減去平均谷值電壓,以產生控制電晶體開關32之參考電壓Vref。最後,比較器38接收參考電壓Vref與電感30之電感電壓,並依據其比較結果,控制電晶體開關32,以藉此使電感30上之峰值電流保持定值。舉例來說,當比較結果為參考電壓與電感電壓相同時,則使電晶體開關32關閉;當比較結果為參考電壓與電感電壓相異時,則使電晶體開關32導通。比較器38產生用來控制電晶體開關32之控制訊號,與電感30上之電流波形如第5圖所示,其中控制訊號之高準位電壓之時間區間為固定,電感30上之峰值電流與谷值電流亦變為固定。此外,量測波形如第6圖所示,其中虛線波形為電晶體開關32之源極電壓波形,其下方依序為通過二極體串40之電流波形與電感30之電流波形。由此可知,電感電流之峰值與谷值是已呈現固定。如此一來,本發明便可無須感應高電壓端(high side)的感應電流,並同時避免受到直流對直流轉換器內之獨立電感影響,以提高電壓調整的準確度。In other words, the operation of the present invention is as follows. First, the reference voltage generator 36 receives twice the external voltage Vext corresponding to the average inductor current Iave of the double inductor 30, and The valley voltage sample hold unit 34 receives at least two valley currents of at least two adjacent time points on the inductor 30 and converts at least two valley currents into an average valley voltage. Next, the reference voltage generator 36 subtracts the received double external voltage Vext from the average valley voltage to generate a reference voltage Vref that controls the transistor switch 32. Finally, the comparator 38 receives the reference voltage Vref and the inductor voltage of the inductor 30, and according to the result of the comparison, controls the transistor switch 32 to thereby maintain the peak current on the inductor 30 constant. For example, when the comparison result is that the reference voltage and the inductor voltage are the same, the transistor switch 32 is turned off; when the comparison result is that the reference voltage is different from the inductor voltage, the transistor switch 32 is turned on. The comparator 38 generates a control signal for controlling the transistor switch 32, and the current waveform on the inductor 30 is as shown in FIG. 5, wherein the time interval of the high level voltage of the control signal is fixed, and the peak current on the inductor 30 is The valley current also becomes fixed. In addition, the measurement waveform is as shown in FIG. 6, wherein the dotted waveform is the source voltage waveform of the transistor switch 32, and the current waveform of the current waveform and the inductor 30 passing through the diode string 40 is sequentially followed. It can be seen that the peak value and the valley value of the inductor current are already fixed. In this way, the present invention eliminates the need to sense the high side induced current while avoiding the influence of the independent inductance in the DC-to-DC converter to improve the accuracy of the voltage adjustment.

在上述過程,若本發明缺少比較器38,亦可省略上述接收參考電壓Vref與電感30之電感電壓,並依據其比較結果,控制電晶體開關32之步驟。In the above process, if the present invention lacks the comparator 38, the step of receiving the reference voltage Vref and the inductance of the inductor 30 may be omitted, and the step of controlling the transistor switch 32 may be performed according to the comparison result.

請繼續參閱第4圖,下面將繼續描述谷值電壓取樣保持單元34與參考電壓產生器36之具體電路。Referring to FIG. 4, the specific circuit of the valley voltage sample-and-hold unit 34 and the reference voltage generator 36 will be further described below.

上述二谷值電流包含分別對應先、後之時間點之一第一谷值電流與一第二谷值電流,平均谷值電壓為分別對應第一谷值電流與第二谷值電流之一第一半谷值電壓與一第二半谷值電壓之總和。谷值電壓取樣保持單元34在此僅包含二子谷值電壓取樣保持單元37,以分別擷取第一半谷值電壓與第二半谷值電壓。其中一子谷值電壓取樣保持單元37更包含一第一時序開關42與一第一谷值電壓保持單元44,另一子谷值電壓取樣保持單元37更包含一第二時序開關46與一第二谷值 電壓保持單元48。第一時序開關42連接電感30,並在兩相鄰時間點暫時導通,以分別供第一谷值電流與第二谷值電流通過。第一時序開關42連接第一谷值電壓保持單元44,其係從第一時序開關42接收第一谷值電流或第二谷值電流,並分別將其轉換為第一半谷值電壓或第二半谷值電壓,且保持其輸出。第一谷值電壓保持單元44連接第二時序開關46,其係在兩相鄰時間點之間,且電感電流逐漸下降時,暫時導通,以作為第一半谷值電壓之傳送路徑。第二時序開關46連接第二谷值電壓保持單元48,其係從第二時序開關46接收第一半谷值電壓,並保持其輸出。The two valley currents respectively comprise a first valley current and a second valley current corresponding to one of the first and last time points, and the average valley voltage is one of the first valley current and the second valley current respectively. The sum of the half valley voltage and a second half valley voltage. The valley voltage sample holding unit 34 here only includes the two sub-valley voltage sample holding unit 37 to respectively extract the first half bottom voltage and the second half bottom voltage. The sub-valley voltage sample and hold unit 37 further includes a first timing switch 42 and a first valley voltage holding unit 44, and the other sub-valley voltage sample and hold unit 37 further includes a second timing switch 46 and a Second valley Voltage holding unit 48. The first timing switch 42 is connected to the inductor 30 and is temporarily turned on at two adjacent time points to respectively pass the first valley current and the second valley current. The first timing switch 42 is coupled to the first valley voltage holding unit 44, which receives the first valley current or the second valley current from the first timing switch 42 and converts it into the first half valley voltage, respectively. Or the second half of the valley voltage and maintain its output. The first valley voltage holding unit 44 is connected to the second timing switch 46, which is between two adjacent time points, and when the inductor current gradually decreases, is temporarily turned on as the transmission path of the first half-valley voltage. The second timing switch 46 is coupled to a second valley voltage holding unit 48 that receives the first half-valley voltage from the second timing switch 46 and maintains its output.

第一時序開關42、第二時序開關46之導通狀態由一時序控制器49來控制。第一時序開關42、第二時序開關46與電感30連接此時序控制器49,其係在兩相鄰時間點暫時導通第一時序開關42,且在兩相鄰時間點之間,且電感電流逐漸下降時,暫時導通第二時序開關46。The on state of the first timing switch 42 and the second timing switch 46 is controlled by a timing controller 49. The first timing switch 42 and the second timing switch 46 are connected to the inductor 30 to the timing controller 49, which temporarily turns on the first timing switch 42 at two adjacent time points, and between two adjacent time points, and When the inductor current gradually decreases, the second timing switch 46 is temporarily turned on.

第一谷值電壓保持單元44更包含一第一放大器50,其係連接第一時序開關42,以接收第一谷值電流或第二谷值電流,分別輸出一第一導通訊號或一第二導通訊號。第一放大器50與參考電壓產生器36連接一第一電晶體開關52,其係接收第一導通訊號或第二導通訊號以保持導通。另有一第一電容54與一第一電阻56,第一電容54之一端接地,另一端連接第一時序開關42與第一放大器50。第一電阻56之一端接地,另一端連接第一電晶體開關52與第一放大器50,第一電容54與第一電阻56透過第一時序開關42接收第一谷值電流或第二谷值電流,並將其轉換為第一半谷值電壓或第二半谷值電壓,以藉由第一電晶體開關52保持輸出第一半谷值電壓或第二半谷值電壓。The first valley voltage holding unit 44 further includes a first amplifier 50 connected to the first timing switch 42 to receive the first valley current or the second valley current, respectively outputting a first communication number or a first Second guide communication number. The first amplifier 50 is coupled to the reference voltage generator 36 to a first transistor switch 52 that receives the first pilot or second pilot to maintain conduction. There is a first capacitor 54 and a first resistor 56. One end of the first capacitor 54 is grounded, and the other end is connected to the first timing switch 42 and the first amplifier 50. One end of the first resistor 56 is grounded, and the other end is connected to the first transistor switch 52 and the first amplifier 50. The first capacitor 54 and the first resistor 56 receive the first valley current or the second valley through the first timing switch 42. The current is converted to a first half valley voltage or a second half valley voltage to maintain a first half valley voltage or a second half valley voltage output by the first transistor switch 52.

第二谷值電壓保持單元48更包含一第二放大器58,其係連接第二時序開關46,以接收第一半谷值電壓,輸出一第三導通訊號。第二放大器58與參考電壓產生器36連接一第二電晶體開關60,其係接收第三導通訊號以保持導通。另有一第二電容62與一第二電阻64,第二電容62之一端接地,另一端連接第二時序開關46與第二放大器58。 第二電阻64之一端接地,另一端連接第二電晶體開關60與第二放大器58,第二電阻64與第一電阻56之阻值相同,第二電容62與第二電阻64透過第二時序開關46接收第一半谷值電壓,以藉由第二電晶體開關60保持輸出第一半谷值電壓。The second valley voltage holding unit 48 further includes a second amplifier 58 connected to the second timing switch 46 for receiving the first half-valley voltage and outputting a third pilot signal. The second amplifier 58 is coupled to the reference voltage generator 36 to a second transistor switch 60 that receives the third pilot signal to maintain conduction. There is a second capacitor 62 and a second resistor 64. One end of the second capacitor 62 is grounded, and the other end is connected to the second timing switch 46 and the second amplifier 58. One end of the second resistor 64 is grounded, and the other end is connected to the second transistor switch 60 and the second amplifier 58, the second resistor 64 has the same resistance as the first resistor 56, and the second capacitor 62 and the second resistor 64 pass through the second timing. Switch 46 receives the first half-valley voltage to maintain output of the first half-valley voltage by second transistor switch 60.

參考電壓產生器36更包含一第三放大器66,其係接收二倍外部電壓Vext,以產生一第四導通訊號。第三放大器66連接一第三電阻68之一端,第三電阻68之另一端則接地,此外,第三電阻68之阻值為第一電阻56的一半。第三放大器66與第三電阻68連接一第三電晶體開關70,其係接收第四導通訊號,並藉由第三電阻68產生流經第三電晶體開關70與第三電阻68之二倍平均電感電流Iave。第三電晶體開關70又連接一電流鏡72,電流鏡72連接一第四電阻74之一端,第四電阻74之另一端則接地。第四電阻74之阻值與第三電阻68相同。電流鏡72複製二倍平均電感電流Iave,以產生通過第四電阻74之二倍平均電感電流Iave,並據此產生二倍外部電壓Vext,以將其減去二半谷值電壓,成功產生參考電壓Vref。The reference voltage generator 36 further includes a third amplifier 66 that receives twice the external voltage Vext to generate a fourth pilot number. The third amplifier 66 is connected to one end of a third resistor 68, and the other end of the third resistor 68 is grounded. Further, the resistance of the third resistor 68 is half of the first resistor 56. The third amplifier 66 and the third resistor 68 are connected to a third transistor switch 70, which receives the fourth conduction number and is generated by the third resistor 68 to flow twice the third transistor 70 and the third resistor 68. Average inductor current Iave. The third transistor switch 70 is further connected to a current mirror 72. The current mirror 72 is connected to one end of a fourth resistor 74, and the other end of the fourth resistor 74 is grounded. The resistance of the fourth resistor 74 is the same as that of the third resistor 68. The current mirror 72 replicates the double average inductor current Iave to generate a double-average inductor current Iave through the fourth resistor 74, and thereby generates a double external voltage Vext to subtract the two-half valley voltage to successfully generate the reference voltage. Vref.

上述實施例僅接收二谷值電流以形成平均谷值電壓,以下請參閱第7圖,此實施例與上述實施例差異在於,谷值電壓取樣保持單元34在此包含複數子谷值電壓取樣保持單元37。因此,在此實施例中,谷值電壓取樣保持單元36接收電感上的複數相鄰時間點之複數谷值電流,並將其轉換為一平均谷值電壓,使得此平均谷值電壓Vave為每一谷值電流對應之谷值電壓Vhn之總和平均,如式(4)所示。另其餘電路架構及其作動皆與前述實施例相同,於此不再贅述。The above embodiment only receives the two valley currents to form an average valley voltage. Referring to FIG. 7 below, this embodiment differs from the above embodiment in that the valley voltage sample holding unit 34 includes a plurality of sub-valley voltage samples and samples. Unit 37. Therefore, in this embodiment, the valley voltage sample holding unit 36 receives the complex valley current of the complex adjacent time points on the inductance and converts it into an average valley voltage such that the average valley voltage Vave is The sum of the valley voltages Vhn corresponding to a valley current is averaged as shown in equation (4). The rest of the circuit architecture and its operation are the same as the foregoing embodiments, and details are not described herein again.

Vave=(Vh1+Vh2+…+Vhn)/n (4)Vave=(Vh1+Vh2+...+Vhn)/n (4)

綜上所述,本發明採用相鄰兩時間點之電感谷值電流,以固定電感峰值電流,進而提高直流對直流轉換器之準確度。In summary, the present invention uses the inductor valley current of two adjacent time points to fix the peak current of the inductor, thereby improving the accuracy of the DC-to-DC converter.

以上所述者,僅為本發明一較佳實施例而已,並非用來限定本發明實施之範圍,故舉凡依本發明申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾,均應包括於本發明之申請專利範圍 內。The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the shapes, structures, features, and spirits described in the claims of the present invention are equally varied and modified. , should be included in the scope of patent application of the present invention Inside.

10‧‧‧直流轉直流轉換器10‧‧‧DC to DC converter

12‧‧‧電容12‧‧‧ Capacitance

14‧‧‧二極體14‧‧‧ diode

16‧‧‧電感16‧‧‧Inductance

18‧‧‧電晶體開關18‧‧‧Transistor Switch

20‧‧‧電阻20‧‧‧resistance

22‧‧‧迴授控制器22‧‧‧Return controller

24‧‧‧輸入電源24‧‧‧Input power supply

26‧‧‧二極體串26‧‧‧Diode string

28‧‧‧直流對直流轉換器28‧‧‧DC to DC converter

30‧‧‧電感30‧‧‧Inductance

32‧‧‧電晶體開關32‧‧‧Transistor Switch

34‧‧‧谷值電壓取樣保持單元34‧‧‧ Valley Voltage Sampling and Holding Unit

36‧‧‧參考電壓產生器36‧‧‧Reference voltage generator

37‧‧‧子谷值電壓取樣保持單元37‧‧‧Sub-valley voltage sampling and holding unit

38‧‧‧比較器38‧‧‧ comparator

40‧‧‧二極體串40‧‧‧Diode string

42‧‧‧第一時序開關42‧‧‧First timing switch

44‧‧‧第一谷值電壓保持單元44‧‧‧First valley voltage holding unit

46‧‧‧第二時序開關46‧‧‧Second timing switch

48‧‧‧第二谷值電壓保持單元48‧‧‧second valley voltage holding unit

49‧‧‧時序控制器49‧‧‧Sequence Controller

50‧‧‧第一放大器50‧‧‧First amplifier

52‧‧‧第一電晶體開關52‧‧‧First transistor switch

54‧‧‧第一電容54‧‧‧first capacitor

56‧‧‧第一電阻56‧‧‧First resistance

58‧‧‧第二放大器58‧‧‧Second amplifier

60‧‧‧第二電晶體開關60‧‧‧Second transistor switch

62‧‧‧第二電容62‧‧‧second capacitor

64‧‧‧第二電阻64‧‧‧second resistance

66‧‧‧第三放大器66‧‧‧3rd amplifier

68‧‧‧第三電阻68‧‧‧ Third resistor

70‧‧‧第三電晶體開關70‧‧‧ Third transistor switch

72‧‧‧電流鏡72‧‧‧current mirror

74‧‧‧第四電阻74‧‧‧fourth resistor

第1圖為先前技術之直流對直流轉換器之電路示意圖。Figure 1 is a circuit diagram of a prior art DC-to-DC converter.

第2圖為先前技術之電感電流與控制電晶體開關之電壓波形圖。Figure 2 is a voltage waveform diagram of the prior art inductor current and control transistor switch.

第3圖為先前技術之電晶體開關之源極電壓、二極體串電流與電感電流波形圖。Figure 3 is a diagram showing the source voltage, diode string current, and inductor current waveform of a prior art transistor switch.

第4圖為本發明之接收二谷值電流之控制裝置電路示意圖。Figure 4 is a circuit diagram of a control device for receiving two valley currents according to the present invention.

第5圖為本發明之電感電流與控制電晶體開關之電壓波形圖。Figure 5 is a voltage waveform diagram of the inductor current and the control transistor switch of the present invention.

第6圖為本發明之電晶體之源極電壓、二極體串電流與電感電流波形圖。Figure 6 is a waveform diagram of the source voltage, the diode string current, and the inductor current of the transistor of the present invention.

第7圖為本發明之接收複數谷值電流之控制裝置電路示意圖。Figure 7 is a circuit diagram of a control device for receiving a complex valley current according to the present invention.

28‧‧‧直流對直流轉換器28‧‧‧DC to DC converter

30‧‧‧電感30‧‧‧Inductance

32‧‧‧電晶體開關32‧‧‧Transistor Switch

34‧‧‧谷值電壓取樣保持單元34‧‧‧ Valley Voltage Sampling and Holding Unit

36‧‧‧參考電壓產生器36‧‧‧Reference voltage generator

38‧‧‧比較器38‧‧‧ comparator

37‧‧‧子谷值電壓取樣保持單元37‧‧‧Sub-valley voltage sampling and holding unit

40‧‧‧二極體串40‧‧‧Diode string

42‧‧‧第一時序開關42‧‧‧First timing switch

44‧‧‧第一谷值電壓保持單元44‧‧‧First valley voltage holding unit

46‧‧‧第二時序開關46‧‧‧Second timing switch

48‧‧‧第二谷值電壓保持單元48‧‧‧second valley voltage holding unit

49‧‧‧時序控制器49‧‧‧Sequence Controller

50‧‧‧第一放大器50‧‧‧First amplifier

52‧‧‧第一電晶體開關52‧‧‧First transistor switch

54‧‧‧第一電容54‧‧‧first capacitor

56‧‧‧第一電阻56‧‧‧First resistance

58‧‧‧第二放大器58‧‧‧Second amplifier

60‧‧‧第二電晶體開關60‧‧‧Second transistor switch

62‧‧‧第二電容62‧‧‧second capacitor

64‧‧‧第二電阻64‧‧‧second resistance

66‧‧‧第三放大器66‧‧‧3rd amplifier

68‧‧‧第三電阻68‧‧‧ Third resistor

70‧‧‧第三電晶體開關70‧‧‧ Third transistor switch

72‧‧‧電流鏡72‧‧‧current mirror

74‧‧‧第四電阻74‧‧‧fourth resistor

Claims (16)

一種平均電感電流式電壓補償控制裝置,其係連接一直流對直流轉換器,該平均電感電流式電壓補償控制裝置包括:一谷值電壓取樣保持單元,連接該直流對直流轉換器中之一電感,並接收該電感上的至少兩相鄰時間點之至少二谷值電流,並將其轉換為一平均谷值電壓;以及一參考電壓產生器,連接該谷值電壓取樣保持單元與該直流對直流轉換器中之一電子開關,並接收對應二倍該電感之平均電感電流之二倍外部電壓,以將其減去該平均谷值電壓,產生一參考電壓來控制該電子開關,以藉此使該電感上之峰值電流保持定值。 An average inductor current type voltage compensation control device is connected to a DC-to-DC converter, and the average inductor current type voltage compensation control device comprises: a valley voltage sampling and holding unit connected to one of the DC-DC converters And receiving at least two valley currents of the at least two adjacent time points on the inductor and converting them into an average valley voltage; and a reference voltage generator connecting the valley voltage sample holding unit and the DC pair An electronic switch in the DC converter, and receiving twice the external voltage corresponding to the average inductor current of the inductor to subtract the average valley voltage, generating a reference voltage to control the electronic switch, thereby Keep the peak current on the inductor constant. 如請求項1所述之平均電感電流式電壓補償控制裝置,其中該直流對直流轉換器為固定截止時間之直流對直流轉換器。 The average inductor current type voltage compensation control device according to claim 1, wherein the DC to DC converter is a DC-to-DC converter with a fixed off time. 如請求項1所述之平均電感電流式電壓補償控制裝置,更包含一比較器,其係連接該電感、該谷值電壓取樣保持單元、該參考電壓產生器與該電子開關,以接收該參考電壓與該電感之電感電壓,並依據其比較結果,控制該電子開關,以藉此使該峰值電流保持該定值。 The average inductor current type voltage compensation control device of claim 1, further comprising a comparator connecting the inductor, the valley voltage sample and hold unit, the reference voltage generator and the electronic switch to receive the reference The voltage and the inductor voltage of the inductor, and based on the comparison thereof, control the electronic switch to thereby maintain the peak current at the constant value. 如請求項3所述之平均電感電流式電壓補償控制裝置,其中該參考電壓與該電感電壓相異時,該比較器導通該電子開關,以藉此使該峰值電流達到該定值。 The average inductor current type voltage compensation control device of claim 3, wherein when the reference voltage is different from the inductor voltage, the comparator turns on the electronic switch to thereby cause the peak current to reach the predetermined value. 如請求項3所述之平均電感電流式電壓補償控制裝置,其中該參考電壓與該電感電壓相同時,該比較器關閉該電子開關。 The average inductor current type voltage compensation control device of claim 3, wherein the comparator turns off the electronic switch when the reference voltage is the same as the inductor voltage. 如請求項1所述之平均電感電流式電壓補償控制裝置,其中該二谷值電流包含分別對應先、後之該時間點之一第一谷值電流與一第二谷值電流,該平均谷值電壓為分別對應該第一谷值電流與該第二谷值電流之一第一半谷值電壓與一第二半谷值電壓之總和,且該谷值電壓取樣保持單元更包含:一第一時序開關,連接該電感,並在該兩相鄰時間點暫時導通,以分別供該第一谷值電流與該第二谷值電流通過; 一第一谷值電壓保持單元,連接該第一時序開關,以接收該第一谷值電流或該第二谷值電流,並分別將其轉換為該第一半谷值電壓或該第二半谷值電壓,且保持其輸出;一第二時序開關,連接該第一谷值電壓保持單元,並在該兩相鄰時間點之間,且該電感電流逐漸下降時,暫時導通,以作為該第一半谷值電壓之傳送路徑;以及一第二谷值電壓保持單元,連接該第二時序開關,以接收該第一半谷值電壓,並保持其輸出。 The average inductor current type voltage compensation control device of claim 1, wherein the two valley currents comprise a first valley current and a second valley current corresponding to the first and subsequent time points, respectively, the average valley The value voltage is a sum of a first valley voltage and a second valley voltage respectively corresponding to the first valley current and the second valley current, and the valley voltage sampling and holding unit further comprises: a first a timing switch, connected to the inductor, and temporarily turned on at the two adjacent time points to respectively pass the first valley current and the second valley current; a first valley voltage holding unit connected to the first timing switch to receive the first valley current or the second valley current and convert it into the first valley voltage or the second a half-valley voltage, and maintaining its output; a second timing switch connected to the first valley voltage holding unit, and between the two adjacent time points, and the inductor current gradually decreases, temporarily turning on a transmission path of the first half of the valley voltage; and a second valley voltage holding unit connected to the second timing switch to receive the first half-valley voltage and maintain its output. 如請求項6所述之平均電感電流式電壓補償控制裝置,其中該第一谷值電壓保持單元更包含:一第一放大器,連接該第一時序開關,以接收該第一谷值電流或該第二谷值電流,分別輸出一第一導通訊號或一第二導通訊號;一第一電晶體開關,連接該第一放大器與該參考電壓產生器,並接收該第一導通訊號或該第二導通訊號以保持導通;一第一電容,其一端接地,另一端連接該第一時序開關與該第一放大器;以及一第一電阻,其一端接地,另一端連接該第一電晶體開關與該第一放大器,該第一電容與該第一電阻透過該第一時序開關接收該第一谷值電流或該第二谷值電流,並將其轉換為該第一半谷值電壓或該第二半谷值電壓,以藉由該第一電晶體開關保持輸出該第一半谷值電壓或該第二半谷值電壓;以及該第二谷值電壓保持單元更包含:一第二放大器,連接該第二時序開關,以接收該第一半谷值電壓,輸出一第三導通訊號;一第二電晶體開關,連接該第二放大器與該參考電壓產生器,並接收該第三導通訊號以保持導通;一第二電容,其一端接地,另一端連接該第二時序開關與該第二放大器;以及 一第二電阻,其一端接地,另一端連接該第二電晶體開關與該第二放大器,該第二電阻與該第一電阻之阻值相同,該第二電容與該第二電阻透過該第二時序開關接收該第一半谷值電壓,以藉由該第二電晶體開關保持輸出該第一半谷值電壓。 The average inductor current type voltage compensation control device of claim 6, wherein the first valley voltage holding unit further comprises: a first amplifier connected to the first timing switch to receive the first valley current or The second valley current respectively outputs a first communication number or a second communication number; a first transistor switch is connected to the first amplifier and the reference voltage generator, and receives the first communication number or the first a second conductivity communication number to maintain conduction; a first capacitor, one end of which is grounded, the other end is connected to the first timing switch and the first amplifier; and a first resistor, one end of which is grounded, and the other end is connected to the first transistor switch And the first amplifier, the first capacitor and the first resistor receive the first valley current or the second valley current through the first timing switch, and converts the first valley voltage or the first valley voltage or The second half-valley voltage is maintained to output the first half-valley voltage or the second half-valley voltage by the first transistor switch; and the second valley voltage holding unit further comprises: a second amplifier, Connecting the second timing switch to receive the first half-valley voltage, outputting a third communication number; a second transistor switch connecting the second amplifier and the reference voltage generator, and receiving the third communication number To maintain conduction; a second capacitor having one end grounded and the other end connected to the second timing switch and the second amplifier; a second resistor having one end connected to the ground and the other end connected to the second transistor switch and the second amplifier, wherein the second resistor has the same resistance as the first resistor, and the second capacitor and the second resistor pass through the second resistor The second timing switch receives the first half-bottom voltage to maintain the output of the first half-valley voltage by the second transistor switch. 如請求項7所述之平均電感電流式電壓補償控制裝置,其中該參考電壓產生器更包含:一第三放大器,接收該二倍外部電壓,以產生一第四導通訊號;一第三電阻,其阻值為該第一電阻的一半,該第三電阻之一端接地,另一端連接該第三放大器;一第三電晶體開關,連接該第三放大器與該第三電阻,以接收該第四導通訊號,並藉由該第三電阻產生流經該第三電晶體開關與該第三電阻之二倍該平均電感電流;一電流鏡,連接該第三電晶體開關;以及一第四電阻,其阻值與該第三電阻相同,該第四電阻之一端接地,另一端連接該電流鏡,該電流鏡複製該二倍該平均電感電流,以產生通過該第四電阻之二倍該平均電感電流,並據此產生該二倍外部電壓,以將其減去該二半谷值電壓,產生該參考電壓。 The average inductor current type voltage compensation control device of claim 7, wherein the reference voltage generator further comprises: a third amplifier receiving the double external voltage to generate a fourth communication number; a third resistor, The resistance is half of the first resistor, one end of the third resistor is grounded, and the other end is connected to the third amplifier; a third transistor switch is connected to the third amplifier and the third resistor to receive the fourth Transmitting a communication number, and generating, by the third resistor, the average inductor current flowing through the third transistor switch and the third resistor; a current mirror connecting the third transistor switch; and a fourth resistor, The resistance is the same as the third resistance, one end of the fourth resistor is grounded, and the other end is connected to the current mirror, and the current mirror copies the average inductor current twice to generate the average inductance by twice the fourth resistance. The current is generated, and the double external voltage is generated accordingly to subtract the two half-valley voltage to generate the reference voltage. 如請求項6所述之平均電感電流式電壓補償控制裝置,更包含一時序控制器,其係連接該第一時序開關、該第二時序開關與該電感,並在該兩相鄰時間點暫時導通該第一時序開關,且在該兩相鄰時間點之間,且該電感電流逐漸下降時,暫時導通該第二時序開關。 The average inductor current type voltage compensation control device of claim 6, further comprising a timing controller that connects the first timing switch, the second timing switch and the inductor, and at the two adjacent time points The first timing switch is turned on temporarily, and the second timing switch is temporarily turned on when the inductor current gradually decreases between the two adjacent time points. 如請求項1所述之平均電感電流式電壓補償控制裝置,其中該時間點與該谷值電流皆為複數時,該平均谷值電壓為每一該谷值電流對應之谷值電壓之總和平均。 The average inductor current type voltage compensation control device according to claim 1, wherein when the time point and the valley current are both plural, the average valley voltage is a sum of the average of the valley voltages corresponding to each of the valley currents. . 一種平均電感電流式電壓補償控制方法,其係控制一直流對直流轉換器,該直流對直流轉換器包括一電子開關與一電感,該平均電感電流式電壓補償控制方法包含下列步驟:接收對應二倍該電感之平均電感電流之二倍外部電壓與該電感上的 至少兩相鄰時間點之至少二谷值電流,並將該至少二谷值電流轉換為一平均谷值電壓;以及將該二倍外部電壓減去該平均谷值電壓,以輸出控制該電子開關之一參考電壓。 An average inductor current type voltage compensation control method is for controlling a DC-to-DC converter, the DC-DC converter includes an electronic switch and an inductor, and the average inductor current type voltage compensation control method comprises the following steps: receiving corresponding two Double the average inductor current of the inductor and double the external voltage with the inductor At least two valley currents of at least two adjacent time points, and converting the at least two valley currents into an average valley voltage; and subtracting the average external voltage from the average external voltage to output the electronic switch One of the reference voltages. 如請求項11所述之平均電感電流式電壓補償控制方法,更包含一步驟,其係接收該參考電壓與該電感之電感電壓,並依據其比較結果,控制該電子開關,以藉此使該電感上之峰值電流保持定值。 The method for controlling an average inductor current type voltage compensation according to claim 11, further comprising a step of receiving the reference voltage and an inductance voltage of the inductor, and controlling the electronic switch according to the comparison result, thereby The peak current on the inductor remains constant. 如請求項12所述之平均電感電流式電壓補償控制方法,其中該比較結果為該參考電壓與該電感電壓相同時,該電子開關關閉。 The average inductor current type voltage compensation control method according to claim 12, wherein the comparison result is that the reference voltage is the same as the inductor voltage, the electronic switch is turned off. 如請求項12所述之平均電感電流式電壓補償控制方法,其中該比較結果為該參考電壓與該電感電壓相異時,該電子開關導通,以藉此使該峰值電流保持該定值。 The method of claim 12, wherein the comparison result is that the reference voltage is different from the inductor voltage, the electronic switch is turned on to thereby maintain the peak current at the constant value. 如請求項11所述之平均電感電流式電壓補償控制方法,其中該直流對直流轉換器為固定截止時間之直流對直流轉換器。 The method for controlling an average inductor current type voltage compensation according to claim 11, wherein the DC-to-DC converter is a DC-to-DC converter with a fixed off-time. 如請求項11所述之平均電感電流式電壓補償控制方法,其中該時間點與該谷值電流皆為複數時,該平均谷值電壓為每一該谷值電流對應之谷值電壓之總和平均。 The method of claim 11, wherein the average valley voltage is a sum of the valley voltages corresponding to each of the valley currents. .
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