TWI476563B - Data recovery device and method - Google Patents

Description

Data recovery device and method

The present disclosure relates to a data correction technique, and more particularly to a data recovery device and method.

A large amount of data transmission is often required between various computer systems and network communication systems. The technology of data transmission varies with different designs and definitions, but the purpose is to enable the receiving end to accurately and quickly receive data from the transmitting end.

In order to transmit data from the transmitting end to the receiving end through the signal line, the receiving end must know when to sample the data signal from the transmitting end. In many systems, this information is provided by the transmitting end through a dedicated timing signal line adjacent to the data signal line, which is transmitted to the receiving terminal's timing (clock) signal. However, depending on the data line, the cost of the motherboard area and power consumption is high. A preferred method is to remove the timing line and use the data signal line on the receiving end to determine when to sample the data signal for the most reliable data extraction. This circuit is called the Clock and Data Recovery (CDR) circuit.

However, general clock and data recovery circuits often have problems of high power consumption and high cost. Moreover, the ability to design an efficient frequency automatic tracking mechanism is also a circuit design challenge. Therefore, how to provide a new data recovery device and method to achieve low power consumption, low cost and efficient tracking of data frequencies is an urgent problem to be solved in the industry.

Therefore, one aspect of the present disclosure is to provide a data recovery device including: a first gated voltage controlled oscillator (VCO), a second gate voltage controlled oscillator, a frequency comparator, and a frequency Controller and data recovery circuit. The first gate voltage controlled oscillator generates an oscillation frequency according to the control signal and receives a data signal having a data carrier frequency to generate a first signal having a mixed frequency according to the data carrier frequency and the oscillation frequency. The second gate voltage controlled oscillator generates a second signal having an oscillation frequency according to the control signal. The frequency comparator compares the mixing frequency and the magnitude of the oscillation frequency to determine whether the mixing frequency and the oscillation frequency are substantially equal. The frequency controller is configured to generate a control signal to adjust the oscillation frequency when the mixing frequency and the oscillation frequency are not substantially equal. The data recovery circuit recovers the data signal according to the oscillation frequency when the mixed frequency and the oscillation frequency are substantially equal.

According to an embodiment of the present disclosure, the data recovery device further includes a frequency reducer for down-clocking the mixing frequency of the first signal and the oscillation frequency of the second signal, and the frequency comparator performs the frequency mixing and the oscillation frequency after the frequency reduction. Comparison.

According to another embodiment of the present disclosure, wherein the frequency comparator determines that the mixing frequency is greater than the oscillation frequency, the control signal increases the oscillation frequency.

According to still another embodiment of the present disclosure, wherein the frequency comparator determines that the mixing frequency is less than the oscillation frequency, the control signal decreases the oscillation frequency.

According to still another embodiment of the present disclosure, the second gate voltage controlled oscillator further receives a fixed value signal for using the fixed value signal and the oscillation frequency. Generate a second signal.

Another aspect of the present disclosure is to provide a data correction method including: causing a first gate voltage controlled oscillator to generate an oscillation frequency according to a control signal and receiving a data signal having a data carrier frequency; and causing the first gate voltage control The oscillator generates a first signal having a mixed frequency according to the data carrier frequency and the oscillation frequency; causing the second gate voltage controlled oscillator to generate a second signal having an oscillation frequency according to the control signal; determining whether the mixed frequency and the oscillation frequency are substantially equal; When the mixing frequency and the oscillation frequency are not substantially equal, a control signal is generated to adjust the oscillation frequency; and when the mixed frequency and the oscillation frequency are substantially equal, the data signal is recovered according to the oscillation frequency.

According to an embodiment of the present disclosure, the method further includes: downsampling the mixing frequency of the first signal and the oscillating frequency of the second signal to compare the mixed frequency and the oscillating frequency after the frequency reduction.

According to another embodiment of the present disclosure, wherein the judging signal is greater than the oscillating frequency, the control signal increases the oscillating frequency.

According to still another embodiment of the present disclosure, wherein the control signal reduces the oscillation frequency when it is determined that the mixing frequency is less than the oscillation frequency.

According to still another embodiment of the present disclosure, the method further includes: causing the second gate voltage controlled oscillator to receive the fixed value signal to generate the second signal according to the fixed value signal and the oscillation frequency.

The advantage of the application of the present disclosure is that the second signal having the oscillation frequency generated by the second gate voltage controlled oscillator is used as the reference signal, and the first gate voltage controlled oscillator is generated according to the oscillation frequency and the data carrier frequency. The first signal with mixed frequency is compared to dynamically adjust the oscillation frequency to track the data carrier frequency to quickly perform data signal Data recovery, and easily achieve the above purposes.

Please refer to Figure 1. FIG. 1 is a block diagram of a data recovery device 1 according to an embodiment of the disclosure. The data recovery device 1 includes a first gated voltage controlled oscillator (VCO) 100, a second gate voltage controlled oscillator 102, a frequency comparator 104, a frequency controller 106, and a data recovery circuit 108.

The first gate voltage controlled oscillator 100 generates an oscillation frequency Fo according to the control signal 101 and receives a data signal DP/DN having a data carrier frequency Fd. The first gate voltage controlled oscillator 100 can be equalized by an equalizer 110 to receive the data signal DP/DN. In this embodiment, the data signal DP/DN is an analog differential data signal. After generating the oscillation frequency Fo and receiving the data signal DP/DN, the first gate voltage controlled oscillator 100 generates a first signal 103 having the mixed frequency Fh mixed by the two frequencies according to the data carrier frequency Fd and the oscillation frequency Fo. .

The second gate voltage controlled oscillator 102 generates a second signal 105 having an oscillation frequency Fo according to the control signal 101. In this embodiment, the second gate voltage controlled oscillator 102 receives a fixed value signal 107 for generating a second signal 105 according to the fixed value signal 107 and the oscillation frequency Fo. The fixed value signal 107 refers to a signal that does not have any frequency, so the frequency of the second signal 105 generated according to the oscillation frequency Fo corresponds to the oscillation frequency Fo.

The frequency comparator 104 compares the magnitude between the mixing frequency Fh and the oscillation frequency Fo to determine whether the mixing frequency Fh and the oscillation frequency Fo are substantially equal. In this embodiment, the first signal 103 and the second signal 105 are actually First, a frequency reducer 112 is used to firstly down-mix the mixed frequency Fh of the first signal 103 and the oscillation frequency Fo of the second signal 105, and then the frequency-mixed frequency Fh' is used by the frequency comparator 104. A comparison with the oscillation frequency Fo' and a comparison result 109 is produced. It should be noted that in other embodiments, the first signal 103 and the second signal 105 can also directly compare the un-frequency-mixed frequency Fh and the oscillating frequency Fo by the frequency comparator 104 without down-converting.

The aforementioned control signal 101 is actually generated by the frequency controller 106. In the present embodiment, the frequency controller 106 operates in accordance with the comparison result 109 of the frequency comparator 104. When the comparison result 109 of the frequency comparator 104 indicates that the mixing frequency Fh' is greater than the oscillation frequency Fo', the data carrier frequency Fd indicating the data signal DP/DN is greater than the oscillation frequency Fo generated at this time, and thus the mixing frequency generated after the mixing. Fh will be pulled higher than the oscillation frequency Fo. The frequency controller 106 will cause the control signal 101 to control the first gate voltage controlled oscillator 100 and the second gate voltage controlled oscillator 102 to increase the oscillation frequency Fo, thereby gradually bringing the oscillation frequency Fo closer to the data carrier frequency. Fd.

When the comparison result 109 of the frequency comparator 104 indicates that the mixed frequency Fh' is smaller than the oscillation frequency Fo', the data carrier frequency Fd indicating the data signal DP/DN is smaller than the oscillation frequency Fo generated at this time, and thus the mixed frequency generated after the mixing. Fh will be pulled lower than the oscillation frequency Fo. The frequency controller 106 will cause the control signal 101 to control the first gate voltage controlled oscillator 100 and the second gate voltage controlled oscillator 102 to lower the oscillation frequency Fo, thereby gradually bringing the oscillation frequency Fo closer to the data carrier frequency. Fd.

Therefore, after the step-by-step comparison and adjustment, the oscillation frequency Fo will Gradually close to the mixing frequency Fh. The data recovery circuit 108 recovers the data signal DP/DN according to the oscillation frequency Fo when the mixing frequency Fh and the oscillation frequency Fo are substantially equal. It should be noted that the term "substantially equal" means that the mixed frequency Fh and the oscillating frequency Fo do not need to be completely equal, that is, the mixed frequency Fh and the oscillating frequency Fo may have an allowable error within a reasonable range.

In this embodiment, the data recovery circuit 108 is a sampling circuit, and can also receive the data signal DP/DN via the equalizer 110 and perform sampling to generate the recovery data DR. In various embodiments, data recovery circuit 108 can sample in units of different numbers of bits. For example, the data recovery circuit 108 can sample 10 bits in one unit, and the recovered data DR generated each time is 10 bits of data. Therefore, if the data carrier frequency Fd is about 1.35 GHz, since the data signal DP/DN is a differential data signal, the data transmission frequency will be 2.7 GHz. The data transmission frequency of the 10-bit data generated after sampling will be 270MHz. It should be noted that the above sampling manner is only an example. In other embodiments, an appropriate sampling manner may be adopted according to the type of the data, and is not limited to the above embodiments.

In some data transmission systems, the data carrier frequency (timing) of the data signal does not transmit from the transmitting end to the receiving end, so the receiving end needs an effective mechanism to track the data carrier frequency and correct it at any time. . The second signal generated by the second gate voltage controlled oscillator having the oscillation frequency is used as the reference signal, and the first gate voltage controlled oscillator generates the first mixed frequency according to the oscillation frequency and the data carrier frequency. The signal is compared to dynamically adjust the oscillation frequency to track the data carrier frequency, which will quickly and accurately adjust the frequency. Rate data recovery for data signals. Moreover, using the gate voltage controlled oscillator to track the frequency can reduce the power consumption and cost of the circuit, and achieve low power consumption and low cost.

Please refer to Figure 2. 2 is a first signal 103 having a mixed frequency Fh generated by the first gate voltage controlled oscillator 100 according to the data carrier frequency Fd and the oscillation frequency Fo, and controlled by the second gate voltage, according to an embodiment of the disclosure. The oscillator 102 generates a waveform pattern of the second signal 105 having the oscillation frequency Fo according to the control signal 101.

As can be seen from FIG. 2, the oscillation frequency Fo of the second signal 105 is lower than the mixing frequency Fh of the first signal 103 in the initial state, and is gradually increased according to the control signal 101 under the adjustment of the frequency controller 106, and more and more The closer to the mixing frequency Fh of the first signal 103. Therefore, the final oscillation frequency Fo can be substantially equal to the mixing frequency Fh and close to the data carrier frequency Fd, and the data recovery circuit 108 shown in FIG. 1 performs data recovery based on the frequency.

Please refer to Figure 3. FIG. 3 is a flow chart of a data correction method 300 in an embodiment of the disclosure. The data correction method 300 can be applied to the data recovery device 1 as shown in FIG. The data correction method 300 includes the following steps (it should be understood that the steps mentioned in the present embodiment can be adjusted according to actual needs, except for the order in which they are specifically stated, or even simultaneously or partially) .

In step 301, the first gate voltage controlled oscillator 100 is caused to oscillate the frequency Fo according to the control signal 101 and receive the data signal DP/DN having the data carrier frequency Fd.

In step 302, the first gate voltage controlled oscillator 100 generates the first with the mixed frequency Fh according to the data carrier frequency Fd and the oscillation frequency Fo. Signal 103.

In step 303, the second gate voltage controlled oscillator 102 generates a second signal 105 having an oscillation frequency Fo according to the control signal 102.

In step 304, the frequency comparator 104 determines whether the mixing frequency Fh and the oscillation frequency Fo are substantially equal.

When the mixing frequency Fh and the oscillation frequency Fo are not substantially equal, in step 305, the frequency controller 106 generates the control signal 101 to adjust the oscillation frequency, and returns to step 304 to continue the determination. When the mixing frequency Fh and the oscillation frequency Fo are substantially equal, the data signal DP/DN is recovered according to the oscillation frequency Fo.

The present disclosure has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is subject to the definition of the scope of the patent application.

1‧‧‧Data recovery device

100‧‧‧First Gate Voltage Controlled Oscillator

101‧‧‧Control signal

102‧‧‧Second gate voltage controlled oscillator

103‧‧‧First signal

104‧‧‧ frequency comparator

105‧‧‧second signal

106‧‧‧frequency controller

107‧‧‧ fixed value signal

108‧‧‧Data recovery circuit

109‧‧‧Comparative results

110‧‧‧ Equalizer

112‧‧‧Downers

300‧‧‧Data correction method

301-306‧‧‧Steps

The above and other objects, features, advantages and embodiments of the present disclosure will become more apparent and understood. The description of the drawings is as follows: FIG. 1 is a block diagram of a data recovery device according to an embodiment of the disclosure. 2 is a waveform diagram of a first signal generated by a first gate voltage controlled oscillator and a second signal generated by a second gate voltage controlled oscillator in an embodiment of the present disclosure; 3 is a flow of data correction method in an embodiment of the disclosure Cheng Tu.

1‧‧‧Data recovery device

100‧‧‧First Gate Voltage Controlled Oscillator

101‧‧‧Control signal

102‧‧‧Second gate voltage controlled oscillator

103‧‧‧First signal

104‧‧‧ frequency comparator

105‧‧‧second signal

106‧‧‧frequency controller

107‧‧‧ fixed value signal

108‧‧‧Data recovery circuit

109‧‧‧Comparative results

110‧‧‧ Equalizer

112‧‧‧Downers

Claims (8)

A data recovery device includes: a first gated voltage controlled oscillator (VCO) for generating an oscillation frequency according to a control signal and receiving a data signal having a data carrier frequency, according to the The data carrier frequency and the oscillating frequency generate a first signal having a mixed frequency; a second thyristor voltage controlled oscillator receives a certain value signal for generating the oscillating frequency according to the control signal and the fixed value signal a second signal; a frequency comparator for comparing the mixed frequency and the magnitude of the oscillation frequency to determine whether the mixing frequency and the oscillation frequency are substantially equal; a frequency controller for the mixing frequency and the When the oscillation frequency is not substantially equal, the control signal is generated to adjust the oscillation frequency; and a data recovery circuit is configured to recover the data signal according to the oscillation frequency when the mixed frequency and the oscillation frequency are substantially equal. The data recovery device of claim 1, further comprising a frequency reducer for down-converting the mixed frequency of the first signal and the oscillating frequency of the second signal, the frequency comparator is after down-converting The mixing frequency and the oscillation frequency are compared. The data recovery device of claim 1, wherein when the frequency comparator determines that the mixing frequency is greater than the oscillation frequency, the control signal causes the The oscillation frequency is increased. The data recovery device of claim 1, wherein the control signal reduces the oscillation frequency when the frequency comparator determines that the mixing frequency is less than the oscillation frequency. A data correction method includes: causing a first gate voltage controlled oscillator to generate an oscillation frequency according to a control signal and receiving a data signal having a data carrier frequency; and causing the first gate voltage control oscillator to generate the data according to the data The carrier frequency and the oscillation frequency generate a first signal having a mixed frequency; causing a second gate voltage controlled oscillator to generate a second signal having the oscillation frequency according to the control signal and the certain value signal; determining the mixed frequency And the oscillation frequency is substantially equal; when the mixing frequency and the oscillation frequency are not substantially equal, the control signal is generated to adjust the oscillation frequency; and when the mixing frequency and the oscillation frequency are substantially equal, the data is obtained according to the oscillation frequency Signal samples for recovery. The data correction method of claim 5, further comprising: down-converting the mixed frequency of the first signal and the oscillating frequency of the second signal to compare the mixed frequency after the down-conversion and the oscillating frequency . The data correction method according to claim 6, wherein when determining the The mixing frequency is greater than the oscillation frequency, and the control signal increases the oscillation frequency. The data correction method of claim 6, wherein the control signal reduces the oscillation frequency when it is determined that the mixing frequency is less than the oscillation frequency.