TWI473213B - Method for making flexible semiconductor device - Google Patents

Method for making flexible semiconductor device Download PDF

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TWI473213B
TWI473213B TW98124374A TW98124374A TWI473213B TW I473213 B TWI473213 B TW I473213B TW 98124374 A TW98124374 A TW 98124374A TW 98124374 A TW98124374 A TW 98124374A TW I473213 B TWI473213 B TW I473213B
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flexible
semiconductor device
layer
substrate
flexible substrate
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TW98124374A
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TW201104799A (en
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Xue-Shen Wang
Qun-Qing Li
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Hon Hai Prec Ind Co Ltd
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柔性半導體器件之製造方法 Method of manufacturing flexible semiconductor device

本發明涉及一種半導體器件之製造方法,尤其涉及一種柔性半導體器件之製造方法。 The present invention relates to a method of fabricating a semiconductor device, and more particularly to a method of fabricating a flexible semiconductor device.

傳統之半導體器件如薄膜電晶體或發光二極體,通常以玻璃等硬質材料作為基底。最近,替代半導體器件玻璃基底之柔性基底如塑膠基底之研究業已進行。柔性半導體器件用之柔性基底具有耐用、重量輕、柔韌性較好等優點,因此,柔性半導體器件具有廣闊之應用前景。 Conventional semiconductor devices such as thin film transistors or light-emitting diodes are usually made of a hard material such as glass. Recently, research has been conducted to replace flexible substrates such as plastic substrates for glass substrates of semiconductor devices. Flexible substrates for flexible semiconductor devices have the advantages of durability, light weight, and good flexibility. Therefore, flexible semiconductor devices have broad application prospects.

然,柔性基底自身有易捲曲、表面起伏等特點,不利於採用傳統半導體加工工藝於該柔性基底上形成一半導體器件。為此,日本之Tsunenori Suzuki等人於2007年3月1日於美國公開的、公開號為US 2007/0045621A1,標題為“SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF”之專利申請中揭示一種柔性半導體器件及其製造方法。 However, the flexible substrate itself has the characteristics of easy curling, surface undulation, etc., which is disadvantageous for forming a semiconductor device on the flexible substrate by using a conventional semiconductor processing technique. For this purpose, a flexible semiconductor device and a patent application thereof are disclosed in the patent application entitled "SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF", which is published in the U.S. Patent No. US 2007/0045621 A1, the entire disclosure of which is hereby incorporated by reference. Production method.

請參閱圖1,所述柔性半導體器件之製造方法包括:於硬基底101形成分離層102;於分離層102形成絕緣層103;於絕緣層103形成半導體元件1111和需要連接到該半導體元件1111上之第一電極層104;於該部分第一電極層104上形成一無機絕緣層1115;於該第一電極層104及無機絕緣層1115上形成含有有機化合物之層105,並形成與含有有機化合物之層105和無機絕緣層1115接觸之第二電極層106;以及將柔性基底108固定到第二電極層106,然後 於分離層102處將硬基底101和形成半導體元件1111之絕緣層103彼此分離,以形成具有柔性基底108之半導體器件。 Referring to FIG. 1, the manufacturing method of the flexible semiconductor device includes: forming a separation layer 102 on the hard substrate 101; forming an insulating layer 103 on the separation layer 102; forming a semiconductor element 1111 on the insulating layer 103 and connecting to the semiconductor element 1111. a first electrode layer 104; an inorganic insulating layer 1115 is formed on the portion of the first electrode layer 104; a layer 105 containing an organic compound is formed on the first electrode layer 104 and the inorganic insulating layer 1115, and is formed and contains an organic compound The layer 105 is in contact with the second electrode layer 106 of the inorganic insulating layer 1115; and the flexible substrate 108 is fixed to the second electrode layer 106, and then The hard substrate 101 and the insulating layer 103 forming the semiconductor element 1111 are separated from each other at the separation layer 102 to form a semiconductor device having the flexible substrate 108.

上述製造方法雖然提供了一種柔性半導體器件之製造方法,然,該製造方法係先於硬基底101形成一柔性半導體器件,並將柔性基底108固定到該柔性半導體器件,然後再將於硬基底101形成之半導體器件與該硬基底101分離,從而得到一柔性半導體器件。惟,上述製造方法較複雜。 The above manufacturing method provides a manufacturing method of a flexible semiconductor device which is formed by forming a flexible semiconductor device prior to the hard substrate 101, and fixing the flexible substrate 108 to the flexible semiconductor device, and then to the hard substrate 101. The formed semiconductor device is separated from the hard substrate 101, thereby obtaining a flexible semiconductor device. However, the above manufacturing method is complicated.

有鑒於此,確有必要提供一種簡單之能於柔性基底直接製造柔性半導體器件之方法。 In view of this, it is indeed necessary to provide a simple method of directly manufacturing a flexible semiconductor device on a flexible substrate.

一種柔性半導體器件之製造方法,其包括以下步驟:提供一硬基底,該硬基底具有一表面;提供一柔性基底,該柔性基底具有一第一表面及與該第一表面相對設置之一第二表面,將該柔性基底之第一表面固定於所述硬基底之表面;採用半導體加工工藝直接於所述柔性基底之第二表面形成半導體器件;以及去除所述硬基底,形成一柔性半導體器件。 A method of fabricating a flexible semiconductor device, comprising the steps of: providing a hard substrate having a surface; providing a flexible substrate having a first surface and a second surface opposite the first surface a surface, the first surface of the flexible substrate is fixed to the surface of the hard substrate; a semiconductor device is directly formed on the second surface of the flexible substrate by a semiconductor processing process; and the hard substrate is removed to form a flexible semiconductor device.

與先前技術相比較,本發明提供之柔性半導體器件之製造方法係先將柔性基底固定於硬基底之表面,然後於所述柔性基底之第二表面直接進行半導體加工以形成柔性半導體器件,該種方法可以避免於所述柔性基底直接進行半導體加工以形成柔性半導體器件時,所述柔性基底自身發生捲曲及表面起伏之現象,便於進行加工且可以 提高該柔性半導體器件之精度。本發明提供之柔性半導體器件之製造方法具有方法簡單、易於操作之特點。 Compared with the prior art, the flexible semiconductor device provided by the present invention firstly fixes the flexible substrate to the surface of the hard substrate, and then directly performs semiconductor processing on the second surface of the flexible substrate to form a flexible semiconductor device. The method can avoid the phenomenon that the flexible substrate itself curls and surface undulates when the flexible substrate directly performs semiconductor processing to form a flexible semiconductor device, which is convenient for processing and can be The accuracy of the flexible semiconductor device is improved. The manufacturing method of the flexible semiconductor device provided by the invention has the characteristics of simple method and easy operation.

下面將結合附圖對本發明提供之柔性半導體器件之製造方法作進一步之詳細說明。 The method of manufacturing the flexible semiconductor device provided by the present invention will be further described in detail below with reference to the accompanying drawings.

請參閱圖2,本發明第一實施例提供一種柔性半導體器件,即底柵型薄膜電晶體之製造方法,該製造方法包括以下步驟:(s110)提供一硬基底,該硬基底具有一表面;(s120)提供一柔性基底,該柔性基底具有一第一表面及與該第一表面相對設置之第二表面,將該柔性基底之第一表面固定於所述硬基底之表面;(s130)採用半導體加工工藝直接於所述柔性基底之第二表面形成半導體器件;(s140)去除所述硬基底,形成一柔性半導體器件。 Referring to FIG. 2, a first embodiment of the present invention provides a method for manufacturing a flexible semiconductor device, that is, a bottom gate type thin film transistor, the manufacturing method comprising the steps of: (s110) providing a hard substrate having a surface; (s120) providing a flexible substrate having a first surface and a second surface disposed opposite the first surface, the first surface of the flexible substrate being fixed to a surface of the hard substrate; (s130) adopting The semiconductor processing process forms a semiconductor device directly on the second surface of the flexible substrate; (s140) removing the hard substrate to form a flexible semiconductor device.

請參閱圖3,於所述步驟s110中,提供一硬基底12,該硬基底具有一表面122。所述硬基底12之表面122比較平整。該硬基底12之表面122可預先經過丙酮、異丙醇或乙醇進行清洗;再用去離子水清洗,並用氧氣電漿處理,以保證該硬基底12之表面122比較乾淨,從而有利於後續工藝的進行。所述硬基底12之材料為玻璃、石英、氮氧化矽、氮化矽、金屬或硬質塑膠等材料。所述硬基底12之形狀不限,根據實際需要確定。本實施例中,所述硬基底12為方形之玻璃。 Referring to FIG. 3, in the step s110, a hard substrate 12 having a surface 122 is provided. The surface 122 of the hard substrate 12 is relatively flat. The surface 122 of the hard substrate 12 may be washed with acetone, isopropyl alcohol or ethanol in advance; then washed with deionized water and treated with oxygen plasma to ensure that the surface 122 of the hard substrate 12 is relatively clean, thereby facilitating subsequent processes. Going on. The material of the hard substrate 12 is glass, quartz, bismuth oxynitride, tantalum nitride, metal or hard plastic. The shape of the hard substrate 12 is not limited and is determined according to actual needs. In this embodiment, the hard substrate 12 is a square glass.

所述步驟s120具體地包括以下步驟:(s121)於所述硬基底12上形成一粘結層14;(s122)提供一柔性基底16 ,該柔性基底16具有一第一表面162及與該第一表面162相對設置之第二表面164;(s123)當所述粘結層14未固化或未凝固時,將所述柔性基底16之第一表面162之一側邊緣18接觸該粘結層14,並將該柔性基底16從該邊緣18置於該粘結層14上;(s124)固化所述粘結層14。 The step s120 specifically includes the steps of: (s121) forming a bonding layer 14 on the hard substrate 12; (s122) providing a flexible substrate 16 The flexible substrate 16 has a first surface 162 and a second surface 164 disposed opposite the first surface 162; (s123) when the bonding layer 14 is uncured or not solidified, the flexible substrate 16 is One of the side edges 18 of the first surface 162 contacts the bonding layer 14, and the flexible substrate 16 is placed on the bonding layer 14 from the edge 18; (s124) the bonding layer 14 is cured.

於上述步驟s121中:首先,提供一粘結材料。該粘結材料具有流動性、可以凝固或固化以及不溶於丙酮、異丙醇與乙醇等特點。該粘結材料可以為聚醯亞胺、環氧樹脂、丙烯酸樹脂、聚酯、聚醯胺、矽樹脂、三聚氰胺樹脂、苯酚樹脂或聚二甲基矽氧烷等材料。本實施例中,所述粘結材料為聚二甲基矽氧烷。其次,將所述粘結材料旋塗於所述硬基底12上,以形成粘結層14。由於所述硬基底12經過清洗,其表面比較乾淨,有利於增加該硬基底12與所述粘結材料之結合力。該步驟還可以用甩膠之方式將所述粘結材料塗於所述硬基底12上。 In the above step s121: First, a bonding material is provided. The bonding material has fluidity, can be solidified or solidified, and is insoluble in acetone, isopropanol and ethanol. The bonding material may be a material such as polyimide, epoxy resin, acrylic resin, polyester, polyamide, enamel resin, melamine resin, phenol resin or polydimethyl siloxane. In this embodiment, the bonding material is polydimethyl siloxane. Next, the bonding material is spin-coated on the hard substrate 12 to form the bonding layer 14. Since the hard substrate 12 is cleaned, its surface is relatively clean, which is advantageous for increasing the bonding force of the hard substrate 12 and the bonding material. This step can also apply the bonding material to the hard substrate 12 in the form of a silicone.

於上述步驟s122中:所述柔性基底16需要進行清洗。具體地,該柔性基底16可預先經過丙酮、異丙醇或乙醇進行清洗;再用去離子水清洗,並用氧氣電漿處理,以保證該柔性基底16之表面乾淨。其中,所述柔性基底16具有柔軟、薄而且品質輕之特點。該柔性基底16之材料為聚對苯二甲酸乙二酯、聚萘二甲酸乙二酯、聚醚碸、聚丙烯、聚丙硫醚、聚碳酸酯、聚醚醯亞胺、聚苯硫醚、聚苯醚、聚碸或聚鄰苯二甲酸胺等聚合物材料。所述柔性基底16之厚度及形狀不限,可以根據實際需要確定。所述柔性基底16之厚度可以大於等於10微米。本實施例 中,所述柔性基底16之材料為透明之聚對苯二甲酸乙二酯,該柔性基底16之厚度為30微米,該柔性基底16之形狀為方形。 In the above step s122: the flexible substrate 16 needs to be cleaned. Specifically, the flexible substrate 16 may be previously washed with acetone, isopropyl alcohol or ethanol; then washed with deionized water and treated with oxygen plasma to ensure that the surface of the flexible substrate 16 is clean. Wherein, the flexible substrate 16 is characterized by being soft, thin and light in weight. The material of the flexible substrate 16 is polyethylene terephthalate, polyethylene naphthalate, polyether oxime, polypropylene, polypropyl sulfide, polycarbonate, polyether phthalimide, polyphenylene sulfide, A polymeric material such as polyphenylene ether, polyfluorene or polyphthalic acid amine. The thickness and shape of the flexible substrate 16 are not limited and can be determined according to actual needs. The flexible substrate 16 may have a thickness of 10 microns or more. This embodiment The material of the flexible substrate 16 is transparent polyethylene terephthalate, the flexible substrate 16 has a thickness of 30 micrometers, and the flexible substrate 16 has a square shape.

所述步驟s123中,當所述粘結層14未固化或未凝固時,將所述柔性基底16之第一表面162一側邊緣18接觸該粘結層14,並使該柔性基底16之第一表面162逐漸與所述粘結層14接觸。這樣,有利於去除該柔性基底16與該粘結層14接觸時產生之氣泡,使兩者較好之結合,從而該柔性基底16比較平坦,不易捲曲。 In the step s123, when the bonding layer 14 is uncured or not solidified, the first surface 162 of the flexible substrate 16 is contacted with the bonding layer 14 and the flexible substrate 16 is A surface 162 is gradually in contact with the bonding layer 14. Thus, it is advantageous to remove the bubbles generated when the flexible substrate 16 is in contact with the bonding layer 14, so that the two are better combined, so that the flexible substrate 16 is relatively flat and is not easily curled.

於上述步驟s124中:首先,將所述粘結有柔性基底16之硬基底12放入一真空機中進行真空處理,以去除所述柔性基底16之第一表面162與所述粘結層14介面之間可能存於之氣泡,使得該柔性基底16更加平坦。其次,固化或凝固所述粘結層14。所述固化或凝固之方式包括自然乾燥、高溫乾燥或冷卻乾燥。本實施例中,採用自然乾燥之方法固化聚二甲基矽氧烷。 In the above step s124: first, the hard substrate 12 to which the flexible substrate 16 is bonded is placed in a vacuum machine for vacuum treatment to remove the first surface 162 of the flexible substrate 16 and the bonding layer 14. Bubbles may exist between the interfaces to make the flexible substrate 16 flatter. Next, the bonding layer 14 is cured or solidified. The means of curing or solidifying includes natural drying, high temperature drying or cooling drying. In this embodiment, the polydimethylsiloxane is cured by a natural drying method.

所述柔性基底16由於設置於未固化或未凝固之粘結層14上,可以避免該柔性基底16由於其自身引起之捲曲及表面起伏,使得該柔性基底16能夠與該粘結層14較好之結合,從而柔性基底16之表面比較平坦,以便利用半導體加工工藝直接於其表面進行加工,形成柔性半導體器件。 Since the flexible substrate 16 is disposed on the uncured or uncured adhesive layer 14, the flexible substrate 16 can be prevented from curling and surface undulation due to itself, so that the flexible substrate 16 can be better with the adhesive layer 14. The combination is such that the surface of the flexible substrate 16 is relatively flat so as to be processed directly from its surface using a semiconductor processing process to form a flexible semiconductor device.

所述步驟s130中,採用蒸鍍、濺射、化學沈積、掩模或蝕刻等半導體加工工藝直接於所述柔性基底16之第二表 面164形成半導體器件。所述半導體器件包括薄膜電晶體、場效應電晶體、發光二極體或光敏電阻等。 In the step s130, a semiconductor processing process such as evaporation, sputtering, chemical deposition, masking or etching is directly applied to the second surface of the flexible substrate 16. Face 164 forms a semiconductor device. The semiconductor device includes a thin film transistor, a field effect transistor, a light emitting diode, or a photoresistor.

本實施例中,採用半導體加工工藝直接於柔性基底16之第二表面164進行加工,以形成一底柵型薄膜電晶體20。具體地包括以下步驟:(s131)形成一柵極220於該清洗後之柔性基底16之第二表面164;(s132)形成一絕緣層230覆蓋所述柵極220;(s133)形成一半導體層240於所述絕緣層230表面;(s134)於半導體層240上形成一源極251及一漏極252,並使該源極251及漏極252間隔設置且與上述半導體層240電連接。 In this embodiment, a semiconductor processing process is used to directly process the second surface 164 of the flexible substrate 16 to form a bottom gate type thin film transistor 20. Specifically, the method includes the following steps: (s131) forming a gate electrode 220 on the second surface 164 of the cleaned flexible substrate 16; (s132) forming an insulating layer 230 covering the gate electrode 220; (s133) forming a semiconductor layer 240 is formed on the surface of the insulating layer 230; (s134) a source 251 and a drain 252 are formed on the semiconductor layer 240, and the source 251 and the drain 252 are spaced apart from each other and electrically connected to the semiconductor layer 240.

於步驟s131中,該柵極220之材料應具有較好之導電性。具體地,該柵極220之材料可以為金屬、合金、氧化銦錫(ITO)、銻錫氧化物(ATO)、導電銀膠、導電聚合物或奈米碳管膜等導電材料。該金屬可以為鋁、銅、鎢、鉬或金。該合金為鋁、銅、鎢、鉬和金中兩種以上金屬之合金。具體地,當該柵極220之材料為金屬、合金、ITO或ATO時,可以通過蒸鍍、濺射、化學沈積、掩模或蝕刻等方法形成柵極220。當該柵極220之材料為導電銀膠、導電聚合物或奈米碳管膜時,可以通過直接黏附或印刷塗覆之方法形成柵極220。一般地,該柵極220之厚度為0.5奈米~100微米。 In step s131, the material of the gate 220 should have good conductivity. Specifically, the material of the gate 220 may be a conductive material such as a metal, an alloy, indium tin oxide (ITO), antimony tin oxide (ATO), conductive silver paste, conductive polymer or a carbon nanotube film. The metal can be aluminum, copper, tungsten, molybdenum or gold. The alloy is an alloy of two or more metals of aluminum, copper, tungsten, molybdenum and gold. Specifically, when the material of the gate 220 is metal, alloy, ITO or ATO, the gate electrode 220 can be formed by evaporation, sputtering, chemical deposition, masking or etching. When the material of the gate 220 is a conductive silver paste, a conductive polymer or a carbon nanotube film, the gate electrode 220 can be formed by direct adhesion or printing. Generally, the thickness of the gate 220 is from 0.5 nm to 100 μm.

本實施例中,該柵極220之材料為ITO,形成柵極220之方法具體可通過下述兩種方式進行。 In this embodiment, the material of the gate 220 is ITO, and the method of forming the gate 220 can be specifically performed by the following two methods.

第一種方式具體包括以下步驟:首先,於所述柔性基底 16之第二表面164均勻塗覆一層光刻膠;其次,通過曝光及顯影等光刻方法於光刻膠上形成柵極區域;再次,通過真空蒸鍍、磁控濺射或電子束蒸發等沈積方法於上述柵極區域表面沈積一ITO層;最後,通過丙酮等有機溶劑去除光刻膠及其上之ITO層,即得到形成於柔性基底16之第二表面164上之柵極220。 The first manner specifically includes the following steps: First, on the flexible substrate The second surface 164 of the 16 is uniformly coated with a layer of photoresist; secondly, a gate region is formed on the photoresist by photolithography such as exposure and development; again, by vacuum evaporation, magnetron sputtering or electron beam evaporation, etc. The deposition method deposits an ITO layer on the surface of the gate region. Finally, the photoresist and the ITO layer thereon are removed by an organic solvent such as acetone to obtain a gate electrode 220 formed on the second surface 164 of the flexible substrate 16.

第二種方式具體包括以下步驟:首先,於柔性基底16之第二表面164沈積一ITO層;其次,於該ITO層表面塗覆一層光刻膠;再次,通過曝光及顯影等光刻方法去除柵極區域外之光刻膠;最後,通過電漿體蝕刻等方法去除柵極區域外之金屬層,並以丙酮等有機溶劑去除柵極區域上之光刻膠,即得到形成於柔性基底16之第二表面164上之柵極220。本實施例中,該柵極220之厚度約為1微米。 The second method specifically includes the following steps: first, depositing an ITO layer on the second surface 164 of the flexible substrate 16; secondly, coating a surface of the ITO layer with a photoresist; again, removing by photolithography such as exposure and development a photoresist outside the gate region; finally, the metal layer outside the gate region is removed by plasma etching or the like, and the photoresist on the gate region is removed by an organic solvent such as acetone, thereby being formed on the flexible substrate 16 The gate 220 on the second surface 164. In this embodiment, the thickness of the gate 220 is about 1 micron.

於步驟(s132)中形成一絕緣層230覆蓋所述柵極220。所述絕緣層230之材料可以為氮化矽、氧化矽等硬性材料或苯並環丁烯、聚酯、丙烯酸樹脂等柔性材料。根據絕緣層230之材料種類之不同,可以採用不同方法形成該絕緣層230。具體地,當該絕緣層230之材料為氮化矽或氧化矽時,可以通過沈積之方法形成絕緣層230。當該絕緣層230之材料為苯並環丁烯、聚酯或丙烯酸樹脂時,可以通過印刷塗覆之方法形成絕緣層。一般地,該絕緣層230之厚度為0.5奈米~100微米。本實施例中採用印刷塗覆苯並環丁烯之方法形成所述絕緣層230,使之覆蓋於所述柵極220之表面。所述絕緣層230之厚度約為1微米。 An insulating layer 230 is formed in the step (s132) to cover the gate electrode 220. The material of the insulating layer 230 may be a hard material such as tantalum nitride or tantalum oxide or a flexible material such as benzocyclobutene, polyester or acrylic resin. The insulating layer 230 may be formed by different methods depending on the kind of the material of the insulating layer 230. Specifically, when the material of the insulating layer 230 is tantalum nitride or tantalum oxide, the insulating layer 230 may be formed by deposition. When the material of the insulating layer 230 is benzocyclobutene, polyester or acrylic resin, the insulating layer can be formed by a printing coating method. Generally, the insulating layer 230 has a thickness of 0.5 nm to 100 μm. In the embodiment, the insulating layer 230 is formed by printing a benzocyclobutene to cover the surface of the gate 220. The insulating layer 230 has a thickness of about 1 micrometer.

於步驟(s133)中形成一半導體層240於所述絕緣層230表面。該半導體層240之材料為非晶矽、多晶矽、有機半導體聚合物、奈米膜、奈米線狀結構或奈米管等。根據形成半導體層240之材料種類之不同,可以採用不同方法形成該半導體層240。具體地,當半導體層240之材料為非晶矽或多晶矽時,可以通過化學氣相沈積法形成半導體層240。當半導體層240之材料為有機半導體聚合物或奈米膜時,可以通過直接黏附或印刷塗覆有機半導體聚合物或奈米碳管膜之方法將該有機半導體聚合物或奈米碳管膜塗覆或黏附於絕緣層表面,形成半導體層240。當半導體層240之材料為奈米管或奈米線狀結構時,可以通過轉印之方法將奈米管或奈米線狀結構轉移到絕緣層230表面。一般地,所述半導體層240之厚度為0.5奈米~100微米。本實施例中,所述半導體層240之材料為奈米碳管膜,其厚度為1微米。 A semiconductor layer 240 is formed on the surface of the insulating layer 230 in the step (s133). The material of the semiconductor layer 240 is amorphous germanium, polycrystalline germanium, an organic semiconductor polymer, a nano film, a nanowire structure or a nanotube. The semiconductor layer 240 can be formed by different methods depending on the kind of material forming the semiconductor layer 240. Specifically, when the material of the semiconductor layer 240 is amorphous germanium or polycrystalline germanium, the semiconductor layer 240 can be formed by chemical vapor deposition. When the material of the semiconductor layer 240 is an organic semiconductor polymer or a nano film, the organic semiconductor polymer or the carbon nanotube film can be coated by directly adhering or printing an organic semiconductor polymer or a carbon nanotube film. The semiconductor layer 240 is formed by coating or adhering to the surface of the insulating layer. When the material of the semiconductor layer 240 is a nanotube or a nanowire structure, the nanotube or nanowire structure can be transferred to the surface of the insulating layer 230 by a transfer method. Generally, the semiconductor layer 240 has a thickness of 0.5 nm to 100 μm. In this embodiment, the material of the semiconductor layer 240 is a carbon nanotube film having a thickness of 1 micrometer.

於步驟(s134)中,該源極251及漏極252之材料應具有較好之導電性。具體地,該源極251及漏極252之材料可以為金屬、合金、ITO、ATO、導電銀膠、導電聚合物或奈米碳管薄膜等導電材料。根據形成源極251及漏極252之材料種類之不同,可以採用不同方法形成該源極251及漏極252。具體地,當該源極251及漏極252之材料為金屬、合金、ITO或ATO時,可以通過蒸鍍、濺射、沈積、掩模或蝕刻等方法形成源極251及漏極252。當該源極251及漏極252之材料為導電銀膠、導電聚合物或奈米碳管膜時,可以將該導電銀膠、導電聚合物或奈米碳管膜 直接黏附或印刷塗覆於半導體層240之表面,形成源極251及漏極252。一般地,該源極251及漏極252之厚度為0.5奈米~100微米,源極251至漏極252之間之距離為1微米~100微米。 In the step (s134), the material of the source 251 and the drain 252 should have good conductivity. Specifically, the material of the source 251 and the drain 252 may be a conductive material such as a metal, an alloy, an ITO, an ATO, a conductive silver paste, a conductive polymer or a carbon nanotube film. The source 251 and the drain 252 can be formed by different methods depending on the type of material forming the source 251 and the drain 252. Specifically, when the material of the source 251 and the drain 252 is metal, alloy, ITO or ATO, the source 251 and the drain 252 may be formed by evaporation, sputtering, deposition, masking or etching. When the material of the source 251 and the drain 252 is a conductive silver paste, a conductive polymer or a carbon nanotube film, the conductive silver paste, the conductive polymer or the carbon nanotube film may be used. Directly adhered or printed on the surface of the semiconductor layer 240 to form a source 251 and a drain 252. Generally, the source 251 and the drain 252 have a thickness of 0.5 nm to 100 μm, and the source 251 to the drain 252 have a distance of 1 μm to 100 μm.

本實施例中通過採用與形成柵極220相似之蝕刻方法於半導體層240上形成一源極251及漏極252,進而形成所述薄膜電晶體20。該源極251及漏極252與所述半導體層240電連接,且該源極251與漏極252間隔設置。該源極251及漏極252之厚度為1微米,源極251至漏極252之間之距離為50微米。該源極251及漏極252之材料為鋁金屬。 In the present embodiment, a source electrode 251 and a drain electrode 252 are formed on the semiconductor layer 240 by an etching method similar to the formation of the gate electrode 220, thereby forming the thin film transistor 20. The source 251 and the drain 252 are electrically connected to the semiconductor layer 240, and the source 251 and the drain 252 are spaced apart from each other. The source 251 and the drain 252 have a thickness of 1 μm and the source 251 to the drain 252 have a distance of 50 μm. The material of the source 251 and the drain 252 is aluminum metal.

所述步驟s140去除所述硬基底12,以形成一柔性半導體器件之方法為:採用外力直接將所述硬基底12及粘結層14與所述柔性基底16剝離。本實施例中,當玻璃硬基底12及粘結層14與聚對苯二甲酸乙二酯柔性基底16分離後,聚對苯二甲酸乙二酯柔性基底16之透明度幾乎沒有改變,而且仍具有柔軟性。當然,該步驟也可以採用其他方法使硬基底12與柔性基底16分離,如,加熱法、蝕刻法。從而得到本實施例所述之底柵型柔性基底薄膜電晶體20。 The step s140 removes the hard substrate 12 to form a flexible semiconductor device by directly peeling the hard substrate 12 and the bonding layer 14 from the flexible substrate 16 by an external force. In this embodiment, when the glass hard substrate 12 and the bonding layer 14 are separated from the polyethylene terephthalate flexible substrate 16, the transparency of the polyethylene terephthalate flexible substrate 16 is hardly changed, and still has Softness. Of course, this step can also be used to separate the hard substrate 12 from the flexible substrate 16, such as a heating method or an etching method. Thus, the bottom gate type flexible base film transistor 20 of the present embodiment is obtained.

可以理解,採用與本實施例類似之方法也可以製備薄膜電晶體陣列,如頂柵型薄膜電晶體陣列。形成頂柵型薄膜電晶體陣列具體包括以下步驟:提供一硬基底,該硬基底具有一表面;提供一柔性基底,該柔性基底具有一第一表面及與該第一表面相對設置之一第二表面,將該 柔性基底之第一表面固定於所述硬基底之表面;採用半導體加工工藝直接於所述柔性基底之第二表面形成頂柵型薄膜電晶體陣列;以及去除所述硬基底,形成一柔性頂柵型薄膜電晶體陣列。 It will be appreciated that thin film transistor arrays, such as top gate type thin film transistor arrays, can also be fabricated using methods similar to those of this embodiment. Forming the top gate type thin film transistor array specifically includes the steps of: providing a hard substrate having a surface; providing a flexible substrate, the flexible substrate having a first surface and a second surface opposite to the first surface Surface, the a first surface of the flexible substrate is fixed on the surface of the hard substrate; a top gate type thin film transistor array is formed directly on the second surface of the flexible substrate by a semiconductor processing process; and the hard substrate is removed to form a flexible top gate Thin film transistor array.

請參閱圖4及圖5,本發明第二實施例提供一種柔性基底發光二極體之製造方法,該製造方法包括與第一實施例基本相似,不同之處於於:本實施例中於一柔性基底上直接進行發光二極體加工工藝,以形成發光二極體。本實施例具體包括以下步驟:(s210)提供一硬基底12,該硬基底12具有一表面122;(s220)提供一柔性基底16,該柔性基底16具有一第一表面162及與該第一表面162相對設置之第二表面164,將該柔性基底16之第一表面162固定於所述硬基底12之表面122;(s230)採用半導體加工工藝直接於所述柔性基底16之第二表面164形成一發光二極體;(s240)去除所述硬基底12,形成一柔性發光二極體30。 Referring to FIG. 4 and FIG. 5, a second embodiment of the present invention provides a method for manufacturing a flexible substrate light-emitting diode, which is substantially similar to the first embodiment, and is different in the present embodiment. A light emitting diode processing process is directly performed on the substrate to form a light emitting diode. The embodiment specifically includes the following steps: (s210) providing a hard substrate 12 having a surface 122; (s220) providing a flexible substrate 16, the flexible substrate 16 having a first surface 162 and the first The second surface 164 of the surface 162 is oppositely disposed, the first surface 162 of the flexible substrate 16 is fixed to the surface 122 of the hard substrate 12; (s230) is directly applied to the second surface 164 of the flexible substrate 16 by a semiconductor processing process. Forming a light emitting diode; (s240) removing the hard substrate 12 to form a flexible light emitting diode 30.

所述步驟s210中之硬基底之材料及性質與第一實施例中之步驟s110中之硬基底之材料及性質相同。 The material and properties of the hard substrate in the step s210 are the same as those of the hard substrate in the step s110 in the first embodiment.

所述步驟s220中之具體步驟與第一實施例中之步驟s120中之具體步驟相同。 The specific steps in the step s220 are the same as the specific steps in the step s120 in the first embodiment.

所述步驟s230中,採用半導體加工工藝直接於所述柔性基底16之第二表面164形成發光二極體之方法包括以下步驟:(s231)於柔性基底16之第二表面164依次形成一第一半導體層310、一活性層320及一第二半導體層330 ;(s232)對第二半導體層330、活性層320進行蝕刻,直至暴露出第一半導體層310之表面;以及(s233)於第二半導體層330之表面形成一第二電極332,使得該第二電極332與該第二半導體330電連接,及於第一半導體層310之表面形成一第一電極312,使得該第一電極312與該第一半導體310電連接,且第一電極312與第二電極332電絕緣。 In the step s230, the method for forming the light emitting diode directly on the second surface 164 of the flexible substrate 16 by using a semiconductor processing process includes the following steps: (s231) sequentially forming a first surface on the second surface 164 of the flexible substrate 16. The semiconductor layer 310, an active layer 320, and a second semiconductor layer 330 (s232) etching the second semiconductor layer 330, the active layer 320 until the surface of the first semiconductor layer 310 is exposed; and (s233) forming a second electrode 332 on the surface of the second semiconductor layer 330, such that the first The second electrode 332 is electrically connected to the second semiconductor 330, and a first electrode 312 is formed on the surface of the first semiconductor layer 310, such that the first electrode 312 is electrically connected to the first semiconductor 310, and the first electrode 312 and the first electrode The two electrodes 332 are electrically insulated.

所述步驟s231中,採用金屬有機化學氣相沈積(MOCVD)技術於所述柔性基底16之第二表面164上依次外延生長所述第一半導體層310、活性層320及第二半導體層330。 In the step s231, the first semiconductor layer 310, the active layer 320 and the second semiconductor layer 330 are epitaxially grown on the second surface 164 of the flexible substrate 16 by metal organic chemical vapor deposition (MOCVD).

其中,所述第一半導體層310、第二半導體層330可以為N型半導體層或P型半導體層兩種類型,且該第一半導體層310與第二半導體層330之類型不同。所述N型半導體層具有提供電子移動場所之作用。所述P型半導體層具有提供空穴移動之場所之作用。N型半導體層之材料包括N型氮化鎵、N型砷化鎵及N型磷化銅等材料中之一種。P型半導體層之材料包括P型氮化鎵、P型砷化鎵及P型磷化銅等材料中之一種。本實施例中第一半導體層之材料為N型氮化鎵,其厚度為2微米,第二半導體層之材料為P型氮化鎵,其厚度為0.3微米。所述活性層320為包含一層或多層量子阱層之量子阱結構(Quantum Well)。量子阱層之材料為氮化銦鎵、氮化銦鎵鋁、砷化鎵、砷化鋁鎵、磷化銦鎵、磷化銦砷或砷化銦鎵中之一種。本實施例中,活性層為兩層結構,其厚度為0.3微米,一層之材料為氮化 銦鎵,另一層之材料為氮化鎵。 The first semiconductor layer 310 and the second semiconductor layer 330 may be of an N-type semiconductor layer or a P-type semiconductor layer, and the first semiconductor layer 310 and the second semiconductor layer 330 are different in type. The N-type semiconductor layer has a function of providing an electron moving place. The P-type semiconductor layer has a function of providing a place where holes move. The material of the N-type semiconductor layer includes one of materials such as N-type gallium nitride, N-type gallium arsenide, and N-type copper phosphide. The material of the P-type semiconductor layer includes one of P-type gallium nitride, P-type gallium arsenide, and P-type copper phosphide. In the present embodiment, the material of the first semiconductor layer is N-type gallium nitride having a thickness of 2 μm, and the material of the second semiconductor layer is P-type gallium nitride having a thickness of 0.3 μm. The active layer 320 is a quantum well structure comprising one or more quantum well layers. The material of the quantum well layer is one of indium gallium nitride, indium gallium aluminum nitride, gallium arsenide, aluminum gallium arsenide, indium gallium phosphide, indium phosphide or indium gallium arsenide. In this embodiment, the active layer has a two-layer structure with a thickness of 0.3 μm, and the material of one layer is nitrided. Indium gallium, the other layer of material is gallium nitride.

所述步驟s232採用蝕刻技術蝕刻第二半導體層330、活性層320直至暴露出第一半導體層310。所述蝕刻技術包括濕法蝕刻技術及幹法蝕刻技術。本實施例中,採用之蝕刻技術為幹法蝕刻技術中之電感耦合電漿蝕刻技術。 The step s232 etches the second semiconductor layer 330 and the active layer 320 by an etching process until the first semiconductor layer 310 is exposed. The etching technique includes a wet etching technique and a dry etching technique. In this embodiment, the etching technique employed is an inductively coupled plasma etching technique in the dry etching technique.

所述步驟s233可以採用物理氣相沈積法,如,電子束蒸發法、真空蒸鍍法及離子濺射法等於所述第二半導體層330之表面形成第二電極332,於第一半導體層310之表面形成第一電極312。所述第一電極312、第二電極332之材料包括鈦、鋁、鎳及金中之一種或其任意組合。所述第一電極312、第二電極332至少為一層結構。本實施例中,採用電子束蒸發法製備所述鈦/金(一層鈦層及一層金層)第二電極332、第一電極312。 The step s233 may be performed by using a physical vapor deposition method, such as an electron beam evaporation method, a vacuum evaporation method, and an ion sputtering method, to form a second electrode 332 on the surface of the second semiconductor layer 330 on the first semiconductor layer 310. The surface forms a first electrode 312. The material of the first electrode 312 and the second electrode 332 includes one of titanium, aluminum, nickel and gold or any combination thereof. The first electrode 312 and the second electrode 332 are at least one layer structure. In this embodiment, the titanium/gold (a layer of titanium and a layer of gold) second electrode 332 and the first electrode 312 are prepared by electron beam evaporation.

於所述步驟s240中,去除所述硬基底12,形成柔性發光二極體30。其中,所述去除所述硬基底12及粘結層14之方法與第一實施例中之步驟s140去除所述硬基底12及粘結層14之方法相同。 In the step s240, the hard substrate 12 is removed to form the flexible light emitting diode 30. The method of removing the hard substrate 12 and the bonding layer 14 is the same as the method of removing the hard substrate 12 and the bonding layer 14 in step s140 in the first embodiment.

本發明實施例提供之柔性半導體器件製造方法具有以下優點:其一,由於在未固化或未凝固之粘結層上設置所述柔性基底,避免了所述柔性基底自身產生之捲曲及表面起伏之現象,使得柔性基底能夠與所述粘結層較好之結合,從而該柔性基底之表面比較平坦,進而,可以採用半導體加工工藝直接於所述柔性基底之第二表面形成柔性半導體器件,不需要預先形成柔性半導體器件,然 後再將一柔性基底粘合到所述柔性半導體器件上,以形成柔性半導體器件。因此,本發明實施例提供之柔性半導體器件之製造方法具有方法簡單、易於操作之特點。其二,本發明實施例中,採用直接剝離柔性基底與硬基底之方法,不會影響柔性基底之透明性,而且方法簡單。 The flexible semiconductor device manufacturing method provided by the embodiment of the invention has the following advantages: First, since the flexible substrate is disposed on the uncured or unsolidified bonding layer, the curl and surface undulation generated by the flexible substrate itself are avoided. a phenomenon that enables the flexible substrate to be better combined with the bonding layer, so that the surface of the flexible substrate is relatively flat, and further, a flexible semiconductor device can be formed directly on the second surface of the flexible substrate by using a semiconductor processing process, without Pre-forming a flexible semiconductor device, A flexible substrate is then bonded to the flexible semiconductor device to form a flexible semiconductor device. Therefore, the manufacturing method of the flexible semiconductor device provided by the embodiment of the invention has the characteristics of simple method and easy operation. Secondly, in the embodiment of the present invention, the method of directly peeling off the flexible substrate and the hard substrate does not affect the transparency of the flexible substrate, and the method is simple.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施例,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

12‧‧‧硬基底 12‧‧‧ Hard substrate

240‧‧‧半導体層 240‧‧‧Semiconductor layer

122‧‧‧硬基底之表面 122‧‧‧ Surface of hard substrate

251‧‧‧源極 251‧‧‧ source

14‧‧‧粘結層 14‧‧‧ bonding layer

252‧‧‧漏極 252‧‧‧Drain

16‧‧‧軟基底 16‧‧‧Soft substrate

30‧‧‧發光二極體 30‧‧‧Lighting diode

162‧‧‧軟基底之第一表面 162‧‧‧The first surface of the soft substrate

310‧‧‧第一半導體 310‧‧‧First Semiconductor

164‧‧‧軟基底之第二表面 164‧‧‧Second surface of soft substrate

312‧‧‧第一電極 312‧‧‧First electrode

18‧‧‧軟基底之第一表面之一側邊緣 18‧‧‧One side edge of the first surface of the soft substrate

320‧‧‧活性層 320‧‧‧active layer

20‧‧‧薄膜電晶體 20‧‧‧film transistor

330‧‧‧第二半導體 330‧‧‧Second Semiconductor

220‧‧‧柵極 220‧‧‧Gate

332‧‧‧第二電極 332‧‧‧second electrode

230‧‧‧絕緣層 230‧‧‧Insulation

圖1係先前技術製造柔性半導體器件之工藝流程圖。 1 is a process flow diagram of a prior art fabrication of a flexible semiconductor device.

圖2係本發明第一實施例提供之柔性半導體器件製造方法之流程圖。 2 is a flow chart of a method of fabricating a flexible semiconductor device according to a first embodiment of the present invention.

圖3係本發明第一實施例提供之柔性半導體器件之製造工藝流程圖。 3 is a flow chart showing a manufacturing process of a flexible semiconductor device according to a first embodiment of the present invention.

圖4係本發明第二實施例提供之柔性半導體器件製造方法之流程圖。 4 is a flow chart of a method of fabricating a flexible semiconductor device according to a second embodiment of the present invention.

圖5係本發明第二實施例提供之柔性半導體器件之製造工藝流程圖。 FIG. 5 is a flow chart showing a manufacturing process of a flexible semiconductor device according to a second embodiment of the present invention.

12‧‧‧硬基底 12‧‧‧ Hard substrate

20‧‧‧薄膜電晶體 20‧‧‧film transistor

122‧‧‧硬基底之表面 122‧‧‧ Surface of hard substrate

220‧‧‧柵極 220‧‧‧Gate

14‧‧‧粘結層 14‧‧‧ bonding layer

230‧‧‧絕緣層 230‧‧‧Insulation

16‧‧‧軟基底 16‧‧‧Soft substrate

240‧‧‧半導体層 240‧‧‧Semiconductor layer

162‧‧‧軟基底之第一表面 162‧‧‧The first surface of the soft substrate

251‧‧‧源極 251‧‧‧ source

164‧‧‧軟基底之第二表面 164‧‧‧Second surface of soft substrate

252‧‧‧漏極 252‧‧‧Drain

18‧‧‧軟基底之第一表面之一側邊緣 18‧‧‧One side edge of the first surface of the soft substrate

Claims (13)

一種柔性半導體器件之製造方法,其包括以下步驟:提供一硬基底,該硬基底具有一表面;提供一柔性基底,該柔性基底具有一第一表面及與該第一表面相對設置之一第二表面,將該柔性基底之第一表面固定於所述硬基底之表面;採用半導體加工工藝直接於所述柔性基底之第二表面形成半導體器件;以及分離所述硬基底與所述柔性基底,形成一柔性半導體器件。 A method of fabricating a flexible semiconductor device, comprising the steps of: providing a hard substrate having a surface; providing a flexible substrate having a first surface and a second surface opposite the first surface a surface, the first surface of the flexible substrate is fixed to the surface of the hard substrate; a semiconductor device is directly formed on the second surface of the flexible substrate by a semiconductor processing process; and the hard substrate and the flexible substrate are separated to form A flexible semiconductor device. 如申請專利範圍第1項所述之柔性半導體器件之製造方法,其中,所述柔性基底之材料為聚對苯二甲酸乙二酯、聚萘二甲酸乙二酯、聚醚碸、聚丙烯、聚丙硫醚、聚碳酸酯、聚醚醯亞胺、聚苯硫醚、聚苯醚、聚碸或聚鄰苯二甲酸胺。 The method for manufacturing a flexible semiconductor device according to claim 1, wherein the flexible substrate is made of polyethylene terephthalate, polyethylene naphthalate, polyether oxime, polypropylene, Polypropylene sulfide, polycarbonate, polyether phthalimide, polyphenylene sulfide, polyphenylene ether, polyfluorene or polyphthalic acid amine. 如申請專利範圍第1項所述之柔性半導體器件之製造方法,其中,將所述柔性基底之第一表面固定於所述硬基底之表面之方法包括以下步驟:於所述硬基底之表面形成一粘結層;當所述粘結層未固化或未凝固時,將所述柔性基底之第一表面之一側邊緣接觸所述粘結層,並將該柔性基底從該邊緣置於該粘結層;以及固化所述粘結層。 The method of manufacturing a flexible semiconductor device according to claim 1, wherein the method of fixing the first surface of the flexible substrate to the surface of the hard substrate comprises the steps of: forming a surface of the hard substrate a bonding layer; when the bonding layer is uncured or not solidified, contacting one side edge of the first surface of the flexible substrate with the bonding layer, and placing the flexible substrate from the edge a layer; and curing the bonding layer. 如申請專利範圍第3項所述之柔性半導體器件之製造方法,其中,於所述硬基底之表面形成一粘結層之方法包括:提供一粘結層之材料;清洗所述硬基底之表面;以及將所述粘結層之材料塗於該清洗後之硬基底之表面。 The method of manufacturing a flexible semiconductor device according to claim 3, wherein the method of forming a bonding layer on the surface of the hard substrate comprises: providing a material of a bonding layer; and cleaning a surface of the hard substrate And coating the material of the bonding layer on the surface of the cleaned hard substrate. 如申請專利範圍第4項所述之柔性半導體器件之製造方法,其中,所述清洗所述硬基底之方法為:預先採用丙酮、異丙醇或乙醇清洗所述硬基底;去離子水清洗該硬基底;以及對該硬基底進行電漿處理。 The method for manufacturing a flexible semiconductor device according to the fourth aspect of the invention, wherein the method of cleaning the hard substrate is: pre-cleaning the hard substrate with acetone, isopropyl alcohol or ethanol; washing the deionized water a hard substrate; and plasma treatment of the hard substrate. 如申請專利範圍第3項所述之柔性半導體器件之製造方法,其中,當所述粘結層未固化或未凝固時,將所述柔性基底之第一表面之一側邊緣接觸所述粘結層,並將該柔性基底之第一表面逐漸與所述粘結層接觸,使得該柔性基底置於該粘結層。 The method of manufacturing a flexible semiconductor device according to claim 3, wherein when the bonding layer is uncured or not solidified, one side edge of the first surface of the flexible substrate is brought into contact with the bonding a layer and gradually contacting the first surface of the flexible substrate with the bonding layer such that the flexible substrate is placed in the bonding layer. 如申請專利範圍第3項所述之柔性半導體器件之製造方法,其中,所述固化所述粘結層之步驟之前進一步包括真空處理所述柔性基底與所述粘結層,去除該柔性基底與該粘結層之介面之間之氣泡。 The method of manufacturing a flexible semiconductor device according to claim 3, wherein the step of curing the bonding layer further comprises vacuum processing the flexible substrate and the bonding layer, removing the flexible substrate and Bubbles between the interfaces of the bonding layer. 如申請專利範圍第3項所述之柔性半導體器件之製造方法,其中,所述粘結層之材料為聚醯亞胺、環氧樹脂、丙烯酸樹脂、聚酯、聚醯胺、矽樹脂、三聚氰胺樹脂、苯酚樹脂或聚二甲基矽氧烷。 The method for manufacturing a flexible semiconductor device according to claim 3, wherein the material of the bonding layer is polyimide, epoxy resin, acrylic resin, polyester, polyamide, cerium resin, melamine. Resin, phenol resin or polydimethyl siloxane. 如申請專利範圍第1項所述之柔性半導體器件之製造方法,其中,所述半導體加工工藝包括濺射、蒸鍍、化學沈積、掩模或蝕刻。 The method of manufacturing a flexible semiconductor device according to claim 1, wherein the semiconductor processing process comprises sputtering, evaporation, chemical deposition, masking or etching. 如申請專利範圍第1項所述之柔性半導體器件之製造方法,其中,所述半導體器件包括薄膜電晶體、場效應電晶體、發光二極體或光敏電阻。 The method of manufacturing a flexible semiconductor device according to claim 1, wherein the semiconductor device comprises a thin film transistor, a field effect transistor, a light emitting diode or a photoresistor. 如申請專利範圍第10項所述之柔性半導體器件之製造方法,其中,所述半導體器件為薄膜電晶體,所述於柔性基底之第二表面形成薄膜電晶體之方法包括以下步驟:形成一 柵極於該柔性基底之第二表面;形成一絕緣層覆蓋所述柵極;形成一半導體層於所述絕緣層表面;以及於所述半導體層之表面形成一源極及一漏極,並使該源極及漏極間隔設置且與該半導體層電連接,形成一薄膜電晶體。 The method of manufacturing a flexible semiconductor device according to claim 10, wherein the semiconductor device is a thin film transistor, and the method for forming a thin film transistor on the second surface of the flexible substrate comprises the steps of: forming a a gate is formed on the second surface of the flexible substrate; an insulating layer is formed to cover the gate; a semiconductor layer is formed on the surface of the insulating layer; and a source and a drain are formed on the surface of the semiconductor layer, and The source and drain are spaced apart and electrically connected to the semiconductor layer to form a thin film transistor. 如申請專利範圍第11項所述之柔性半導體器件之製造方法,其中,所述半導體器件為發光二極體,所述於柔性基底之第二表面形成發光二極體之方法包括以下步驟:於所述柔性基底之第二表面依次形成一第一半導體層、一活性層及一第二半導體層;對該第二半導體層以及活性層進行蝕刻,直至暴露出第一半導體層之表面;以及於所述第二半導體層之表面形成一第二電極,及於所述第一半導體層之表面形成一第一電極。 The method of manufacturing a flexible semiconductor device according to claim 11, wherein the semiconductor device is a light emitting diode, and the method for forming a light emitting diode on the second surface of the flexible substrate comprises the following steps: The second surface of the flexible substrate sequentially forms a first semiconductor layer, an active layer and a second semiconductor layer; the second semiconductor layer and the active layer are etched until the surface of the first semiconductor layer is exposed; A surface of the second semiconductor layer forms a second electrode, and a first electrode is formed on a surface of the first semiconductor layer. 如申請專利範圍第1項所述之柔性半導體器件之製造方法,其中,所述分離所述硬基底與所述柔性基底之方法包括外力剝離法、加熱法或蝕刻法。 The method of manufacturing a flexible semiconductor device according to claim 1, wherein the method of separating the hard substrate from the flexible substrate comprises an external force peeling method, a heating method, or an etching method.
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