TWI471577B - Testing socket for bga chip - Google Patents

Testing socket for bga chip Download PDF

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TWI471577B
TWI471577B TW101114101A TW101114101A TWI471577B TW I471577 B TWI471577 B TW I471577B TW 101114101 A TW101114101 A TW 101114101A TW 101114101 A TW101114101 A TW 101114101A TW I471577 B TWI471577 B TW I471577B
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test
bga
wafer
grid
bga wafer
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TW101114101A
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TW201344215A (en
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Wei Chih Sun
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Material Analysis Technology Inc
Expert Internat Mercantile Corp
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Description

BGA晶片的測試治具BGA chip test fixture

本技藝揭露一種適用於BGA(Ball Grid Array)晶片的測試治具,係由測試母具結合測試子具所構成。測試母具為傳統的測試治具,測試子具即是一個「移動式定位框」,而可以先後測試兩種不同尺寸的BGA晶片。The present invention discloses a test fixture suitable for a BGA (Ball Grid Array) wafer, which is composed of a test fixture combined with a test fixture. The test master is a traditional test fixture. The test fixture is a "mobile positioning frame", and two different sizes of BGA chips can be tested in succession.

圖1.是先前技藝的技術方塊圖Figure 1. is a technical block diagram of the prior art.

習知技藝的測試治具,只能測試單一尺寸的BGA晶片。當具有不同長度*寬度的兩片BGA晶片需要測試時,則需要分別製作特定的測試治具分別使用之。測試治具包含定位網格、測試單元、以及對應的測試軟體。A test fixture of the prior art can only test a single size BGA wafer. When two BGA wafers with different lengths*width need to be tested, it is necessary to separately make a specific test fixture to be used separately. The test fixture includes a positioning grid, a test unit, and corresponding test software.

圖1顯示測試軟體1、測試單元1、與定位網格1相配合構成測試治具1,用於測試第一BGA晶片;第一BGA晶片具有第一尺寸。測試軟體2、測試單元2、與定位網格2相配合構成測試治具2,用於測試第二BGA晶片;第二BGA晶片具有小於第一尺寸的第二尺寸。測試軟體N、測試單元N、與定位網格N相配合構成測試治具N,用於測試第N片BGA晶片;第N片BGA晶片具有小於第N-1片的尺寸的第N尺寸。1 shows a test software 1, a test unit 1, which cooperates with a positioning grid 1 to form a test fixture 1 for testing a first BGA wafer; the first BGA wafer has a first size. The test software 2, the test unit 2, and the positioning grid 2 cooperate to form the test fixture 2 for testing the second BGA wafer; the second BGA wafer has a second size smaller than the first size. The test software N, the test unit N, and the positioning grid N cooperate to form a test fixture N for testing the Nth BGA wafer; the Nth sheet BGA wafer has an Nth dimension smaller than the size of the N-1th sheet.

換句話說,第一BGA晶片與第二BGA晶片具有不同的長度*寬度,當需要測試第一BGA晶片時,需要製備專用的測試治具1來使用。當需要測試第二BGA晶片時,需要另外製備專用的測試治具2來使用;此時,無法利用測試治具1去測試第二BGA晶片。這使得晶片測試廠在測試治具的製作的預算增加許多;同時,在儲存、運送、測試更換...等成本也增加許多。一個萬用製具,可以適用不同尺寸的晶片之測試,極待開發。In other words, the first BGA wafer and the second BGA wafer have different lengths*width, and when the first BGA wafer needs to be tested, a dedicated test fixture 1 needs to be prepared for use. When it is necessary to test the second BGA wafer, it is necessary to separately prepare a dedicated test fixture 2 for use; at this time, the test fixture 1 cannot be used to test the second BGA wafer. This has led to a much larger budget for wafer test shops in the production of test fixtures; at the same time, the cost of storage, shipping, test replacement, etc. has increased. A universal tool that can be used for testing different sizes of chips and is extremely ready for development.

圖2是先前技藝測試治具Figure 2 is a prior art test fixture

圖2顯示習知的測試治具,具有一個基座21,基座21中央設置有定位網格22,定位網格22的每一個網目長寬略大於BGA晶片下方的單一金屬球直徑,用以提供BGA晶片下方的金屬球閘陣列,一一對應安置用;BGA晶片下方的金屬球可以一一卡入定位網格22中對應的網目中,當測試治具的上蓋23壓下固定BGA晶片於定位以後,便可以進行BGA晶片測試。2 shows a conventional test fixture having a base 21 with a positioning grid 22 disposed in the center of the base 21, each mesh length of the positioning grid 22 being slightly larger than the diameter of a single metal ball below the BGA wafer. A metal ball gate array under the BGA wafer is provided for one-to-one placement; the metal balls under the BGA wafer can be snapped into the corresponding meshes of the positioning grid 22, and the BGA chip is fixed when the upper cover 23 of the test fixture is pressed down. After positioning, the BGA wafer test can be performed.

圖3A是先前技藝測試晶片40*40FIG. 3A is a prior art test wafer 40*40

圖3A顯示習知技藝的測試治具的剖面圖,具有基座21,中央有一開口25,開口25的尺寸係對應於晶片40*40的尺寸所設計;開口25內設置有定位網格22。定位網格22的網目提供晶片40*40下方的金屬球41卡固之用,晶片40*40係在晶片下方具有40*40矩陣排列的金屬球閘(圖中僅做金屬球示意,並未依據實際數目表示)。每一網目內對應有一個彈性探針24,當測試治具的上蓋23壓下固定時,彈性探針24會向上延伸而電性耦合至對應的金屬球41。彈性探針24的下端電性耦合至測試單元40,測試軟體電性耦合至測試單元40,提供測試晶片40*40時使用。3A shows a cross-sectional view of a conventional test fixture having a base 21 having an opening 25 in the center, the opening 25 being sized to correspond to the size of the wafer 40*40; and a positioning grid 22 disposed within the opening 25. The mesh of the positioning grid 22 provides a metal ball 41 for fastening under the wafer 40*40, and the wafer 40*40 has a 40*40 matrix metal ball gate under the wafer (only the metal ball is shown in the figure, According to the actual number). There is a corresponding elastic probe 24 in each mesh. When the upper cover 23 of the test fixture is pressed and fixed, the elastic probe 24 extends upward and is electrically coupled to the corresponding metal ball 41. The lower end of the resilient probe 24 is electrically coupled to the test unit 40, and the test software is electrically coupled to the test unit 40 for use in providing the test wafer 40*40.

圖3B是先前技藝測試晶片30*30FIG. 3B is a prior art test wafer 30*30

圖3B顯示測試治具具有基座21B,中央有一開口25B,開口25B的尺寸係對應於晶片30*30的尺寸所設計;開口25B內設置有定位網格22B。定位網格22B的網目提供晶片30*30下方的金屬球41B卡固之用,晶片30*30係在晶片下方具有30*30矩陣排列的金屬球(圖中僅做金屬球示意,並未依據實際數目表示)。每一網目內對應有一個彈性探針24B,當測試治具的上蓋23壓下固定時,彈性探針24B會向上延伸而電性耦合至對應的金屬球41B。彈性探針24B的下端電性耦合至測試單元30,測試軟體302電性耦合至測試單元30,提供測試晶片30*30時使用。圖3A~3B顯示晶片40*40的測試與晶片30*30的測試,由於使用的測試治具的尺寸不同、測試單元也不同,所以必須分別使用專用的測試治具,無法共用一個治具。3B shows the test fixture having a base 21B having an opening 25B in the center, the size of the opening 25B being designed to correspond to the size of the wafer 30*30; and a positioning grid 22B disposed in the opening 25B. The mesh of the positioning grid 22B is provided for securing the metal ball 41B under the wafer 30*30, and the wafer 30*30 is a metal ball arranged in a matrix of 30*30 under the wafer (only the metal ball is illustrated in the figure, and is not based on The actual number is expressed). There is one elastic probe 24B in each mesh. When the upper cover 23 of the test fixture is pressed down, the elastic probe 24B extends upward and is electrically coupled to the corresponding metal ball 41B. The lower end of the elastic probe 24B is electrically coupled to the test unit 30, and the test software 302 is electrically coupled to the test unit 30 for use in providing the test wafer 30*30. 3A-3B show the test of the wafer 40*40 and the test of the wafer 30*30. Since the test fixtures used have different sizes and different test units, it is necessary to separately use a dedicated test fixture, and it is not possible to share a fixture.

本技藝首先採用一個特別設計的「移動式定位框」做為測試子具,可以放置於測試母具的定位網格上方,定義出一個較小的網格區域,而可以提供較小尺寸BGA晶片的測試。The technique first uses a specially designed "moving positioning frame" as a test sub-tool, which can be placed above the positioning grid of the test master to define a smaller grid area, and can provide a smaller size BGA chip. Test.

圖4是本技藝的技術方塊圖Figure 4 is a technical block diagram of the present technology

圖中顯示本技藝的單一測試母具,可以測試至少兩種不同尺寸的BGA晶片。當具有不同長度*寬度的第一片BGA晶片、與第二片BGA晶片需要測試時,不需要分別製作專用的測試治具。本技藝一個測試治具,係由測試母具與測試子具所構成。測試母具包含定位網格、測試單元、以及多組測試軟體。測試子具則是一個移動式定位框。The figure shows a single test master of the art that can test at least two different sizes of BGA wafers. When a first piece of BGA wafer having a different length*width and a second piece of BGA wafer need to be tested, it is not necessary to separately make a dedicated test fixture. This test tool consists of a test fixture and a test fixture. The test master includes a positioning grid, test units, and multiple sets of test software. The test fixture is a mobile positioning frame.

圖4顯示測試軟體1~N、與單一測試單元、單一定位網格相配合構成本技藝的測試治具。單一治具,配合第一移動式定位框的使用,可以用於測試第一BGA晶片;配合第二移動式定位框的使用,可以用於測試第二BGA晶片;依次類推。配合第N移動式定位框的使用,可以用於測試第N片BGA晶片。Figure 4 shows the test fixtures 1~N, which cooperate with a single test unit and a single positioning grid to form the test fixture of the present technology. A single fixture, used in conjunction with the first mobile positioning frame, can be used to test the first BGA wafer; with the use of the second mobile positioning frame, it can be used to test the second BGA wafer; and so on. With the use of the Nth mobile positioning frame, it can be used to test the Nth BGA wafer.

圖5A~5C是本技藝的實施例5A-5C are embodiments of the present technology

圖5A顯示測試母具200,具有一個基座21,基座21中央設置有第一定位網格22,第一定位網格22的長寬,係配合第一BGA晶片的長寬所設計,提供第一BGA晶片安置測試用。FIG. 5A shows a test master 200 having a base 21. The base 21 is provided with a first positioning grid 22 at the center. The length and width of the first positioning grid 22 are designed to match the length and width of the first BGA wafer. The first BGA wafer placement test.

圖5B顯示本技藝的測試子具Figure 5B shows the test tool of the present technology

本技藝的測試子具就是移動式定位框50;測試子具(移動式定位框)50可以放置在測試母具200的基座21上方。測試子具(移動式定位框)50下層具有一個定位開口52;定位開口52,係小於第一定位網格22的面積尺寸者;當測試子具(移動式定位框)50放置於第一定位網格22上方時,定位開口52便定位出一個較小區域的第二網格區域,提供較小尺寸的第二BGA晶片安置測試用。The test fixture of the present technology is a mobile positioning frame 50; the test fixture (mobile positioning frame) 50 can be placed above the base 21 of the test fixture 200. The lower layer of the test sub-tool (moving positioning frame) 50 has a positioning opening 52; the positioning opening 52 is smaller than the area size of the first positioning grid 22; when the test sub-tool (moving positioning frame) 50 is placed in the first positioning Above the grid 22, the locating opening 52 locates a second area of the smaller area of the second BGA wafer placement test for a smaller size.

測試子具(移動式定位框)50的結構,包含:下層框板51,下層框板51中央具有定位開口52;上層框板53中央具有上層開口,大於所述之定位開口52;以及連接斜板54連接所述之下層框板51與上層框板53。The structure of the test sub-tool (moving positioning frame) 50 includes: a lower frame plate 51 having a positioning opening 52 in the center; an upper layer opening 53 having an upper opening in the center, which is larger than the positioning opening 52; The plate 54 connects the lower frame plate 51 and the upper frame plate 53.

圖5C是測試子具(移動式定位框)的剖面圖Figure 5C is a cross-sectional view of the test sub-tool (mobile positioning frame)

圖中顯示測試子具(移動式定位框)下層框板51,中央具有定位開口52;上層框板53中央具有上層開口52B,上層開口52B大於定位開口52;以及連接斜板54連接所述之下層框板51與上層框板53。The test sub-frame (moving positioning frame) lower frame plate 51 has a positioning opening 52 in the center; the upper frame plate 53 has an upper opening 52B in the center, the upper opening 52B is larger than the positioning opening 52; and the connecting slanting plate 54 is connected to the The lower frame plate 51 and the upper frame plate 53.

圖6是本技藝的母子治具結合狀態Figure 6 is a combination of the mother and child jig of the present technology

圖6係將圖5B的測試子具(移動式定位框)50安置於圖5A的測試母具200的基座21上方,測試子具(移動式定位框)50定義出一個較小的第二網格區域22B。圖5A的第一網格區域22係依據第一BGA晶片的長寬所設計的,可以放置第一BGA晶片測試使用;圖6的第二網格區域22B係依據第二BGA晶片的長寬所設計的,可以放置第二BGA晶片測試使用。第二片BGA的長寬,至少有一邊是小於第一BGA晶片對應的長或是寬。如此,單一測試母具配合測試子具(移動式定位框)50的設置,便可以測試較小的第二BGA晶片。依此類推,更小尺寸的第三BGA晶片,只需要製備對應大小的測試子具(移動式定位框)50,便可以配合使用同一測試母具測試之,而不必分別製備專用的測試治具。6 is a view of the test sub-assembly (moving positioning frame) 50 of FIG. 5B disposed above the base 21 of the test fixture 200 of FIG. 5A, and the test sub-tool (moving positioning frame) 50 defines a smaller second. Grid area 22B. The first mesh region 22 of FIG. 5A is designed according to the length and width of the first BGA wafer, and can be placed for use in the first BGA wafer test; the second mesh region 22B of FIG. 6 is based on the length and width of the second BGA wafer. Designed to be placed in a second BGA wafer test. The length and width of the second BGA are at least one side smaller than the length or width of the first BGA wafer. Thus, a single test master can be tested with a test sub-tool (moving positioning frame) 50 to test a smaller second BGA wafer. And so on, the smaller size of the third BGA wafer only needs to prepare the corresponding test piece (moving positioning frame) 50, so that the same test tool can be used together without separately preparing a special test fixture. .

圖7-8是本技藝的測試示意圖Figure 7-8 is a schematic diagram of the test of the present technology

圖7顯示第一BGA晶片的測試Figure 7 shows the test of the first BGA wafer.

(a)準備第一BGA晶片40*40;(a) preparing a first BGA wafer 40*40;

(b)準備第二BGA晶片30*30,面積小於第一BGA晶片者;(b) preparing a second BGA wafer 30*30, the area being smaller than the first BGA chip;

(c)準備測試母具200,具有第一網格區域;(c) preparing a test master 200 having a first mesh area;

(d)放置所述之第一BGA晶片於所述之第一網格區域;以及(d) placing said first BGA wafer in said first grid region;

(e)選擇對應的測試軟體402測試之;(e) selecting the corresponding test software 402 to test;

接著,圖8顯示第二BGA晶片的測試:Next, Figure 8 shows the test of the second BGA wafer:

(f)取出所述之第一BGA晶片40*40;(f) taking out the first BGA wafer 40*40;

(g)將測試子具(移動式定位框)50放置於所述之測試母具200上方;(g) placing a test sub-tool (mobile positioning frame) 50 above the test fixture 200;

(h)放置所述之第二BGA晶片30*30於所述之較小的第二網格區域;以及(h) placing said second BGA wafer 30*30 in said smaller second grid region;

(i)選擇對應的測試軟體302,測試之。(i) Select the corresponding test software 302 and test it.

圖9A~9B是本技藝的測試母具框邊定位9A-9B are the test frame positioning of the test tool of the present technology.

圖9A顯示本技藝的測試母具框邊定位,測試母具200的第一網格區域222周邊具有框邊28,第一網格區域222略大於待測試BGA晶片100C的尺寸,第一網格區域222僅適用於BGA晶片100C的安置。圖9B顯示BGA晶片100C恰好安置於第一網格區域222,等待測試。9A shows the positioning of the test fixture in the prior art. The first mesh area 222 of the test fixture 200 has a frame edge 28 around the first mesh area 222. The first mesh area 222 is slightly larger than the size of the BGA wafer 100C to be tested. Region 222 is only suitable for placement of BGA wafer 100C. Figure 9B shows that the BGA wafer 100C is placed just in the first grid region 222, awaiting testing.

圖10A~10B是本技藝的測試子具的框邊定位10A-10B are frame edge positioning of the test sub-tool of the prior art

圖10A顯示本技藝的測試子具的框邊定位,測試子具(移動式定位框)50放置於測試母具200的第一定位網格22上方以後,測試子具(移動式定位框)50的定位開口52,定義出一個較小的第二網格區域222B。第二網格區域222B略大於BGA晶片200C的尺寸,第二網格區域222B僅適用於待測試BGA晶片200C的安置。圖10B顯示BGA晶片200C恰好安置於第二網格區域222B,等待測試。FIG. 10A shows the frame edge positioning of the test fixture of the present technology. After the test fixture (moving positioning frame) 50 is placed over the first positioning grid 22 of the test fixture 200, the test fixture (moving positioning frame) 50 The positioning opening 52 defines a smaller second mesh area 222B. The second grid region 222B is slightly larger than the size of the BGA wafer 200C, and the second grid region 222B is only suitable for placement of the BGA wafer 200C to be tested. Figure 10B shows that the BGA wafer 200C is placed just in the second grid region 222B, awaiting testing.

圖11A~11B是本技藝的測試母具的輔助定位樁的定位11A-11B are the positioning of the auxiliary positioning pile of the test master of the present technology.

圖11A顯示本技藝的測試母具200的輔助定位樁60的使用,第一網格區域222大於待測試BGA晶片300C的尺寸,L形狀輔助定位樁60插固於第一網格區域222,L形狀輔助定位樁60配合邊框28的右下角,定義出較小的第三網格區域32B;第三網格區域32B恰好配合BGA晶片300C的尺寸,L形狀輔助定位樁60上面與左邊空間66,方便BGA晶片300C的放置與取出之用。圖11B顯示BGA晶片300C的恰好安置於第三網格區域32B,等待測試。11A shows the use of the auxiliary positioning post 60 of the test fixture 200 of the present technology. The first mesh area 222 is larger than the size of the BGA wafer 300C to be tested, and the L-shaped auxiliary positioning post 60 is inserted in the first mesh area 222, L. The shape assisted positioning post 60 cooperates with the lower right corner of the frame 28 to define a smaller third mesh area 32B; the third mesh area 32B fits the size of the BGA wafer 300C, and the L shape assists the positioning pile 60 above and the left space 66, It is convenient for placing and removing the BGA wafer 300C. Figure 11B shows that the BGA wafer 300C is placed just in the third grid region 32B, awaiting testing.

圖12A~12B是本技藝的測試子具的輔助定位樁的定位12A-12B are the positioning of the auxiliary positioning pile of the test tool of the prior art.

圖12A顯示本技藝的測試子具50的輔助定位樁60的定位,當測試子具(移動式定位框)50放置於測試母具200的第一定位網格22以後,測試子具(移動式定位框)50的定位開口52,定義出一個較小的第二網格區域222B。第二網格區域222B大於待測試BGA晶片400C的尺寸,L形狀輔助定位樁60插固於第一網格區域222B,L形狀輔助定位樁60配合邊框51B的右下角,定義出較小的第三網格區域322B;第三網格區域322B恰好配合BGA晶片400C的尺寸,L形狀輔助定位樁60的上面與左邊的空間66,方便BGA晶片400C的放置與取出之用。圖12B顯示BGA晶片400C的恰好安置於第四網格區域322B,等待測試。Figure 12A shows the positioning of the auxiliary positioning post 60 of the test sub-assembly 50 of the prior art. After the test sub-assembly (moving positioning frame) 50 is placed on the first positioning grid 22 of the test fixture 200, the test sub-tool (mobile) The positioning opening 52 of the positioning frame 50 defines a smaller second mesh area 222B. The second mesh area 222B is larger than the size of the BGA wafer 400C to be tested. The L-shaped auxiliary positioning pile 60 is inserted in the first mesh area 222B, and the L-shaped auxiliary positioning pile 60 is matched with the lower right corner of the frame 51B to define a smaller number. The three mesh regions 322B; the third mesh regions 322B fit the size of the BGA wafer 400C, and the L shape assists the upper and left spaces 66 of the post 60 to facilitate the placement and removal of the BGA wafer 400C. Figure 12B shows that the BGA wafer 400C is placed just in the fourth grid region 322B, awaiting testing.

前述描述揭示了本技藝之較佳實施例以及設計圖式,惟,較佳實施例以及設計圖式僅是舉例說明,並非用於限制本技藝之權利範圍於此,凡是以均等之技藝手段實施本技藝者、或是以下述之「申請專利範圍」所涵蓋之權利範圍而實施者,均不脫離本技藝之精神而為申請人之權利範圍。The above description of the preferred embodiments and the drawings are intended to be illustrative of the preferred embodiments of the invention The present invention is intended to be within the scope of the applicant's scope of the invention.

200...測試母具200. . . Test master

21,21B...基座21, 21B. . . Pedestal

22,22B...定位網格22,22B. . . Positioning grid

23...上蓋twenty three. . . Upper cover

24,24B...彈性探針24,24B. . . Elastic probe

25,25B...空間25,25B. . . space

41,41B...金屬球41, 41B. . . Metal ball

30,40...測試單元30,40. . . Test unit

302,402...測試軟體302,402. . . Test software

50...測試子具(移動式定位框)50. . . Test tool (mobile positioning frame)

51...下層框板51. . . Lower frame board

52...開口52. . . Opening

53...上層框板53. . . Upper frame board

54...連接斜板54. . . Connecting sloping plate

100C,200C,300C,400C...BGA晶片100C, 200C, 300C, 400C. . . BGA chip

222,222B,32B,322B,...網格區域222,222B,32B,322B,. . . Grid area

圖1.是先前技藝的技術方塊圖Figure 1. is a technical block diagram of the prior art.

圖2是先前技藝測試治具Figure 2 is a prior art test fixture

圖3A是先前技藝測試晶片40*40FIG. 3A is a prior art test wafer 40*40

圖3B是先前技藝測試晶片30*30FIG. 3B is a prior art test wafer 30*30

圖4是本技藝的技術方塊圖Figure 4 is a technical block diagram of the present technology

圖5A~5C是本技藝的實施例5A-5C are embodiments of the present technology

圖6是本技藝的母子治具結合狀態Figure 6 is a combination of the mother and child jig of the present technology

圖7-8是本技藝的測試示意圖Figure 7-8 is a schematic diagram of the test of the present technology

圖9A~9B是本技藝的測試母具框邊定位9A-9B are the test frame positioning of the test tool of the present technology.

圖10A~10B是本技藝的測試子具的框邊定位10A-10B are frame edge positioning of the test sub-tool of the prior art

圖11A~11B是本技藝的測試母具的輔助定位樁的定位11A-11B are the positioning of the auxiliary positioning pile of the test master of the present technology.

圖12A~12B是本技藝的測試子具的輔助定位樁的定位12A-12B are the positioning of the auxiliary positioning pile of the test tool of the prior art.

50...測試子具(移動式定位框)50. . . Test tool (mobile positioning frame)

51...下層框板51. . . Lower frame board

52...開口52. . . Opening

53...上層框板53. . . Upper frame board

54...連接斜板54. . . Connecting sloping plate

Claims (7)

一種BGA晶片的測試治具,包含:測試母具,具有第一網格區域,提供待測試的第一BGA晶片安置用;測試單元,設置於所述之測試母具下方;具有彈性探針,於測試時,電性耦合至所述之BGA晶片;以及測試子具,具有定位開口;所述之定位開口,係小於所述之第一網格區域者;當測試子具放置於所述之第一網格區域時,定義出第二網格區域,提供待測試較小尺寸的第二BGA晶片安置測試用;其中,所述之第一網格區域與所述之第二網格區域,係在同一網格上區隔出不同的使用區域者。 A test fixture for a BGA wafer, comprising: a test fixture having a first grid region for providing a first BGA wafer to be tested for placement; a test unit disposed under the test fixture; having an elastic probe, In the test, electrically coupled to the BGA wafer; and the test sub-assembly having a positioning opening; the positioning opening is smaller than the first mesh area; when the test sub-tool is placed in the a first mesh region defining a second BGA wafer placement test for testing a smaller size to be tested; wherein the first mesh region and the second mesh region are Separate different usage areas on the same grid. 如申請專利範圍第1項所述之BGA晶片的測試治具,更包含:第一測試軟體,可選擇性地電性耦合至所述之測試單元;於第一BGA晶片測試時選用;以及第二測試軟體,可選擇性地電性耦合至所述之測試單元;於第二BGA晶片測試時選用。 The test fixture of the BGA chip of claim 1, further comprising: a first test software selectively electrically coupled to the test unit; used in the first BGA wafer test; and The second test software is selectively electrically coupled to the test unit; used in the second BGA wafer test. 如申請專利範圍第1項所述之BGA晶片的測試治具,其中所述之測試子具,係包含:下層框板,具有定位開口;上層框板,具有上層開口,大於所述之定位開口;以及斜板,連接所述之下層框板與所述之上層框板。 The test fixture of the BGA wafer according to claim 1, wherein the test sub-assembly comprises: a lower frame plate having a positioning opening; and an upper frame plate having an upper opening, which is larger than the positioning opening And a swash plate connecting the lower frame plate and the upper frame plate. 如申請專利範圍第1項所述之BGA晶片的測試治具,更包含:輔助定位樁,可插固於所述之網格區域,配合邊框轉角,定義出第三網格區域。 The test fixture of the BGA chip according to claim 1, further comprising: an auxiliary positioning pile, which can be inserted in the grid area and cooperate with the corner of the frame to define a third grid area. 如申請專利範圍第4項所述之輔助定位樁,係呈L形狀。 The auxiliary positioning pile according to item 4 of the patent application scope has an L shape. 一種BGA晶片的測試方法,包含:(a)準備第一BGA晶片;(b)準備第二BGA晶片,尺寸小於所述之第一BGA晶片;(c)準備測試母具,具有第一網格區域;(d)放置所述之第一BGA晶片於所述之第一網格區域; (e)選擇對應的測試軟體測試之;(f)取出所述之第一BGA晶片;(g)將測試子具放置於所述之測試母具上方,定義出第二網格區域;(h)放置所述之第二BGA晶片於所述之第二網格區域;以及(i)選擇對應的測試軟體,測試之。 A method for testing a BGA wafer, comprising: (a) preparing a first BGA wafer; (b) preparing a second BGA wafer having a smaller size than the first BGA wafer; and (c) preparing a test fixture having a first grid a region; (d) placing the first BGA wafer in the first grid region; (e) selecting a corresponding test software test; (f) removing the first BGA wafer; (g) placing a test sub-assembly over the test master to define a second mesh region; Place the second BGA wafer in the second grid region; and (i) select the corresponding test software and test it. 一種BGA晶片的測試方法,包含:(a)準備第一BGA晶片;(b)準備第二BGA晶片,尺寸小於所述之第一BGA晶片;(c)準備測試母具,具有第一網格區域;(d)放置所述之第一BGA晶片於所述之第一網格區域;(e)選擇對應的測試軟體測試之;(f)取出所述之第一BGA晶片;(g)將測試子具放置於所述之測試母具上方,定義出第二網格區域;(h)將輔助定位樁插固於所述之第二網格區域,配合測試子具的邊框轉角定義出第三網格區域;(i)放置所述之第二BGA晶片於所述之第三網格區域;以及(j)選擇對應的測試軟體,測試之。A method for testing a BGA wafer, comprising: (a) preparing a first BGA wafer; (b) preparing a second BGA wafer having a smaller size than the first BGA wafer; and (c) preparing a test fixture having a first grid a region; (d) placing the first BGA wafer in the first grid region; (e) selecting a corresponding test software test; (f) removing the first BGA wafer; (g) The test sub-assembly is placed above the test master to define a second grid area; (h) the auxiliary positioning pile is inserted in the second grid area, and the frame corner of the test sub-tool is defined a three-grid region; (i) placing the second BGA wafer in the third grid region; and (j) selecting a corresponding test software for testing.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107238785A (en) * 2016-03-25 2017-10-10 联芯科技有限公司 Chip testing pedestal

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200950012A (en) * 2008-03-28 2009-12-01 Ngk Spark Plug Co Multi-layer wiring board and method of manufacturing the same
TW201000924A (en) * 2008-06-26 2010-01-01 Freescale Semiconductor Inc Test interposer having active circuit component and method therefor
JP2010097871A (en) * 2008-10-17 2010-04-30 Three M Innovative Properties Co Ic socket

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200950012A (en) * 2008-03-28 2009-12-01 Ngk Spark Plug Co Multi-layer wiring board and method of manufacturing the same
TW201000924A (en) * 2008-06-26 2010-01-01 Freescale Semiconductor Inc Test interposer having active circuit component and method therefor
JP2010097871A (en) * 2008-10-17 2010-04-30 Three M Innovative Properties Co Ic socket

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107238785A (en) * 2016-03-25 2017-10-10 联芯科技有限公司 Chip testing pedestal
CN107238785B (en) * 2016-03-25 2020-12-29 联芯科技有限公司 Chip testing base

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