TWI470917B - Voltage regulation integrated circuit, voltage regulator circuit and method thereof - Google Patents

Description

Voltage regulating integrated circuit, voltage regulating circuit, and voltage adjusting method

The present invention relates to a voltage regulation technique, and more particularly to a voltage regulation integrated circuit, a voltage regulation circuit, and a voltage regulation method.

In a typical computer system, the voltage identification definition (VID) generated by the central processor changes with its operating mode to dynamically adjust its operating voltage (or core voltage) to save power consumption. When the computer system does not require a large amount of computational power consumption, the central processing unit generates a voltage identification code to the voltage regulator according to its working mode, so that the voltage regulator can reduce the operating voltage of the central processing unit according to the voltage identification code.

Conventional integrated circuits for voltage regulation typically have additional functions, such as sensing the decay current function. If the integrated circuit is equipped with additional functions for voltage adjustment, additional pins are usually required and an additional number of components are required to adjust the operating voltage of the central processing unit. However, this causes an increase in the overall circuit area and increases the manufacturing cost.

In view of this, the present invention provides a voltage regulating integrated circuit, a voltage regulating circuit, and a voltage regulating method, thereby solving the problems described in the prior art.

The present invention provides a voltage regulating circuit including a reference voltage generating unit, an error amplifier, and a control unit. The reference voltage generating unit is configured to provide a reference voltage, and the reference voltage generating unit includes a pulse width modulation reference voltage information providing unit and a voltage adjusting unit. The pulse width modulation reference voltage information providing unit provides a pulse width modulation reference voltage signal. The voltage adjustment unit receives the pulse width modulation reference voltage signal and provides a reference voltage, wherein the reference voltage is generated based on the pulse width modulation reference voltage signal and is adjusted. The error amplifier has a first input terminal and a second input terminal, the first input terminal receives the output feedback voltage, and the second input terminal receives the reference voltage. The error amplifier outputs an error amplification signal according to the reference voltage and the output feedback voltage. The control unit is coupled to the error amplifier and provides a regulated voltage according to the error amplification signal.

In an embodiment of the invention, the voltage adjustment unit includes an integration circuit. The integration circuit is coupled to the pulse width modulation reference voltage information providing unit.

In an embodiment of the invention, the voltage adjustment unit further includes an adjustment voltage source. The adjustment voltage source is coupled between the output end of the integration circuit and the second input end.

In an embodiment of the invention, the voltage adjustment unit further includes a resistor network and an adjustment current source. The resistor network is coupled to the output of the integrating circuit. The adjustment current source is coupled between the resistor network and the second input.

In an embodiment of the invention, the voltage adjustment unit further includes a pulse width modulation unit. The pulse width modulation unit is coupled between the pulse width modulation reference voltage information providing unit and the integration circuit.

In an embodiment of the invention, the voltage adjustment unit includes a voltage buffer Circuit and integration circuit. The voltage buffer circuit is coupled to the pulse width modulation reference voltage information providing unit. The integration circuit is coupled to the voltage buffer circuit.

The invention further provides a voltage regulating integrated circuit for coupling a pulse width modulation reference voltage information providing unit and an external circuit. The voltage regulating integrated circuit includes first to fifth pins, an error amplifier, and a control unit. The first pin is coupled to the pulse width modulation reference voltage information providing unit. The second pin, the third pin and the fourth pin are coupled to the external circuit, wherein the external circuit provides a reference voltage, and the reference voltage is coupled to the fourth pin. The fifth pin is coupled to an output feedback voltage. The error amplifier has a first input end and a second input end, the first input end receives the output feedback voltage, and the second input end receives the reference voltage through the fourth pin. The error amplifier outputs an error amplification signal in response to the output feedback voltage and associated with the reference voltage. The control unit is coupled to the error amplifier and provides a regulated voltage according to the error amplification signal.

In an embodiment of the invention, the external circuit includes an integrating circuit. The integrating circuit is coupled to the second pin.

In an embodiment of the invention, the external circuit further includes a resistor network. The resistor network is coupled to the third pin.

In an embodiment of the invention, the voltage regulating integrated circuit further includes an adjustment voltage source. The adjustment voltage source is coupled between the fourth pin and the second input end.

In an embodiment of the invention, the voltage regulating integrated circuit further includes an adjustment current source. The adjustment current source is coupled to the fourth pin and the second input.

In an embodiment of the invention, the voltage regulating integrated circuit is further configured to be coupled to an external bias function setting circuit. The voltage regulating integrated circuit further includes Six pins. The sixth pin is coupled to the bias function setting circuit, and the sixth pin is further coupled to the adjustment current source.

In an embodiment of the invention, the voltage regulating integrated circuit is further configured to be coupled to an external decay function setting circuit. The voltage regulating integrated circuit further includes a seventh pin and an eighth pin. The seventh pin and the eighth pin are coupled to the decay function setting circuit, and the seventh pin and the eighth pin are further coupled to adjust the current source.

In an embodiment of the invention, the voltage regulating integrated circuit further includes a pulse width modulation unit. The pulse width modulation unit is coupled to the second pin.

In an embodiment of the invention, the voltage regulating integrated circuit further includes a voltage buffer circuit. The voltage buffer circuit is coupled to the first pin, the second pin and the third pin.

The invention further proposes a voltage regulation method comprising the following steps. A reference voltage is generated based on a pulse width modulated reference voltage signal and adjusted. Reacting an output feedback voltage associated with the reference voltage for error comparison, outputting an error amplification signal; and providing an adjustment voltage according to the error amplification signal, wherein the output feedback voltage is dependent on the adjustment voltage.

In an embodiment of the invention, the step of adjusting the reference voltage signal based on the pulse width and adjusting comprises adjusting the pulse width modulation reference voltage signal in an integrated manner.

In an embodiment of the invention, the step of adjusting the reference voltage signal based on the pulse width and adjusting comprises adjusting a pulse width of the pulse width modulation reference voltage signal.

In an embodiment of the invention, the reference voltage signal is modulated based on the pulse width And the step of adjusting includes adjusting the amplitude of the pulse width modulation reference voltage signal.

In an embodiment of the invention, the step of reacting the output feedback voltage with the reference voltage includes coupling the reference voltage to an adjusted voltage source, or the reference voltage is coupled to an adjustment current source to generate a coupling signal, and then coupling the signal. The error is compared with the output feedback voltage to output an error amplification signal.

Based on the above, the present invention adopts a novel design, and the designed voltage regulating integrated circuit can perform dynamic voltage adjustment without an additional pin, so that the circuit caused by using extra pins and excessive components can be effectively solved. The problem of large area. On the other hand, the voltage adjustment circuit or method of the present invention uses a smaller circuit area and a smaller number of components than the conventional method, so that the manufacturing cost can be reduced.

It is to be understood that the foregoing general description and claims

Reference will now be made in detail be made to the embodiments of the invention In addition, the same or similar reference numerals are used in the drawings and the embodiments to represent the same or the like.

1 is a schematic diagram of a voltage regulating circuit in accordance with an embodiment of the present invention. Please refer to Figure 1. The voltage regulating circuit 100 includes a reference voltage generating unit 110, an error amplifier 140, and a control unit 150. The functions of the respective blocks shown in Fig. 1 are explained as follows.

The reference voltage generating unit 110 is configured to provide a reference voltage V _REF , and the reference voltage generating unit 110 includes a pulse width modulation reference voltage information providing unit 120 and a voltage adjusting unit 130 . First, the pulse width modulation reference voltage information providing unit 120 provides a pulse width modulation reference voltage signal S _VID according to its own operating mode. The voltage adjustment unit 130 receives the pulse width modulation reference voltage signal S _VID and provides the reference voltage V _REF , wherein the reference voltage is generated after V _{REF is} adjusted based on the pulse width modulation reference voltage signal S _VID .

The error amplifier 140 has a first input terminal (inverting input terminal) and a second input terminal (non-inverting input terminal), the first input terminal receives an output feedback voltage V _FB , and the second input terminal receives the reference voltage V _REF . The error amplifier 140 outputs an error amplification signal V _COMP according to the reference voltage V _REF and the output feedback voltage V _FB . The control unit 150 is coupled to the output of the error amplifier 140. Finally, the control unit 150 provides the required regulated voltage V _REG according to the error amplification signal V _COMP , wherein the output feedback voltage V _FB depends on the regulated voltage V _REG .

Based on the above, the voltage regulating circuit 100 of the present embodiment adopts a novel design and can perform dynamic voltage regulation.

Next, various types of voltage regulating circuits can be easily understood and modified by those skilled in the art in the following various embodiments.

More specifically, FIG. 2 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention. Please refer to Figure 2. The voltage regulating circuit 100A is based on a variation type of the voltage regulating circuit 100. The voltage adjustment unit 130A includes an integration circuit 132 and an adjustment voltage source V _ADJ . The integration circuit 132 can be composed of a resistor R1 and a capacitor C. One end of the resistor R1 is coupled to the pulse width modulation reference voltage information providing unit 120, and the other end of the resistor R1 is coupled to one end of the capacitor C, and the other end of the capacitor C is coupled. Ground GND. The adjustment voltage source V _{ADJ is} coupled between the output of the integration circuit 132 and the second input of the error amplifier 140, and can be used to adjust the voltage level of the reference voltage V _REF .

3 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention. Please refer to Figure 3. The voltage regulating circuit 100B is another type of variation based on the voltage regulating circuit 100. The voltage adjustment unit 130B may include an integration circuit 132, a resistance network 134, and an adjustment current source I _ADJ . The integrating circuit 132 is coupled to the pulse width modulation reference voltage information providing unit 120. Resistor network 134 is comprised of resistors R2 through R4. The resistor network 134 is coupled to the output of the integrating circuit 132. The adjustment current source I _{ADJ is} coupled between the resistor network 134 and the second input of the error amplifier 140. The resistor network 134 can also be used to adjust the voltage level of the reference voltage V _REF .

4 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention. Please refer to Figure 4. The voltage regulating circuit 100C is another type of variation based on the voltage regulating circuit 100. The voltage adjustment unit 130C includes an integration circuit 132 and a pulse width modulation unit 136. The pulse width modulation unit 136 is coupled between the pulse width modulation reference voltage information providing unit 120 and the integrating circuit 132. The pulse width modulation unit 136 is configured to perform a digital pulse width modulation on the pulse width modulation reference voltage signal S _VID , and the adjusted pulse is the sum of the original pulse width modulation reference voltage signal S _VID and the additional pulse. . The adjusted pulse can then be used to adjust the voltage level of the reference voltage V _REF via the integrating circuit 132.

FIG. 5 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention. Please refer to Figure 5. The voltage regulating circuit 100D is another type of variation based on the voltage regulating circuit 100. The voltage adjustment unit 130D includes an integration circuit 132 and a voltage buffer circuit 138. The voltage buffer circuit 138 is coupled between the pulse width modulation reference voltage information providing unit 120 and the integrating circuit 132. The voltage buffer circuit 138 can be used to adjust the amplitude of the pulse width modulation reference voltage signal S _VID .

6 is a schematic diagram of a voltage regulating integrated circuit in accordance with an embodiment of the present invention. Please refer to Figure 6. The voltage regulating integrated circuit 510 is configured to couple the pulse width modulation reference voltage information providing unit 520 and the external circuit 530. The pulse width modulation reference voltage information providing unit 520 provides a pulse width modulation reference voltage signal S _VID according to its own working mode. The respective components shown in Fig. 6 will be described below.

The voltage regulating integrated circuit 510 includes first to fifth pins J ₁ to J ₅ , an error amplifier 540, a control unit 550, and an output pin J _OUT . The first pin J _{1 is} coupled to the pulse width modulation reference voltage information providing unit 510. The second to fourth pins J ₂ to J _{4 are} used to couple the external circuit 530. The external circuit 530 provides a reference voltage V _REF , and the reference voltage V _{REF is} coupled to the fourth pin J ₄ . The fifth pin J _{5 is} coupled to an output feedback voltage V _FB . The error amplifier 540 has a first input (inverting input) and a second input (non-inverting input), wherein the first input receives the output feedback voltage V _FB and the second input passes the fourth connection Pin J ₄ receives the reference voltage V _REF . And the error amplifier 540 outputs an error amplification signal V _COM in response to the output feedback voltage V _FB and associated with the reference voltage V _REF . The control unit 550 is coupled to the error amplifier 540 and provides an adjustment voltage V _REG according to the error amplification signal V _COM and outputs from the output pin J _OUT , wherein the output feedback voltage V _FB depends on the adjustment voltage V _REG .

In addition, the voltage regulating integrated circuit 510 may further include a voltage buffer circuit 560. The input of the voltage buffer circuit 560 is coupled to the first pin J ₁ , and the output thereof is coupled to the second pin J ₂ . One end of the voltage buffer circuit 560 is coupled to the operating voltage V _R and coupled to the third pin J ₃ . The external circuit 530 can include an integration circuit 532 and a resistor network 534. The integrating circuit 532 can be composed of a resistor R1 and a capacitor C, wherein one end of the resistor R1 is coupled to the second pin J ₂ . The other end of the resistor R1 is coupled to one end of the capacitor C, and the other end of the capacitor C is coupled to the ground GND. Further, the resistive network 534 may be composed of resistors R2 to R4, wherein R4 resistor coupled to the third pin J _3, and is coupled to resistor R3 and the resistor R4 is connected to the fourth pin J _4. The reference voltage V _REF can be determined by Mathematical Formula 1 below.

Where D is the percentage value of the duty cycle of the pulse width modulated reference voltage signal S _VID .

Next, various types of integrated circuits can be easily understood and modified by those skilled in the art in the following embodiments.

7 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 7. The voltage regulating integrated circuit 510A is based on a variation of the voltage regulating integrated circuit 510. The voltage regulating integrated circuit 510A can include an adjustment voltage source V _ADJ . The adjustment voltage source V _{ADJ is} coupled between the fourth pin J ₄ and the second input end of the error amplifier 540 . The reference voltage V _REF can be determined by Mathematical Formula 2 below.

FIG. 8 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 8. The voltage regulating integrated circuit 510B is another type of variation based on the voltage regulating integrated circuit 510. The voltage regulating integrated circuit 510B can include an adjustment current source I _ADJ . The adjustment current source I _{ADJ is} coupled to the fourth pin J ₄ and the second input of the error amplifier 540. The reference voltage V _REF can be determined by Mathematical Formula 3 below.

9 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 9. The voltage regulating integrated circuit 510C has an analog offset function and is another type of variation based on the voltage regulating integrated circuit 510. The voltage regulating integrated circuit 510C is further coupled to an external bias function setting circuit 570 without adding a pin. The bias function setting circuit 570 can be a series circuit of a resistor R5 and a resistor R6 to divide the operating voltage V _DD . In addition, the voltage regulating integrated circuit 510C includes a sixth pin J ₆ and a current adjusting unit 572 which are originally intended to be used for the bias function. The sixth pin J _{6 is} coupled to the bias function setting circuit 570, and the sixth pin J ₆ is coupled to the adjustment current source I _ADJ through the current adjusting unit 572. Therefore, the adjustment current source I _ADJ can be adjusted according to the current adjustment unit 572.

Figure 10 is a schematic illustration of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 10. The voltage regulating integrated circuit 510D has an analog type of droop function and is another type of variation based on the voltage regulating integrated circuit 510. The voltage regulating integrated circuit 510D is further coupled to the external decay function setting circuit 580 without adding a pin. The voltage regulating integrated circuit 510D includes a current sensing and current mirror unit 582, and a seventh pin J ₇ and an eighth pin J _{8 which are} to be used for the attenuation function. The seventh pin J ₇ and the eighth pin J ₈ are coupled to the decay function setting circuit 580, and the seventh pin J ₇ and the eighth pin J ₈ are coupled to the current through the current sensing and current mirror unit 582. Source I _ADJ . Therefore, the adjustment current source I _ADJ can be adjusted according to the current sensing and current mirror unit 582.

11 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 11. The voltage regulating integrated circuit 510E is another type of variation based on the voltage regulating integrated circuit 510. The voltage regulating integrated circuit 510D may further include a pulse width modulation unit 590. The pulse width modulation unit 590 is configured to perform digital pulse width modulation on the pulse width modulation reference voltage signal S _VID , and the adjusted pulse is the sum of the original pulse width modulation reference voltage signal S _VID and the additional pulse. . This adjusted pulse is then passed through an integral circuit 532 external to the voltage regulating integrated circuit 510D to generate an analog type reference voltage V _REF that is different from the original.

Figure 12 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 12. The voltage adjustment integrated circuit 510F is another variation type based on the voltage adjustment integrated circuit 510. The voltage regulating integrated circuit 510F may include a pulse width modulation unit 590A, an adjustment signal generating unit 594A, and a sixth pin J ₆ . The sixth pin J _{6 is} coupled to the external bias function setting circuit 570, and the sixth pin J _{6 is} coupled to the adjustment signal generating unit 594A. The pulse width modulation unit 590A performs pulse width modulation based on the pulse width modulation reference voltage signal S _VID and the output of the adjustment signal generating unit 594A. In addition, the input voltage received by the sixth pin J ₆ may be via software, jumper mode, or other analogy mode, or other digital mode, or a value that varies with different conditions, or a fixed value. The invention does not limit the type of voltage received by the sixth pin J ₆ .

Figure 13 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention. Please refer to Figure 13. The voltage regulating integrated circuit 510G is another type of variation based on the voltage regulating integrated circuit 510. The voltage regulating integrated circuit 510G may include a pulse width modulation unit 590B, an adjustment signal generating unit 594B, a seventh pin J ₇ and an eighth pin J ₈ . The pulse width modulation unit 590B is coupled between the second pin J ₂ and the output of the voltage buffer circuit 560. The adjustment signal generating unit 594B receives the input signals from the seventh pin J ₇ and the eighth pin J ₈ and generates an adjustment signal S _ADJ to the pulse width modulation unit 590B. The pulse width modulation unit 590B can perform pulse width modulation according to the buffered pulse width modulation reference voltage signal S _VID and the adjustment signal S _ADJ .

Based on the disclosures of the above exemplary embodiments, the designed voltage regulating integrated circuit can perform dynamic voltage adjustment without an additional pin, so that the traditional use of additional pins and components can be effectively solved. The problem that the circuit area becomes large. On the other hand, compared with the conventional method, the designed voltage regulating integrated circuit or voltage regulating circuit has a smaller circuit area and fewer components, so that the manufacturing cost can be reduced.

Based on the disclosure of the above embodiments, a general voltage adjustment method can be integrated. More specifically, FIG. 14 is a flow chart of a voltage adjustment method according to an embodiment of the present invention. Referring to FIG. 1 and FIG. 14 together, the voltage adjustment method of this embodiment may include the following steps.

As shown in step S1401, the reference voltage V _REF is generated based on the pulse width modulation reference voltage signal S _VID and adjusted.

Then, as shown in step S1403, the output feedback voltage V _FB is correlated with the reference voltage V _REF for error comparison, and an error amplification signal V _{COMP is} output.

Then, as shown in step S1405, a regulated voltage V _REG is provided according to the error amplification signal V _COMP , wherein the output feedback voltage V _{FB is} dependent on the regulated voltage V _REG .

Further, in one embodiment, execution of step S1401, the integral can be adjusted using the PWM signal S _VID reference voltage, may be adjusted PWM signal S _VID reference voltage with the pulse width of the digital mode, or adjust the pulse Widely adjusts the amplitude of the reference voltage signal S _VID .

Furthermore, in another embodiment, when step S1403 is performed, the reference voltage V _REF may be further coupled with an adjustment voltage source V _ADJ (as shown in FIG. 2 or FIG. 7 ), or the reference voltage V _REF and the adjustment The current source I _{ADJ is} coupled (as shown in FIG. 3 or FIG. 8 ) to generate a coupling signal, and then the coupling signal is compared with the output feedback voltage V _FB for error comparison, thereby outputting the error amplification signal V _COMP .

In summary, the present invention adopts a novel design, and the designed voltage regulating integrated circuit can perform dynamic voltage adjustment without an additional pin, so that the traditional use of additional pins and components can be effectively solved. The problem that the circuit area becomes large. On the other hand, compared with the conventional method, the voltage regulating circuit or method of the present invention uses a relatively small circuit area and a small number of components, so that the manufacturing cost can be reduced.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and those skilled in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100, 100A~100D‧‧‧ voltage adjustment circuit

110‧‧‧reference voltage generating unit

120‧‧‧ Pulse width modulation reference voltage information providing unit

130, 130A~130D‧‧‧Voltage adjustment unit

132‧‧‧Integral Circuit

134‧‧‧Resistor network

136‧‧‧ pulse width modulation unit

138‧‧‧Voltage snubber circuit

140‧‧‧Error amplifier

150‧‧‧Control unit

510, 510A~510G‧‧‧Voltage-adjusting integrated circuit

520‧‧‧ Pulse width modulation reference voltage information providing unit

530‧‧‧External Circuit

532‧‧Integral circuit

534‧‧‧resistive network

540‧‧‧Error amplifier

550‧‧‧Control unit

560‧‧‧Voltage snubber circuit

570‧‧‧ bias function setting circuit

572‧‧‧Current adjustment unit

580‧‧‧decay function setting circuit

582‧‧‧ Current sensing and current mirror unit

590, 590A, 590B‧‧‧ pulse width modulation unit

594A, 594B‧‧‧Adjustment signal generation unit

C‧‧‧ capacitor

GND‧‧‧

I _ADJ ‧‧‧Adjust current source

J ₁ ‧‧‧first pin

J ₂ ‧‧‧second pin

J ₃ ‧‧‧ third pin

J ₄ ‧‧‧fourth pin

J ₅ ‧‧‧5th pin

J ₆ ‧‧‧6th pin

J ₇ ‧‧‧ seventh pin

J ₈ ‧‧‧8th pin

J _OUT ‧‧‧ output pin

R1~R6‧‧‧ resistor

S _VID ‧‧‧ pulse width modulation reference voltage signal

V _ADJ ‧‧‧Adjust voltage source

V _COMP ‧‧‧Error amplification signal

V _DD , V _R ‧‧‧ working voltage

V _FB ‧‧‧ Output feedback voltage

V _REF ‧‧‧reference voltage

V _REG ‧‧‧Adjust voltage

S1401~S1403‧‧‧ each of the voltage adjustment methods according to an embodiment of the present invention step

The following drawings are a part of the specification of the invention, and illustrate the embodiments of the invention

1 is a schematic diagram of a voltage regulating circuit in accordance with an embodiment of the present invention.

2 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention. Figure.

3 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention.

4 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention.

FIG. 5 is a schematic diagram of a voltage regulating circuit in accordance with another embodiment of the present invention.

6 is a schematic diagram of a voltage regulating integrated circuit in accordance with an embodiment of the present invention.

7 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

FIG. 8 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

9 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

Figure 10 is a schematic illustration of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

11 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

Figure 12 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

Figure 13 is a schematic diagram of a voltage regulating integrated circuit in accordance with another embodiment of the present invention.

FIG. 14 is a flowchart of a voltage adjustment method according to an embodiment of the present invention; Figure.

100‧‧‧Voltage adjustment circuit

110‧‧‧reference voltage generating unit

120‧‧‧ Pulse width modulation reference voltage information providing unit

130‧‧‧Voltage adjustment unit

140‧‧‧Error amplifier

150‧‧‧Control unit

S _VID ‧‧‧ pulse width modulation reference voltage signal

V _COMP ‧‧‧Error amplification signal

V _FB ‧‧‧ Output feedback voltage

V _REF ‧‧‧reference voltage

V _REG ‧‧‧Adjust voltage

Claims (20)

A voltage regulating circuit includes: a reference voltage generating unit for providing a reference voltage, the reference voltage generating unit comprising: a pulse width modulation reference voltage information providing unit, providing a pulse width modulation reference voltage signal; and a a voltage adjustment unit receives the pulse width modulation reference voltage signal and provides the reference voltage, wherein the reference voltage is generated based on the pulse width modulation reference voltage signal and is adjusted; an error amplifier having a first input And a second input end, the first input end receives an output feedback voltage, the second input end receives the reference voltage, the error amplifier outputs an error amplification signal according to the reference voltage and the output feedback voltage; The control unit is coupled to the error amplifier and provides a regulated voltage according to the error amplification signal. The voltage regulation circuit of claim 1, wherein the voltage adjustment unit comprises: an integration circuit coupled to the pulse width modulation reference voltage information providing unit. The voltage regulating circuit of claim 2, wherein the voltage adjusting unit further comprises: an adjusting voltage source coupled between the output end of the integrating circuit and the second input end. The voltage regulation circuit of claim 2, wherein the voltage adjustment unit further comprises: a resistor network coupled to the output of the integrating circuit; and an adjustable current source coupled between the resistor network and the second input. The voltage adjustment circuit of claim 2, wherein the voltage adjustment unit further comprises: a pulse width modulation unit coupled between the pulse width modulation reference voltage information providing unit and the integration circuit. The voltage adjustment circuit of claim 1, wherein the voltage adjustment unit comprises: a voltage buffer circuit coupled to the pulse width modulation reference voltage information providing unit; and an integration circuit coupled to the voltage buffer circuit . A voltage-adjusting integrated circuit for coupling a pulse width modulation reference voltage information providing unit and an external circuit, the voltage regulating integrated circuit comprising: a first pin for coupling the pulse width modulation reference a voltage information providing unit; a second pin, a third pin and a fourth pin for coupling the external circuit, wherein the external circuit provides a reference voltage, and the reference voltage is coupled to the fourth a fifth pin for coupling an output feedback voltage; an error amplifier having a first input end and a second input end, the first input end receiving the output feedback voltage, the second input The terminal receives the reference voltage through the fourth pin, and the error amplifier reacts to the output The feedback voltage is associated with the reference voltage to output an error amplification signal; and a control unit is coupled to the error amplifier, and provides an adjustment voltage according to the error amplification signal. The voltage regulating integrated circuit of claim 7, wherein the external circuit comprises: an integrating circuit coupled to the second pin. The voltage regulating integrated circuit of claim 8, wherein the external circuit further comprises: a resistor network coupled to the third pin. The voltage regulating integrated circuit of claim 7, wherein the voltage regulating integrated circuit further comprises: an adjusting voltage source coupled between the fourth pin and the second input end. The voltage regulating integrated circuit of claim 7, wherein the voltage regulating integrated circuit further comprises: an adjusting current source coupled to the fourth pin and the second input end. The voltage regulating integrated circuit of claim 11, wherein the voltage regulating integrated circuit is further configured to be coupled to an external biasing function setting circuit, and the voltage regulating integrated circuit further comprises: a sixth connection a pin for coupling the bias function setting circuit, and the sixth pin is further coupled to the adjustment current source. The voltage regulating integrated circuit of claim 11, wherein the voltage regulating integrated circuit is further configured to couple an external decaying work. The voltage adjustment integrated circuit further includes: a seventh pin and an eighth pin, configured to couple the decay function setting circuit, and the seventh pin and the eighth pin are more coupled This adjusts the current source. The voltage regulating integrated circuit of claim 8, wherein the voltage regulating integrated circuit further comprises: a pulse width modulation unit coupled to the second pin. The voltage regulating integrated circuit of claim 7, wherein the voltage regulating integrated circuit further comprises: a voltage buffer circuit coupled to the first pin, the second pin and the third pin . A voltage adjustment method includes: generating a reference voltage based on a pulse width modulation reference voltage signal and adjusting; reacting an output feedback voltage with the reference voltage for error comparison, and outputting an error amplification signal; An adjustment voltage is provided according to the error amplification signal, wherein the output feedback voltage is dependent on the adjustment voltage. The voltage adjustment method of claim 16, wherein the step of adjusting the reference voltage signal based on the pulse width and adjusting comprises: adjusting the pulse width modulation reference voltage signal in an integral manner. The voltage adjustment method of claim 16, wherein the step of adjusting the reference voltage signal based on the pulse width and adjusting comprises: adjusting a pulse width of the pulse width modulation reference voltage signal. A voltage regulation method as described in claim 16 of the patent application, The step of adjusting and adjusting the reference voltage signal based on the pulse width includes: adjusting an amplitude of the pulse width modulation reference voltage signal. The voltage regulation method of claim 16, wherein the step of reacting the output feedback voltage with the reference voltage comprises: coupling the reference voltage to an adjustment voltage source, or the reference voltage and an adjustment current source. The coupling is coupled to generate a coupling signal, and the coupling signal is compared with the output feedback voltage for error comparison, thereby outputting the error amplification signal.