TWI464813B - A high-speed to-can optical package module using symmetrical pattern and capacitive compensation technology - Google Patents

A high-speed to-can optical package module using symmetrical pattern and capacitive compensation technology Download PDF

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TWI464813B
TWI464813B TW101114892A TW101114892A TWI464813B TW I464813 B TWI464813 B TW I464813B TW 101114892 A TW101114892 A TW 101114892A TW 101114892 A TW101114892 A TW 101114892A TW I464813 B TWI464813 B TW I464813B
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center
rectangular portion
speed
package module
electrical
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TW201344809A (en
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Tien Tsorng Shih
Shun Shien Chu
Pei Hao Tseng
Jau Ji Jou
Jen Yea Jan
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Nat Kaohsiung University Ofapplied Sciences
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Description

對稱型電容補償式高速罐型光封裝模組Symmetrical Capacitor Compensation High Speed Can Optical Package Module

本發明是有關於一種高速光封裝模組(high-speed optical package module),特別是指一種高速罐型光封裝模組(high-speed TO-can(Transistor Outline Can) optical package module)。The present invention relates to a high-speed optical package module, and more particularly to a high-speed TO-can (Transistor Outline Can) optical package module.

高速罐型光封裝模組是一種將電訊號轉為光訊號、並將欲傳輸的資訊附加在載波上並調變後而輸出的光發射元件,例如台灣第I227078號、台灣第I278944號、美國第US7056036B2號、美國第US7298937B2號等專利案皆提出關於此種光發射元件的技術改良。但由國際聯盟訂定出的規範,以及2011年的21Gbit/s Fiber Channel(20GFC)及未來的28Gbit/s(32GFC)的高傳輸速度技術發展來看,目前的高速罐型光封裝模組的設計必須至少滿足每秒25Gbit/s的傳輸量以上才能符合未來需求,因此,如何就現有的高速罐型光封裝模組的整體結構的限制條件下,設計提高3dB頻寬的傳輸頻率以滿足光通信的需求,仍是學界、業界努力的方向之一。The high-speed can-type optical package module is a light-emitting component that converts a signal into an optical signal and attaches the information to be transmitted to a carrier wave and modulates it, for example, Taiwan No. I227078, Taiwan No. I278944, and the United States. Patent No. 7,075,036, B2, and U.S. Patent No. 7,298,937, B2, all of which are related to the technical improvement of such a light-emitting element. However, due to the specifications set by the League of Nations and the development of the 21Gbit/s Fiber Channel (20GFC) and the future 28Gbit/s (32GFC) high transmission speed technology in 2011, the current high-speed can-type optical package module The design must meet at least 25 Gbit/s per second to meet future demand. Therefore, how to increase the transmission frequency of 3 dB bandwidth to meet the requirements of the existing high-speed can-type optical package module The demand for communication is still one of the directions of the academic and industry efforts.

參閱圖1,現有的高速罐型光封裝模組1包含一座本體11、二圓柱電極12、一基板13、一光發射元件14,及複數電連接線15,用以將電訊號轉為光訊號,並將欲傳輸的資訊附加在載波上並調變後輸出,而為了監測輸出的光訊號,該高速罐型光封裝模組還包含另二圓柱電極16、一光接收元件17,及複數電連接線18。Referring to FIG. 1 , a conventional high-speed can-type optical package module 1 includes a body 11 , two cylindrical electrodes 12 , a substrate 13 , a light emitting element 14 , and a plurality of electrical connecting lines 15 for converting electrical signals into optical signals. And the information to be transmitted is attached to the carrier and modulated and output, and in order to monitor the output optical signal, the high-speed can-type optical package module further includes another cylindrical electrode 16, a light receiving component 17, and a plurality of electric Connection line 18.

該座本體11概呈圓罐形,包括一圓形的第一表面111、一相反於該第一表面111且面積大於該第一表面111的圓形第二表面112、二自該第一表面111向該第二表面112形成的穿孔113,及二自該第一表面111向該第二表面112形成並位於該二穿孔113連線的另一側的訊號穿孔114,其中,該第一表面111的中心與該二穿孔113及該二訊號穿孔114的中心呈二個均以該第一表面111中心為頂點、且頂角為鈍角的等腰三角形。The base body 11 has a circular can shape and includes a circular first surface 111, a circular second surface 112 opposite to the first surface 111 and having a larger area than the first surface 111, and two from the first surface. a through hole 113 formed in the second surface 112, and a signal through hole 114 formed on the other side of the second surface 112 from the first surface 111 and located on the other side of the line connecting the two through holes 113, wherein the first surface The center of the 111 and the two perforations 113 and the center of the two-way perforation 114 are two isosceles triangles whose ends are the apex of the first surface 111 and whose apex angle is an obtuse angle.

該二圓柱電極12分別包括一填置於該座本體11的其中一穿孔113的介電材121,及一與該介電材121共軸地穿設過該介電材121且一端凸伸出該第一表面111的電接腳122;另外二圓柱電極16分別包括一填置於該座本體11的其中一訊號穿孔114的介電材161,及一與該介電材161共軸地穿設過該介電材161且一端凸伸出該第一表面11的電接腳162。The two cylindrical electrodes 12 respectively include a dielectric material 121 filled in one of the through holes 113 of the base body 11 , and a dielectric member 121 is coaxially inserted through the dielectric material 121 and protruded at one end. The first surface 111 of the first surface 111 has an electrical pin 122. The other two cylindrical electrodes 16 respectively include a dielectric material 161 filled in one of the signal holes 114 of the base body 11 and a coaxially inserted with the dielectric material 161. An electrical pin 162 is disposed on the first surface 11 at one end of the dielectric member 161.

該基板13呈長方形並對稱於該二圓柱電極12與另外二圓柱電極16地設置於該第一表面111,包括一遠離該第一表面111的構裝面131,及彼此相對形成在該構裝面131並具有預定電阻值的一第一微帶線21與一第二微帶線22,該第一微帶線21具有一第一矩形部211、一沿平行於該二穿孔113中心連線方向遠離該第一表面111中心延伸的第一扇形部212,及一沿平行於同側之該一穿孔113中心與一訊號穿孔114中心連線方向遠離該第一表面111中心延伸的第二矩形部213,該第二微帶線22具有一長向實質平行於位於同側之該一穿孔113中心與一訊號穿孔114中心連線方向的第三矩形部221,及一自該第三矩形部221的一遠離該第一表面111中心的短邊並呈與該第三矩形部221的一遠離該第一表面111中心的長邊形成長邊重合且往遠離該第一表面111中心方向再延伸的第四矩形部222。The substrate 13 is disposed on the first surface 111 in a rectangular shape and symmetric to the two cylindrical electrodes 12 and the other two cylindrical electrodes 16, and includes a mounting surface 131 away from the first surface 111, and is formed on the mounting surface opposite to each other. And a first microstrip line 21 having a predetermined resistance value and a second microstrip line 22 having a first rectangular portion 211 and a line parallel to the center of the two through holes 113 a first scallop 212 extending away from the center of the first surface 111, and a second rectangular portion extending from a center parallel to the same side of the center of the through hole 113 and a center of the signal through hole 114 away from the center of the first surface 111 213. The second microstrip line 22 has a third rectangular portion 221 whose longitudinal direction is substantially parallel to the center of the one of the through holes 113 on the same side and a direction of the center of the signal through hole 114, and a third rectangular portion 221 from the third rectangular portion 221 a short side away from the center of the first surface 111 and forming a long side with a long side of the third rectangular portion 221 away from the center of the first surface 111 and extending further away from the center of the first surface 111 The fourth rectangular portion 222.

該光發射元件14以該第一表面11中心為中心地設置於該基板13的構裝面131,且向該第一表面11的投影涵蓋該第一微帶線21的第一矩形部211與該第一扇形部212的部分區域,具有預定特性阻抗並經該二圓柱電極12配合提供電訊號時產生預定頻域的單色光訊號,一般而言,該光發射元件14是雷射二極體晶片(LD chip)。The light emitting element 14 is disposed on the mounting surface 131 of the substrate 13 centering on the center of the first surface 11, and the projection toward the first surface 11 covers the first rectangular portion 211 of the first microstrip line 21 and A partial region of the first sector 212 has a predetermined characteristic impedance and generates a monochromatic optical signal of a predetermined frequency domain when the two cylindrical electrodes 12 cooperate to provide an electrical signal. Generally, the light emitting element 14 is a laser diode. LD chip.

該等電連接線15中預定數目的電連接線15分別電連接該光發射元件14與該第一微帶線21的第一扇形部212及該第二微帶線22的第三矩形部221,其它的電連接線15則分別電連接該第一微帶線21的第二矩形部213與該其中之一圓柱電極12的電接腳122,以及該第二微帶線22的第四矩形部222與該其中之另一圓柱電極12的電接腳122。A predetermined number of electrical connection lines 15 in the electrical connection lines 15 electrically connect the light emitting element 14 and the first sector portion 212 of the first microstrip line 21 and the third rectangular portion 221 of the second microstrip line 22, respectively. The other electrical connecting lines 15 are electrically connected to the second rectangular portion 213 of the first microstrip line 21 and the electrical pin 122 of one of the cylindrical electrodes 12, respectively, and the fourth rectangle of the second microstrip line 22. The portion 222 and the electrical pin 122 of the other of the cylindrical electrodes 12.

該光接收元件17設置於該基板13的構裝面131,配合該另二支圓柱電極16輸入電訊號而進一步輸出監測該光發射元件14發出的光訊號的監測訊號,該光接收元件17是監測光二極體晶片(Monitor Photodiode Chip)。該等電連接線18分別電連接該光接收元件17與該二圓柱電極16的電接腳162。The light receiving component 17 is disposed on the mounting surface 131 of the substrate 13, and the electrical signal is input to the other two cylindrical electrodes 16 to further output a monitoring signal for monitoring the optical signal emitted by the light emitting component 14. The light receiving component 17 is Monitor the photodiode chip (Monitor Photodiode Chip). The electrical connection lines 18 are electrically connected to the light receiving elements 17 and the electrical pins 162 of the two cylindrical electrodes 16, respectively.

當自該二圓柱電極12配合對該光發射元件14輸入包含直流電與高頻訊號的電訊號時,該光發射元件14即對應將電訊號轉為光訊號、並將欲傳輸的資訊在光訊號上調變後發出,此時,該第一微帶線21的第一矩形部211與第一扇形部212,及第二微帶線22的第三矩形部221的阻抗匹配於該光發射元件14作動的特性阻抗,且該第一微帶線21的第二矩形部213與第二微帶線22的第四矩形部222產生補償該光發射元件14與電連接線15封裝的耦合電容,維持該高速罐型光封裝模組1整體的頻率響應,而達成預設的操作特性;同時,可自另外二圓柱電極16配合對該光接收元件17輸出包含直流電與高頻訊號的監測用電訊號,令該光接收元件17對應將監測光訊號轉為監測電訊號,從而監測該光發射元件14發出的光訊號。When the two cylindrical electrodes 12 are combined to input a signal including a direct current and a high frequency signal to the light emitting element 14, the light emitting element 14 correspondingly converts the electrical signal into an optical signal, and the information to be transmitted is in the optical signal. After the up-modulation is changed, the impedance of the first rectangular portion 211 of the first microstrip line 21 and the first scalloped portion 212, and the third rectangular portion 221 of the second microstrip line 22 are matched to the light-emitting element 14 Actuating the characteristic impedance, and the second rectangular portion 213 of the first microstrip line 21 and the fourth rectangular portion 222 of the second microstrip line 22 generate a coupling capacitance that compensates for the package of the light emitting element 14 and the electrical connection line 15 to maintain The high-speed tank-type optical package module 1 has a frequency response as a whole, and achieves a preset operational characteristic. At the same time, the monitoring signal for the direct current and the high-frequency signal can be output from the other two cylindrical electrodes 16 to the light-receiving element 17. The light receiving component 17 is configured to monitor the optical signal emitted by the light emitting component 14 by correspondingly converting the monitoring optical signal into a monitoring electrical signal.

目前的高速罐型光封裝模組1雖然可以將電訊號轉換成光訊號發出,但分別接上如圖2所示文獻【Y. Ou,J. S. Gustavsson,P. Westbergh,. Haglund,A. Larsson,and A. Joel,“Impedance Characteristics and Parasitic Speed Limitations of High-Speed 850-nm VCSELs,”IEEE PHOTONICS TECHNOLOGY LETTERS,VOL. 21,NO. 24,DECEMBER 15,2009】的垂直共振腔面射雷射(VCSEL)第一等效電路100,及如圖3所示文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13,NO. 5,SEPTEMBER/OCTOBER 2007】的垂直共振腔面射雷射第二等效電路200而形成用於3dB頻寬的傳輸量的模擬電路時,其3dB頻寬的傳輸功效分別如圖4、圖5所示為14.94GHz與14.92GHz,並不滿足每秒25Gbit/s的傳輸量所需至少大於17GHz的需求,推測是該第一微帶線21與第二微帶線22的型態設計限制了特性阻抗匹配及產生的耦合電容太小之故。Although the current high-speed can-type optical package module 1 can convert electrical signals into optical signals, they are respectively connected to the literature shown in Figure 2 [Y. Ou, JS Gustavsson, P. Westbergh, Haglund, A. Larsson, and A. Joel, "Impedance Characteristics and Parasitic Speed Limitations of High-Speed 850-nm VCSELs," IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 21, NO. 24, DECEMBER 15, 2009] Cavity-faced laser (VCSEL) first equivalent circuit 100, and the literature shown in Figure 3 [Chao-Kun Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom -Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects, "IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER/OCTOBER 2007] Vertical Resonant Cavity Laser Second Equivalent Circuit When an analog circuit for a transmission amount of 3 dB bandwidth is formed by 200, the transmission efficiency of the 3 dB bandwidth is 14.94 GHz and 14.92 GHz as shown in FIG. 4 and FIG. 5, respectively, and does not satisfy the transmission amount of 25 Gbit/s per second. A requirement of at least greater than 17 GHz is required, presumably that the type design of the first microstrip line 21 and the second microstrip line 22 limits characteristic impedance matching and the resulting coupling capacitance is too small.

因此,現有的高速罐型光封裝模組1,特別是關於影響特性阻抗匹配及產生的耦合電容的第一、二微帶線21、22的設計需要加以改善,以滿足光通信的發展需求。Therefore, the design of the existing high-speed can-type optical package module 1, particularly the first and second microstrip lines 21, 22, which affect the characteristic impedance matching and the generated coupling capacitance, needs to be improved to meet the development requirements of optical communication.

因此,本發明的目的,即在提供一種整體外觀結構相同於現有的高速罐型光封裝模組,且滿足每秒25Gbit/s的傳輸量至少大於17GHz的需求的對稱型電容補償式高速罐型光封裝模組。Therefore, the object of the present invention is to provide a symmetric capacitor-compensated high-speed tank type having the same overall appearance structure as the existing high-speed tank type optical package module and satisfying the requirement that the transmission amount of 25 Gbit/s per second is at least greater than 17 GHz. Optical package module.

於是,本發明一種對稱型電容補償式高速罐型光封裝模組包含一座本體、二圓柱電極、一基板、一光發射元件,及複數電連接線。Therefore, the symmetrical capacitor-compensated high-speed can-type optical package module comprises a body, two cylindrical electrodes, a substrate, a light-emitting element, and a plurality of electrical connecting lines.

該座本體包括一第一表面、一相反於該第一表面的第二表面,及二自該第一表面向該第二表面形成的穿孔,其中,該第一表面的中心與該二穿孔的中心呈以該第一表面的中心為頂點的等腰三角形。The base body includes a first surface, a second surface opposite to the first surface, and two perforations formed from the first surface toward the second surface, wherein a center of the first surface and the two perforations The center is an isosceles triangle with the center of the first surface as a vertex.

每一圓柱電極包括一填置於該座本體的其中一穿孔的介電材,及一與該介電材共軸穿設過該介電材的電接腳。Each of the cylindrical electrodes includes a dielectric material filled in one of the perforations of the body, and an electrical pin that is coaxially passed through the dielectric material.

該基板對稱於該二圓柱電極地設置於該第一表面,包括一遠離該第一表面的構裝面,及二彼此相對形成在該構裝面並具有預定阻抗值的對稱微帶線,每一對稱微帶線具有一較靠近該第一表面中心的第一矩形部,及一與該第一矩形部的一遠離該第一表面中心的長邊形成長邊重合且自該第一矩形部的一短邊往遠離該第一表面中心方向延伸的第二矩形部,其中,該二對稱微帶線的第一矩形部較靠近該第一表面中心的長邊的間距大於第二矩形部較靠近該第一表面中心的長邊的間距,並令該二對稱微帶線的第二矩形部形成補償耦合電容。The substrate is disposed on the first surface symmetrically to the two cylindrical electrodes, including a mounting surface away from the first surface, and two symmetric microstrip lines formed on the mounting surface opposite each other and having a predetermined impedance value, each The symmetric microstrip line has a first rectangular portion closer to the center of the first surface, and a long side of the first rectangular portion that is away from the center of the first surface forms a long side and is coincident with the first rectangular portion a short side of the second rectangular portion extending away from the center of the first surface, wherein the first rectangular portion of the two symmetric microstrip lines is closer to a longer side than the second side of the first surface than the second rectangular portion The distance between the long sides of the center of the first surface, and the second rectangular portion of the two symmetric microstrip lines form a compensation coupling capacitance.

該光發射元件以該第一表面的中心為中心而設置於該基板的構裝面並在提供電訊號時產生預定頻域的單色光訊號,且特性阻抗與該二對稱微帶線的第一矩形部的阻抗相匹配。The light emitting element is disposed on the mounting surface of the substrate centered on the center of the first surface and generates a monochromatic optical signal of a predetermined frequency domain when the electrical signal is supplied, and the characteristic impedance and the second symmetric microstrip line The impedance of a rectangular portion matches.

預定數目電連接線分別電連接該光發射元件與該二對稱微帶線的第一矩形部,其它的電連接線分別電連接該二對稱微帶線的第二矩形部與該二圓柱電極的電接腳。a predetermined number of electrical connection lines electrically connecting the light emitting element and the first rectangular portion of the two symmetric microstrip lines, respectively, and the other electrical connection lines electrically connecting the second rectangular portion of the two symmetric microstrip lines and the two cylindrical electrodes respectively Electric pin.

本發明的目的及解決其技術問題還可採用於下技術措施進一步實現。The object of the present invention and solving the technical problems thereof can also be further implemented by the following technical measures.

較佳的,該座本體的第一表面是圓形。Preferably, the first surface of the seat body is circular.

較佳的,該第一表面的中心與該二穿孔的中心呈以該第一表面的中心為頂點且頂角為鈍角的等腰三角形。Preferably, the center of the first surface and the center of the two perforations are isosceles triangles with the center of the first surface as a vertex and the vertex angle as an obtuse angle.

較佳的,該光發射元件向該第一表面的投影涵蓋該二微帶線的第一矩形部的部分區域。Preferably, the projection of the light-emitting element toward the first surface covers a partial region of the first rectangular portion of the two microstrip lines.

較佳的,該座本體的第二表面是大於該第一表面的圓形。Preferably, the second surface of the seat body is circular rather than the first surface.

較佳的,該座本體還包括二自該第一表面向該第二表面形成並位於該二穿孔連線的另一側的訊號穿孔,其中,該第一表面的中心與該二訊號穿孔的中心呈以該第一表面的中心為頂點的等腰三角形;該對稱型電容補償式高速罐型光封裝模組還包含二分別設置於該訊號穿孔內的圓柱電極、一設置於該基板的構裝面的光接收元件,及複數電連接線,該二圓柱電極分別包括一填置於該其中一訊號穿孔的介電材,及一與該介電材共軸地穿設過該介電材的電接腳,該等電連接線電連接該光接收元件與該二電接腳。Preferably, the base body further includes two signal perforations formed from the first surface toward the second surface and located on the other side of the two perforation lines, wherein the center of the first surface and the two signals are perforated The center is an isosceles triangle having a vertex of the center of the first surface; the symmetric capacitor-compensated high-speed can-type optical package module further includes two cylindrical electrodes respectively disposed in the signal perforations, and a structure disposed on the substrate a light receiving component and a plurality of electrical connecting wires respectively, wherein the two cylindrical electrodes respectively comprise a dielectric material filled in the one of the signal holes, and a dielectric material is coaxially passed through the dielectric material The electrical pins are electrically connected to the light receiving component and the two electrical pins.

本發明的功效在於:在維持整體外觀結構與現有的高速罐型光封裝模組完全一致的前提下,設計基板具有二概呈L形且彼此鏡像相對間隔設置的對稱微帶線,並令該二對稱微帶線的第一矩形部的阻抗與光發射元件相匹配、第二矩形部形成補償耦合電容,而使封裝模組的3dB頻寬的傳輸功效滿足每秒25Gbit/s的傳輸量至少大於17GHz的需求。The utility model has the advantages that: the design substrate has two symmetrical microstrip lines which are arranged in an L shape and are mirrored at a distance from each other, while maintaining the overall appearance structure and the existing high-speed can-type optical package module. The impedance of the first rectangular portion of the second symmetric microstrip line is matched with the light emitting element, and the second rectangular portion forms a compensation coupling capacitor, so that the transmission efficiency of the 3dB bandwidth of the package module satisfies at least 25 Gbit/s transmission per second. More than 17GHz demand.

有關本發明的前述及其他技術內容、特點與功效,在以下配合參考圖式的一個較佳實施例的詳細說明中,將可清楚的呈現。The foregoing and other technical aspects, features and advantages of the present invention will be apparent from the following description of the preferred embodiments.

在本發明被詳細描述之前,要注意的是,在以下的說明內容中,類似的元件是以相同的編號來表示。Before the present invention is described in detail, it is noted that in the following description, similar elements are denoted by the same reference numerals.

參閱圖6,本發明對稱型電容補償式高速罐型光封裝模組2的一較佳實施例包含一座本體11、二圓柱電極12、一基板13、一光發射元件14,及複數電連接線15,用以將電訊號轉為光訊號,並將欲傳輸的資訊附加在載波上並調變後輸出,而為了監測輸出的光訊號,該對稱性電容補償式高速罐型光封裝模組2的較佳實施例還包含另二圓柱電極16、一光接收元件17,及複數電連接線18。Referring to FIG. 6, a preferred embodiment of the symmetric capacitor-compensated high-speed can-type optical package module 2 includes a body 11, two cylindrical electrodes 12, a substrate 13, a light-emitting element 14, and a plurality of electrical connections. 15. The electrical symbol is converted into an optical signal, and the information to be transmitted is attached to the carrier and modulated, and then outputted. To monitor the output optical signal, the symmetric capacitive compensation high-speed can-type optical package module 2 The preferred embodiment further includes a second cylindrical electrode 16, a light receiving element 17, and a plurality of electrical connections 18.

該座本體11概呈圓罐形,包括一圓形的第一表面111、一相反於該第一表面111且面積大於該第一表面111的圓形第二表面112、二自該第一表面111向該第二表面112形成的穿孔113,及二自該第一表面111向該第二表面112形成並位於該二穿孔113連線的另一側的訊號穿孔114,其中,該第一表面111的中心與該二穿孔113及該二訊號穿孔114的中心呈二個均以該第一表面111中心為頂點、且頂角為鈍角的等腰三角形。The base body 11 has a circular can shape and includes a circular first surface 111, a circular second surface 112 opposite to the first surface 111 and having a larger area than the first surface 111, and two from the first surface. a through hole 113 formed in the second surface 112, and a signal through hole 114 formed on the other side of the second surface 112 from the first surface 111 and located on the other side of the line connecting the two through holes 113, wherein the first surface The center of the 111 and the two perforations 113 and the center of the two-way perforation 114 are two isosceles triangles whose ends are the apex of the first surface 111 and whose apex angle is an obtuse angle.

該二圓柱電極12分別包括一填置於該座本體11的其中一穿孔113的介電材121,及一與該介電材121共軸地穿設過該介電材121且一端凸伸出該第一表面111的電接腳122;該另二圓柱電極16分別包括一填置於該座本體11的其中一訊號穿孔114的介電材161,及一與該介電材161共軸地穿設過該介電材161且一端凸伸出該第一表面111的電接腳162。The two cylindrical electrodes 12 respectively include a dielectric material 121 filled in one of the through holes 113 of the base body 11 , and a dielectric member 121 is coaxially inserted through the dielectric material 121 and protruded at one end. The electrical pins 122 of the first surface 111; the other two cylindrical electrodes 16 respectively include a dielectric material 161 filled in one of the signal holes 114 of the base body 11 and coaxially with the dielectric material 161 An electrical pin 162 is formed through the dielectric member 161 and has an end protruding from the first surface 111.

該基板13呈長方形並對稱於該二圓柱電極12與另外二圓柱電極16地設置於該第一表面111,包括一遠離該第一表面111的構裝面131,及二彼此相對形成在該構裝面131並具有預定阻抗值的對稱微帶線3,該二對稱微帶線3概呈彼此鏡像相對的L形,分別具有一較靠近該第一表面111中心的第一矩形部31,及一與該第一矩形部31的一遠離該第一表面111中心的長邊形成長邊重合且自該第一矩形部31的一短邊往遠離該第一表面111中心方向延伸的第二矩形部32,其中,該二對稱微帶線3的第一矩形部31較靠近該第一表面111中心的長邊的間距大於第二矩形部32較靠近該第一表面111中心的長邊的間距,而於作動時令該二對稱微帶線3的第二矩形部32形成補償耦合電容。The substrate 13 is disposed on the first surface 111 in a rectangular shape and symmetrically opposite to the two cylindrical electrodes 12 and the other two cylindrical electrodes 16, and includes a mounting surface 131 away from the first surface 111, and two opposite to each other are formed in the structure. The surface 131 has a symmetrical microstrip line 3 having a predetermined impedance value, and the two symmetrical microstrip lines 3 are substantially L-shaped mirror images of each other, respectively having a first rectangular portion 31 closer to the center of the first surface 111, and a A long side of the first rectangular portion 31 away from the center of the first surface 111 forms a long side and a second rectangular portion extending from a short side of the first rectangular portion 31 away from the center of the first surface 111 32, wherein a distance between a first side of the first rectangular portion 31 of the two symmetric microstrip lines 3 and a long side of the center of the first surface 111 is greater than a distance between the long sides of the second rectangular portion 32 that is closer to the center of the first surface 111, At the time of actuation, the second rectangular portion 32 of the two symmetric microstrip lines 3 forms a compensation coupling capacitance.

該光發射元件14以該第一表面111的中心為中心而設置於該基板13的構裝面131,且向該第一表面11的投影等面積地涵蓋該二對稱微帶線3的第一矩形部31的部分區域,該光發射元件14具有預定特性阻抗並經該二圓柱電極12配合提供電訊號時產生預定頻域的單色光訊號;在本例中,該光發射元件14亦是雷射二極體晶片(LD chip)。The light-emitting element 14 is disposed on the mounting surface 131 of the substrate 13 centering on the center of the first surface 111, and the first projection of the first surface 11 covers the first of the two symmetric microstrip lines 3 a portion of the rectangular portion 31, the light-emitting element 14 has a predetermined characteristic impedance and generates a monochromatic optical signal of a predetermined frequency domain when the two cylindrical electrodes 12 cooperate to provide an electrical signal; in this example, the light-emitting element 14 is also Laser diode chip (LD chip).

該等電連接線15中預定數目的電連接線15分別電連接該光發射元件14與該二對稱微帶線3的第一矩形部31,其它的電連接線15則分別電連接該二對稱微帶線3的第二矩形部32與該二圓柱電極12的電接腳122。A predetermined number of electrical connection lines 15 in the electrical connection lines 15 are electrically connected to the light emitting element 14 and the first rectangular portion 31 of the two symmetric microstrip lines 3, respectively, and the other electrical connection lines 15 are electrically connected to the two symmetric lines, respectively. The second rectangular portion 32 of the microstrip line 3 and the electrical pin 122 of the two cylindrical electrodes 12.

該光接收元件17設置於該基板13的構裝面131,配合該等圓柱電極16輸入電訊號而進一步輸出監測該光發射元件14發出的光訊號的監測光訊號,該光接收元件17是監測光二極體晶片(Monitor Photodiode Chip),該等電連接線18分別電連接該光接收元件17與該二圓柱電極16的電接腳162。The light receiving component 17 is disposed on the mounting surface 131 of the substrate 13, and the electrical signal is input to the cylindrical electrode 16 to further output a monitoring optical signal for monitoring the optical signal emitted by the light emitting component 14. The light receiving component 17 is monitored. The photodiode chips 18 electrically connect the light receiving element 17 and the electrical pins 162 of the two cylindrical electrodes 16, respectively.

當自該二圓柱電極12配合對該光發射元件14輸入包含直流電與高頻訊號的電訊號時,該光發射元件14即對應將電訊號轉為光訊號,並將欲傳輸的資訊在光訊號上調變後發出,此時,該二對稱微帶線3的第一矩形部31的阻抗匹配於該光發射元件14的特性阻抗,以及該二對稱微帶線3的第二矩形部32產生補償該光發射元件14與電連接線15封裝的耦合電容,維持該對稱型電容補償式高速罐型光封裝模組2整體的高頻響應,而達成預設的高速操作特性;同時,可自另外二圓柱電極16配合對該光接收元件17輸入包含直流電與高頻訊號的監測用電訊號,令該光接收元件17對應將監測用電訊號轉為監測光訊號,從而監測該光發射元件14發出的光訊號。When the two cylindrical electrodes 12 are combined to input an electric signal including a direct current and a high frequency signal to the light emitting element 14, the light emitting element 14 correspondingly converts the electrical signal into an optical signal, and the information to be transmitted is in the optical signal. After the up-modulation is changed, the impedance of the first rectangular portion 31 of the two-symmetric microstrip line 3 matches the characteristic impedance of the light-emitting element 14, and the second rectangular portion 32 of the two-symmetric microstrip line 3 generates compensation. The coupling capacitance of the light emitting element 14 and the electrical connection line 15 maintains the high frequency response of the symmetrical capacitive compensation type high speed can type optical package module 2, thereby achieving preset high speed operation characteristics; The two cylindrical electrodes 16 cooperate with the input of the monitoring electric signal including the direct current and the high frequency signal to the light receiving element 17, so that the light receiving element 17 converts the monitoring electrical signal into the monitoring optical signal, thereby monitoring the light emitting element 14 to emit Optical signal.

以該二對稱微帶線3的第一矩形部31的長、寬分別是0.3647mm、0.2937mm,第二矩形部32的長、寬分別是0.7153mm、0.4223mm,該二對稱微帶線3的第二矩形部32較靠近該第一表面111中心的長邊的間距是0.02mm,該二對稱微帶線3的第一矩形部31較靠近該第一表面111中心的長邊的間距是0.2972mm為實驗樣品,分別接上如圖2所示文獻的垂直共振腔面射雷射(VCSEL)第一等效電路100,及如圖3所示文獻的垂直共振腔面射雷射第二等效電路200而形成用於量測3dB頻寬的傳輸量的模擬電路時,其3dB頻寬的傳輸功效分別如圖7、圖8所示為21.37GHz與17.64GHz,確實滿足每秒25Gbit/s的傳輸量所需至少大於17GHz的需求。The length and width of the first rectangular portion 31 of the two-symmetric microstrip line 3 are 0.3647 mm and 0.2937 mm, respectively, and the length and width of the second rectangular portion 32 are 0.7153 mm and 0.4223 mm, respectively. The two symmetric microstrip lines 3 are respectively The pitch of the second rectangular portion 32 closer to the long side of the center of the first surface 111 is 0.02 mm, and the pitch of the first rectangular portion 31 of the second symmetric microstrip line 3 closer to the center of the center of the first surface 111 is 0.2972mm is the experimental sample, respectively connected to the vertical cavity surface laser (VCSEL) first equivalent circuit 100 of the literature shown in Figure 2, and the vertical cavity surface laser of the literature shown in Figure 3 When the equivalent circuit 200 forms an analog circuit for measuring the transmission amount of the 3 dB bandwidth, the transmission efficiency of the 3 dB bandwidth is 21.37 GHz and 17.64 GHz as shown in FIG. 7 and FIG. 8, respectively, and does satisfy 25 Gbit/s/per. The amount of transmission of s needs to be at least greater than the requirement of 17 GHz.

參閱圖9、圖10、圖11、圖12,圖9是如圖1所示的現有的高速罐型光封裝模組接上第二等效電路200並在負載50Ω、21Gb/s的眼圖模擬結果(以ADS(Advanced Design System)搭配HFSS(High Frequency Structure Simulator)進行分析),圖10、圖11、圖12分別是上述本發明的實驗樣品接上第二等效電路200並在負載50Ω且分別為21Gbit/s、25Gbit/s、28Gbit/s的眼圖模擬結果(同樣以ADS搭配HFSS進行分析),由圖中可知在21Gbit/s的眼圖表現結果採用本發明對稱性電容補償式高速罐型光封裝模組2已改善許多,而在25Gbit/s、28Gbit/s的眼圖表現一樣清晰可見。Referring to FIG. 9 , FIG. 10 , FIG. 11 and FIG. 12 , FIG. 9 is an eye diagram of the conventional high-speed can-type optical package module shown in FIG. 1 connected to the second equivalent circuit 200 and carrying 50 Ω and 21 Gb/s. The simulation results (analyzed by ADS (Advanced Design System) with HFSS (High Frequency Structure Simulator)), FIG. 10, FIG. 11, and FIG. 12 are respectively the experimental samples of the present invention described above connected to the second equivalent circuit 200 and loaded at 50 Ω. And the eye diagram simulation results of 21Gbit/s, 25Gbit/s, and 28Gbit/s respectively (also analyzed by ADS with HFSS). It can be seen from the figure that the eye diagram performance at 21 Gbit/s uses the symmetric capacitance compensation method of the present invention. The high-speed can-type optical package module 2 has been improved a lot, and the eye diagram performance at 25 Gbit/s and 28 Gbit/s is as clear as visible.

由上述實驗樣品的模擬電路量測結果以及眼圖模擬結果,可確實證明本發明對稱型電容補償式高速罐型光封裝模組2在外觀形態完全一致的限制條件下,藉由二概呈L形鏡像相對的對稱微帶線3的設計,限制特性阻抗匹配及產生的耦合電容,而有效改善目前的高速罐型光封裝模組於3dB頻寬的傳輸功效,而達到滿足每秒25Gbit/s的傳輸量大於17GHz的光發射元件發展需求。From the analog circuit measurement results and the eye diagram simulation results of the above experimental samples, it can be confirmed that the symmetric capacitor-compensated high-speed can-type optical package module 2 of the present invention has a uniform appearance and a uniform condition. The design of the mirror-shaped symmetric microstrip line 3 limits the characteristic impedance matching and the coupling capacitance generated, and effectively improves the transmission efficiency of the current high-speed can-type optical package module in 3dB bandwidth, and achieves 25Gbit/s per second. The transmission capacity is greater than the development requirements of light-emitting components of 17 GHz.

綜上所述,本發明對稱型電容補償式高速罐型光封裝模組2是在不更動現有的高速罐型光封裝模組的外觀形態的限制條件下,藉著二概呈L形且鏡像相對設置的對稱微帶線3的第一矩形部31的阻值與光發射元件14的特性阻抗相匹配,以及第二矩形部32產生的耦合電容對光發射元件14與電連接線15等封裝組件頻率補償,達到滿足每秒25Gbit/s的傳輸量大於17GHz的需求,而維持高頻響應、達成高速操作特性,確實能達成本發明的目的。In summary, the symmetrical capacitor-compensated high-speed can-type optical package module 2 of the present invention is L-shaped and mirrored by not restricting the appearance of the existing high-speed can-type optical package module. The resistance of the first rectangular portion 31 of the symmetric microstrip line 3 disposed oppositely matches the characteristic impedance of the light-emitting element 14, and the coupling capacitance generated by the second rectangular portion 32 is encapsulated with respect to the light-emitting element 14 and the electrical connection line 15. Component frequency compensation achieves the requirement of satisfying a transmission capacity of 25 Gbit/s per second greater than 17 GHz, while maintaining high frequency response and achieving high speed operation characteristics, the object of the present invention can be achieved.

惟以上所述者,僅為本發明的較佳實施例而已,當不能以此限定本發明實施的範圍,即大凡依本發明申請專利範圍及發明說明內容所作的簡單的等效變化與修飾,皆仍屬本發明專利涵蓋的範圍內。However, the above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention, All remain within the scope of the invention patent.

131‧‧‧構裝面131‧‧‧ Construction surface

2‧‧‧對稱型電容補償式高速罐型光封裝模組2‧‧‧Symmetric type capacitor compensation type high speed tank type optical package module

14‧‧‧光發射元件14‧‧‧Light emitting elements

15‧‧‧電連接線15‧‧‧Electrical cable

11‧‧‧座本體11‧‧‧

16‧‧‧圓柱電極16‧‧‧Cylindrical electrode

111‧‧‧第一表面111‧‧‧ first surface

161‧‧‧介電材161‧‧‧ dielectric materials

112‧‧‧第二表面112‧‧‧ second surface

162‧‧‧電接腳162‧‧‧Electric pins

113‧‧‧穿孔113‧‧‧Perforation

17‧‧‧光接收元件17‧‧‧Light receiving components

114‧‧‧訊號穿孔114‧‧‧ Signal piercing

18‧‧‧電連接線18‧‧‧Electrical cable

12‧‧‧圓柱電極12‧‧‧Cylindrical electrode

3‧‧‧對稱微帶線3‧‧‧Symmetric microstrip line

121‧‧‧介電材121‧‧‧ dielectric materials

31‧‧‧第一矩形部31‧‧‧First rectangular part

122‧‧‧電接腳122‧‧‧Electric pins

32‧‧‧第二矩形部32‧‧‧Second rectangular part

13‧‧‧基板13‧‧‧Substrate

圖1是一示意圖,說明現有的高速罐型光封裝模組;1 is a schematic view showing a conventional high speed can type optical package module;

圖2是一電路圖,說明現有的高速罐型光封裝模組接上文獻【Y. Ou,J. S. Gustavsson,P. Westbergh,. Haglund,A. Larsson,and A. Joel,“Impedance Characteristics and Parasitic Speed Limitations of High-Speed 850-nm VCSELs,”IEEE PHOTONICS TECHNOLOGY LETTERS,VOL. 21,NO. 24,DECEMBER 15,2009】提供的第一等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路;Figure 2 is a circuit diagram showing the existing high-speed can-type optical package module attached to the literature [Y. Ou, JS Gustavsson, P. Westbergh, Haglund, A. Larsson, and A. Joel, "Impedance Characteristics and Parasitic Speed Limitations of High-Speed 850-nm VCSELs," IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 21, NO. 24, DECEMBER 15, 2009] An equivalent circuit to form an analog circuit for measuring a transmission amount of 3 dB bandwidth;

圖3是一電路圖,說明現有的高速罐型光封裝模組接上文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13,NO. 5,SEPTEMBER/OCTOBER 2007】提供的第二等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路;Figure 3 is a circuit diagram showing the existing high-speed can-type optical package module attached to the literature [Chao-Kun Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects, "IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER/OCTOBER 2007] provides a second equivalent circuit for measuring 3dB bandwidth Analog circuit of the amount of transmission;

圖4是一嵌入損失(insertion loss)與頻率(frequency)的關係圖,說明圖2所示的模擬電路於3dB頻寬的傳輸量表現;4 is a relationship between an insertion loss and a frequency, illustrating the performance of the analog circuit shown in FIG. 2 at a bandwidth of 3 dB;

圖5是一嵌入損耗(insertion loss)與頻率(frequency)的關係圖,說明圖3所示的模擬電路於3dB頻寬的傳輸量表現;5 is a relationship between insertion loss and frequency, illustrating the performance of the analog circuit shown in FIG. 3 at a bandwidth of 3 dB;

圖6是一示意圖,說明本發明對稱型電容補償式高速罐型光封裝模組的一較佳實施例;6 is a schematic view showing a preferred embodiment of a symmetric capacitance compensation type high speed can type optical package module of the present invention;

圖7是一嵌入損失(insertion loss)與頻率(frequency)的關係圖,說明圖6所示本發明對稱型電容補償式高速罐型光封裝模組的較佳實施例接上文獻【Y. Ou,J. S. Gustavsson,P. Westbergh,. Haglund,A. Larsson,and A. Joel,“Impedance Characteristics and Parasitic Speed Limitations of High-Speed 850-nm VCSELs,”IEEE PHOTONICS TECHNOLOGY LETTERS,VOL. 21,NO. 24,DECEMBER 15,2009】提供的第一等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路時於3dB頻寬的傳輸量表現;7 is a relationship diagram of insertion loss and frequency, illustrating a preferred embodiment of the symmetrical capacitor-compensated high-speed can-type optical package module of the present invention shown in FIG. 6. [Y. Ou , JS Gustavsson, P. Westbergh, Haglund, A. Larsson, and A. Joel, "Impedance Characteristics and Parasitic Speed Limitations of High-Speed 850-nm VCSELs," IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 21, NO. 24, DECEMBER 15, 2009] An equivalent circuit forms an analog circuit for measuring a transmission amount of 3 dB bandwidth when expressed in a transmission amount of 3 dB bandwidth;

圖8是一嵌入損失(insertion loss)與頻率(frequency)的關係圖,說明圖6所示本發明對稱型電容補償式高速罐型光封裝模組的較佳實施例接上文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13,NO. 5,SEPTEMBER/OCTOBER 2007】提供的第二等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路時於3dB頻寬的傳輸量表現;FIG. 8 is a diagram showing the relationship between the insertion loss and the frequency, and illustrating a preferred embodiment of the symmetrical capacitor-compensated high-speed can-type optical package module of the present invention shown in FIG. 6 [Chao-Kun] Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER / OCTOBER 2007] provides a second equivalent circuit to form an analog circuit for measuring a transmission amount of 3 dB bandwidth when the transmission amount is expressed in 3 dB bandwidth;

圖9是一模擬測試結果圖,說明現有的高速罐型光封裝模組接上文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13,NO. 5,SEPTEMBER/OCTOBER 2007】提供的第二等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路在負載50Ω、21Gbit/s的眼圖訊號;Figure 9 is a simulation test result diagram showing the existing high-speed can-type optical package module attached to the literature [Chao-Kun Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom -Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects, "IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER/OCTOBER 2007] provided a second equivalent circuit for measurement An analog circuit with a transmission bandwidth of 3 dB bandwidth is loaded with an eye diagram signal of 50 Ω and 21 Gbit/s;

圖10是一模擬測試結果圖,說明本發明對稱型電容補償式高速罐型光封裝模組的較佳實施例接上文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13,NO. 5,SEPTEMBER/OCTOBER 2007】提供的第二等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路在負載50Ω、21Gbit/s的眼圖訊號;Figure 10 is a simulation test result diagram illustrating a preferred embodiment of the symmetric capacitance-compensated high-speed can-type optical package module of the present invention. [Chao-Kun Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER/OCTOBER 2007] The second equivalent circuit forms an eye diagram signal for measuring 50 Ω, 21 Gbit/s of the analog circuit for measuring the transmission amount of the 3 dB bandwidth;

圖11是一模擬測試結果圖,說明本發明對稱型電容補償式高速罐型光封裝模組的較佳實施例接上文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13, NO. 5,SEPTEMBER/OCTOBER 2007】提供的第二等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路在負載50Ω、25Gbit/s的眼圖訊號;及Figure 11 is a simulation test result diagram illustrating a preferred embodiment of the symmetrical capacitor-compensated high-speed can-type optical package module of the present invention. [Chao-Kun Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER/OCTOBER 2007] The second equivalent circuit forms an eye diagram signal for measuring the transmission amount of the 3 dB bandwidth at a load of 50 Ω and 25 Gbit/s;

圖12是一模擬測試結果圖,說明本發明對稱型電容補償式高速罐型光封裝模組的較佳實施例接上文獻【Chao-Kun Lin,Ashish Tandon,Kostadin Djordjev,Scott W. Corzine,and Michael R. T. Tan“High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects,”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL. 13,NO. 5,SEPTEMBER/OCTOBER 2007】提供的第二等效電路而形成用於量測3dB頻寬的傳輸量的模擬電路在負載50Ω、28Gbit/s的眼圖訊號。Figure 12 is a simulation test result diagram illustrating a preferred embodiment of the symmetric capacitance-compensated high-speed can-type optical package module of the present invention. [Chao-Kun Lin, Ashish Tandon, Kostadin Djordjev, Scott W. Corzine, and Michael RT Tan "High-Speed 985 nm Bottom-Emitting VCSEL Arrays for Chip-to-Chip Parallel Optical Interconnects," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 13, NO. 5, SEPTEMBER/OCTOBER 2007] The second equivalent circuit forms an eye diagram signal for measuring 50 Ω, 28 Gbit/s of the analog circuit for measuring the transmission amount of the 3 dB bandwidth.

11...座本體11. . . Seat body

111...第一表面111. . . First surface

112...第二表面112. . . Second surface

113...穿孔113. . . perforation

114...訊號穿孔114. . . Signal perforation

12...圓柱電極12. . . Cylindrical electrode

121...介電材121. . . Dielectric material

122...電接腳122. . . Electric pin

13...基板13. . . Substrate

131...構裝面131. . . Construction surface

14...光發射元件14. . . Light emitting element

15...電連接線15. . . Electrical cable

16...圓柱電極16. . . Cylindrical electrode

161...介電材161. . . Dielectric material

162...電接腳162. . . Electric pin

17...光接收元件17. . . Light receiving element

18...電連接線18. . . Electrical cable

2...對稱型電容補償式高速罐型光封裝模組2. . . Symmetrical Capacitor Compensation High Speed Can Optical Package Module

3...對稱微帶線3. . . Symmetric microstrip line

31...第一矩形部31. . . First rectangle

32...第二矩形部32. . . Second rectangular part

Claims (5)

一種對稱性電容補償式高速罐型光封裝模組,包含:一座本體,包括一第一表面、一相反於該第一表面的第二表面,及二自該第一表面向該第二表面形成的穿孔,其中,該第一表面的中心與該二穿孔的中心呈以該第一表面的中心為頂點的等腰三角形;二圓柱電極,每一圓柱電極包括一填置於該座本體的其中一穿孔的介電材,及一與該介電材共軸地穿設過該介電材的電接腳;一基板,對稱於該二圓柱電極地設置於該第一表面,包括一遠離該第一表面的構裝面,及二彼此相對形成在該構裝面並具有預定阻抗值的對稱微帶線,每一對稱微帶線具有一較靠近該第一表面中心的第一矩形部,及一與該第一矩形部的一遠離該第一表面中心的長邊形成長邊重合且自該第一矩形部的一短邊往遠離該第一表面中心方向延伸的第二矩形部,其中,該二對稱微帶線的第一矩形部較靠近該第一表面中心的長邊的間距大於第二矩形部較靠近該第一表面中心的長邊的間距,並令該二對稱微帶線的第二矩形部形成補償耦合電容;一光發射元件,以該第一表面的中心為中心而設置於該基板的構裝面並在提供電訊號時產生預定頻域的單色光訊號,且特性阻抗與該二對稱微帶線的第一矩形部的阻抗相匹配,其中,該光發射元件向該第一表面的投影涵蓋該二對稱微帶線的第一矩形部的部分區域;及 複數電連接線,預定數目的電連接線分別電連接該光發射元件與該二對稱微帶線的第一矩形部,其它的電連接線分別電連接該二對稱微帶線的第二矩形部與該二圓柱電極的電接腳。 A symmetrical capacitance-compensated high-speed can-type optical package module comprising: a body comprising a first surface, a second surface opposite to the first surface, and two from the first surface to the second surface a perforation, wherein a center of the first surface and a center of the two perforations are an isosceles triangle having a vertex at a center of the first surface; and two cylindrical electrodes each including a filling body of the seat body a perforated dielectric material, and an electrical pin coaxially penetrating the dielectric material with the dielectric material; a substrate disposed symmetrically to the first cylindrical surface on the first surface, including a distance away from the dielectric a mounting surface of the first surface, and two symmetric microstrip lines formed on the mounting surface opposite to each other and having a predetermined impedance value, each symmetric microstrip line having a first rectangular portion closer to a center of the first surface, and a second rectangular portion extending from a short side of the first rectangular portion and extending from a short side of the first rectangular portion toward a center of the first surface, wherein a long side of the first rectangular portion away from the center of the first surface forms a long side The first of the two symmetric microstrip lines The distance between the long side of the shape closer to the center of the first surface is greater than the distance of the long side of the second rectangular portion closer to the center of the first surface, and the second rectangular portion of the second symmetric microstrip line forms a compensation coupling capacitance; a light emitting element is disposed on a mounting surface of the substrate centered on a center of the first surface and generates a monochromatic optical signal of a predetermined frequency domain when the electrical signal is supplied, and the characteristic impedance and the second symmetric microstrip line The impedance of the first rectangular portion is matched, wherein the projection of the light emitting element toward the first surface covers a partial region of the first rectangular portion of the two symmetric microstrip lines; a plurality of electrical connecting lines, wherein the predetermined number of electrical connecting lines are electrically connected to the first rectangular portion of the light emitting element and the two symmetric microstrip lines, and the other electrical connecting lines are electrically connected to the second rectangular portion of the two symmetric microstrip lines respectively An electrical pin with the two cylindrical electrodes. 根據申請專利範圍第1項所述的對稱型電容補償式高速罐型光封裝模組,其中,該座本體的第一表面是圓形。 The symmetrical capacitor-compensated high-speed can-type optical package module according to claim 1, wherein the first surface of the body is circular. 根據申請專利範圍第2項所述的對稱型電容補償式高速罐型光封裝模組,其中,該第一表面的中心與該二穿孔的中心呈以該第一表面的中心為頂點且頂角為鈍角的等腰三角形。 The symmetrical capacitor-compensated high-speed can-type optical package module according to claim 2, wherein a center of the first surface and a center of the two perforations are vertices at a center of the first surface and a vertex angle An isosceles triangle with an obtuse angle. 根據申請專利範圍第3項所述的對稱型電容補償式高速罐型光封裝模組,其中,該座本體的第二表面是大於該第一表面的圓形。 The symmetrical capacitor-compensated high-speed can-type optical package module according to claim 3, wherein the second surface of the body is larger than the first surface. 根據申請專利範圍第4項所述的對稱型電容補償式高速罐型光封裝模組,其中,該座本體還包括二自該第一表面向該第二表面形成並位於該二穿孔連線的另一側的訊號穿孔,其中,該第一表面的中心與該二訊號穿孔的中心呈以該第一表面的中心為頂點的等腰三角形;該對稱性電容補償式高速罐型光封裝模組還包含二分別設置於該訊號穿孔內的圓柱電極、一設置於該基板的構裝面的光接收元件,及複數電連接線,該二圓柱電極分別包括一填置於該其中一訊號穿孔的介電材,及一與該介電材共軸地穿設過該介電材的電接腳,該等電連接線電連接該光接收元件與該二電接腳。The symmetrical capacitor-compensated high-speed can-type optical package module according to the fourth aspect of the invention, wherein the base body further comprises two from the first surface to the second surface and located on the two perforated wires. The other side of the signal is perforated, wherein the center of the first surface and the center of the second signal perforation are an isosceles triangle with a vertex of the center of the first surface; the symmetric capacitance compensation type high speed tank type optical package module The method further includes two cylindrical electrodes respectively disposed in the signal perforations, a light receiving component disposed on the mounting surface of the substrate, and a plurality of electrical connecting wires, wherein the two cylindrical electrodes respectively include a filling of the one of the signal holes a dielectric material, and an electrical pin coaxially passing through the dielectric material, the electrical connection wires electrically connecting the light receiving component and the two electrical pins.
TW101114892A 2012-04-26 2012-04-26 A high-speed to-can optical package module using symmetrical pattern and capacitive compensation technology TWI464813B (en)

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