TWI464783B - A semiconductor nanostructure and the forming method thereof - Google Patents

A semiconductor nanostructure and the forming method thereof Download PDF

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TWI464783B
TWI464783B TW100142522A TW100142522A TWI464783B TW I464783 B TWI464783 B TW I464783B TW 100142522 A TW100142522 A TW 100142522A TW 100142522 A TW100142522 A TW 100142522A TW I464783 B TWI464783 B TW I464783B
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substrate
metal
oxide layer
catalyst
native oxide
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TW100142522A
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TW201322310A (en
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Hsuen Li Chen
Shao Chin Tseng
Chen Chieh Yu
Haw Woei Liu
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Univ Nat Taiwan
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Description

半導體奈米結構及其製作方法Semiconductor nano structure and manufacturing method thereof

本發明係揭露一種半導體元件,更特別地是有關於一種使用觸媒侵入技術以形成一維半導體奈米結構。The present invention discloses a semiconductor component, and more particularly to a catalyst intrusion technique to form a one-dimensional semiconductor nanostructure.

奈米金屬粒子、團簇的觸媒具有不同於塊材的高活性,因而廣泛的應用在物理、化學、生物、醫學等領域。此外,奈米結構半導體材料具有極高的表面積與量子侷限等特性,有許多研究應用於提升太陽能電池、場發射顯示器、光檢測器或是生物化學檢測等效能上。The catalysts of nano metal particles and clusters have high activity different from those of bulk materials, and thus are widely used in the fields of physics, chemistry, biology, medicine, and the like. In addition, nanostructured semiconductor materials have extremely high surface area and quantum confinement characteristics, and many studies have been applied to enhance solar cell, field emission display, photodetector or biochemical detection equivalent energy.

而奈米金屬觸媒更具有相當好的催化特性,對於許多不同的奈米金屬粒子,如金與銀,則經常被用來輔助製作一維半導體奈米結構。目前製作一維半導體奈米結構的技術包括bottom-up方式,係以奈米金屬觸媒與製程氣體飽和析出的氣-液-固(Vapor-Liquid-Solid)為主要成長機制。Nano metal catalysts have quite good catalytic properties. For many different nano metal particles, such as gold and silver, they are often used to assist in the fabrication of one-dimensional semiconductor nanostructures. At present, the technology for fabricating one-dimensional semiconductor nanostructures includes a bottom-up method, which is mainly composed of a nano-metal catalyst and a gas-liquid-solid (Vapor-Liquid-Solid) which is saturated with a process gas.

前述方式可在基材上製作出同質與異質材料,但是其此種製作方式需在高溫環境製程,且其製程氣體具有高危險性與毒性,其氣體例如矽烷(SiH4 )。另一種製作方式係為Top-Down方式。此種方式主要是以基材表面的奈米金屬觸媒配合蝕刻液,利用觸媒局部氧化基材蝕刻以製作一維奈米結構。此方式具有簡易且可於室溫下進行製作的優點,然而此種方式於表面的奈米金屬觸媒易聚集所蝕刻的結構一般皆10~100倍大於觸媒粒徑,因而不易製作出粒徑小於50nm的結構尺寸。The above method can produce homogenous and heterogeneous materials on the substrate, but the preparation method is required to be in a high temperature environment, and the process gas thereof has high risk and toxicity, and the gas thereof is, for example, decane (SiH 4 ). Another way to make it is the Top-Down method. In this way, the nano metal catalyst on the surface of the substrate is used together with an etching solution, and the catalyst is locally oxidized to etch the substrate to form a one-dimensional nanostructure. This method has the advantages of being simple and can be fabricated at room temperature. However, the structure in which the surface of the nano metal catalyst is easily aggregated and etched is generally 10 to 100 times larger than the catalyst particle size, so that it is difficult to make a grain. The structure size is less than 50 nm.

故而為能夠製造更好的半導體元件,極需要開發新式之觸媒侵入技術技術,且能夠降低相關研發的時間與相關製造成本。Therefore, in order to be able to manufacture better semiconductor components, it is extremely necessary to develop a new catalyst intrusion technology, and it is possible to reduce the time and related manufacturing costs of related research and development.

根據習知技術之缺點,本發明的主要目的是揭露一種觸媒侵入技術,製作出一維高密度且尺寸為奈米級之基材結構,以改善元件效能。In accordance with the disadvantages of the prior art, the primary object of the present invention is to disclose a catalyst intrusion technique to produce a one-dimensional high density substrate structure of nanometer size to improve component performance.

本發明之另一目的係提供一種簡單、低成本以及快速的方法以形成可捕捉光之半導體奈米結構。Another object of the present invention is to provide a simple, low cost, and fast method to form a semiconductor nanostructure that captures light.

本發明之再一目的係提供一種可適於光捕捉並應用於矽太陽能電池之半導體奈米結構。It is still another object of the present invention to provide a semiconductor nanostructure that is suitable for light trapping and for use in tantalum solar cells.

本發明之又一目的在於提供一種半導體奈米結構可以做為超薄微電子元件以應用於場發射元件。It is still another object of the present invention to provide a semiconductor nanostructure that can be used as an ultra-thin microelectronic component for field emission devices.

根據上述之目的,本發明揭露一種半導體奈米結構的製作方法,其步驟包括:提供具有原生氧化層之基板;形成金屬薄膜在具有原生氧化層之基板上,使得金屬薄膜內之部份金屬原子穿過原生氧化層沉積於基板內且位於基板之表面下方以形成觸媒層;以及剝除在基板上之金屬薄膜。According to the above object, the present invention discloses a method for fabricating a semiconductor nanostructure, the method comprising: providing a substrate having a native oxide layer; forming a metal film on a substrate having a native oxide layer such that a portion of the metal atoms in the metal film Deposited through the native oxide layer in the substrate and under the surface of the substrate to form a catalyst layer; and stripping the metal film on the substrate.

在本發明之一實施例中,上述之形成金屬薄膜係包括蒸鍍法或濺鍍法。In an embodiment of the invention, the forming of the metal thin film comprises an evaporation method or a sputtering method.

在本發明之一實施例中,上述之金屬薄膜之材料包括了金,銀,銅,白金,鐵,鈷及鎳。In an embodiment of the invention, the material of the metal film comprises gold, silver, copper, platinum, iron, cobalt and nickel.

在本發明之一實施例中,上述之剝除金屬薄膜之步驟包括:黏附膠帶在金屬薄膜上;以及撕除膠帶,使得金屬薄膜同時由具有原生氧化層之基板上移除。In an embodiment of the invention, the step of stripping the metal film comprises: adhering the adhesive tape on the metal film; and tearing off the tape so that the metal film is simultaneously removed from the substrate having the native oxide layer.

根據上述之製作方法,本發明還揭露一種半導體奈米結構,其包括:具有原生氧化層之基板;以及金屬觸媒層在基板內且位於基板之表面下方。According to the above manufacturing method, the present invention also discloses a semiconductor nanostructure comprising: a substrate having a native oxide layer; and a metal catalyst layer in the substrate and below the surface of the substrate.

在本發明之一實施例中,上述之基板之材料包括矽基板。In an embodiment of the invention, the material of the substrate comprises a germanium substrate.

在本發明之一實施例中,上述之在基板上之原生氧化層之厚度範圍為1奈米(nm)至2奈米。In one embodiment of the invention, the thickness of the native oxide layer on the substrate ranges from 1 nanometer (nm) to 2 nanometers.

在本發明之一實施例中,上述之金屬觸媒層之材料係包括金,銀,銅,白金,鐵,鈷及鎳。In an embodiment of the invention, the material of the metal catalyst layer comprises gold, silver, copper, platinum, iron, cobalt and nickel.

在本發明之一實施例中,上述之金屬觸媒層之厚度範圍為1奈米至5奈米。In an embodiment of the invention, the metal catalyst layer has a thickness ranging from 1 nm to 5 nm.

有關本發明的特徵與實作,茲配合圖示作最佳實施例詳細說明如下。The features and implementations of the present invention are described in detail below with reference to the preferred embodiments.

本發明請參考第1圖所示,該第1圖係表示具有原生氧化層(native oxide)12之基板10。在第1圖中,於基板10上的原生氧化層12,一般為氧化矽層是當基板10的表面曝露出在含氧氣及水的環境上因氧化而在基板10的表面上形成原生氧化層12,其基板10特別是指矽基板。通常於半導體製程開始之前為了避免原生氧化層12的存在,然而於本發明的實施例中,需保留在基板10上的原生氧化層12。一般來說,於基板10上的原生氧化層12的厚度範圍為1奈米至2奈米。Please refer to FIG. 1 for the present invention. The first figure shows a substrate 10 having a native oxide layer 12. In Fig. 1, the native oxide layer 12 on the substrate 10, generally a ruthenium oxide layer, forms a native oxide layer on the surface of the substrate 10 due to oxidation when the surface of the substrate 10 is exposed to oxygen and water. 12, the substrate 10 thereof is particularly referred to as a germanium substrate. In order to avoid the presence of the native oxide layer 12 prior to the start of the semiconductor process, in the embodiment of the invention, the native oxide layer 12 on the substrate 10 is retained. Generally, the thickness of the native oxide layer 12 on the substrate 10 ranges from 1 nm to 2 nm.

接著請參考第2圖。在第2圖中,係利用觸媒侵入技術(INC),在具有原生氧化層12的基板10上形成一層金屬薄膜14,其形成方式係包括:蒸鍍法(evaporation)或是濺鍍法(sputtering),且金屬薄膜14包括金(Au),銀(Ag),銅(Cu),白金(Pt),鐵(Fe),鈷(Co)及鎳(Ni)。由於金屬薄膜14係利用蒸鍍法或是濺鍍法形成在具有原生氧化層12之基板10上,在金屬薄膜14內有部份的金屬原子142會藉由此製程中所殘留的熱能與動能穿越過原生氧化層12侵入基板10內,並且沉積於基板10的表面下方,特別是指當基板10的材料為矽基板時,其金屬原子142會進入到矽基板的矽晶格(Si lattice)內而形成具有原子尺寸(atomic-scale)的金屬觸媒11在基板10內,而如第3圖所示。Please refer to Figure 2 below. In Fig. 2, a metal thin film 14 is formed on the substrate 10 having the native oxide layer 12 by means of a catalyst intrusion technique (INC), which is formed by evaporation or sputtering ( The metal film 14 includes gold (Au), silver (Ag), copper (Cu), platinum (Pt), iron (Fe), cobalt (Co), and nickel (Ni). Since the metal thin film 14 is formed on the substrate 10 having the native oxide layer 12 by vapor deposition or sputtering, a part of the metal atoms 142 in the metal thin film 14 may be subjected to heat and kinetic energy remaining in the process. The intrusion of the native oxide layer 12 into the substrate 10 and deposition under the surface of the substrate 10, in particular, when the material of the substrate 10 is a germanium substrate, the metal atoms 142 enter the germanium lattice of the germanium substrate. A metal catalyst 11 having an atomic-scale is formed inside the substrate 10 as shown in FIG.

此外,由第4圖的穿透式電子顯微鏡(TEM)圖中也可以得到具有一厚度約為1奈米至5奈米之金屬觸媒11均勻的侵入於基板10內且於基板10之表面下方。此外,由EDS元素分析亦可以證明於基板10表面下方的物質為金屬元素。於本發明中,侵入於基板10之下表面的金屬係取決於形成於基板10之原生氧化層12上之金屬薄膜14的材料,於一實施例中,當形成於基板10之原生氧化層12上之金屬薄膜14之材料為金,則侵入於基板10之下表面之金屬原子係為金原子,且在基板10內形成之金屬觸媒係為金觸媒。Further, a metal catalyst 11 having a thickness of about 1 nm to 5 nm can be uniformly intruded into the substrate 10 and on the surface of the substrate 10 by the transmission electron microscope (TEM) image of FIG. Below. Further, it can also be confirmed by EDS element analysis that the substance under the surface of the substrate 10 is a metal element. In the present invention, the metal invading the lower surface of the substrate 10 depends on the material of the metal thin film 14 formed on the native oxide layer 12 of the substrate 10, and in one embodiment, the native oxide layer 12 formed on the substrate 10. When the material of the upper metal thin film 14 is gold, the metal atoms intruding on the lower surface of the substrate 10 are gold atoms, and the metal catalyst formed in the substrate 10 is a gold catalyst.

接著,請參考第5圖。在第5圖中,係將如膠帶之黏性物質(或其他黏性物質)20貼附在金屬薄膜14上。Next, please refer to Figure 5. In Fig. 5, a viscous substance (or other viscous substance) 20 such as a tape is attached to the metal thin film 14.

如第6圖所示,由於原生氧化層12與金屬薄膜14之間附著特性不佳,因此可藉由膠帶20,或以沖水或擦拭方式將形成在基板10上方之金屬薄膜14予以移除。As shown in FIG. 6, since the adhesion property between the native oxide layer 12 and the metal thin film 14 is not good, the metal thin film 14 formed over the substrate 10 can be removed by the tape 20 or by flushing or wiping. .

之後,在第7圖所示圖中,係表示將貼附於膠帶20之與金屬薄膜14,可將金屬薄膜14與膠帶20分開而金屬薄膜14可以再回收繼續使用。Thereafter, in the figure shown in Fig. 7, the metal film 14 to be attached to the tape 20 is shown, and the metal film 14 can be separated from the tape 20, and the metal film 14 can be recycled and reused.

由第8(a)圖的掃描式電子顯微鏡圖所示,於本發明中,將上述以膠帶20剝除所回收之基板10上方之金屬薄膜14浸泡於一混合蝕刻溶液中其時間範圍為1~5分鐘,可以清楚的看出經蝕刻溶液蝕刻出的矽奈米鐘乳石結構,其孔徑約為10奈米至20奈米。於此,混合蝕刻溶液係包括氫氟酸(HF acid)、雙氧水(H2 O2 )及純水,其混合比例為2:1:8(v/v/v)體積比。As shown in the scanning electron microscope of Fig. 8(a), in the present invention, the metal film 14 above the substrate 10 recovered by stripping the tape 20 is immersed in a mixed etching solution for a time range of 1 ~5 minutes, it can be clearly seen that the stalactite stalactite structure etched by the etching solution has a pore diameter of about 10 nm to 20 nm. Here, the mixed etching solution includes hydrofluoric acid (HF acid), hydrogen peroxide (H 2 O 2 ), and pure water in a mixing ratio of 2:1:8 (v/v/v) by volume.

如第8(b)圖所示,相較於習知技術中,利用化學自組裝奈米金屬粒子觸媒(SNP)所蝕刻的結構其尺寸為趨近於500奈米及如第8(c)圖所示之利用無電鍍沉積法(EMD)所蝕刻的結構,其尺寸範圍為100奈米至200奈米。As shown in Fig. 8(b), the structure etched by chemical self-assembled nano metal particle catalyst (SNP) has a size approaching 500 nm and as 8th (c) compared to the prior art. The structure etched by electroless deposition (EMD) as shown in the figure, ranging in size from 100 nm to 200 nm.

因此由第8(a)圖、第8(b)圖及第8(c)圖中,很明顯的得知,以觸媒侵入技術可以突破傳統製作出密度極高但是尺寸極小的矽一維奈米鐘乳石結構。Therefore, from the 8th (a), 8th (b), and 8th (c), it is obvious that the catalyst intrusion technology can break through the traditional production of extremely high density but extremely small size. Nano stalactite structure.

又如第9(a)圖之側視圖中,在結構高度為250奈米中,此樣品即具有相當佳的抗反射特性。As in the side view of Figure 9(a), this sample has excellent anti-reflective properties at a structural height of 250 nm.

於第9(b)圖中係表示結構高度為1微米(um),以化學自組裝奈米金屬粒子之抗反射特性,以及第9(c)圖係表示結構高度為2.5微米之以無電鍍沉積法之抗反射特性。因此得知,利用觸媒侵入技術可以得到,在較淺的結構中即可以得到抗反射的特性。In Figure 9(b), the structural height is 1 micron (um), the anti-reflective properties of the chemically self-assembled nano metal particles, and the 9th (c) diagram shows the structural height of 2.5 microns for electroless plating. Anti-reflective properties of the deposition method. Therefore, it is known that the catalyst intrusion technique can be used, and the anti-reflection property can be obtained in a shallow structure.

另外,由第10(a)圖中可以得到利用觸媒侵入技術在相當短的蝕刻時間範圍為3分鐘至4分鐘即可大幅降低基材10表面的反射。Further, it can be obtained from the 10th (a) diagram that the catalyst intrusion technique can greatly reduce the reflection of the surface of the substrate 10 in a relatively short etching time range of 3 minutes to 4 minutes.

而第10(b)圖表示蝕刻出矽奈米鐘乳石結構積分球光譜儀的反射光譜。Figure 10(b) shows the reflection spectrum of the spheroid nanometer stalactite structure integrating sphere spectrometer.

又在第10(b)圖中,於300奈米至1000全波段皆具有相當的低反射。而在如此淺的高度即具有全波段抗反射特性的結構,可適用於現今商業化的矽太陽能電池抗反射層的應用上。另外,由於此種奈米鐘乳石結構擁有曲率半徑相當小的尖角,因此電場會在尖角處集中以及增強。此種電場增強的效應在場發射元件的應用上具有相當大的優勢。Also in Figure 10(b), there is considerable low reflection in the 300 nm to 1000 full band. At such a shallow height, the structure having the full-band anti-reflection property can be applied to the application of the commercial solar cell anti-reflection layer. In addition, since such a nano stalactite structure has a sharp corner having a relatively small radius of curvature, the electric field is concentrated and enhanced at the sharp corners. This electric field enhancement effect has considerable advantages in the application of field emission elements.

第11圖係為利用本發明所揭露之觸媒侵入技術與無電鍍沉積法所蝕刻出的結構之場發射特性的比較示意圖。在第圖11中,可以得知,藉由觸媒侵入技術所蝕刻出的極微小結構的開啟(turn-on)電壓遠小於無電鍍沉積法所蝕刻出的結構之開啟電壓,因此藉由觸媒侵入技術所形成之結構具有較佳的場發射特性。Figure 11 is a schematic diagram showing the comparison of the field emission characteristics of the structure etched by the catalyst intrusion technique and the electroless deposition method disclosed in the present invention. In Fig. 11, it can be seen that the turn-on voltage of the very fine structure etched by the catalyst intrusion technique is much smaller than the turn-on voltage of the structure etched by the electroless deposition method, so by touch The structure formed by the media intrusion technique has better field emission characteristics.

因此,綜合以上所述,利用觸媒侵入技術所形成之奈米結構其製程簡單且較習知之技術快速,且於淺結構即具有全波段抗反射的特性,且具有低的開啟電壓特性,因此可以廣泛的應用於光電元件中的抗反射層或是場發射元件中。Therefore, in summary, the nanostructure formed by the catalyst intrusion technique has a simple process and a relatively fast technique, and has a full-band anti-reflection characteristic in a shallow structure and has a low turn-on voltage characteristic. It can be widely used in anti-reflection layers or field emission elements in photovoltaic elements.

10...基板10. . . Substrate

11...金屬觸媒11. . . Metal catalyst

12...原生氧化層12. . . Primary oxide layer

14...金屬薄膜14. . . Metal film

142...金屬原子142. . . Metal atom

20...膠帶20. . . tape

第1圖係根據本發明所揭露之技術,表示具有原生氧化層之基板之截面示意圖;1 is a schematic cross-sectional view showing a substrate having a native oxide layer in accordance with the teachings of the present invention;

第2圖係根據本發明所揭露之技術,利用觸媒侵入技術(INC),在具有原生氧化層的基板上形成一層金屬薄膜之截面示意圖;2 is a schematic cross-sectional view showing a metal film formed on a substrate having a native oxide layer by a catalyst intrusion technique (INC) according to the technique disclosed in the present invention;

第3圖係根據本發明所揭露之技術,在基板內且基板表面下方形成一層金屬觸媒之截面示意圖;3 is a schematic cross-sectional view showing a metal catalyst in a substrate and under the surface of the substrate according to the disclosed technology;

第4圖係根據本發明所揭露之技術,表示在基板內具有一金屬觸媒之穿透式電子顯微鏡(TEM)示意圖;Figure 4 is a schematic view showing a transmission electron microscope (TEM) having a metal catalyst in a substrate according to the technology disclosed in the present invention;

第5圖係根據本發明所揭露之技術,表示將膠帶貼附在金屬薄膜上之截面示意圖;Figure 5 is a schematic cross-sectional view showing the tape attached to a metal film according to the technology disclosed in the present invention;

第6圖係根據本發明所揭露之技術,表示剝除膠帶時一併移除金屬薄膜之截面示意圖;Figure 6 is a schematic cross-sectional view showing the removal of a metal film when stripping the tape according to the technique disclosed in the present invention;

第7圖係根據本發明所揭露之技術,表示將金屬薄膜與膠帶分開而金屬薄膜可以再回收繼續使用之示意圖;Figure 7 is a schematic view showing the separation of the metal film from the tape and the metal film can be recycled for continued use according to the technology disclosed in the present invention;

第8(a)圖係根據本發明所揭露之技術,表示經由觸媒侵入技術形成之樣品經蝕刻溶液蝕刻之後的矽奈米鐘乳石結構之SEM圖;Figure 8(a) is a SEM image showing the structure of a stalactite stalactite structure after etching through a etching solution of a sample formed by a catalyst intrusion technique in accordance with the teachings of the present invention;

第8(b)圖係表示經由化學自組裝奈米金屬粒子觸媒形成之樣品經蝕刻溶液蝕刻之後的矽奈米結構之SEM圖;Figure 8(b) is a SEM image showing the structure of the ruthenium nanostructure after etching through the etching solution of the sample formed by the chemical self-assembled nano metal particle catalyst;

第8(c)圖係表示經由無電鍍沉積法形成之樣品經蝕刻溶液蝕刻之後的矽奈米結構之SEM圖;Figure 8(c) is a SEM image showing the structure of the ruthenium nanostructure after etching through the etching solution of the sample formed by the electroless deposition method;

第9(a)圖係根據本發明所揭露之技術,表示經由觸媒侵入技術之後,在結構高度為250奈米中,此樣品即具有相當佳的抗反射特性之SEM圖;Figure 9(a) is a SEM image of the sample having excellent anti-reflection properties at a structural height of 250 nm after exposure to the technique via the catalyst according to the present invention;

第9(b)圖中係表示結構高度為1微米之以化學自組裝奈米金屬粒子之抗反射特性之SEM圖;Figure 9(b) shows an SEM image of the anti-reflection properties of chemically self-assembled nano metal particles having a structure height of 1 μm;

第9(c)圖係表示結構高度為2.5微米之以無電鍍沉積法之抗反射特性之SEM圖;Figure 9(c) shows an SEM image of the anti-reflection properties of the electroless deposition method with a structure height of 2.5 μm;

第10(a)圖係根據本發明所揭露之技術,表示利用觸媒侵入技術在相當短的蝕刻時間即可大幅降低基材表面的反射;Figure 10(a) is a technique according to the present invention, which shows that the catalyst intrusion technique can greatly reduce the reflection of the surface of the substrate during a relatively short etching time;

第10(b)圖係根據本發明所揭露之技術,表示蝕刻出矽奈米鐘乳石結構積分球光譜儀的反射光譜;以及10(b) is a view showing a reflection spectrum of an etched out nano stalactite structure integrating sphere spectrometer according to the technique disclosed in the present invention;

第11圖係根據本發明所揭露之技術,表示觸媒侵入技術與無電鍍沉積法所蝕刻出的結構之場發射特性的比較示意圖。Figure 11 is a schematic diagram showing the comparison of the field emission characteristics of the structure etched by the catalyst intrusion technique and the electroless deposition method in accordance with the technique disclosed in the present invention.

10...基板10. . . Substrate

11...金屬觸媒11. . . Metal catalyst

12...原生氧化層12. . . Primary oxide layer

14...金屬薄膜14. . . Metal film

142...金屬原子142. . . Metal atom

Claims (4)

一種可捕捉光之半導體奈米結構的觸媒侵入技術製作方法,其步驟包括:提供具有一原生氧化層之一基板;形成一金屬薄膜在具有該原生氧化層之該基板上,使得該金屬薄膜內之部份金屬原子穿過該原生氧化層,沉積於該基板內,且位於該基板之一表面下方,以形成一層金屬觸媒層,其中形成該金屬薄膜係由蒸鍍法以及濺鍍法群組中所選出;以及剝除在該基板上之該金屬薄膜,包括以下步驟:貼附一黏性物質在該金屬薄膜上;以及撕除該黏性物質,使得該金屬薄膜同時由具有該基板上移除。 A method for fabricating a catalyst intrusion technique for capturing a semiconductor nanostructure of light, the method comprising: providing a substrate having a native oxide layer; forming a metal film on the substrate having the native oxide layer, such that the metal film a portion of the metal atoms pass through the native oxide layer, are deposited in the substrate, and are located under one surface of the substrate to form a metal catalyst layer, wherein the metal thin film is formed by evaporation and sputtering. Selecting from the group; and stripping the metal film on the substrate, comprising the steps of: attaching a viscous substance on the metal film; and tearing off the viscous material so that the metal film simultaneously has the Removed from the substrate. 如申請專利範圍第1項所述之製作方法,其中該金屬薄膜之材料係由金,銀,銅,白金,鐵,鈷及鎳群組中所選出。 The method of claim 1, wherein the material of the metal film is selected from the group consisting of gold, silver, copper, platinum, iron, cobalt and nickel. 一種利用觸媒侵入技術形成的可補捉光之半導體奈米結構,包括:具有一原生氧化層之一基板,其中該原生氧化層之厚度範圍為1奈米至2奈米;以及一金屬觸媒層在該基板內且位於該基板之一表面下方,其中該金屬觸媒層之厚度範圍為1奈米至5奈米,該金屬觸媒層之材料係包括金。 A trappable semiconductor nanostructure formed by a catalyst intrusion technique, comprising: a substrate having a native oxide layer, wherein the native oxide layer has a thickness ranging from 1 nm to 2 nm; and a metal touch The dielectric layer is in the substrate and below a surface of the substrate, wherein the metal catalyst layer has a thickness ranging from 1 nm to 5 nm, and the material of the metal catalyst layer comprises gold. 如申請專利範圍第3項所述之半導體奈米結構,其中該基板之材料包括矽基板。 The semiconductor nanostructure of claim 3, wherein the material of the substrate comprises a germanium substrate.
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JP2003165713A (en) * 2001-11-26 2003-06-10 Fujitsu Ltd Method for producing carbon element cylindrical structure

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