TWI463772B - Pfc controller and bridgeless pfc circuit with the pfc controller - Google Patents

Description

Power factor correction controller and bridgeless power with the power factor correction controller Factor correction circuit

The present invention relates to a power factor correction controller and an application circuit thereof, and more particularly to a power factor correction controller suitable for a bridgeless power factor correction circuit.

In the environmental protection and energy-saving day, the improvement of the efficiency of the AC-isolated switching power supply has a tendency toward the secondary side synchronous rectification control and the primary side power factor correction (PFC) topology application.

Figures 1A and 1B are schematic diagrams of a conventional full bridge power factor application circuit. As shown in the figure, the application circuit can be divided into two parts: a bridge rectifier circuit and a DC conversion circuit. The AC power provided by the AC power source AC is first converted to DC by the bridge rectifier circuit, and then converted to the output voltage Vo via the DC conversion circuit to be supplied to the load (Ro).

As shown in the figure, when the AC voltage supplied by the AC power source AC is in the positive half cycle, the current generated by the AC power source AC is recirculated through the diode d1, the inductor Li, the turned-on switching element sw0, and the diode d4. To AC power AC. When the switching element sw0 is turned off, the discharge current of the inductor Li is returned to the inductor Li via the inductor Li through the diode Do, the load Ro, the diode d4, the alternating current power source AC and the diode d1. When the AC voltage supplied by the AC power source AC is in the negative half cycle, the current generated by the AC power source AC is returned to the AC power source AC via the diode d2, the inductor Li, the turned-on switching element sw0, and the diode d3. When the switching element sw0 is turned off, the discharging current of the inductor Li is returned to the inductor Li via the inductor Li through the diode Do, the load Ro, the diode d3, the alternating current power source AC and the diode d2.

At present, the application of the power factor correction topology has developed toward a bridgeless design. The bridgeless power factor correction circuit topology is the circuit topology that separates the traditional bridge rectifier and power factor correction into a circuit topology of the shared structure, thereby saving the bridge rectifier rectification loss and increasing the power supply. effectiveness.

2A and 2B are schematic diagrams of a typical bridgeless power factor correction application circuit. The application circuit integrates the four diodes of the bridge rectifier circuit with the power factor correction circuit, and replaces the functions of the original bridge rectifier circuit by using two diodes d5, d6 and two switching elements sw1, sw2. . At the same time, the power factor correction is achieved by controlling the on and off of the two switching elements sw1 and sw2. As shown in the figure, when the AC voltage supplied by the AC power source AC is in the positive half cycle, the current generated by the AC power source AC is returned to the AC power source AC through the inductor Li, the conduction switching elements sw1 and sw2, to the inductor. Li charging. When the switching elements sw1 and sw2 are turned off, the discharge current generated by the inductor Li is returned to the inductor by the inductor Li via the diode d5, the load Ro and the body diode ds2 of the switching element sw2. Li.

When the AC voltage supplied by the AC power source AC is in the negative half cycle, the current generated by the AC power source AC flows through the conduction element Li through the conduction switching elements sw2 and sw1, and then flows back to the AC power source AC to charge the inductor Li. When the switching elements sw1 and sw2 are turned off, the discharge current generated by the inductor Li is returned by the inductor Li through the AC power source AC, the diode d6, the load Ro and the body diode ds1 of the switching element sw1, and is returned to the inductor. Li.

For the bridge power factor correction application circuit, the bridge rectified current path needs to pass through two diodes, which will cause conduction loss and affect the overall conversion efficiency. In contrast, the bridgeless power factor correction application circuit can be reduced. The number of diodes flowing through less current effectively reduces the voltage drop and loss caused by the diode during the rectification process.

Figures 3A and 3B are schematic diagrams of another typical bridgeless power factor correction application circuit. This application circuit is driven by a Totem pole and requires an additional high side driver. Therefore, the drive control of such an application circuit is more complicated than that of the application circuits of FIGS. 2A and 2B.

As shown in the figure, when the AC voltage supplied by the AC power source AC is in the positive half cycle and the switching element sw3 is turned off, the current generated by the AC power source AC is via the inductor Li, the turned-on switching element sw4, and the diode d8. Return to the AC power source AC to charge the inductor Li. When the switching element sw4 is turned off and the switching element sw3 is turned on, the discharge current generated by the inductor Li is returned to the inductor Li by the inductor Li through the turned-on switching element sw3, the load Ro and the diode d8.

When the AC voltage supplied by the AC power source AC is in the negative half cycle and the switching element sw4 is turned off, the current generated by the AC power source AC flows through the diode D7 and the turned-on switching element sw3, flows through the inductor Li, and then flows back to the AC. The power supply AC is used to charge the inductor Li. When the switching element sw3 is turned off, the discharge current generated by the inductor Li is returned to the inductor Li by the inductor Li through the AC power source AC, the diode d7, the load Ro, and the switching element sw4 that is turned on.

The inductance Li of the two bridgeless power factor correction application circuits performs the energy storage and discharge operation when the AC power source AC is in the positive half cycle or the negative half cycle output. In other words, regardless of whether the AC power source AC is in the positive half cycle or the negative half cycle output, it is necessary to appropriately control the switching elements sw1, sw2, sw3, sw4. Therefore, it is difficult to detect the current state of the inductor current and the switching element, and it is impossible to properly control the switching elements sw1, sw2, sw3, sw4.

The main object of the present invention is to provide a power factor correction control circuit that can cooperate with the positive half cycle and the negative half cycle output of the AC power source to effectively detect the positive and negative currents on the inductance of the conversion circuit.

Another object of the present invention is to provide a power factor correction control circuit that can cooperate with the positive half cycle and the negative half cycle output of the AC power source to effectively detect the on current of the switching element.

An embodiment of the present invention provides a power factor correction (PFC) controller for controlling an on state of at least one switching element. The power factor correction controller has a feedback control circuit, a conduction current detection circuit and a switching element control circuit. The feedback control circuit generates a feedback control signal for controlling the interruption of the switching element according to a feedback voltage signal. The conduction current detecting circuit has a clamp circuit. The clamp circuit generates a potential change signal that varies within a positive potential range based on at least a negative potential portion of the on current detection signal. The on current detecting circuit generates a cutoff signal to control the switching element interruption according to at least the previous potential change signal. The switching element control circuit controls the switching element to be interrupted according to the feedback control signal and the cutoff signal.

Another embodiment of the present invention provides a bridgeless power factor correction circuit. The bridgeless power factor correction circuit includes a conversion circuit, a switch current detection circuit and a power factor correction controller. The conversion circuit has a high-voltage side line and a low-voltage side line, and includes a first high-voltage side rectifying element and a first low-voltage side rectifying element, a second high-voltage side rectifying element and a second low-voltage side rectifying element, and at least one inductor With an output capacitor. Wherein, the first high-voltage side rectifying element and the first low-voltage side rectifying element are connected in series between the high-voltage side line and the low-voltage side line, and the first high-voltage side rectifying element and the first low-voltage side rectifying element are defined There is a first contact. The second high-voltage side rectifying element and the second low-voltage side rectifying element are connected in series between the high-voltage side line and the low-voltage side line, and a second contact is defined between the second high-voltage side rectifying element and the second low-voltage side rectifying element. The inductor is connected between an AC power source and the first contact, and the AC power source and the inductor are connected in series between the first contact and the second contact. The output capacitor is connected between the high side line and the low side line. At least one of the first high-voltage side rectifying element, the first low-voltage side rectifying element, the second high-voltage side rectifying element, and the second low-voltage side rectifying element is a switching element.

The switch current detecting circuit is connected to the switching element to detect a conducting current flowing through one of the switching elements to generate a conducting current detecting signal. The power factor correction controller has a feedback control circuit, a conduction current detection circuit and a switching element control circuit. The feedback control circuit generates a feedback control signal for controlling the interruption of the switching element according to a feedback voltage signal. The on current detecting circuit has a clamp circuit. The clamp circuit generates a potential change signal that varies within a positive potential range based at least on a negative potential portion of the on current detection signal. The on current detecting circuit generates a cutoff signal to control the switching element interruption according to at least the previous potential change signal. The switching element control circuit controls the switching element to be interrupted according to the feedback control signal and the cutoff signal.

The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

Figure 4 is a block diagram showing a preferred embodiment of an application circuit of a power factor correction controller of the present invention. As shown in the figure, the application circuit can be divided into two parts: a bridge rectifier circuit B0 and a DC conversion circuit. The AC power provided by the AC power source AC is first converted to DC by the bridge rectifier circuit B0, and then converted to the output voltage Vo via the DC conversion circuit to be supplied to the load R1.

The DC conversion circuit has an inductor L1, a switch Q1, a diode D1, a capacitor C1, a switch current detecting circuit 170, an auxiliary inductor L2, a voltage dividing circuit (consisting of resistors R2 and R3) and power Factor correction controller 160. The switch current detecting circuit 170 has a resistor connected in series to the switch Q1 to convert the on current flowing through the switch Q1 into a turn-on current detecting signal VCS. The auxiliary inductor L2 is used to detect the inductor current on the inductor L1 to generate an inductor current detecting signal VZCD. A resistor Rb is connected between the auxiliary inductor L2 and the power factor correction controller 160. The resistor Rb prevents the inductor current detection signal VZCD from being directly injected into the power factor correction controller 160 to cause a circuit abnormality. The output voltage Vo of the DC conversion circuit is converted into a feedback voltage signal VFB through the voltage dividing circuit, and is output to the power factor correction controller 160. In summary, the power factor correction controller 160 of the present embodiment detects the conduction current of the switch Q1 through the switch current detecting circuit 170, and detects the output voltage Vo through the voltage dividing circuit, and also detects the inductance through the auxiliary inductor L2. Inductor current on L1.

Figure 5 is a schematic diagram of another embodiment of an application circuit of a power factor correction controller of the present invention. In the figure, a bridgeless power factor correction circuit is taken as an example for description. As shown in the figure, the bridgeless power factor correction circuit includes a conversion circuit, a switch current detection circuit 270 and a power factor correction controller 260. The differences between the application circuit of the present embodiment and the application circuit of FIG. 4 will be described below. Similarities, for example, the setting of the resistor Rb, the setting of the voltage dividing circuit, and the like, will not be described again.

The conversion circuit has a high-voltage side line HL and a low-voltage side line LL (the low-voltage side line LL of the embodiment is grounded), and includes a first high-voltage side rectifying element DH1 and a first low-voltage side rectifying element QL1, a first The second high-voltage side rectifying element DH2 and a second low-voltage side rectifying element QL2, an inductor L1 and an output capacitor C1. Wherein the first high side rectifying element DH1 and the first low side rectifying element The QL1 is connected in series between the high-voltage side line HL and the low-voltage side line LL, and a first contact point N1 is defined between the first high-voltage side rectifying element DH1 and the first low-voltage side rectifying element QL1. The second high-voltage side rectifying element DH2 and the second low-voltage side rectifying element QL2 are connected in series between the high-voltage side line HL and the low-voltage side line LL, and between the second high-voltage side rectifying element DH2 and the second low-voltage side rectifying element QL2 A second contact N2 is defined. The inductor L1 is connected between the AC power source AC and the first contact point N1, and the AC power source AC and the inductor L1 are connected in series between the first contact point N1 and the second contact point N2. The output capacitor C1 is connected between the high-voltage side line HL and the low-voltage side line LL.

In this embodiment, the first high-voltage side rectifying element DH1 and the second high-voltage side rectifying element DH2 are two diodes, which are respectively connected in the forward direction between the first contact N1 and the high-voltage side line HL and the second contact N2. Between the high voltage side line HL. The first low-voltage side rectifying element QL1 and the second low-voltage side rectifying element QL2 are switching elements. From this point of view, the operational topology of the conversion circuit is similar to the conversion circuit of Figures 2A and 2B. The switch current detecting circuit 270 is connected to the switching elements QL1, QL2 or both to detect the conduction current flowing through one of the switching elements. The power factor correction controller 260 detects the on-current of the switch Q2 through the switch current detecting circuit 270, and detects the inductor current on the inductor L1 through the auxiliary inductor L2, thereby generating the drive signal DRV to synchronously control the first low-voltage side. The conduction state of the rectifier element QL1 and the second low-voltage side rectifying element QL2.

Figure 6 is a schematic diagram of still another embodiment of an application circuit of a power factor correction controller of the present invention. The main difference between this embodiment and the embodiment of Fig. 5 is the difference of the switch current detecting circuits 270, 370. In this embodiment, the switch current detecting circuit 370 includes a first detecting diode DT1 and a second detecting diode DT2. The cathode end of the first detecting diode DT1 and the cathode end of the second detecting diode DT2 are respectively connected to the first contact N1 and the second contact N2. The anode end of the first detecting diode DT1 is connected to the anode end of the second detecting diode DT2 to a third The contact N3 is generated, and the conduction current detection signal VCS is generated at the third contact N3. Therefore, the switch current detecting circuit 370 of the present embodiment can reduce the resistance conduction loss by the series connection of the resistors to the switching elements QL1 and QL2 to detect the conduction current. .

Figure 7 is a schematic illustration of an embodiment of a power factor correction controller 400 of the present invention. The following is an example in which the power factor correction controller 400 is applied to the application circuit of FIG. The waveform of the corresponding signal in the application circuit, such as the AC voltage signal VAC of the AC power source AC, the ON current detection signal VCS, and the waveform of the input current Iin generated by the AC power source AC can be referred to FIG.

As shown in FIG. 7, the power factor correction controller 400 of the present embodiment includes a zero current detection circuit 420, a conduction current detection circuit 440, a feedback control circuit 450, and a switching element control circuit 460. The zero current detecting circuit 420 has a first clamping circuit 422, a first comparator COM1, a second comparator COM2, and a logic circuit 424. The first clamp circuit 422 generates a first potential change signal VZCD' that varies within a positive potential range based on at least a negative potential portion of the inductor current detection signal VZCD. The zero current detecting circuit 420 generates a zero current signal SZC according to the first potential change signal VZCD' to control the switching element (ie, the switch Q1 in FIG. 4, the first low side rectifying element in the fifth and sixth figures) QL1 is electrically connected to the second low-voltage side rectifying element QL2).

In this embodiment, the positive input terminal of the first comparator COM1 receives the first potential change signal VZCD', and the negative input terminal receives a first reference potential Vr1 to generate a first comparison signal VCOM1. The negative input terminal of the second comparator COM2 receives the first potential change signal VZCD', and the positive input terminal receives a second reference potential Vr2 to generate a second comparison signal VCOM2. The first logic circuit 424 receives the first comparison signal VCOM1 and the second comparison signal VCOM2 to generate a zero current signal SZC.

In this embodiment, the first logic circuit 424 has a first click circuit OS1, a second click circuit OS2, and an OR gate OR1. The first click circuit OS1 receives the first comparison signal VCOM1 and generates a first pulse signal PUL1 at the time of switching between the high and low potentials of the first comparison signal VCOM1. The second click circuit OS2 receives the second comparison signal VCOM2, and generates a second pulse signal PUL2 when the high comparison potential of the second comparison signal VCOM2 is switched. The OR gate OR1 receives the first pulse signal PUL1 and the second pulse signal PUL2 to generate a zero current signal SZC.

When the AC voltage VAC is in the negative half cycle, please refer to Figure 8 and Figure 9A. The input current Iin is negative (that is, the current flows from the inductor L1 to the left toward the AC power source AC), and the input current Iin will be negative. The value is oscillated between zero. As shown in FIG. 9A, when the input current Iin rises to approach zero, the inductor current detection signal VZCD is converted from a negative potential to a positive potential. After the inductor current detecting signal VZCD is converted by the first clamp circuit 422 of this embodiment, a first potential change signal VZCD' that changes between preset high and low potentials is generated. This preset high and low potential is greater than zero. In one embodiment, the preset high potential system is higher than the first reference potential Vr1 and the second reference potential Vr2, and the predetermined low potential is between the first reference potential Vr1 and the second reference potential Vr2.

In this embodiment, the potential of the inductor current detecting signal VZCD is affected by the potential of the alternating voltage. In this embodiment, the first clamping circuit 422 converts the inductor current detecting signal VZCD into a first potential change signal VZCD', that is, a potential change of the limiting inductor current detecting signal VZCD, to facilitate the power factor correction controller 400. Follow-up processing.

When the first potential change signal VZCD' rises above the first reference potential Vr1, the first comparison signal VCOM1 output from the first comparator COM1 transitions from a low potential to a high potential. The first click circuit OS1 detects that the first comparison signal VCOM1 is The transition from low potential to high potential, and then the first pulse signal PUL1 is generated to control the switching element QL1, and QL2 is turned on, that is, the gate potential VG of the switching elements QL1, QL2 is changed from a low potential to a high potential. After the switching elements QL1, QL2 are turned on, the AC power source AC starts charging the inductor L1.

The foregoing embodiment compares the first potential change signal VZCD' with the first reference potential Vr1 by the first comparator COM1 to achieve the purpose of controlling the switching elements QL1, QL2 to be turned on. However, the invention is not limited thereto. As shown in FIG. 9A, since the inductor current detecting signal VZCD is oscillated between positive and negative potentials, the inductor current detecting signal VZCD and the first reference potential Vr1 can be directly used by appropriately setting the level of the first reference potential Vr1'. The comparison result of 'controls the switching elements QL1, QL2 is turned on.

When the AC voltage VAC is in the positive half cycle, please refer to Figure 8 and Figure 9B. The input current Iin is positive (that is, the current flows from the AC power source AC toward the inductor L1), and the input current Iin will be positive. Occur between zeros. As shown in FIG. 9B, when the input current Iin falls close to zero, the inductor current detection signal VZCD is converted from a positive potential to a negative potential. After the inductor current detecting signal VZCD is converted by the first clamp circuit 422 of this embodiment, a first potential change signal VZCD' that changes between preset high and low potentials is generated. The preset high and low potentials are all greater than zero, and, in an embodiment, the preset high potential system is higher than the first reference potential Vr1 and the second reference potential Vr2, and the preset low potential is located at the first reference potential Vr1 Between the second reference potential Vr2.

When the potential of the first potential change signal VZCD' falls below the second reference potential Vr2, the second comparison signal VCOM2 outputted by the second comparator COM2 transitions from a low potential to a high potential. The second click circuit OS2 detects the transition of the second comparison signal VCOM2 from low potential to high potential, and then generates the second pulse signal PUL2 to control the switching elements QL1 and QL2 to be turned on. After the switching elements QL1, QL2 are turned on, The streaming power supply AC begins to charge the inductor L1.

The foregoing embodiment compares the first potential change signal VZCD' with the second reference potential Vr2 by the second comparator COM2 to achieve the purpose of controlling the switching elements QL1, QL2 to be turned on. However, the invention is not limited thereto. As shown in FIG. 9B, since the inductor current detection signal VZCD is oscillated between positive and negative potentials, the inductor current detection signal VZCD and the second reference potential Vr2 can be directly used by appropriately setting the level of the second reference potential Vr2'. The comparison result of 'controls the switching elements QL1, QL2 is turned on. In summary, in another embodiment, by appropriately setting the level of the first reference potential Vr1' and the second reference potential Vr2', the present invention can omit the first clamping circuit 422 without affecting the zero current detecting circuit. The normal operation of the 420.

The zero current detecting circuit 420 of the embodiment uses the first comparator COM1 and the second comparator COM2 to respectively detect that the inductor current detecting signal VZCD corresponds to the first half of the negative half cycle of the alternating current voltage VAC and corresponds to the positive half. The second part of the week solves the problem that the conventional power factor correction controller fails to effectively detect the bidirectional current on the inductor.

The on current detecting circuit 440 has a second clamping circuit 442, a third comparator COM3, a fourth comparator COM4 and a second logic circuit 444. The second clamp circuit 442 generates a second potential change signal VCS' which varies within a positive potential range based on at least a negative potential portion of the on current detecting signal VCS. The on current detecting circuit 444 generates an off signal SCS according to the second potential change signal VCS' to control the switching elements QL1, QL2 to be interrupted. The third comparator COM3 receives the second potential change signal VCS' and a third reference potential Vr3 to generate a third comparison signal VCOM3, and the fourth comparator COM4 receives the conduction current detection signal VCS and a fourth reference potential. Vr4 to generate a fourth comparison signal VCOM4. The third reference potential Vr3 and the fourth reference potential Vr4 may be exposed before Potential or different potential. In this embodiment, the third reference potential Vr3 and the fourth reference potential Vr4 are set to be equipotential to simplify the circuit design. The second logic circuit 444 receives the third comparison signal VCOM3 and the fourth comparison signal VCOM4 to generate the off signal SCS to control the switching elements QL1, and QL2 is turned off.

In this embodiment, the second clamp circuit 442 is a level shifter for boosting the negative potential portion of the on current detection signal VCS upward by a predetermined voltage Va to generate a positive The second potential change signal VCS', which varies in the potential range, has a potential equal to VCS+Va.

When the AC voltage VAC is in the negative half cycle, please refer to FIG. 10A. The input current Iin is oscillated between a negative value and zero, and the on current detection signal VCS also falls at a negative potential. As for the third comparator COM3, since the third reference potential Vr3 is positive, the on current detection signal VCS is negative, and therefore, the third comparator COM3 continues to output the third comparison signal VCOM3 of the low potential. However, the second clamp circuit 442 of the embodiment raises the on current detection signal VCS upward by a predetermined voltage Va to generate the second potential change signal VCS′, and causes the third reference potential Vr3 to fall on the second potential change. The potential of the signal VCS' varies within the range.

When the switching elements QL1 and QL2 are turned on (that is, when the gate potential VG of the switching element is at a high potential), the AC power source AC is charged through the switching elements QL1 and QL2 to the inductor L1. At this time, the potential of the on current detecting signal VCS gradually decreases as the absolute value of the input current Iin increases. When the potential of the second potential change signal VCS' is lowered to be smaller than the third reference potential Vr3, the third comparator COM3 then outputs the third comparison signal VCOM3 of the high level to control the switching elements QL1, QL2 to be turned off.

Please also refer to FIG. 6 and FIG. 10A for the switch current detection of this embodiment. The circuit 370 must effectively detect the switching element QL1 when the potential difference between the potential of the second contact N2 and the first contact N1 and the third contact N3 exceeds the forward bias of the detecting diodes DT1, DT2. The conduction current of QL2. Further, at the beginning of the switching elements QL1, QL2 being turned on, the potential of the first contact N1 has not been lowered enough to turn on the detecting diode DT1, and the potential of the turn-on current detecting signal VCS is maintained at zero potential. Then, after the potential difference between the potential of the first contact N1 and the third contact N3 exceeds the detecting diode DT1, the potential of the on current detecting signal VCS starts to increase with the conduction current flowing through the switching element QL1. And gradually decrease.

On the other hand, as shown in FIG. 10B, when the AC voltage VAC is in the positive half cycle, the input current Iin is oscillated between a positive value and zero. However, since the switch current detecting circuit 370 must have a potential difference between the potential of the second contact N2 or the first contact N1 and the third contact N3 exceeding the forward bias of the detecting diodes DT1, DT2, The on-current of the switching element QL1 or QL2 is effectively detected. At this time, the mode of the on-current detection signal VCS is the same as the case of the on-current detection signal VCS when the AC voltage VAC is in the negative half cycle. Therefore, the on current detecting circuit 440 actually controls the switching elements QL1 and QL2 to be turned off according to the comparison result of the fourth comparator COM4.

Returning to Fig. 7, the power factor correction control circuit 400 further has a feedback control circuit 450 for controlling the switching elements QL1, and QL2 is turned off. At the same time, please refer to the fourth, fifth and sixth diagrams. The feedback control circuit 450 obtains a feedback voltage signal VFB corresponding to one of the output voltages through a voltage dividing circuit (consisting of resistors R2 and R3), and according to this feedback The voltage signal produces a feedback control signal SFB. In this embodiment, the feedback control signal SFB, the third comparison signal VCOM3 and the fourth comparison signal VCOM4 are simultaneously input or gate OR2 to generate the OFF signal SCS. However, the invention is not limited thereto. The third comparison signal VCOM3 and the fourth comparison signal VCOM4 may be first input to a gate, and the output signal of the gate or the feedback control signal SFB is simultaneously input to another gate to generate a cutoff signal SCS to control the switching component. QL1, QL2 are turned off.

The switching element control circuit 460 of the power factor correction controller 400 has a flip-flop. The second receiving end S, R of the flip-flop receives the zero current signal SZC and the cutoff signal SCS, respectively, and the reverse output terminal QB outputs a driving signal DRV for controlling the conduction state of the switching elements QL1, QL2. In the present embodiment, the high and low voltage variations of the drive signal DRV are opposite to the changes in the gate potential of the switching elements QL1, QL2. However, the invention is not limited thereto. Depending on the driving circuit (not shown) to which the switching element control circuit 166 is connected, the difference in switching elements, or the topology of the conversion circuit, the signal output from the forward output of the flip-flop or the signal may be used. It is a signal that uses both the forward and reverse outputs of the flip-flop as the drive signal DRV.

The case where the power factor correction controller of Fig. 7 is applied to the application circuit of Fig. 5 differs depending on the difference of the switch current detecting circuit 270 used. In the case where the switch current detecting circuit 270 detects the current flowing through the switching elements QL1, QL2 by the resistor, the waveform of the on current detecting signal VCS differs because the alternating voltage VAC is in the positive half cycle or the negative half cycle.

When the AC voltage VAC is in the positive half cycle, the potential of the on current detecting signal VCS gradually increases as the conduction current flowing through the switching elements QL1 and QL2 increases. At this time, the potential of the second potential change signal VCS' generated by the second clamp circuit 442 is maintained above the third reference potential Vr3, and the third comparator COM3 continues to output the third comparison signal VCOM3 of the low potential. However, in the case of the fourth comparator COM4, the fourth reference potential Vr4 is set within the potential variation range of the on current detecting signal VCS. When the potential of the on current detection signal VCS rises above the fourth reference potential Vr4, the fourth comparator COM4 then outputs the fourth comparison signal VCOM4 of the high level to control the switching elements QL1, QL2 to be turned off.

When the AC voltage VAC is in the negative half cycle, the potential of the on current detecting signal VCS is negative, and becomes more negative as the conduction current flowing through the switching element QL1 and QL2 increases. At this time, the potential of the on current detecting signal VCS is maintained below the fourth reference potential Vr4, and the fourth comparator COM4 continues to output the fourth comparison signal VCOM4 of the low potential. On the other hand, in the third comparator COM3, the second clamp circuit 442 is a second potential change signal VCS' generated by raising the potential of the on current detection signal VCS upward, and the third reference potential Vr3 will fall on The potential of the second potential change signal VCS' varies within a range. When the potential of the second potential change signal VCS' falls below the third reference potential Vr3, the third comparator COM3 then outputs a high potential third comparison signal VCOM3 to control the switching elements QL1, QL2 to be turned off.

Accordingly, the on-current detecting circuit 440 of the present embodiment detects the switching element QL1 by using the third comparator COM3 and the fourth comparator COM4, respectively, and the QL2 corresponds to the positive half cycle and the negative half cycle of the alternating current voltage VAC. In order to solve the problem that the conventional power factor correction controller cannot effectively detect the double-conducting current flowing through the switching elements QL1 and QL2.

In the embodiment of FIG. 7, the first potential change signal VZCD' generated by the inductor current detection signal VZCD is converted by the first clamp circuit 422, and simultaneously output to the positive input terminal of the first comparator COM1 and compared with the second. The negative input of COM2. In contrast, the second clamp circuit 442 is a booster circuit. After converting the on current detection signal VCS into the second potential change signal VCS', only the second potential change signal VCS' is output only to The negative input of the third comparator COM3. The positive input terminal of the fourth comparator COM4 receives the on current detection signal VCS for judgment.

However, the invention is not limited thereto. Zero current detection circuit 420 and conduction The type of the clamp circuit used by the stream detecting circuit 440 can be adjusted according to factors such as the level of the detected signal, the range of the level change, and the setting of the reference potential of the comparator. Secondly, the on-current detection signal generated by the switch current detecting circuit 370 provided in the embodiment of FIG. 6 is substantially not affected by the direction of the on current. Therefore, the controller applied to this application circuit can further omit the fourth comparator COM4 without affecting its normal operation.

Secondly, the power factor correction controller of the present invention can be directly applied to the conventional full bridge power factor correction circuit as shown in FIG. 4, in addition to the bridgeless power factor correction circuit of FIGS. 5 and 6. Further, although the present invention has been described by taking only the bridgeless power factor correction circuit of Figs. 5 and 6 as an example, the present invention is not limited thereto. The technical feature of the power factor correction controller of the present invention is directed to the current detection problem caused by the change of the positive and negative half cycles of the AC voltage of the power factor correction circuit, and not the type of the power factor correction circuit to which the present invention is applicable. . By adjusting the driving circuit of the power factor correction controller, the present invention can also be applied to other types of bridgeless power factor correction circuits, such as the bridgeless power factor correction circuit shown in FIGS. 3A and 3B or other types. Bridge power factor correction circuit. Although the driving signal outputted in the embodiment of FIG. 7 controls the switching elements QL1 and QL2 of the application circuit to be simultaneously turned on and off, the present invention is not limited thereto. The drive signal DRV outputted in the embodiment of FIG. 7 can also be used to drive two alternately turned-on switching elements through appropriate adjustments to meet the needs of other types of bridgeless power factor correction circuits.

Regardless of whether the AC power source AC is in the positive half cycle or the negative half cycle output, the power factor correction controller of the present invention can effectively detect the inductor current of the bridgeless power factor correction circuit and the conduction current of the switching element, thereby solving the bridgeless The power factor correction circuit controls the problem that is not easy. In addition, the power factor correction controller of the present invention can be applied not only to the bridgeless power factor correction circuit, but also as shown in FIG. 4, the power factor correction controller of the present invention can also be applied to the conventional Bridge power factor correction conversion circuit without changing the circuit design.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

AC‧‧‧AC power supply

Vo‧‧‧ output voltage

D1, d2, d3, d4, d5, d6, d7, d8‧‧ ‧ diode

Li‧‧‧Inductance

Sw0, sw1, sw2, sw3, sw4‧‧‧ switching elements

Do‧‧‧ diode

Ro, R1‧‧‧ load

Ds1, ds2‧‧‧ body diode

B0‧‧‧Bridge rectifier circuit

L1‧‧‧Inductance

Q1‧‧‧ switch

D1‧‧‧ diode

C1‧‧‧ capacitor

L2‧‧‧Auxiliary Inductance

Rb, R2, R3‧‧‧ resistance

160,260,400‧‧‧Power Factor Correction Controller

170,270,370‧‧‧Switch current detection circuit

VCS‧‧‧ conduction current detection signal

VZCD‧‧‧Inductance current detection signal

VFB‧‧‧ feedback voltage signal

HL‧‧‧High-voltage side line

LL‧‧‧Low-voltage side line

DH1‧‧‧First high-voltage side rectifying element

QL1‧‧‧First low-voltage side rectifying element

DH2‧‧‧Second high-voltage side rectifying element

QL2‧‧‧Second low-voltage side rectifying element

N1‧‧‧ first joint

N2‧‧‧second junction

DT1‧‧‧First Detection Diode

DT2‧‧‧Second detection diode

N3‧‧‧ third joint

Iin‧‧‧ input current

420‧‧‧zero current detection circuit

440‧‧‧Continuous current detection circuit

450‧‧‧Feedback control circuit

260‧‧‧Switching element control circuit

422‧‧‧First Clamp Circuit

424‧‧‧First logic circuit

COM1‧‧‧First Comparator

COM2‧‧‧Second comparator

VZCD’‧‧‧First potential change signal

SFB‧‧‧ feedback control signal

SZC‧‧‧Zero current signal

Vr1, Vr1'‧‧‧ first reference potential

VCOM1‧‧‧ first comparison signal

Vr2, Vr2'‧‧‧ second reference potential

VCOM2‧‧‧ second comparison signal

OS1‧‧‧first click circuit

OS2‧‧‧ second click circuit

OR1, OR2‧‧‧ or gate

PUL1‧‧‧ first pulse signal

PUL2‧‧‧second pulse signal

442‧‧‧Second clamp circuit

444‧‧‧Second logic circuit

COM3‧‧‧ third comparator

COM4‧‧‧fourth comparator

VCS’‧‧‧second potential change signal

Vr3‧‧‧ third reference potential

VCOM3‧‧‧ third comparison signal

Vr4‧‧‧ fourth reference potential

VCOM4‧‧‧ fourth comparison signal

SCS‧‧‧ cutoff signal

Va‧‧‧Preset voltage

DRV‧‧‧ drive signal

VG‧‧‧gate potential

460‧‧‧Switching element control circuit

VAC‧‧‧AC voltage

Figures 1A and 1B are schematic diagrams of a conventional full bridge power factor application circuit.

2A and 2B are schematic diagrams of a typical bridgeless power factor correction application circuit.

Figures 3A and 3B are schematic diagrams of another typical bridgeless power factor correction application circuit.

Figure 4 is a schematic diagram of an embodiment of a power factor correction application circuit of the present invention.

Figure 5 is a schematic diagram of another embodiment of a power factor correction application circuit of the present invention.

Figure 6 is a schematic diagram of still another embodiment of a power factor correction application circuit of the present invention.

Figure 7 is a schematic diagram of an embodiment of a power factor correction controller of the present invention.

Fig. 8 is an operation waveform diagram of the power factor correction application circuit of Fig. 6.

Figures 9A and 9B are diagrams showing the action waveforms of the zero current detecting circuit of Fig. 7.

10A and 10B are diagrams showing the operation waveforms of the on current detecting circuit of Fig. 7.

400‧‧‧Power Factor Correction Controller

420‧‧‧zero current detection circuit

440‧‧‧Continuous current detection circuit

460‧‧‧Switching element control circuit

422‧‧‧First Clamp Circuit

424‧‧‧First logic circuit

COM1‧‧‧First Comparator

COM2‧‧‧Second comparator

VCS‧‧‧ conduction current detection signal

VZCD’‧‧‧First potential change signal

SZC‧‧‧Zero current signal

Vr1‧‧‧ first reference potential

VCOM1‧‧‧ first comparison signal

Vr2‧‧‧ second reference potential

VCOM2‧‧‧ second comparison signal

OS1‧‧‧first click circuit

OS2‧‧‧ second click circuit

OR1, OR2‧‧‧ or gate

PUL1‧‧‧ first pulse signal

PUL2‧‧‧second pulse signal

442‧‧‧Second clamp circuit

444‧‧‧Second logic circuit

COM3‧‧‧ third comparator

COM4‧‧‧fourth comparator

VCS’‧‧‧second potential change signal

Vr3‧‧‧ third reference potential

VCOM3‧‧‧ third comparison signal

Vr4‧‧‧ fourth reference potential

VCOM4‧‧‧ fourth comparison signal

SCS‧‧‧ cutoff signal

Va‧‧‧Preset voltage

DRV‧‧‧ drive signal

450‧‧‧Feedback control circuit

VFB‧‧‧ feedback voltage signal

SFB‧‧‧ feedback control signal

Claims (16)

A power factor correction (PFC) controller for controlling a conduction state of at least one switching element, the power factor correction controller comprising: a feedback control circuit for generating a feedback control signal according to a feedback voltage signal Controlling the switching element interruption; a conduction current detecting circuit having a second clamping circuit, the second clamping circuit generating a positive according to at least a negative potential portion and a positive potential portion of the conduction current detecting signal a second potential change signal that changes in a potential range, the on current detecting circuit generates an off signal according to the second potential change signal to control the switching element to be interrupted; and a switching element control circuit according to the feedback control signal The cutoff signal controls the switching component to be interrupted; and the zero current detecting circuit generates a zero current signal according to at least one inductor current detecting signal, and the switching component control circuit controls the switching component to be turned on according to the zero current signal. The zero current detecting circuit further includes: a first clamping circuit, the first clamping circuit is based at least on the inductor current Negative potential of the detecting signal portion, generating a potential change in the first signal variation within the range of positive potential, the zero current detection circuit according to at least the first voltage change signal, generating the zero current signal. A power factor correction controller according to claim 1, wherein the switching element control circuit has a flip-flop. The power factor correction controller of claim 1, wherein the zero current detecting circuit further comprises a first comparator, a second comparator and a first logic circuit, and the first comparator is positive The input terminal receives the first potential change signal, the negative input terminal receives a first reference potential to generate a first comparison signal, and the negative input terminal of the second comparator receives the first potential change signal, the positive input The end system receives a second reference potential to generate a second comparison signal, the A logic circuit generates the zero current signal according to the first comparison signal and the second comparison signal. The power factor correction controller of claim 3, wherein the first logic circuit comprises a first click circuit, a second click circuit and an OR gate, the first click circuit receiving the first Comparing a signal, and generating a first pulse signal at a high-low potential switching point of the first comparison signal, the second click circuit receiving the second comparison signal, and generating a point when the high-low potential switching of the second comparison signal The second pulse signal, the OR gate receives the first pulse signal and the second pulse signal to generate the zero current signal. The power factor correction controller of claim 1, wherein the on current detecting circuit comprises a third comparator, a fourth comparator and a second logic circuit, wherein the third comparator is Receiving the second potential change signal and a third reference potential to generate a third comparison signal, the fourth comparator receiving the on current detection signal and a fourth reference potential to generate a fourth comparison signal, The second logic circuit generates the cutoff signal based on at least the third comparison signal and the fourth comparison signal. The power factor correction controller of claim 5, wherein the second logic circuit generates the cutoff signal based at least on the feedback control signal, the third comparison signal, and the fourth comparison signal. A power factor correction controller according to claim 1, wherein the second clamp circuit is a level shifter. A bridgeless power factor correction circuit includes: a conversion circuit having a high side line and a low side line, the conversion circuit comprising: a first high side rectifying element and a first low side rectifying element are connected in series between the high side line and the low side line, and the first high side rectifying element and the first low side rectifying element are defined a first contact; a second high side rectifying element and a second low side rectifying element connected in series between the high side line and the low side line, and the second high side rectifying element and the second A second contact is defined between the low-voltage side rectifying elements; at least one inductor is connected between an AC power source and the first contact, and the AC power source and the inductor are serially connected to the first contact and the second contact And an output capacitor connected between the high side line and the low side line; wherein the first high side rectifying element, the first low side rectifying element, the second high side rectifying element, and the second At least one of the low-voltage side rectifying elements is a switching element; a switching current detecting circuit is connected to the switching element to detect a conducting current flowing through the switching element to generate a conducting current detecting signal; And a power factor correction controller, comprising: a feedback control circuit, which returns a voltage signal according to one of output voltages corresponding to the conversion circuit, generates a feedback control signal for controlling the interruption of the switching element; and a conduction current detection The measuring circuit has a second clamping circuit, and the second clamping circuit generates a second potential change signal that changes within a positive potential range according to at least a negative potential portion of the conduction current detection signal, and the conduction current detection The circuit generates an off signal according to the second potential change signal to control the switching element interrupt; a switching element control circuit controls the switching element interrupt according to the feedback control signal and the cutoff signal; and a zero current detection The circuit generates a zero current signal according to at least one inductor current detection signal, and the switching element control circuit controls the switching element to be turned on according to the zero current signal, and the zero current detecting circuit further comprises: a first clamping circuit, The first clamp circuit is based at least on the inductor a negative potential portion and a positive potential portion of the flow detection signal generate a first potential change signal that varies within a positive potential range, and the zero current detection circuit generates the zero current signal according to the first potential change signal . The bridgeless power factor correction circuit of claim 8, wherein the switching element control circuit has a flip-flop. The bridgeless power factor correction circuit of claim 8 , wherein the zero current detecting circuit further comprises a first comparator, a second comparator and a first logic circuit, wherein the first comparator The positive input terminal receives the first potential change signal, the negative input terminal receives a first reference potential to generate a first comparison signal, and the negative input terminal of the second comparator receives the first potential change signal, The input terminal receives a second reference potential to generate a second comparison signal, and the first logic circuit generates the zero current signal according to the first comparison signal and the second comparison signal. The bridgeless power factor correction circuit of claim 10, wherein the first logic circuit comprises a first click circuit, a second click circuit and an OR gate, the first click circuit receiving the a first comparison signal, and generating a first pulse signal at a high-low potential switching point of the first comparison signal, the second click circuit receiving the second comparison signal, and generating a point at a high-low potential switching of the second comparison signal a second pulse signal, the OR gate receives the first pulse signal and the second pulse signal to generate the zero current signal. The bridgeless power factor correction circuit of claim 8 , wherein the on current detection circuit comprises a third comparator, a fourth comparator and a second logic circuit, wherein the third comparator Receiving the second potential change signal and a third reference potential to generate a third comparison signal, the fourth comparator receiving the conduction current detection signal and a fourth reference potential to generate a first And comparing the signals, the second logic circuit generates the cutoff signal according to the third comparison signal and the fourth comparison signal. The bridgeless power factor correction circuit of claim 8, wherein the second clamp circuit is a level shifter. The bridgeless power factor correction circuit of claim 8, wherein the switch current detecting circuit comprises a resistor connected to the switching element for converting the on current to the on current detection signal. The bridge-free power factor correction circuit of claim 8, wherein the switch current detecting circuit comprises a first detecting diode and a second detecting diode, the first detecting diode The cathode end of the body and the anode end of the second detecting diode are respectively connected to the first contact and the second contact, and the anode end of the first detecting diode and the second detecting diode The anode end is connected to a third contact, and the conduction current detection signal is generated at the third contact. The bridgeless power factor correction circuit of claim 8, wherein the first high side rectifying element and the second high side rectifying element are two diodes, respectively connected to the first contact And the high-voltage side line, the second contact point and the high-voltage side line, the first low-voltage side rectifying element and the second low-voltage side rectifying element are two switching elements, and the power factor correction controller controls the two Switching element.