TWI454914B - A Method of Improving Speed ​​of Starting Speed ​​Based on Flash Memory - Google Patents

A Method of Improving Speed ​​of Starting Speed ​​Based on Flash Memory Download PDF

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Publication number
TWI454914B
TWI454914B TW101131340A TW101131340A TWI454914B TW I454914 B TWI454914 B TW I454914B TW 101131340 A TW101131340 A TW 101131340A TW 101131340 A TW101131340 A TW 101131340A TW I454914 B TWI454914 B TW I454914B
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TW
Taiwan
Prior art keywords
boot
logical address
table
flash memory
request
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Application number
TW101131340A
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Chinese (zh)
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TW201409233A (en
Inventor
Jim Chung
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Memoright Corp
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Priority to TW101131340A priority Critical patent/TWI454914B/en
Publication of TW201409233A publication Critical patent/TW201409233A/en
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Publication of TWI454914B publication Critical patent/TWI454914B/en

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Description

Flash memory based boot speed boosting method

The invention relates to a method for improving the booting speed, in particular to a method for improving the booting speed based on flash memory.

With the advancement of flash memory system technology, the read and write speed of flash memory is getting faster and faster, the lifespan is getting longer and longer, and the capacity is getting larger and larger. Based on its superior read and write performance, in addition to being used as a storage device, flash memory has also been used as a boot device in recent years, that is, a computer that is electrically connected to it via flash memory. The boot process of the host.

In general, the flash memory must complete the process of loading a logical address and physical address mapping table before starting the boot process. The function of the logical address and the physical address correspondence table is to perform address conversion on the instruction issued by the host computer to the flash memory, that is, according to the logical address in the instruction, the corresponding physical address is obtained. To retrieve the required information based on the physical address.

However, as the capacity of the flash memory increases, the time to load the logical address with the physical address table becomes longer and longer, so that the flash memory must take more time to complete the loading. The logic address and the physical address corresponding to the table of the program, and then can start the boot process, causing the boot speed to be substantially affected. Therefore, how to overcome the phenomenon that the large-capacity flash memory is extended too slowly has become an important issue.

Accordingly, it is an object of the present invention to provide a flash memory based boot speed boosting method.

Therefore, the present invention is based on a method for improving the boot speed of a flash memory, and is suitable for a flash memory electrically connected to a computer host. The method for improving the boot speed based on the flash memory includes the following steps: (A) determining whether There is a logical address boot table established in the flash memory, and if not, the logical address boot table is established in the flash memory according to a boot request transmitted by the host computer; (B) if the The logical address boot table determines whether the boot request and the logical address boot table are completely matched; (C) if the boot request completely matches the logical address boot table, the boot table is read and stored according to the logical address The boot data for the flash memory and for the computer host to boot; (D) determining whether a logical entity address correspondence table stored in the flash memory has been completely loaded, and if not, returning to the step ( C), wherein the logical entity address correspondence table includes boot data for booting the computer host; and (E) if the logical entity address correspondence table is completely loaded, the boot request and the logic are no longer determined Bit Power table is an exact match.

The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments.

Referring to FIG. 1, the present invention is based on a preferred embodiment of a method for improving boot speed of a flash memory, and is suitable for a flash memory electrically connected to a host computer. In the preferred embodiment, the flash memory belongs to the NAND flash type. The memory is either one of the NOR flash memories. In addition, the flash memory may be a single-level storage unit (SLC) flash memory, or a multi-level cell (MLC) flash memory, or a third-order storage unit ( Triple Level Cell, TLC) Flash memory. Moreover, the flash memory stores boot data required for the host computer to perform a boot process, and a Logical to Physical Address Mapping Table (hereinafter referred to as L2P Table). The L2P Table includes a correspondence between multiple sets of logical addresses and physical addresses. That is, each correspondence in the L2P Table represents a logical address and a physical address corresponding to the logical address. Each physical address is associated with the boot data required for the booting process of the host computer.

Moreover, before the computer host wants to start the program, the flash memory must completely load the L2P table, that is, the flash memory must be completely loaded before the L2P table is completely loaded. The required boot data is also loaded, and then the host computer can perform the subsequent boot process.

The interaction between the computer host and the flash memory will be further described below through the preferred embodiment.

First, the host computer will first issue a Logic Base Address Request (LBA Request) to the flash memory. In the preferred embodiment, the power-on request is an Advanced Technology Attachment Command (ATA Command), which includes a plurality of logical addresses and corresponding length data (ie, corresponding to logical addresses). Memory interval length).

As shown in step S20 and step S21, it is determined whether there is a boot address table (Boot LBA List) established in the flash memory, and if not, according to a boot request transmitted by the host computer, The flash memory establishes the logical address boot table. The logical address boot table includes a plurality of entry data, each entry data corresponding to a logical address, and a physical address corresponding to the logical address. The physical addresses are also associated with the boot data required for the host computer to boot the program.

That is, when the flash memory determines that the logical address boot table is not stored by itself, the logical address boot table is established according to the boot request. It is worth mentioning that although the logical address boot table and the L2P Table are both associated with the boot data required for the boot process of the host computer, the size of the logical address boot table is much smaller than the L2P Table.

For example, if the logical address boot table has a length of 256 KBytes and each entry of the logical address boot table occupies 8 Bytes, the logical address boot table includes a total of 32 K entries. If it is assumed that each entry data can store 4KBytes of data, the logical address boot table can store a total of 128MBytes of data. The L2P Table can store more data than the logical address can store, so the host must take a long time to fully load the L2P Table.

As shown in step S22, if the logical address boot table exists, it is determined whether the boot request and the logical address boot table are completely matched. That is, when the logical address of the boot request is equal to the logical address corresponding to the entry data, the flash memory determines that the boot request completely matches the logical address boot table. When the boot request completely matches the logical address boot table, the corresponding relationship is as shown in Table 1 below:

Moreover, Table 1 is only used to indicate the correspondence between the boot request and the logical address boot table, and does not mean that the logical address of the boot request must be equal to the logical address of the logical address boot table in order. Exact match.

As shown in step S23, if the power-on request completely matches the logical address boot table, the boot data stored in the flash memory and powered on by the computer host is read according to the logical address boot table.

The logical address corresponding to each entry data of the logical address boot table corresponds to a physical address. Therefore, when the boot request completely matches the logical address boot table, the flash memory further finds the physical addresses according to the logical addresses, thereby performing the booting process on the host computer. The boot data is read out.

It is worth mentioning that the host computer can also issue the high-tech configuration commands to the flash memory in an orderly manner, so whenever the flash memory is used Upon receiving one of the high-tech configuration instructions, the body determines whether the logical address of the high-tech configuration instruction matches one of the logical addresses of the logical address boot table. Then, when the logical address of the high-tech configuration instruction matches the logical address of the logical address boot table, the flash memory further finds the physical address according to the logical address, and The boot data required for the booting process of the computer host is read out, that is, the flash memory can read the boot data immediately as soon as it is determined that there is a matching logical address, without waiting The boot data is read when all high-tech configuration commands match.

As shown in step S24, it is determined whether the L2P Table stored in the flash memory has been completely loaded. If not, the process returns to step S23. As mentioned above, before the computer host performs the booting process, the flash memory must first completely load the L2P Table. Therefore, even if the flash memory has read the boot data required when the host computer is booted, it is necessary to wait for the flash memory to completely load the L2P Table.

It is worth mentioning that the flash memory can multiplex the read program and the load program, that is, when the host computer reads the boot data, the L2P table is also loaded synchronously. Therefore, unlike the prior art, the present invention does not need to wait until the flash memory completely loads the L2P Table, and then reads the boot data required by the host computer to start the boot process, but through the logic bit. The power-on table, in the process of loading the flash memory into the L2P Table, also reads the boot data in parallel.

As shown in step S25, if the L2P Table has been completely loaded, it is no longer determined whether the boot request and the logical address boot table are completely matched. also That is, since the flash memory has been loaded by the L2P Table, the host computer can start the booting process according to the boot data read above, so it is no longer necessary to judge the boot request and the logical address boot table. Whether it matches exactly.

It is worth mentioning that, as shown in step S26, if the boot request does not completely match the logical address boot table, the flash memory generates a mismatch value with the logical address boot table according to the boot request. And determining whether the unmatched value exceeds a predetermined threshold, and if not, proceeding to step S23. The mismatch value is the number of logical addresses in the boot request that are not equal to any logical address of the logical address boot table, divided by the quotient of the total number of logical addresses of the boot request.

For example, suppose the boot request includes a total of ten logical addresses, wherein two logical addresses match the logical positions in the logical address boot table, and the other eight logical addresses are not associated with the logical address boot table. If the logical position in the match matches, the mismatch value is "80%". If the threshold value is assumed to be "90%", since the mismatch value does not exceed the threshold value, step S23 follows. That is, although the boot request does not exactly match the logical address boot table, as long as the mismatch value does not exceed the threshold, the flash memory can still read the boot data according to the logical address boot table.

As shown in step S27, if the unmatched value exceeds the threshold, the logical address boot table is re-established according to the boot request, and then step S23 is performed. That is, when the boot request does not completely match the logical address boot table, and the mismatch value exceeds the threshold, the flash memory re-establishes the logical address boot table to improve the next computer. Host release The extent to which the power-on request matches the logical address boot table when the boot request is made to the flash memory. Moreover, the advantage of such a design is that the flash memory is frequently updated to update the logical address boot table, which affects the boot efficiency of the computer host.

In summary, through the logical address boot table established in the flash memory, the flash memory can be read before the program of loading the L2P Table, that is, the computer host is required to start the boot process. The boot data, that is, regardless of the capacity of the flash memory, does not affect its behavior of preferentially reading the boot data, so the object of the present invention can be achieved.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent.

S20~S27‧‧‧ steps

1 is a flow chart illustrating the steps of a preferred embodiment of a flash memory based boot speed improvement method in accordance with the present invention.

S20~S27‧‧‧ steps

Claims (2)

  1. A flash memory-based boot speed improvement method is applicable to a flash memory electrically connected to a computer host, and the flash memory-based boot speed improvement method comprises the following steps: (A) determining whether there is an establishment The logical address boot table of the flash memory, if not, establishing the logical address boot table in the flash memory according to a boot request sent by the host computer, and the boot request includes multiple logic bits Address, the logical address boot table includes a plurality of entry data, each entry data corresponds to a logical address; (B) if the logical address boot table exists, determining whether the boot request and the logical address boot table are complete Matching, when the logical address of the boot request is equal to the logical address corresponding to the entry data, determining that the boot request completely matches the logical address boot table; (C) if the boot request If the logical address is not completely matched with the logical address booting table, a mismatch value is generated according to the boot request and the logical address boot table, and it is determined whether the unmatched value exceeds a preset threshold. If not, proceed to step (D), wherein the mismatch value is the number of logical addresses in the boot request that are not equal to any logical address of the logical address boot table, divided by the logical address of the boot request The quotient value after the total number; (D) if the boot request completely matches the logical address boot table, the boot data stored in the flash memory and powered on by the computer host is read according to the logical address boot table. ; (E) determining whether a logical entity address correspondence table stored in the flash memory has been completely loaded, and if not, returning to step (D), wherein the logical entity address correspondence table includes The boot data of the computer host is turned on; and (F) if the logical entity address correspondence table has been completely loaded, it is no longer determined whether the boot request and the logical address boot table completely match.
  2. The flash memory-based boot speed improvement method according to claim 1, further comprising a step (G) between the step (C) and the step (E): if the mismatch value exceeds the threshold Then, the logical address boot table is re-established according to the boot request, and then step (D) is performed.
TW101131340A 2012-08-29 2012-08-29 A Method of Improving Speed ​​of Starting Speed ​​Based on Flash Memory TWI454914B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI319530B (en) * 2005-06-08 2010-01-11 Micron Technology Inc Robust index storage for non-volatile memory
US20100169558A1 (en) * 2007-07-31 2010-07-01 Toshiyuki Honda Nonvolatile memory device and nonvolatile memory system
US8176295B2 (en) * 2009-04-20 2012-05-08 Imation Corp. Logical-to-physical address translation for a removable data storage device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI319530B (en) * 2005-06-08 2010-01-11 Micron Technology Inc Robust index storage for non-volatile memory
US20100169558A1 (en) * 2007-07-31 2010-07-01 Toshiyuki Honda Nonvolatile memory device and nonvolatile memory system
US8176295B2 (en) * 2009-04-20 2012-05-08 Imation Corp. Logical-to-physical address translation for a removable data storage device

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