TWI450325B - A method for encapsulating wafer which support wafer backside sawing - Google Patents

A method for encapsulating wafer which support wafer backside sawing Download PDF

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TWI450325B
TWI450325B TW101109846A TW101109846A TWI450325B TW I450325 B TWI450325 B TW I450325B TW 101109846 A TW101109846 A TW 101109846A TW 101109846 A TW101109846 A TW 101109846A TW I450325 B TWI450325 B TW I450325B
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wafer
cutting
metal layer
type
molding
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TW101109846A
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TW201340191A (en
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Yan Xun Xue
Ping Huang
Yueh-Se Ho
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Alpha & Omega Semiconductor
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Description

一種支援從晶圓背面實施切割的晶片封裝方法Chip packaging method for supporting cutting from the back side of wafer

本發明一般涉及一種超薄晶片的製備方法,更確切的說,本發明旨在提供一種支援從晶圓背面實施切割的晶片封裝方法以實現製備超薄晶片。
The present invention generally relates to a method of fabricating an ultra-thin wafer, and more particularly to provide a wafer packaging method that supports dicing from the back side of a wafer to effect fabrication of an ultra-thin wafer.

在晶片的封裝工藝在中,一般是沿著晶圓正面的劃片道對晶圓進行切割從而將晶片從晶圓上分離下來。但是在一些特殊的封裝工藝中,例如晶圓級封裝(WLP),有時需要從晶圓背面對晶圓進行切割,但是如果晶圓背面被塑封料塑封住了或是晶圓背面覆蓋有其他不透明材料時,因為晶圓背面沒有劃片道,如何使位於晶圓背面一側的切割刀對準位於晶圓正面的劃片道就成了一個棘手的問題。
專利號為US6107164的美國專利公開了一種晶圓級封裝的半導體裝置及半導體裝置的製造方法,其製作流程參見本申請第1A-1D附圖,這種方法是製作晶圓級封裝體的一個典型例子。如第1A圖所示,晶圓10所包含的晶片原本設置有焊墊2,其中,凸點電極4通過銅互聯機3與焊墊2連接。其方法中,首先通過切割刀21在晶圓10的正面切割形成切割槽22,之後在帶有凸點電極4的晶圓10的表面覆蓋一層樹脂23,如第1B圖所示,此時切割槽22被樹脂23所填滿。然後參見第1C圖所示,對樹脂23進行研磨拋光直至將凸點電極4從樹脂23中暴露出來。如第1D圖所示,在該方法中,需要在晶圓10的背面進行研磨,直至晶圓10被減薄到在晶圓10的背面外露出切割槽22及填充在該切割槽22中的塑封料,然後在晶圓10的背面通過切割刀26對準切割槽22從而將晶圓10進行切割以將各晶片進行分離。其缺陷是,必須先在晶圓10的正面切割出切割槽22,並且要控制切割槽22具有一定的深度,以及必須控制晶圓10減薄到一定的厚度,否則在晶圓10的背面難以研磨出切割槽22。另外一方面,如果在第1D圖所示的減薄後的晶圓10的背面形成有其他材料後,切割槽22將被覆蓋住,則切割刀26難以對準切割槽22。

In the wafer packaging process, the wafer is generally diced along the dicing track on the front side of the wafer to separate the wafer from the wafer. However, in some special packaging processes, such as wafer level packaging (WLP), it is sometimes necessary to cut the wafer from the back side of the wafer, but if the back side of the wafer is encapsulated by a molding material or the back side of the wafer is covered with other In the case of opaque materials, it is a thorny problem to align the dicing blade on the back side of the wafer with the scribe line on the front side of the wafer because there is no scribe line on the back side of the wafer.
U.S. Patent No. 6,107,164 discloses a wafer-level packaged semiconductor device and a method of fabricating a semiconductor device. The fabrication process is described in the drawings 1A-1D of the present application. This method is a typical example of fabricating a wafer-level package. example. As shown in FIG. 1A, the wafer included in the wafer 10 is originally provided with a pad 2 in which the bump electrode 4 is connected to the pad 2 via the copper interconnector 3. In the method, the cutting groove 22 is first cut on the front surface of the wafer 10 by the dicing blade 21, and then the surface of the wafer 10 with the bump electrode 4 is covered with a layer of resin 23, as shown in FIG. 1B, at this time, cutting The groove 22 is filled with the resin 23. Then, as shown in Fig. 1C, the resin 23 is subjected to lapping and polishing until the bump electrode 4 is exposed from the resin 23. As shown in FIG. 1D, in this method, polishing is required on the back side of the wafer 10 until the wafer 10 is thinned to expose the cutting groove 22 outside the back surface of the wafer 10 and filled in the cutting groove 22. The molding compound is then aligned on the back side of the wafer 10 by a dicing blade 26 to align the cutting grooves 22 to cut the wafer 10 to separate the wafers. The drawback is that the cutting groove 22 must first be cut on the front side of the wafer 10, and the cutting groove 22 must be controlled to have a certain depth, and the wafer 10 must be controlled to be thinned to a certain thickness, otherwise it is difficult to be on the back side of the wafer 10. The cutting groove 22 is ground. On the other hand, if another material is formed on the back surface of the thinned wafer 10 shown in FIG. 1D, the cutting groove 22 is covered, and the cutting blade 26 is difficult to align with the cutting groove 22.

正是鑒於上述問題,本發明提供了一種支持從晶圓背面實施切割的晶片封裝方法,其中,該晶圓的晶片製備區包含多個晶片且以位於晶圓正面的多條縱橫交叉的切割線界定各晶片的邊界,該方法主要包括以下步驟:
於晶圓的正面覆蓋一支撐結構;
於晶圓的背面對晶圓進行研磨,並在減薄後的晶圓的背面的中心區域沉積一層半徑小於所述晶片製備區的半徑的金屬層,其中,減薄後的晶圓的背面位於金屬層的邊緣與晶圓的邊緣之間的區域構成一環形帶;
利用穿透攝影設備在所述環形帶區域內對所述切割線進行探測,用於探測切割線在水準方向上從金屬層下方延伸至環形帶下方的延伸部分,同時利用第一切割刀沿著任意一條切割線兩端的所述延伸部分所構成的直線對減薄後的晶圓以及金屬層進行切割。
上述的方法,所述支撐結構可以是塑封材料,在對減薄後的晶圓以及金屬層進行切割的過程中,同時還對所述支撐結構一併進行切割,並形成位於晶片正面的頂部塑封層。
上述的方法,所述支撐結構可以是粘貼膜。
上述的方法,於晶圓的背面對晶圓進行研磨的過程中,是在晶圓背面所有的區域同時進行研磨以將晶圓均勻的減薄。
上述的方法,形成金屬層的過程中,所形成的金屬層的邊緣在垂直方向上的投影落在靠近晶片製備區的邊緣的多個不完整的晶片上。
上述的方法,在對金屬層及晶圓的切割過程中,形成多條位於減薄的晶圓中的縱橫交叉的並將所述多個晶片分隔開的第一類切割槽,第一類切割槽的延伸部分形成在減薄的晶圓位於環形帶下方的區域中,並且所述金屬層被切割成位於晶片背面的底部金屬層;以及
進一步進行塑封工藝,以塑封料覆蓋在所述金屬層上形成一塑封層,並且所述塑封料在塑封工藝中還填充在所述第一類切割槽中;
完成塑封工藝之後,利用第二切割刀沿著任意一條第一類切割槽兩端的延伸部分中所填充的塑封料而構成的直線對所述塑封層以及填充在第一類切割槽中的塑封料進行切割,形成與所述第一類切割槽重合的第二類切割槽;並且
在利用第二切割刀實施切割的過程中,所述塑封層被切割成覆蓋在底部金屬層上的底部塑封層。
上述的方法,所述支撐結構可以是塑封材料,並且還利用第二切割刀同時將所述支撐結構切割成位於晶片正面的頂部塑封層。
上述的方法,所述支撐結構可以是粘貼膜。
上述的方法,所述第二切割刀的刀片寬度可以小於所述第一切割刀的刀片寬度;以及
所形成第二類切割槽的寬度小於第一類切割槽的寬度,並用第二切割刀將第一類切割槽中的塑封料切割成包覆在所述晶片的側面的側壁塑封層。
上述的方法,所述第二切割刀的刀片寬度可以等於所述第一切割刀的刀片寬度。
上述的方法,任意一條第一類切割槽的延伸部分均與晶圓的邊緣沒有交界。
本發明還提供另一種支援從晶圓背面實施切割的晶片封裝方法,其中,該晶圓的晶片製備區包含多個晶片且以位於晶圓正面的多條縱橫交叉的切割線界定各晶片的邊界,其特徵在於,包括以下步驟:
於晶圓的正面覆蓋一支撐結構;
於晶圓的背面對晶圓進行研磨,以在晶圓背面的中心區域研磨出一個半徑小於所述晶片製備區的半徑的研磨槽,晶圓的背面位於研磨槽的側壁與晶圓的邊緣之間的區域構成環形帶;
在所述研磨槽中沉積一層金屬層;
利用穿透攝影設備在所述環形帶區域內對所述切割線進行探測,用於探測切割線在水準方向上從金屬層下方延伸至環形帶下方的延伸部分,同時利用第一切割刀沿著任意一條切割線兩端的所述延伸部分所構成的直線對所述晶圓以及金屬層進行切割。
上述的方法,所述支撐結構可以為塑封材料,在對晶圓以及金屬層進行切割的過程中,同時還對所述支撐結構一併進行切割,並形成位於晶片正面的頂部塑封層。
上述的方法,所述支撐結構可以為粘貼膜。
上述的方法,在所述研磨槽中所沉積的金屬層的厚度與所述研磨槽的深度相同。
上述的方法,形成研磨槽的過程中,所形成的研磨槽的側壁在垂直方向上的投影落在靠近晶片製備區的邊緣的多個不完整的晶片上。
上述的方法,在對金屬層及晶圓的切割過程中,形成多條縱橫交叉的並將所述多個晶片分隔開的第一類切割槽,第一類切割槽的延伸部分形成在晶圓位於環形帶下方的區域中,並且所述金屬層被切割成位於晶片背面的底部金屬層;以及
進一步進行塑封工藝,以塑封料覆蓋在所述金屬層上形成一塑封層,並且所述塑封料在塑封工藝中還填充在所述第一類切割槽中;
完成塑封工藝之後,利用第二切割刀沿著任意一條第一類切割槽兩端的延伸部分中所填充的塑封料而構成的直線對所述塑封層以及填充在第一類切割槽中的塑封料進行切割,形成與所述第一類切割槽重合的第二類切割槽;並且
在利用第二切割刀實施切割的過程中,所述塑封層被切割成覆蓋在底部金屬層上的底部塑封層。
上述的方法,所述支撐結構可以為塑封材料,並且還利用第二切割刀同時將所述支撐結構切割成位於晶片正面的頂部塑封層。
上述的方法,所述支撐結構可以為粘貼膜。
上述的方法,所述第二切割刀的刀片寬度可以小於所述第一切割刀的刀片寬度;以及
所形成第二類切割槽的寬度小於第一類切割槽的寬度,並用第二切割刀將第一類切割槽中的塑封料切割成包覆在所述晶片的側面的側壁塑封層。
上述的方法,所述第二切割刀的刀片寬度可以等於所述第一切割刀的刀片寬度。
上述的方法,任意一條第一類切割槽的延伸部分均與晶圓的邊緣沒有交界。
本領域的技術人員閱讀以下較佳實施例的詳細說明,並參照附圖之後,本發明的這些和其他方面的優勢無疑將顯而易見。

In view of the above problems, the present invention provides a wafer packaging method for supporting dicing from the back side of a wafer, wherein the wafer preparation area of the wafer includes a plurality of wafers and a plurality of vertical and horizontal intersecting cutting lines on the front side of the wafer Defining the boundaries of each wafer, the method mainly includes the following steps:
Covering a support structure on the front side of the wafer;
Grinding the wafer on the back side of the wafer, and depositing a metal layer having a radius smaller than a radius of the wafer preparation area in a central region of the back surface of the thinned wafer, wherein the back side of the thinned wafer is located The area between the edge of the metal layer and the edge of the wafer constitutes an annular band;
Detecting the cutting line in the area of the endless belt by means of a penetrating photographic apparatus for detecting an extension of the cutting line extending from below the metal layer to below the endless belt in the horizontal direction while using the first cutting blade along A straight line formed by the extended portions at both ends of any one of the cutting lines cuts the thinned wafer and the metal layer.
In the above method, the support structure may be a molding material, and during the cutting of the thinned wafer and the metal layer, the support structure is also cut together and formed on the top of the front surface of the wafer. Floor.
In the above method, the support structure may be an adhesive film.
In the above method, in the process of polishing the wafer on the back side of the wafer, all the areas on the back surface of the wafer are simultaneously polished to uniformly thin the wafer.
In the above method, in the process of forming the metal layer, the projection of the edge of the formed metal layer in the vertical direction falls on a plurality of incomplete wafers near the edge of the wafer preparation region.
In the above method, in the process of cutting the metal layer and the wafer, a plurality of first type of cutting grooves which are vertically and horizontally intersected in the thinned wafer and separate the plurality of wafers are formed, the first type An extended portion of the cutting groove is formed in a region of the thinned wafer under the endless belt, and the metal layer is cut into a bottom metal layer on the back surface of the wafer; and further a plastic sealing process is performed to cover the metal with the molding compound Forming a plastic sealing layer on the layer, and the molding compound is further filled in the first type of cutting groove in the molding process;
After the molding process is completed, the molding layer and the molding compound filled in the first type of cutting groove are formed by a straight line formed by the second cutting blade along the molding compound filled in the extending portion of both ends of any one of the first type of cutting grooves. Cutting to form a second type of cutting groove that coincides with the first type of cutting groove; and in performing the cutting with the second cutting blade, the plastic sealing layer is cut into a bottom plastic sealing layer covering the bottom metal layer .
In the above method, the support structure may be a molding material, and the second support blade is also used to simultaneously cut the support structure into a top molding layer on the front side of the wafer.
In the above method, the support structure may be an adhesive film.
In the above method, the blade width of the second cutting blade may be smaller than the blade width of the first cutting blade; and the width of the second type of cutting groove formed is smaller than the width of the first type of cutting groove, and the second cutting blade is used The molding compound in the first type of cutting groove is cut into a side wall molding layer that is coated on the side of the wafer.
In the above method, the blade width of the second cutter may be equal to the blade width of the first cutter.
In the above method, the extension of any one of the first type of cutting grooves has no boundary with the edge of the wafer.
The present invention also provides another wafer packaging method for supporting dicing from the back side of a wafer, wherein the wafer preparation area of the wafer comprises a plurality of wafers and the boundaries of the wafers are defined by a plurality of vertically and horizontally intersecting dicing lines on the front side of the wafer. , characterized in that it comprises the following steps:
Covering a support structure on the front side of the wafer;
Grinding the wafer on the back side of the wafer to grind a grinding groove having a radius smaller than a radius of the wafer preparation area in a central region of the back surface of the wafer, the back side of the wafer being located at the sidewall of the polishing groove and the edge of the wafer The area between the ends constitutes an endless belt;
Depositing a metal layer in the grinding tank;
Detecting the cutting line in the area of the endless belt by means of a penetrating photographic apparatus for detecting an extension of the cutting line extending from below the metal layer to below the endless belt in the horizontal direction while using the first cutting blade along A straight line formed by the extended portions at both ends of any one of the cutting lines cuts the wafer and the metal layer.
In the above method, the supporting structure may be a molding material, and during the cutting of the wafer and the metal layer, the supporting structure is also cut together, and a top plastic sealing layer on the front side of the wafer is formed.
In the above method, the support structure may be an adhesive film.
In the above method, the thickness of the metal layer deposited in the grinding tank is the same as the depth of the grinding tank.
In the above method, during the formation of the grinding groove, the projection of the sidewall of the formed grinding groove in the vertical direction falls on a plurality of incomplete wafers near the edge of the wafer preparation area.
In the above method, in the process of cutting the metal layer and the wafer, a plurality of first type of cutting grooves intersecting and separating the plurality of wafers are formed, and an extension portion of the first type of cutting grooves is formed in the crystal a circle is located in a region below the endless belt, and the metal layer is cut into a bottom metal layer on the back side of the wafer; and a plastic sealing process is further performed, a plastic sealing layer is formed on the metal layer to form a plastic sealing layer, and the plastic sealing layer is formed Filling in the first type of cutting groove in the molding process;
After the molding process is completed, the molding layer and the molding compound filled in the first type of cutting groove are formed by a straight line formed by the second cutting blade along the molding compound filled in the extending portion of both ends of any one of the first type of cutting grooves. Cutting to form a second type of cutting groove that coincides with the first type of cutting groove; and in performing the cutting with the second cutting blade, the plastic sealing layer is cut into a bottom plastic sealing layer covering the bottom metal layer .
In the above method, the support structure may be a molding material, and the second support blade is also used to simultaneously cut the support structure into a top molding layer on the front side of the wafer.
In the above method, the support structure may be an adhesive film.
In the above method, the blade width of the second cutting blade may be smaller than the blade width of the first cutting blade; and the width of the second type of cutting groove formed is smaller than the width of the first type of cutting groove, and the second cutting blade is used The molding compound in the first type of cutting groove is cut into a side wall molding layer that is coated on the side of the wafer.
In the above method, the blade width of the second cutter may be equal to the blade width of the first cutter.
In the above method, the extension of any one of the first type of cutting grooves has no boundary with the edge of the wafer.
These and other advantages of the present invention will no doubt become apparent to those skilled in the <RTIgt;

第2A-1圖為晶圓100的正面100X的俯視圖,第2A-2圖為晶圓100的豎截面圖,圖中所顯示的與晶圓100的正面100X相反的另一面是其背面100Y。晶圓100的晶片製備區101通常包含有大量鑄造連接在一起的晶片101',並以位於晶圓100的正面100X的多條縱橫交叉的切割線(Scribe line)102界定各晶片101'的邊界,其作用在於,可以沿著切割線102對晶圓100進行切割以將晶片101'從晶圓100上分離下來。由於這些技術特徵已經為本領域的技術人員所熟知,所以本發明不再特意詳盡地對此進行額外說明。為了便於本發明的敍述說明,第2A-1圖中刻意將晶片製備區101單獨描繪出來了,晶片製備區101在水準方向上的橫截面大致上為圓形,晶片製備區101與晶圓100同軸並且晶片製備區101的半徑顯然是小於晶圓100的半徑的。本領域的技術人員都知道,一般在晶圓100上僅有晶片製備區101的範圍內形成有電路,設定晶圓100的正面100X所包含的位於晶片製備區101的邊緣101a與晶圓100的邊緣100a之間的區域構成了預留環形帶103,那麼通常認為晶圓100的位於預留環形帶103下方的區域內為電路空白區也即沒有形成任何晶片。此外,位於晶圓100正面的切割線102確切的說是形成在晶片製備區101,該切割線102往往沒有延伸至預留環形帶103內。值得一提的是,預留環形帶103在很大程度上為晶圓100的運輸和移動提供了方便,任何搬運工具或是手套或是其他工藝設備的抓手可以觸及預留環形帶103的區域卻不能接觸晶片製備區101,這不僅僅是要防止晶片101'受到物理破壞,還要基於靜電的考慮。可以看出,圓環狀的預留環形帶103從晶圓100邊緣100a處向晶圓100的背面100Y的中心延伸,其寬度等於晶圓100的半徑減去晶片製備區101的半徑,通常大致上約為1.2mm至1.5mm之間。值得注意的是,雖然絕大多數晶片101'為形貌正常的晶片,然而本領域的技術人員都知道,晶片製備區101區域內靠近和接觸邊緣101a的一些晶片101'a卻並不完整(第2A-1圖以陰影示出),在所有的晶片101'從晶圓100上分離下來後,可認為晶片101'中的這部分不完整的晶片101'a最終將被遺棄。儘管如此,這些靠近邊緣101a的不完整的晶片101'a卻為本發明提供了一些便捷。
如第2B圖所示,在晶圓100的正面100X生成一層起物理支撐作用的支撐結構200,支撐結構200可以是粘貼膜也可以是塑封材料或是其他合適的支撐體等,支撐結構200有益於提高晶圓100的機械強度,否則單獨的晶圓100一旦被減薄到一定程度就容易碎裂。參見第2C圖所示,完成在背面100Y對晶圓100進行研磨以減薄晶圓100的厚度之後,通常是化學機械研磨CMP,此研磨過程中,是在晶圓100的背面100Y所有的區域同時進行研磨的以將晶圓100均勻的減薄,即減薄後的晶圓100'所有區域的厚度都是相同的。再如第2D-1圖及第2D-2圖所示,在減薄後的晶圓100'的背面100Z的中心區域沉積一層金屬層300。在形成金屬層300的過程中,要求金屬層300在水準方向的橫截面大致為圓形並且其半徑小於晶片製備區101的半徑,金屬層300與減薄後的晶圓100'的背面100Z同圓心。通常,晶圓100獲得減薄後,還包括在減薄後的晶圓100'的背面100Z注入重摻雜離子的步驟,之後才沉積金屬層300,以保障金屬層300與減薄後的晶圓100'的背面100Z具有良好的歐姆接觸,因為晶片101'在很多時候是作為垂直式功率MOSFET晶片。至此,減薄後的晶圓100'的背面100Z位於金屬層300的邊緣300a與晶圓100的邊緣100a之間的區域構成了環形帶104(第2D-1圖),圓環狀的環形帶104的寬度等於晶圓100的半徑減去金屬層300的半徑(第2D-2圖),一般大於D1 並且D2 大致上約為3mm左右。此時問題在於,晶圓100'的正面100X被支撐結構200所覆蓋住,也即切割線102被支撐結構200阻擋住,如果直接在晶圓100'正面實施切割是比較困難的。所以本發明提出從晶圓100'的背面100Z實施切割,並連同將金屬層300一起進行切割以形成位於晶片101'背面的一個金屬電極,但是本領域的技術人員都知道,晶圓100'的背面100Z是沒有提供切割線來與切割刀對準,而且切割刀也無法直接從晶圓100'的背面100Z直接與晶圓100'的正面100X的切割線102進行對準。
在一些已知的輔助透射對準技術中,可以利用穿透攝影設備從晶圓100'背面100Z探測晶圓100'正面100X的切割線102,例如紅外源攝影機(Infrared source camera,簡稱IR camera)是一種較為典型的穿透攝影設備。如第2D-1圖至第2D-2圖所示,IR攝影機的探測手段雖然無法穿透金屬層300但卻可以穿透環形帶104下方的矽。參見第2D-3圖,即為利用穿透攝影設備(未示出)在環形帶104區域內對切割線102進行探測的大致圖形,儘管無法探測到切割線102位於金屬層300正下方的部分,但正因為金屬層300的半徑小於晶片製備區101的半徑,所以使得IR攝影機能夠探測和捕捉到切割線102在水準方向上從金屬層300下方延伸至環形帶104下方的延伸部分102',延伸部分102'位於晶片製備區101的邊緣101a與金屬層300的邊緣300a在正面100X上的投影之間,顯然該延伸部分102'與金屬層300在垂直方向上並無交迭。只要任意一條切割線102兩端的延伸部分102'被探測到並被定位,就可以在晶圓100'的背面100Z依據該被選取的任意一條切割線102兩端的延伸部分102'定位一條直線,而所定位的直線則剛好在垂直方向上與該任意一條切割線102相交迭重合,那麼切割刀就可以沿著所定位的直線實施切割。必須著重指出的是,由於金屬層300的半徑務必是小於晶片製備區101的半徑的,否則就沒有延伸部分102'可以用來被IR探測,正因為如此,就導致晶片製備區101的面積要大於金屬層300的面積,所以晶片製備區101所包含的一部分晶片的背面顯然是沒有被金屬層300所完全覆蓋的。換言之,沒有被金屬層300所覆蓋的這部分晶片是不能作為完整的積體電路而正常運行的,如果放棄的這些晶片就可能造成良率的降低。然而,因為相鄰的晶片101'a彼此相互連接,而且各晶片101'a均是圍繞著圓形的邊緣101a分佈,則位於晶圓100上所有的那些不完整的晶片101'a也剛好大致上能夠呈現為圓環結構(儘管該圓環結構不是十分規則)。所以本發明所提出的一種方案是,調節金屬層300的半徑大小,使得其邊緣300a在垂直方向上的投影剛好落在晶片製備區101區域內靠近邊緣101a的那部分不完整的晶片101'a上,也即邊緣300a在垂直方向上剛好與那些不完整的晶片101'a所構成的圓環結構交迭。其結果就是,在晶片製備區101內,只有這些不完整的晶片101'a的背面的一部分區域沒有被金屬層300所覆蓋,其他遠離邊緣101a的晶片101'則皆為正常產品,所以也就正好是那些原本就不完整的晶片101'a被放棄,這樣就不會降低良率。
如第2E圖所示,可以使用IR攝影機,在晶圓100'背面100Z利用第一切割刀(Dicing saw blade)401沿著任意一條切割線102兩端的延伸部分102'所構成的直線對晶圓100'以及金屬層300進行切割,圖中所示出的形成在晶圓100'中的切割槽102a即為第一切割刀401切割晶圓100'、金屬層300所留下的切割痕跡。本次切割過程中,所形成的位於晶圓100'中並將金屬層300分割開的多條縱橫交叉的切割槽102a,用於將多個晶片101'從晶圓100'上分離下來,並且還用於將金屬層300切割成多個分隔開的底部金屬層300',而且一個底部金屬層300'相對應的位於一個晶片101'的背面。多條縱橫交叉的切割槽102a中任何一條切割槽均與一條切割線102相對應。在一種實施方式中,如第2E圖,支撐結構200為塑封材料,則沿著所有的切割線102兩端的延伸部分102'構成的所有直線對晶圓100'以及金屬層300進行切割的過程中,支撐結構200一併被切割並形成位於晶片101'正面的頂部塑封層200'。在另一種實施方式中(圖中未示意出),如果支撐結構200為粘貼膜,其厚度一般比較薄,在對晶圓100'以及金屬層300進行切割的過程中,支撐結構200不必被切割斷,這便於最終從支撐結構200上取下帶有頂部塑封層200'、底部金屬層300'的晶片101'。
在一個如第3A-1圖至第3C圖所示的實施方式中,先按照第2A-1至2E圖所示的方法將晶圓100'和金屬層300進行切割,形成位於晶圓100'中並將金屬層300分割開的多條縱橫交叉的切割槽102b,此時金屬層300仍然被切割成多個分隔開的底部金屬層300',而且一個底部金屬層300'相對應的位於一個晶片101'的背面,但是此方案中支撐結構200卻沒有被切割斷。如果支撐結構200為粘貼膜,則切割過程不能傷及支撐結構200,所形成的切割槽102b以剛好觸及支撐結構200為佳。如果支撐結構200為塑封材料,一種情況是,所形成的切割槽102b仍然可以選擇剛好觸及支撐結構200;另一種情況是,可以選擇部分切割支撐結構200但不完全將支撐結構200切割斷,也即切割槽102b的深度有所增加,此時切割槽102b在垂直方向上延伸至支撐結構200中,主要是保障晶片101'不能提前脫落。如第3A-2圖所示,第一類切割槽102b除了形成在晶片製備區101中,任意一條第一類切割槽102b還包括形成在晶圓100'的位於環形帶104下方的區域中的第一類切割槽延伸部分102b-1。再如第3B-1圖所示,進行塑封工藝,以塑封料注塑覆蓋在金屬層300上形成塑封層500,注意塑封料不能覆蓋在環形帶104上,由於固化前的塑封料呈現為液態,所以該塑封料同時還填充在第一類切割槽102b中。在一個實施例中,正因為塑封料同時還填充在第一類切割槽102b中,所以形成第一類切割槽102b的時候,要求控制第一類切割槽102b的兩端不能延伸至晶圓100'的邊緣100a處,也即第一類切割槽延伸部分102b-1不能與晶圓100'的邊緣100a有所交界和接觸(第3A-2圖),否則塑封料填充在第一類切割槽102b中時容易從第一類切割槽102b的兩端流淌至晶圓100'之外產生溢膠。例如第3A-3圖所示的第一類切割槽延伸部分102b-1'就已經延伸至與邊緣100a交界了,塑封料就很容易從延伸部分102b-1'中溢出。而產生的溢膠固化後很容易將晶圓100'粘附在塑封設備上,任何試圖強行將晶圓100'取下的動作將會導致晶圓100'破碎,這是我們所不希望看到的。
在如第3B-2圖及第3C圖所示,對於任意一條第一類切割槽102b而言,其兩端的延伸部分102b-1中所填充的塑封料能構成的一條直線(第3B-2圖),而且該直線與該任意一條第一類切割槽102b在垂直方向上是完全重合的。如果利用第二切割刀402沿著任意一條第一類切割槽102b兩端的延伸部分102b-1中所填充的塑封料所構成的直線對塑封層500、晶圓100'以及填充在第一類切割槽102b中的塑封料進行第二次切割,就能沿著第一類切割槽102b形成與第一類切割槽102b重合的第二類切割槽105;並且在切割過程中,塑封層500被切割成覆蓋在底部金屬層300'上的底部塑封層500',而作為塑封材料的支撐結構200則被切割成位於晶片101'正面的頂部塑封層200'。如果支撐結構200為粘貼膜,則不必對支撐結構200實施切割。一種情況是,第二切割刀402的刀片寬度如果小於第一切割刀401的刀片寬度,所形成第二類切割槽105的寬度應該是小於第一類切割槽102b的寬度的,則第二切割刀402將第一類切割槽102b中填充的塑封料切割成包覆在晶片101'的側面的側壁塑封層500"。另一種情況是,第二切割刀402的刀片寬度剛好等於第一切割刀401的刀片寬度,第二切割刀402剛好將第一類切割槽102b中填充的塑封料切割掉,此時晶片101'的側面為裸露的無任何塑封層的包覆。
基於上述發明思路,另一個實施例的製備方法如第4A圖第4A-4C圖所示的流程,區別在於,此時在晶圓100的背面100Y進行研磨時並不是整體性的將晶圓100進行減薄,而是利用一半徑小於晶圓100半徑的磨砂輪(未示意)僅僅在晶圓100的背面100Y的中心區域進行研磨,以在晶圓100背面100Y的中心區域研磨出一個研磨槽110,研磨槽110在水準方向上的橫截面為圓形並且研磨槽110與晶圓100同軸。所形成的研磨槽110的半徑小於晶片製備區101的半徑,可以通過調節磨砂輪的半徑大小來調整研磨槽110的半徑的大小。在本發明中,通過調節研磨槽110的半徑大小,使得研磨槽110的側壁110a在垂直方向上的投影剛好落在晶片製備區101區域內靠近邊緣101a的那部分不完整的晶片101'a上,也即研磨槽110的側壁110a在垂直方向上剛好與那些多個不完整的晶片101'a所構成的圓環結構交迭。晶圓100的背面100Y位於研磨槽110的側壁110a與晶圓100的邊緣100a之間的區域構成另一環形帶114(如第4B-2圖的俯視圖),圓環狀的環形帶114從晶圓100邊緣100a處向晶圓100的背面100Y的中心延伸,其寬度D3 等於晶圓100的半徑減去研磨槽110的半徑,一般大於D1 並且D3 大致上約為3mm左右。
本領域的技術人員都知道,晶圓被研磨的越薄晶圓自身就越容易發生曲翹(Warpage)和易碎。此實施方式中,較於第2C圖所示的方法,優勢在於因為晶圓100的位於環形帶114的下方的區域在研磨過程中被予以保留,所以即使晶圓100背面100Y的中心區域被研磨得再深,由於晶圓100受到位於環形帶114的下方的區域的支撐和張力作用,第4A圖所示的被研磨減薄的晶圓100都不會發生曲翹。通常,晶圓100背面100Y的中心區域獲得減薄後,該方法還包括在研磨槽110的底部向晶圓100中注入重摻雜離子的步驟,之後再在研磨槽110中沉積金屬層600,以保障金屬層600與晶圓100的位於研磨槽110下方的區域具有良好的歐姆接觸。所沉積的金屬層600的厚度大致上與研磨槽110的深度相同,即金屬層600的頂面大致上與晶圓100的背面100Y基本位於同一平面,其中,金屬層600的半徑與研磨槽110的半徑大小相同。同樣,可以利用IR攝影機等穿透攝影設備從晶圓100的背面100Y探測晶圓100正面100X的切割線102,如第4B-3圖所示,雖然紅外源無法穿透金屬層600但卻可以穿透環形帶114下方的矽。在第4B-3圖中,IR攝影機(未示出)在環形帶114區域內對切割線102進行探測,儘管無法探測到切割線102位於金屬層600正下方的部分,但是由於金屬層600的半徑小於晶片製備區101的半徑,IR攝影機能夠探測切割線102在水準方向上從金屬層600下方延伸至環形帶114下方的延伸部分102"。同樣,只要任意一條切割線102兩端的延伸部分102"被IR攝影機探測定位,就可以依據該任意一條切割線102兩端的延伸部分102"在晶圓100的背面定位一條直線,而所定位的直線則剛好在垂直方向上與該任意一條切割線102相重合。所以如第4B-3圖至第4C圖所示,利用第一切割刀401沿著任意一條切割線102兩端的延伸部分102"所構成的直線對晶圓100以及金屬層600進行切割,以將多個晶片101'從晶圓100上分離下來。與前述技術相同,對準多條切割線102而形成在晶圓100中的多條縱橫交叉的第一類切割槽112a將多個晶片101'相互分隔開,並且金屬層600被切割成多個底部金屬層600',一個底部金屬層600'相對應的位於一個晶片101'背面。在一種實施方式中,如第4C圖,支撐結構200為塑封材料,則支撐結構200一併被切割並形成位於晶片101'正面的頂部塑封層200',而金屬層600則被切割成位於晶片101'背面的底部金屬層300'。在另一種實施方式中(圖中未示意出),如果支撐結構200為粘貼膜,則支撐結構200不必被切割斷。
在一個實施例中,如第5A圖至第5C圖所示,先按照第4A至4B-3圖所示的方法將晶圓100和金屬層600進行切割,形成位於晶圓100中並將金屬層600分割開的多條縱橫交叉的切割槽112b。該實施方式所採用的方法與第3A-1圖至第3C圖所示的方法並無較大的區別。同樣,支撐結構200可以為粘貼膜也可以為塑封材料。此實施方式中,第一類切割槽112b除了形成在晶片製備區101中,第一類切割槽112b還包括形成在晶圓100位於環形帶114下方的區域中的第一類切割槽的延伸部分112b-1。之後進行塑封工藝,以塑封料注塑覆蓋在金屬層600上形成塑封層700,注意塑封料不能覆蓋在環形帶114上,該塑封料同時還填充在第一類切割槽112b中,如第5B圖所示。同樣,要求控制第一類切割槽112b的兩端不能延伸至晶圓100的邊緣100a處,即第一類切割槽延伸部分112b-1不能與晶圓100的邊緣100a有所交界和接觸。第5B圖所示的晶圓100與第3B-1圖所示的晶圓100'相比,如果前者的研磨槽110的底部到晶圓100的正面100X的距離等同於後者的背面100Z到晶圓100'的正面100X的距離,也即在二者的研磨厚度相同的條件下,第5B圖所示的第一類切割槽延伸部分112b-1與第3B-1圖所示的第一類切割槽延伸部分102b-1的深度是不一樣的,這是因為晶圓100位於環形帶114下方的區域並未被研磨掉。同樣,任意一條第一類切割槽112b兩端的延伸部分112b-1中所填充的塑封料均能構成的一條直線,而且該直線與該任意一條第一類切割槽112b在垂直方向上是重合的。利用第二切割刀402沿著任意一條第一類切割槽112b兩端的延伸部分112b-1中所填充的塑封料所構成的直線對塑封層700以及填充在第一類切割槽112b中的塑封料進行切割,從而在第一類切割槽112b中形成與第一類切割槽112b重合的第二類切割槽115;並且在切割過程中,塑封層700被切割成覆蓋在底部金屬層600'上的底部塑封層700',而為塑封材料的支撐結構200則被切割成位於晶片101'正面的頂部塑封層200'。如果支撐結構200為粘貼膜,則支撐結構200不必被切割。同樣,第二切割刀402的刀片寬度如果小於第一切割刀401的刀片寬度,所形成第二類切割槽115的寬度應該是小於第一類切割槽102b的寬度的,第二切割刀402將第一類切割槽112b中的塑封料切割成包覆在晶片101'的側面的側壁塑封層700"。另一種情況是,第二切割刀402的刀片寬度剛好等於第一切割刀401的刀片寬度,此時晶片101'的側面的無任何塑封層的包覆。
以上,通過說明和附圖,給出了具體實施方式的特定結構的典型實施例,以及提出了現有的較佳實施例,但這些內容並不作為局限。對於本領域的技術人員而言,閱讀上述說明後,各種變化和修正無疑將顯而易見。因此,所附的申請專利範圍應看作是涵蓋本發明的真實意圖和範圍的全部變化和修正。在申請專利範圍範圍內任何和所有等價的範圍與內容,都應認為仍屬本發明的意圖和範圍內。

2A-1 is a plan view of the front surface 100X of the wafer 100, and FIG. 2A-2 is a vertical cross-sectional view of the wafer 100. The other side opposite to the front surface 100X of the wafer 100 shown in the drawing is the back surface 100Y. The wafer preparation area 101 of the wafer 100 typically includes a plurality of wafers 101' that are cast together and defines the boundaries of the wafers 101' with a plurality of cross-cutting Scribe lines 102 located on the front side 100X of the wafer 100. The effect is that the wafer 100 can be diced along the dicing line 102 to separate the wafer 101' from the wafer 100. Since these technical features are well known to those skilled in the art, the present invention is not specifically described in detail. In order to facilitate the description of the present invention, the wafer preparation area 101 is deliberately depicted in FIG. 2A-1, and the cross section of the wafer preparation area 101 in the horizontal direction is substantially circular, and the wafer preparation area 101 and the wafer 100 are The radius of the coaxial and wafer fabrication region 101 is clearly less than the radius of the wafer 100. It is known to those skilled in the art that a circuit is generally formed on the wafer 100 only in the range of the wafer preparation area 101, and the front surface 100X of the wafer 100 is disposed on the edge 101a of the wafer preparation area 101 and the wafer 100. The area between the edges 100a constitutes the reserved endless belt 103, and it is generally considered that the area of the wafer 100 below the reserved endless belt 103 is a circuit blank area, i.e., no wafer is formed. In addition, the dicing line 102 on the front side of the wafer 100 is formed exactly in the wafer preparation area 101, which often does not extend into the reserved endless belt 103. It is worth mentioning that the reserved endless belt 103 largely facilitates the transportation and movement of the wafer 100, and the grip of any handling tool or glove or other process equipment can reach the reserved endless belt 103. The area does not contact the wafer preparation area 101, which is not only to prevent physical damage to the wafer 101' but also to electrostatic considerations. It can be seen that the annular reserved annular band 103 extends from the edge 100a of the wafer 100 toward the center of the back surface 100Y of the wafer 100, and its width. Equal to the radius of the wafer 100 minus the radius of the wafer preparation area 101, usually It is roughly between 1.2mm and 1.5mm. It should be noted that although the majority of the wafers 101' are wafers having normal morphology, those skilled in the art will recognize that some of the wafers 101'a in the area of the wafer preparation area 101 that are adjacent to and in contact with the edge 101a are not complete ( 2A-1 is shown in hatching. After all of the wafers 101' are separated from the wafer 100, it can be considered that this portion of the wafer 101'a incomplete wafer 101'a will eventually be discarded. Nonetheless, these incomplete wafers 101'a near the edge 101a provide some convenience to the present invention.
As shown in FIG. 2B, a supporting structure 200 for physically supporting the substrate 100 is formed on the front surface 100X of the wafer 100. The supporting structure 200 may be an adhesive film or a plastic sealing material or other suitable supporting body, etc., and the supporting structure 200 is beneficial. The mechanical strength of the wafer 100 is increased, otherwise the individual wafer 100 is easily broken once it is thinned to a certain extent. Referring to FIG. 2C, after the wafer 100 is polished on the back surface 100Y to thin the thickness of the wafer 100, it is usually a chemical mechanical polishing CMP, which is in the entire area of the back surface 100Y of the wafer 100. The polishing is simultaneously performed to uniformly thin the wafer 100, that is, the thickness of all regions of the thinned wafer 100' is the same. Further, as shown in FIGS. 2D-1 and 2D-2, a metal layer 300 is deposited on the central portion of the back surface 100Z of the thinned wafer 100'. In the process of forming the metal layer 300, the metal layer 300 is required to have a substantially circular cross section in the horizontal direction and a radius smaller than the radius of the wafer preparation region 101, and the metal layer 300 is the same as the back surface 100Z of the thinned wafer 100'. Center of the circle. Generally, after the wafer 100 is thinned, the step of implanting heavily doped ions on the back surface 100Z of the thinned wafer 100' is further included, after which the metal layer 300 is deposited to ensure the metal layer 300 and the thinned crystal. The back 100Z of the circle 100' has good ohmic contact because the wafer 101' is often used as a vertical power MOSFET wafer. Thus, the back surface 100Z of the thinned wafer 100' is located between the edge 300a of the metal layer 300 and the edge 100a of the wafer 100 to form an endless belt 104 (Fig. 2D-1), an annular endless belt 104 width Equal to the radius of the wafer 100 minus the radius of the metal layer 300 (Fig. 2D-2), Generally greater than D 1 and D 2 is approximately about 3 mm. The problem at this time is that the front side 100X of the wafer 100' is covered by the support structure 200, that is, the cut line 102 is blocked by the support structure 200, and it is difficult to perform cutting directly on the front side of the wafer 100'. The present invention therefore proposes to perform dicing from the back side 100Z of the wafer 100' and to cut the metal layer 300 together to form a metal electrode on the back side of the wafer 101', but those skilled in the art will recognize that the wafer 100' The back side 100Z is that no cutting line is provided to align with the cutting blade, and the cutting blade cannot directly align directly from the back side 100Z of the wafer 100' with the cutting line 102 of the front side 100X of the wafer 100'.
In some known auxiliary transmission alignment techniques, the cutting line 102 of the front side 100X of the wafer 100' can be detected from the back surface 100Z of the wafer 100' using a through-photographic apparatus, such as an infrared source camera (IR camera). It is a typical penetration camera. As shown in FIGS. 2D-1 to 2D-2, the detecting means of the IR camera can penetrate the metal layer 300 but can penetrate the crucible below the endless belt 104. Referring to Fig. 2D-3, a schematic view of the cutting line 102 in the region of the endless belt 104 using a penetrating photographic apparatus (not shown), although the portion of the cutting line 102 directly below the metal layer 300 cannot be detected. However, just because the radius of the metal layer 300 is smaller than the radius of the wafer preparation area 101, the IR camera is enabled to detect and capture the extended portion 102' of the cutting line 102 extending from below the metal layer 300 to below the endless belt 104 in the horizontal direction, The extended portion 102' is located between the edge 101a of the wafer preparation area 101 and the projection of the edge 300a of the metal layer 300 on the front side 100X, and it is apparent that the extended portion 102' does not overlap the metal layer 300 in the vertical direction. As long as the extended portion 102' at either end of any one of the cutting lines 102 is detected and positioned, a straight line can be positioned on the back surface 100Z of the wafer 100' according to the extended portion 102' at both ends of the selected one of the cutting lines 102. The line being positioned is exactly coincident with the arbitrary one of the cutting lines 102 in the vertical direction, and the cutting blade can perform cutting along the straight line to be positioned. It must be emphasized that since the radius of the metal layer 300 must be less than the radius of the wafer preparation region 101, otherwise no extension portion 102' can be used for IR detection, which is why the area of the wafer preparation area 101 is It is larger than the area of the metal layer 300, so that the back surface of a part of the wafer included in the wafer preparation area 101 is apparently not completely covered by the metal layer 300. In other words, the portion of the wafer that is not covered by the metal layer 300 does not function properly as a complete integrated circuit, and if these wafers are discarded, the yield may be lowered. However, since adjacent wafers 101'a are connected to each other and each wafer 101'a is distributed around a circular edge 101a, all of the incomplete wafers 101'a located on the wafer 100 are also approximately It can be presented as a ring structure (although the ring structure is not very regular). Therefore, a solution proposed by the present invention is to adjust the radius of the metal layer 300 such that the projection of the edge 300a in the vertical direction falls just in the portion of the wafer preparation area 101 near the edge 101a of the incomplete wafer 101'a. The upper side, that is, the edge 300a, overlaps the annular structure formed by the incomplete wafer 101'a in the vertical direction. As a result, in the wafer preparation area 101, only a part of the back surface of the incomplete wafer 101'a is not covered by the metal layer 300, and the other wafers 101' away from the edge 101a are normal products, so It is precisely those wafers 101'a that were originally incomplete that were abandoned, so that the yield would not be reduced.
As shown in FIG. 2E, an IR camera can be used to form a wafer on the back side 100Z of the wafer 100' using a first dicing blade 401 along an extended portion 102' of either end of any one of the dicing lines 102. 100' and the metal layer 300 are cut, and the cutting groove 102a formed in the wafer 100' shown in the figure is the cutting mark left by the first cutting blade 401 cutting the wafer 100' and the metal layer 300. During the dicing process, a plurality of vertically intersecting dicing grooves 102a are formed in the wafer 100' and the metal layer 300 is divided, for separating the plurality of wafers 101' from the wafer 100', and It is also used to cut the metal layer 300 into a plurality of spaced apart bottom metal layers 300', and one bottom metal layer 300' corresponds to the back side of one wafer 101'. Any one of the plurality of slit grooves 102a intersecting with one of the cutting grooves 102a corresponds to one cutting line 102. In one embodiment, as shown in FIG. 2E, the support structure 200 is a molding material, and all the straight lines formed along the extended portions 102' at both ends of the cutting line 102 are cut during the process of cutting the wafer 100' and the metal layer 300. The support structure 200 is also cut and formed into a top molding layer 200' on the front side of the wafer 101'. In another embodiment (not illustrated), if the support structure 200 is an adhesive film, the thickness thereof is generally relatively thin, and the support structure 200 does not have to be cut during the cutting of the wafer 100' and the metal layer 300. This facilitates the final removal of the wafer 101' with the top plastic layer 200' and the bottom metal layer 300' from the support structure 200.
In an embodiment as shown in FIGS. 3A-1 to 3C, the wafer 100' and the metal layer 300 are first diced according to the method shown in FIGS. 2A-1 to 2E to form a wafer 100'. The plurality of vertically intersecting cutting grooves 102b are separated and the metal layer 300 is divided. At this time, the metal layer 300 is still cut into a plurality of separated bottom metal layers 300', and a bottom metal layer 300' is correspondingly located. The back side of a wafer 101', but in this arrangement the support structure 200 is not cut. If the support structure 200 is an adhesive film, the cutting process cannot damage the support structure 200, and the formed cutting groove 102b is preferably just touching the support structure 200. If the support structure 200 is a molding material, in one case, the formed cutting groove 102b can still be selected to just touch the supporting structure 200; in another case, the partial cutting support structure 200 can be selected but the supporting structure 200 is not completely cut, That is, the depth of the cutting groove 102b is increased, and at this time, the cutting groove 102b extends in the vertical direction into the support structure 200, mainly to ensure that the wafer 101' cannot be peeled off in advance. As shown in FIG. 3A-2, in addition to the first type of dicing grooves 102b formed in the wafer preparation area 101, any one of the first type of dicing grooves 102b is formed in the area of the wafer 100' below the endless belt 104. The first type of cutting groove extends portion 102b-1. Further, as shown in FIG. 3B-1, a plastic sealing process is performed to form a plastic sealing layer 500 on the metal layer 300 by injection molding, and it is noted that the molding compound cannot be covered on the endless belt 104, since the molding compound before curing is liquid. Therefore, the molding compound is also filled in the first type of cutting groove 102b. In one embodiment, just because the molding compound is also filled in the first type of cutting groove 102b, when the first type of cutting groove 102b is formed, it is required to control that both ends of the first type of cutting groove 102b cannot be extended to the wafer 100. At the edge 100a, that is, the first type of dicing groove extending portion 102b-1 cannot be in contact with and contact with the edge 100a of the wafer 100' (Fig. 3A-2), otherwise the molding compound is filled in the first type of cutting groove. In the case of 102b, it is easy to flow from both ends of the first type of cutting groove 102b to the outside of the wafer 100'. For example, the first type of cutting groove extending portion 102b-1' shown in Fig. 3A-3 has been extended to interface with the edge 100a, and the molding compound easily escapes from the extending portion 102b-1'. After the generated overflow gel is cured, it is easy to adhere the wafer 100' to the molding device. Any attempt to forcibly remove the wafer 100' will cause the wafer 100' to be broken, which is what we do not want to see. of.
As shown in FIGS. 3B-2 and 3C, for any one of the first type of cutting grooves 102b, a straight line which can be formed by the molding compound filled in the extending portion 102b-1 at both ends (No. 3B-2) Figure), and the line is completely coincident with the arbitrary first type of cutting groove 102b in the vertical direction. If the second cutting blade 402 is used along the line formed by the molding compound filled in the extending portion 102b-1 at both ends of any one of the first type cutting grooves 102b, the molding layer 500, the wafer 100', and the filling in the first type are cut. The molding material in the groove 102b is cut a second time to form a second type of cutting groove 105 which coincides with the first type of cutting groove 102b along the first type of cutting groove 102b; and during the cutting process, the plastic sealing layer 500 is cut. The bottom molding layer 500' overlies the bottom metal layer 300', and the support structure 200 as a molding material is cut into the top molding layer 200' on the front side of the wafer 101'. If the support structure 200 is an adhesive film, it is not necessary to perform cutting on the support structure 200. In one case, if the blade width of the second cutting blade 402 is smaller than the blade width of the first cutting blade 401, the width of the second type of cutting groove 105 formed should be smaller than the width of the first type of cutting groove 102b, then the second cutting The knife 402 cuts the molding compound filled in the first type of cutting groove 102b into the side wall molding layer 500" coated on the side of the wafer 101'. In another case, the blade width of the second cutting blade 402 is exactly equal to the first cutting blade. The width of the blade of 401, the second cutting blade 402 just cuts off the molding compound filled in the first type of cutting groove 102b, at which time the side of the wafer 101' is a bare coating without any plastic sealing layer.
Based on the above inventive concept, the preparation method of another embodiment is as shown in FIG. 4A, FIG. 4A-4C, except that the wafer 100 is not integral when the back surface 100Y of the wafer 100 is polished. To reduce the thickness, a grinding wheel (not shown) having a radius smaller than the radius of the wafer 100 is used to polish only the central portion of the back surface 100Y of the wafer 100 to grind a grinding groove in the central portion of the back surface 100Y of the wafer 100. 110. The grinding groove 110 has a circular cross section in the horizontal direction and the grinding groove 110 is coaxial with the wafer 100. The radius of the formed grinding groove 110 is smaller than the radius of the wafer preparation area 101, and the radius of the grinding groove 110 can be adjusted by adjusting the radius of the grinding wheel. In the present invention, by adjusting the radius of the grinding groove 110, the projection of the side wall 110a of the grinding groove 110 in the vertical direction just falls on the portion of the incomplete wafer 101'a near the edge 101a in the region of the wafer preparation region 101. That is, the sidewall 110a of the grinding bath 110 overlaps exactly in the vertical direction with the annular structure formed by the plurality of incomplete wafers 101'a. The back surface 100Y of the wafer 100 is located in a region between the sidewall 110a of the polishing bath 110 and the edge 100a of the wafer 100 to form another annular strip 114 (as shown in the top view of FIG. 4B-2), and the annular annular strip 114 is from the crystal. circle 100 at the edge 100a extending toward the center of the back surface of the wafer 100 100Y, D 3 having a width equal to the radius of the wafer 100 minus the radius of the polishing tank 110, Generally greater than D 1 and D 3 is approximately about 3 mm.
It is known to those skilled in the art that the thinner the wafer is polished, the more likely it is to cause warpage and fragility. In this embodiment, an advantage over the method shown in FIG. 2C is that since the area of the wafer 100 under the endless belt 114 is retained during the grinding process, even if the central area of the back surface 100Y of the wafer 100 is ground Further, since the wafer 100 is supported and tensioned by the region located under the endless belt 114, the wafer 100 to be polished and thinned as shown in FIG. 4A does not become warped. Generally, after the central region of the back surface 100Y of the wafer 100 is thinned, the method further includes the step of implanting heavily doped ions into the wafer 100 at the bottom of the grinding bath 110, and then depositing the metal layer 600 in the grinding bath 110. The metal layer 600 is ensured to have good ohmic contact with the area of the wafer 100 below the grinding bath 110. The thickness of the deposited metal layer 600 is substantially the same as the depth of the grinding groove 110, that is, the top surface of the metal layer 600 is substantially in the same plane as the back surface 100Y of the wafer 100, wherein the radius of the metal layer 600 and the grinding groove 110 The radius is the same size. Similarly, the cutting line 102 of the front side 100X of the wafer 100 can be detected from the back surface 100Y of the wafer 100 by using a penetrating photographic apparatus such as an IR camera. As shown in FIG. 4B-3, although the infrared source cannot penetrate the metal layer 600, Penetrating the crucible below the endless belt 114. In FIG. 4B-3, an IR camera (not shown) detects the cutting line 102 in the region of the endless belt 114, although it is not possible to detect the portion of the cutting line 102 located directly below the metal layer 600, but due to the metal layer 600 The radius is less than the radius of the wafer preparation zone 101, and the IR camera is capable of detecting the extension 102" of the cutting line 102 extending from below the metal layer 600 below the annular band 114 in the horizontal direction. Again, as long as the extension 102 of either end of the cutting line 102 is present "Detected by the IR camera, a straight line can be positioned on the back side of the wafer 100 according to the extended portion 102" at either end of the cutting line 102, and the straight line positioned is just in the vertical direction and the arbitrary cutting line 102. Therefore, as shown in FIGS. 4B-3 to 4C, the wafer 100 and the metal layer 600 are cut by a straight line formed by the first cutting blade 401 along the extending portion 102" at either end of any one of the cutting lines 102. To separate the plurality of wafers 101' from the wafer 100. As in the foregoing technique, the plurality of types of cutting grooves 112a which are formed by aligning the plurality of cutting lines 102 to form a plurality of vertical and horizontal crossings in the wafer 100 separate the plurality of wafers 101' from each other, and the metal layer 600 is cut into many A bottom metal layer 600', a bottom metal layer 600' corresponding to the back of a wafer 101'. In one embodiment, as shown in FIG. 4C, the support structure 200 is a molding material, and the support structure 200 is cut together and forms a top molding layer 200' on the front side of the wafer 101', and the metal layer 600 is cut into the wafer. 101' bottom metal layer 300' on the back. In another embodiment (not illustrated), if the support structure 200 is a cling film, the support structure 200 need not be cut.
In one embodiment, as shown in FIGS. 5A-5C, the wafer 100 and the metal layer 600 are first cut according to the method shown in FIGS. 4A to 4B-3 to form a metal in the wafer 100 and formed. The plurality of vertically intersecting cutting grooves 112b are divided by the layer 600. The method employed in this embodiment is not significantly different from the method shown in Figs. 3A-1 to 3C. Also, the support structure 200 may be an adhesive film or a plastic sealing material. In this embodiment, the first type of cutting groove 112b is formed in the wafer preparation area 101, and the first type of cutting groove 112b further includes an extension portion of the first type of cutting groove formed in the region of the wafer 100 below the endless belt 114. 112b-1. Then, a plastic sealing process is performed to form a plastic sealing layer 700 on the metal layer 600 by injection molding. Note that the molding compound cannot be covered on the endless belt 114, and the molding compound is also filled in the first type of cutting groove 112b, as shown in FIG. 5B. Shown. Also, it is required to control that both ends of the first type of dicing grooves 112b cannot extend to the edge 100a of the wafer 100, that is, the first type of dicing groove extending portion 112b-1 cannot be in contact with and contact with the edge 100a of the wafer 100. The wafer 100 shown in FIG. 5B is compared with the wafer 100' shown in FIG. 3B-1, if the distance from the bottom of the former grinding groove 110 to the front surface 100X of the wafer 100 is equivalent to the back surface 100Z of the latter. The distance 100X of the front surface of the circle 100', that is, under the condition that the grinding thicknesses of the two are the same, the first type of cutting groove extending portion 112b-1 shown in Fig. 5B and the first type shown in Fig. 3B-1 The depth of the dicing groove extension portion 102b-1 is different because the area of the wafer 100 under the endless belt 114 is not ground. Similarly, a molding material filled in the extending portion 112b-1 at both ends of any one of the first type cutting grooves 112b can form a straight line, and the straight line is perpendicular to the arbitrary first type cutting groove 112b. . Using the second cutting blade 402 along the line of the molding compound filled in the extending portion 112b-1 at both ends of any one of the first type of cutting grooves 112b, the molding layer 700 and the molding compound filled in the first type of cutting groove 112b Cutting is performed to form a second type of cutting groove 115 that coincides with the first type of cutting groove 112b in the first type of cutting groove 112b; and during the cutting process, the plastic sealing layer 700 is cut to cover the bottom metal layer 600' The bottom molding layer 700', while the support structure 200 of the molding material is cut into the top molding layer 200' on the front side of the wafer 101'. If the support structure 200 is a cling film, the support structure 200 does not have to be cut. Similarly, if the blade width of the second cutting blade 402 is smaller than the blade width of the first cutting blade 401, the width of the second type of cutting groove 115 formed should be smaller than the width of the first type of cutting groove 102b, and the second cutting blade 402 will The molding compound in the first type of cutting groove 112b is cut into a side wall molding layer 700" covering the side of the wafer 101'. In another case, the blade width of the second cutting blade 402 is exactly equal to the blade width of the first cutting blade 401. At this time, the side of the wafer 101' is covered without any plastic sealing layer.
The exemplary embodiments of the specific structures of the specific embodiments have been described above, and the presently preferred embodiments are presented by way of illustration and the accompanying drawings. Various changes and modifications will no doubt become apparent to those skilled in the <RTIgt; Accordingly, the appended claims are intended to cover all such modifications and modifications Any and all equivalent ranges and contents within the scope of the claims are considered to be within the spirit and scope of the invention.

2...焊墊2. . . Solder pad

3...銅互聯機3. . . Copper interconnect

4...凸點電極4. . . Bump electrode

10、100、100’...晶圓10, 100, 100’. . . Wafer

21、26、401、402...切割刀21, 26, 401, 402. . . Cutting knife

22、102a、102b、105、112a、112b、115...切割槽22, 102a, 102b, 105, 112a, 112b, 115. . . Cutting slot

23...樹脂twenty three. . . Resin

100a、101a、300a...邊緣100a, 101a, 300a. . . edge

100X...正面100X. . . positive

100Y、100Z...背面100Y, 100Z. . . back

101...晶片製備區101. . . Wafer preparation area

101’、101’a...晶片101’, 101’a. . . Wafer

102...切割線102. . . Cutting line

102b-1、102b-1’、112b-1...切割槽延伸部分102b-1, 102b-1', 112b-1. . . Cutting groove extension

102’、102"...延伸部分102', 102"... extension

103...預留環形帶103. . . Reserved ring belt

104、114...環形帶104, 114. . . Ring belt

200...支撐結構200. . . supporting structure

200’...頂部塑封層200’. . . Top plastic layer

300、600...金屬層300, 600. . . Metal layer

300’、600’...底部金屬層300’, 600’. . . Bottom metal layer

500、700...塑封層500, 700. . . Plastic layer

500’、700’...底部塑封層500’, 700’. . . Bottom plastic seal

500"、700"...側壁塑封層500", 700". . . Side wall plastic seal

D1 、D2 、D3 ...寬度D 1 , D 2 , D 3 . . . width

參考所附附圖,以更加充分的描述本發明的實施例。然而,所附附圖僅用於說明和闡述,並不構成對本發明範圍的限制。
第1A至1D圖是背景技術中晶圓級封裝的半導體裝置的製造方法的流程示意圖。
第2A-1至2E圖是實施例一中從晶圓背面實施切割的晶片封裝方法的流程示意圖。
第3A-1至3C圖是實施例二中從晶圓背面實施切割的晶片封裝方法的流程示意圖。
第4A至4C圖實施例三中從晶圓背面實施切割的晶片封裝方法的流程示意圖。
第5A至5C圖實施例四中從晶圓背面實施切割的晶片封裝方法的流程示意圖。

Embodiments of the present invention are described more fully with reference to the accompanying drawings. However, the attached drawings are for illustration and illustration only and are not intended to limit the scope of the invention.
1A to 1D are schematic flow charts showing a method of manufacturing a wafer-level packaged semiconductor device in the background art.
2A-1 to 2E are schematic flow charts of a wafer packaging method for performing dicing from the back side of the wafer in the first embodiment.
3A-1 to 3C are schematic flow charts of a wafer packaging method for performing dicing from the back side of the wafer in the second embodiment.
4A to 4C are schematic flow charts showing a wafer encapsulation method for performing dicing from the back side of the wafer in the third embodiment.
5A to 5C are schematic flow charts showing a wafer encapsulation method for performing dicing from the back side of the wafer in the fourth embodiment.

101’...晶片101’. . . Wafer

102b、105...切割槽102b, 105. . . Cutting slot

102b-1...切割槽延伸部分102b-1. . . Cutting groove extension

200...支撐結構200. . . supporting structure

200’...頂部塑封層200’. . . Top plastic layer

300’...底部金屬層300’. . . Bottom metal layer

402...切割刀402. . . Cutting knife

500...塑封層500. . . Plastic layer

500’...底部塑封層500’. . . Bottom plastic seal

500"...側壁塑封層500"... sidewall molding

Claims (22)

一種支援從晶圓背面實施切割的晶片封裝方法,該晶圓的晶片製備區包含多個晶片且以位於晶圓正面的多條縱橫交叉的切割線界定各晶片的邊界,包括以下步驟:
於晶圓的正面覆蓋一支撐結構;
於晶圓的背面對晶圓進行研磨,並在減薄後的晶圓的背面的中心區域沉積一層半徑小於所述晶片製備區的半徑的金屬層,其中,減薄後的晶圓的背面位於金屬層的邊緣與晶圓的邊緣之間的區域構成一環形帶;
利用穿透攝影設備在所述環形帶區域內對所述切割線進行探測,用於探測切割線在水準方向上從金屬層下方延伸至環形帶下方的延伸部分,同時利用第一切割刀沿著任意一條切割線兩端的所述延伸部分所構成的直線對減薄後的晶圓以及金屬層進行切割。
A wafer packaging method for supporting dicing from the back side of a wafer, the wafer preparation area of the wafer comprising a plurality of wafers and defining a boundary of each wafer by a plurality of cross-cutting lines at the front side of the wafer, comprising the steps of:
Covering a support structure on the front side of the wafer;
Grinding the wafer on the back side of the wafer, and depositing a metal layer having a radius smaller than a radius of the wafer preparation area in a central region of the back surface of the thinned wafer, wherein the back side of the thinned wafer is located The area between the edge of the metal layer and the edge of the wafer constitutes an annular band;
Detecting the cutting line in the area of the endless belt by means of a penetrating photographic apparatus for detecting an extension of the cutting line extending from below the metal layer to below the endless belt in the horizontal direction while using the first cutting blade along A straight line formed by the extended portions at both ends of any one of the cutting lines cuts the thinned wafer and the metal layer.
如申請專利範圍第1項所述的方法,其中,所述支撐結構為塑封材料,在對減薄後的晶圓以及金屬層進行切割的過程中,同時還對所述支撐結構一併進行切割,並形成位於晶片正面的頂部塑封層。The method of claim 1, wherein the support structure is a molding material, and during the cutting of the thinned wafer and the metal layer, the support structure is also cut together. And forming a top molding layer on the front side of the wafer. 如申請專利範圍第1項所述的方法,其中,所述支撐結構為粘貼膜。The method of claim 1, wherein the support structure is an adhesive film. 如申請專利範圍第1項所述的方法,其中,於晶圓的背面對晶圓進行研磨的過程中,是在晶圓背面所有的區域同時進行研磨以將晶圓均勻的減薄。The method of claim 1, wherein the polishing of the wafer on the back side of the wafer is performed simultaneously on all areas of the back surface of the wafer to uniformly thin the wafer. 如申請專利範圍第1項所述的方法,其中,形成金屬層的過程中,所形成的金屬層的邊緣在垂直方向上的投影落在靠近晶片製備區的邊緣的多個不完整的晶片上。The method of claim 1, wherein in the forming the metal layer, the projection of the edge of the formed metal layer in the vertical direction falls on a plurality of incomplete wafers near the edge of the wafer preparation area. . 如申請專利範圍第1項所述的方法,其中,在對晶圓以及金屬層進行切割過程中,形成多條縱橫交叉的並將所述多個晶片分隔開的第一類切割槽,第一類切割槽的延伸部分形成在減薄的晶圓位於環形帶下方的區域中,並且所述金屬層被切割成位於晶片背面的底部金屬層;以及
進一步進行塑封工藝,以塑封料覆蓋在所述金屬層上形成一塑封層,並且所述塑封料在塑封工藝中還填充在所述第一類切割槽中;
完成塑封工藝之後,利用第二切割刀沿著任意一條第一類切割槽兩端的延伸部分中所填充的塑封料而構成的直線對所述塑封層以及填充在第一類切割槽中的塑封料進行切割,形成與所述第一類切割槽重合的第二類切割槽;並且
所述塑封層被切割成覆蓋在底部金屬層上的底部塑封層。
The method of claim 1, wherein in the process of cutting the wafer and the metal layer, a plurality of first-type cutting grooves intersecting and separating the plurality of wafers are formed, An extension of a type of cutting groove is formed in a region of the thinned wafer below the endless belt, and the metal layer is cut into a bottom metal layer on the back side of the wafer; and further a plastic sealing process is performed to cover the plastic compound Forming a plastic sealing layer on the metal layer, and the molding compound is further filled in the first type of cutting groove in the molding process;
After the molding process is completed, the molding layer and the molding compound filled in the first type of cutting groove are formed by a straight line formed by the second cutting blade along the molding compound filled in the extending portion of both ends of any one of the first type of cutting grooves. Cutting is performed to form a second type of cutting groove that coincides with the first type of cutting groove; and the plastic sealing layer is cut into a bottom molding layer overlying the bottom metal layer.
如申請專利範圍第6項所述的方法,其中,所述支撐結構為塑封材料,並且還利用第二切割刀同時將所述支撐結構切割成位於晶片正面的頂部塑封層。The method of claim 6, wherein the support structure is a molding material, and the support structure is also simultaneously cut into a top molding layer on the front side of the wafer using a second cutting blade. 如申請專利範圍第6項所述的方法,其中,所述支撐結構為粘貼膜。The method of claim 6, wherein the support structure is an adhesive film. 如申請專利範圍第6項所述的方法,其中,所述第二切割刀的刀片寬度小於所述第一切割刀的刀片寬度;以及
所形成第二類切割槽的寬度小於第一類切割槽的寬度,並用第二切割刀將第一類切割槽中的塑封料切割成包覆在所述晶片的側面的側壁塑封層。
The method of claim 6, wherein the second cutting blade has a blade width smaller than a blade width of the first cutting blade; and the second type of cutting groove formed has a smaller width than the first type of cutting groove The width of the molding compound in the first type of cutting groove is cut by a second cutting blade into a side wall molding layer covering the side of the wafer.
如申請專利範圍第6項所述的方法,其中,所述第二切割刀的刀片寬度等於所述第一切割刀的刀片寬度。The method of claim 6, wherein the second cutter has a blade width equal to a blade width of the first cutter. 如申請專利範圍第6項所述的方法,其中,任意一條第一類切割槽的延伸部分均與晶圓的邊緣沒有交界。The method of claim 6, wherein the extension of any one of the first type of cutting grooves has no interface with the edge of the wafer. 一種支援從晶圓背面實施切割的晶片封裝方法,該晶圓的晶片製備區包含多個晶片且以位於晶圓正面的多條縱橫交叉的切割線界定各晶片的邊界,包括以下步驟:
於晶圓的正面覆蓋一支撐結構;
於晶圓的背面對晶圓進行研磨,以在晶圓背面的中心區域研磨出一個半徑小於所述晶片製備區的半徑的研磨槽,晶圓的背面位於研磨槽的側壁與晶圓的邊緣之間的區域構成環形帶;
在所述研磨槽中沉積一層金屬層;
利用穿透攝影設備在所述環形帶區域內對所述切割線進行探測,用於探測切割線在水準方向上從金屬層下方延伸至環形帶下方的延伸部分,同時利用第一切割刀沿著任意一條切割線兩端的所述延伸部分所構成的直線對所述晶圓以及金屬層進行切割。
A wafer packaging method for supporting dicing from the back side of a wafer, the wafer preparation area of the wafer comprising a plurality of wafers and defining a boundary of each wafer by a plurality of cross-cutting lines at the front side of the wafer, comprising the steps of:
Covering a support structure on the front side of the wafer;
Grinding the wafer on the back side of the wafer to grind a grinding groove having a radius smaller than a radius of the wafer preparation area in a central region of the back surface of the wafer, the back side of the wafer being located at the sidewall of the polishing groove and the edge of the wafer The area between the ends constitutes an endless belt;
Depositing a metal layer in the grinding tank;
Detecting the cutting line in the area of the endless belt by means of a penetrating photographic apparatus for detecting an extension of the cutting line extending from below the metal layer to below the endless belt in the horizontal direction while using the first cutting blade along A straight line formed by the extended portions at both ends of any one of the cutting lines cuts the wafer and the metal layer.
如申請專利範圍第12項所述的方法,其中,所述支撐結構為塑封材料,在對晶圓以及金屬層進行切割的過程中,同時還對所述支撐結構一併進行切割,並形成位於晶片正面的頂部塑封層。The method of claim 12, wherein the support structure is a molding material, and during the cutting of the wafer and the metal layer, the support structure is also cut and formed at the same time. The top molding layer on the front side of the wafer. 如申請專利範圍第12項所述的方法,其中,所述支撐結構為粘貼膜。The method of claim 12, wherein the support structure is an adhesive film. 如申請專利範圍第12項所述的方法,其中,在所述研磨槽中所沉積的金屬層的厚度與所述研磨槽的深度相同。The method of claim 12, wherein the thickness of the metal layer deposited in the grinding bath is the same as the depth of the grinding bath. 如申請專利範圍第12項所述的方法,其中,形成研磨槽的過程中,所形成的研磨槽的側壁在垂直方向上的投影落在靠近晶片製備區的邊緣的多個不完整的晶片上。The method of claim 12, wherein in the forming the grinding groove, the projection of the sidewall of the formed grinding groove in the vertical direction falls on a plurality of incomplete wafers near the edge of the wafer preparation area. . 如申請專利範圍第12項所述的方法,其中,在對晶圓以及金屬層進行切割過程中,形成多條縱橫交叉的並將所述多個晶片分隔開的第一類切割槽,第一類切割槽的延伸部分形成在晶圓位於環形帶下方的區域中,並且所述金屬層被切割成位於晶片背面的底部金屬層;以及
進一步進行塑封工藝,以塑封料覆蓋在所述金屬層上形成一塑封層,並且所述塑封料在塑封工藝中還填充在所述第一類切割槽中;
完成塑封工藝之後,利用第二切割刀沿著任意一條第一類切割槽兩端的延伸部分中所填充的塑封料而構成的直線對所述塑封層以及填充在第一類切割槽中的塑封料進行切割,形成與所述第一類切割槽重合的第二類切割槽;並且
所述塑封層被切割成覆蓋在底部金屬層上的底部塑封層。
The method of claim 12, wherein, in the process of cutting the wafer and the metal layer, forming a plurality of first-type cutting grooves that intersect vertically and horizontally and separate the plurality of wafers, An extension of a type of dicing groove is formed in a region of the wafer below the endless belt, and the metal layer is cut into a bottom metal layer on the back side of the wafer; and a further molding process is performed to cover the metal layer with a molding compound Forming a plastic sealing layer thereon, and the molding compound is further filled in the first type of cutting groove in the molding process;
After the molding process is completed, the molding layer and the molding compound filled in the first type of cutting groove are formed by a straight line formed by the second cutting blade along the molding compound filled in the extending portion of both ends of any one of the first type of cutting grooves. Cutting is performed to form a second type of cutting groove that coincides with the first type of cutting groove; and the plastic sealing layer is cut into a bottom molding layer overlying the bottom metal layer.
如申請專利範圍第17項所述的方法,其中,所述支撐結構為塑封材料,並且還利用第二切割刀同時將所述支撐結構切割成位於晶片正面的頂部塑封層。The method of claim 17, wherein the support structure is a molding material, and the support structure is also simultaneously cut into a top molding layer on the front side of the wafer by a second cutting blade. 如申請專利範圍第17項所述的方法,其中,所述支撐結構為粘貼膜。The method of claim 17, wherein the support structure is an adhesive film. 如申請專利範圍第17項所述的方法,其中,所述第二切割刀的刀片寬度小於所述第一切割刀的刀片寬度;以及
所形成第二類切割槽的寬度小於第一類切割槽的寬度,並用第二切割刀將第一類切割槽中的塑封料切割成包覆在所述晶片的側面的側壁塑封層。
The method of claim 17, wherein the second cutting blade has a blade width smaller than a blade width of the first cutting blade; and the second type of cutting groove formed has a smaller width than the first type of cutting groove The width of the molding compound in the first type of cutting groove is cut by a second cutting blade into a side wall molding layer covering the side of the wafer.
如申請專利範圍第17項所述的方法,其中,所述第二切割刀的刀片寬度等於所述第一切割刀的刀片寬度。The method of claim 17, wherein the second cutter has a blade width equal to a blade width of the first cutter. 如申請專利範圍第17項所述的方法,其中,任意一條第一類切割槽的延伸部分均與晶圓的邊緣沒有交界。The method of claim 17, wherein the extension of any one of the first type of cutting grooves has no interface with the edge of the wafer.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904610A (en) * 1988-01-27 1990-02-27 General Instrument Corporation Wafer level process for fabricating passivated semiconductor devices
US5393706A (en) * 1993-01-07 1995-02-28 Texas Instruments Incorporated Integrated partial sawing process
US5888883A (en) * 1997-07-23 1999-03-30 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
US6107164A (en) * 1998-08-18 2000-08-22 Oki Electric Industry Co., Ltd. Using grooves as alignment marks when dicing an encapsulated semiconductor wafer
US6528393B2 (en) * 2000-06-13 2003-03-04 Advanced Semiconductor Engineering, Inc. Method of making a semiconductor package by dicing a wafer from the backside surface thereof
US7863159B2 (en) * 2008-06-19 2011-01-04 Vertical Circuits, Inc. Semiconductor die separation method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904610A (en) * 1988-01-27 1990-02-27 General Instrument Corporation Wafer level process for fabricating passivated semiconductor devices
US5393706A (en) * 1993-01-07 1995-02-28 Texas Instruments Incorporated Integrated partial sawing process
US5527744A (en) * 1993-01-07 1996-06-18 Texas Instruments Incorporated Wafer method for breaking a semiconductor
US5888883A (en) * 1997-07-23 1999-03-30 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
US6107164A (en) * 1998-08-18 2000-08-22 Oki Electric Industry Co., Ltd. Using grooves as alignment marks when dicing an encapsulated semiconductor wafer
US6528393B2 (en) * 2000-06-13 2003-03-04 Advanced Semiconductor Engineering, Inc. Method of making a semiconductor package by dicing a wafer from the backside surface thereof
US7863159B2 (en) * 2008-06-19 2011-01-04 Vertical Circuits, Inc. Semiconductor die separation method

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