TWI448905B - Electronic apparatus with circuit architecture for bus sharing - Google Patents

Description

Electronic device having a circuit structure of a shared bus

The present invention relates to an electronic device, and more particularly to a circuit architecture in which a busbar is shared in an electronic device.

Portable devices such as smart phones, multimedia players, personal digital assistants, and digital cameras have become items that users often carry with them because of their ease of use. In order to enhance the connectivity of the portable device to extend other functions, the industry has proposed a variety of different busbars to allow the portable device to be further integrated with other applications. Among the many standards, Mobile High-Definition Link (MHL) is a new standard that is compatible with high-definition multimedia interface (HDMI) to define video for multimedia devices. And the format of the audio output, allowing the mobile device to connect to high-definition TV or other compatible display devices.

MHL currently uses the most popular connection methods, such as USB-based connectors and busbars, which enable smart phones, multimedia players, etc. to output high-quality video and audio.

However, in order to meet the specifications of high-speed busbars such as MHL, handheld devices need to provide high-speed signals, and internal busbars must face the problem of how to maintain signal quality.

The present invention provides an embodiment of a circuit structure sharing a bus bar in an electronic device, which allows multiple signals to share the same bus bar and connector and maintain signal quality.

According to an aspect of the invention, an electronic device is proposed. The electronic device comprises a connector, a data bus, a first group of switching devices and a first control unit. One end of the data bus is connected to the connector. The first group of switching devices includes a first switching device and a second switching device. One output of the first switching device is connected to the other end of the data bus. The first switching device selectively allows one of the first signal and the second signal to pass, wherein the transmission frequency of the first signal is substantially equal to The bandwidth of a switch. One of the output devices of the second switching device is connected to the data bus, and the second switching device selectively allows a third signal to pass. The first control unit controls the first group of switching devices to selectively allow one of the first group of signals to pass through the data bus and the connector, wherein the first group of signals includes the first signal, the second signal, and the third signal.

According to another aspect of the present invention, an electronic device is provided comprising a connector, a data bus, a set of switching devices, and a control unit. One end of the data bus is connected to the connector, and the other end of the data bus is coupled to a third signal. The set of switching devices includes a first switching device and a second switching device. One output of the first switching device is connected to the data bus, and the first switching device selectively allows a first signal to pass, wherein the transmission frequency of the first signal is substantially equal to the bandwidth of the first switch. One of the second switching devices has an output port connected to the data bus, and the second switching device selectively allows a second signal to pass. The control unit controls the set of switching devices to selectively allow one of the set of signals to pass through the data bus and the connector, wherein the set of signals includes the first signal, the second signal, and the third signal.

According to another aspect of the present invention, an electronic device is provided comprising a connector, a data bus, a set of switching devices, and a control unit. One end of the data bus is connected to the connector. The set of switching devices includes a first switching device and a second switching device. One of the first switching devices has an output port connected to the data bus. The first switching device has a first input port and a second input port. The first input port and the second port are connected to a first signal and a second signal, wherein the first signal has a transmission frequency substantially equal to the first The bandwidth of the switch. One of the output devices of the second switching device is connected to the second input port of the first switching device, and one of the input devices of the second switching device is connected to a third signal. The control unit controls the set of switching devices to selectively allow one of the set of signals to pass through the data bus and the connector, wherein the set of signals includes the first signal, the second signal, and the third signal.

In order to better understand the above and other aspects of the present invention, various embodiments are described below, and in conjunction with the drawings, the detailed description is as follows:

The following provides an embodiment of a circuit structure sharing a bus in an electronic device, which allows multiple signals to share the same bus and connector and maintain signal quality.

The following example uses a data bus that is compatible with two high-speed data bus standards. For example, it is compatible with Universal Serial Bus (USB) and mobile high-quality links (Mobile). High-Definition Link, MHL) is a data bus as an example. The circuit architecture in the embodiment allows at least three signals to share the same bus and connector. In some embodiments, the connector is, for example, a USB-compliant connector, or a USB-based connector such as a micro-USB or mini-USB, or a connection to other custom-made cables in conjunction with the USB-based standard. Device.

In some embodiments, a wider bandwidth switching device is used to selectively allow the passage of high speed signals, such as switching devices having a wide frequency of 480 MHz, 1 GHz, or 1.1 GHz. For example, FIG. 1 illustrates a response curve 100 of the gain versus frequency of a high frequency switching device (eg, a switching device with a wide frequency of 1 GHz), wherein the horizontal axis frequency is expressed in log scale. In order to maintain the signal quality of the high speed signal through the switching device for use by the next circuit stage, in one embodiment, the signal attenuation is substantially about or less than -3 dB for a 1 Ghz high speed signal.

FIG. 2A is a schematic diagram showing an embodiment of a circuit structure sharing a bus bar in an electronic device. In FIG. 2A, an electronic device 20 includes a data bus 201, a connector 205, a first set of switching devices, and a first control unit. One end of the data bus 201 is connected to the connector 205. The first group of switching devices includes a first switching device 210 and a second switching device 220. The output 埠OUT1 of one of the first switching devices 210 is connected to the other end of the data bus. The first switching device 210 selectively allows one of the first signal S1 and the second signal S2 to pass. The transmission frequency of the first signal S1 is substantially equal to the bandwidth of the first switching device 210; this means that when the first signal S1 passes through the first switching device 210, the signal attenuation is substantially equal to or less than, for example, -3 dB. Or within the range allowed by the specifications of the other first signal S1. One of the output devices 埠OUT2 of the second switching device 220 is connected to the data bus 201, and the second switching device 220 selectively allows a third signal S3 to pass. The first control unit 230 controls the first group of switching devices to selectively allow one of the first group of signals to pass through the data bus 201 and the connector 205, wherein the first group of signals includes the first The signal S1, the second signal S2, and the third signal S3. The switching devices all have control terminals, such as control terminals CL1 and CL2, and other circuits can be controlled by outputting control signals.

The first control unit 230 controls the first group of switching devices such that one of the first signal S1 and the second signal S2 passes only the first switching device 210 to pass through the bus bar 201 and the connector 205.

Since the transmission frequency of the first signal S1 is substantially equal to the bandwidth of the first switching device 210, the above architecture can ensure that the attenuation degree of the first signal S1 is within a range in which the operation can be normally performed. For example, the first signal S1 is output from its signal source (not shown), passes through the first switching device 210 only through the bus bar 201 and the connector 205, and does not pass other switches, so the attenuation is about -3 dB or less. In this way, the quality of the first signal S1 signal can be maintained. Conversely, if two or more high frequency switching devices are used, the degree of attenuation is likely to exceed the range of normal operation, for example, greater than -3 dB. Furthermore, for the design of the electronic device 20, the above-described embodiment can use a relatively simple circuit structure between the first switching device 210 and the connector 205 without using other switching devices.

In some embodiments, the electronic device 20 has a circuit structure that allows multiple signals of different rate signals to share the same bus and connector and maintain signal quality. In one embodiment, the first signal S1 is, for example, a signal representing a transmission frequency substantially equal to the bandwidth of the first switching device 210, such as a motion picture quality link (MHL) signal, or other video or audio signal; The second signal S2 is, for example, a high-speed signal, such as a high-speed signal having substantially the same or a lower rate as the first signal S1, for example, a signal based on a universal serial bus (USB). Such as USB 1.0, USB 1.1, USB 2.0, USB 3.0 or other USB-based signals. In another embodiment, the third signal S3 can represent a digital or analog audio signal or a universal asynchronous receiver/transmitter (UART) signal. In other embodiments, the first signal S1 may also represent a standard signal based on a universal serial bus.

FIG. 2B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 2A. As shown in step S200, a command is received. For example, a system program or application or firmware executed by the electronic device 20 receives a command set by the user or issued by the program or other parts of the electronic device such as a firmware. Step S220 then determines which function the command represents. If the function is related to one of the first group of signals, the associated signal is used by the bus 201. For example, if the command represents the function related to the use of the first signal S1, step S231 is executed to enable the first switching device 210 to pass the first signal S1 and disable the second switching device 220. If the command represents the function related to the second signal S2, step S232 is executed to enable the first switching device 210 to pass the second signal S2 and disable the second switching device 220. If the command represents the function related to the third signal S3, step S233 is executed to enable the second switching device 220 to pass the third signal S3 and disable the first switching device 210.

For the method of FIG. 2B, for example, a processing unit (such as a central processing unit, a microcontroller, a digital signal processor) of the electronic device 20 receives a command, and controls the first control unit 230 to send a control signal according to the method. Steps S231 to S233 control the first group of switching devices. In another embodiment, the first control unit 230 performs the method of FIG. 2B above. In an embodiment, the first control unit 230 can be a processing unit of the electronic device 20. The way to implement the 2A or 2B diagram is not limited to this.

FIG. 3A is a schematic diagram showing another embodiment of a circuit structure sharing a bus bar in an electronic device, wherein the electronic device uses a dual processor. The difference between the electronic device 30 represented by FIG. 3A and the electronic device 20 of FIG. 2A is that the electronic device 30 further includes a first expansion switch device 320 and a second control unit 340. One output of the first expansion switch device 320 is connected to the first switch device 210 for receiving an input signal (such as IN1 or IN2) of a signal (for example, the second signal S2). The first expansion switch device 320 selectively allows a first extended signal E1 to pass. The second control unit 340 controls at least the first extended switching device 320 to selectively allow the first extended signal E1 to pass. The first expansion switch device 320 is provided with a control terminal, such as the control terminal CL3, and other circuits can be controlled by outputting a control signal.

In the example of FIG. 3A, the first control unit 330 and the second control unit 340 further control the first group of switching devices and the first expansion switch device 320 to selectively allow the first extended signal E1 to pass the first extended switch. Device 320.

Since the electronic device 30 uses at least two processors, such as a dual core processor or a dual processor, the electronic device 30 further includes a first expansion switch device 320 and a second control unit 340. In one embodiment, the first extended signal E1 is for internal communication between the two processors.

Therefore, FIG. 3B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 3A. As shown in step S300, a command is received. For example, a system program or application or firmware executed by the electronic device 30 receives a command set by the user or issued by the program or other parts of the electronic device such as a firmware. Step S320 then determines which function the command represents. If the command represents the function related to the first signal S1, step S331 is executed to enable the first switching device 210 to pass the first signal S1 and disable the second switching device 220 and the first expansion switching device 320. If the command represents the function related to the second signal S2, step S332 is executed to enable the first switching device 210 to pass the second signal S2 and disable the second switching device 220 and the first expansion switching device 320. If the command represents the function related to the third signal S3, step S333 is executed to enable the second switching device 220 to pass the third signal S3 and disable the first switching device 210 and the first expansion switching device 320. If the command represents the function related to the second signal S2 and the first extended signal E1, step S340 is executed to enable the first extended switching device 320 and disable the first switching device 210 and the second switching device 220.

Thus, in an embodiment, the circuit architecture of the electronic device 30 can be used by the multiprocessor to communicate via the first extended signal E1. When the first extended signal E1 is allowed to pass through the first extended switching device 320, the first control unit 330 and the second control unit 340 control the first extended switching device 320 to be turned on, and control the first group of switching devices to be disabled. In an embodiment, the second signal S2 and the first extended signal E1 represent a standard signal based on a universal serial bus, such as USB 1.0, USB 1.1, USB 2.0, USB 3.0 or other USB-based signals. In other embodiments, the second signal S2 and the first extended signal E1 may also be other signals for communicating with multiple processors of the electronic device 30.

FIG. 4A is a schematic diagram showing still another embodiment of a circuit structure sharing a bus bar in an electronic device. The electronic device 40 includes a data bus bar 201, a connector 205, a set of switch devices, and a control unit 430. One end of the data bus 201 is connected to the connector 205, and the other end of the data bus 201 is coupled to a third signal S3. The set of switching devices includes a first switching device 410 and a second switching device 420. An output 埠OUT1 of the first switching device 410 is connected to the data bus 201, and the first switching device 410 selectively allows a first signal S1 to pass, wherein the transmission frequency of the first signal S1 is substantially equal to the first switch bandwidth. The output 埠OUT2 of the second switching device 420 is connected to the data bus 201, and the first switching device 410 selectively allows a second signal S2 to pass. The control unit 430 controls the set of switching devices to selectively allow one of the signals to pass, so that the passed signal passes through the data bus 201 and the connector 205, wherein the group of signals includes the first signal S1 and the second Signal S2 and third signal S3.

In an embodiment, the control unit 430 controls the set of switching devices such that the first signal S1 passes only the first switching device 410 to pass through the bus bar 201 and the connector 205.

In an embodiment, the control unit 430 controls the set of switching devices to allow one of the first signal S1 and the second signal S2 to pass through the data bus 201 and the connector 205, and the third signal S3 The system is in a high impedance state to disable the third signal S3.

Since the transmission frequency of the first signal S1 is substantially equal to the bandwidth of the first switching device 410, the above architecture can ensure that the attenuation of the first signal S1 is within the range of normal operation. For example, the first signal S1 is output from its signal source (not shown), passes through the first switching device 410 only through the bus bar 201 and the connector 205, and does not pass other switches, so the attenuation is about -3 dB or less. In this way, the quality of the first signal S1 signal can be maintained. For the design of the electronic device 40, a relatively simple circuit configuration can be used between the output 埠OUT1 of the first switching device 410 and the connector 205 without having to use other switching device circuits.

In some embodiments, the electronic device 40 has a circuit structure that allows a plurality of signals to share the same bus and connector and maintain signal quality. In an embodiment, the first signal S1 is, for example, a signal whose transmission frequency is substantially equal to the bandwidth of the first switching device 410, such as an MHL signal or other video audio signal; and the third signal S3 belongs to the high speed. The signal is, for example, a high-speed signal having substantially the same or a lower rate as the first signal S1, such as a USB-based signal, such as USB 1.0, USB 1.1, USB 2.0, USB 3.0 or other USB-based signals. In another embodiment, the second signal S2 can represent a digital or analog audio signal, or a UART signal. In other embodiments, the first signal S1 may also represent a signal based on the USB standard.

FIG. 4B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 4A. As shown in step S400, a command is received. For example, a system program or application or firmware executed by the electronic device 40 receives a command set by a user or issued by the program or other parts of the electronic device such as a firmware. Step S420 then determines which function the command represents. If the command represents the function related to the first signal S1, step S431 is executed to enable the first switching device 410 and disable the second switching device 420 and the third signal S3. If the command represents the function related to the second signal S2, step S432 is executed to enable the second switching device 420 and disable the first switching device 410 and the third signal S3. If the command represents the function related to the third signal S3, step S433 is executed to disable the first switching device 410 and the second switching device 420.

For the method of the above FIG. 4B, for example, a processing unit (such as a central processing unit, a microcontroller, a digital signal processor) of the electronic device 40 receives a command, and controls the control unit 430 to issue a control signal according to the method. Steps S431 to S433 control the group of switching devices. In another embodiment, control unit 430 performs the method of FIG. 4B above. In an embodiment, the control unit 430 can be a processing unit of the electronic device 40. The way to implement Figure 4A or 4B is not limited to this.

In another embodiment according to FIG. 4A, the connection position of the output switch 第一 of the first switching device 410 and the second switching device 420 and the bus bar 201 may be reversed.

In addition to the above embodiments, FIG. 5A is a schematic diagram showing another embodiment of a circuit structure sharing a bus bar in an electronic device. The electronic device 50 of FIG. 5A is the same as the electronic device 20 of FIG. 2A. The difference between the two is that, in FIG. 5A, the output 埠OUT2 of the second switching device 220 is coupled to the first switching device 210. One of the inputs (such as IN1 or IN2) is, for example, coupled to input 埠IN2.

According to an embodiment of FIG. 5A, the first control unit 530 controls the group of switching devices (for example, the first switching device 210 and the second switch device 220) to pass the first signal S1 through the first switching device 210. Bus bar 201 and connector 205.

According to an embodiment of FIG. 5A, when the first control unit 530 controls the set of switching devices to allow the third signal S3 to pass through the second switching device 220 and the first switching device 210 and through the data bus 201 and the connector 205, The second signal S2 is in a high impedance state to disable the second signal S2. In an embodiment, the first control unit 530 can, for example, control or indicate a signal source (not shown) of the second signal S2, such as a controller of the second signal, to enable the signal source of the second signal S2. The output 埠 (not shown) is in a high impedance state.

Since the transmission frequency of the first signal S1 is substantially equal to the bandwidth of the first switching device 410, the above architecture can ensure that the attenuation of the first signal S1 is within the range of normal operation. For example, the first signal S1 is output from its signal source (not shown), passes through the first switching device 410 only through the bus bar 201 and the connector 205, and does not pass other switches, so the attenuation is about -3 dB or less. In this way, the quality of the first signal S1 signal can be maintained. In the embodiment of FIG. 5A, in the different cases of the shared signal, the bus bar 201 between the output 埠OUT1 of the first switching device 210 and the connector 205 is maintained as a simple circuit structure, which helps maintain the bus bar. The quality of the signal of 201.

FIG. 5B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 5A. The method of FIG. 5B is similar to the method of FIG. 5A, and the difference between the two is that, in FIG. 5B, if it is determined in step S220 that the command represents a function related to the use of the third signal S3, step S533 is performed. In step S533, the second signal S2 is disabled, the second switching device 220 is enabled to pass the third signal S3, and the first switching device 210 passes the third signal S3.

For the method of FIG. 5B, for example, a processing unit (such as a central processing unit, a microcontroller, a digital signal processor) of the electronic device 50 receives a command, and controls the first control unit 530 to send a control signal. The first group of switching devices are controlled in accordance with steps S231 through S533. In another embodiment, the first control unit 530 performs the method of FIG. 5B above. In an embodiment, the first control unit 530 can be a processing unit of the electronic device 50. The manner of implementing the 5A or 5B diagram is not limited thereto, and can be implemented by referring to the other embodiments described above.

In the above embodiments and drawings, a simplified manner is used to illustrate the manner in which a plurality of signals pass through the switching device and the connection relationship between the bus bars and the connectors therein. For example, in the figure, the bus bar 201 is used to indicate the transmission line of the differential signal by two connecting lines, and other signal lines need to be added as needed. Further, the above-described switching device having a bandwidth of 480 MHz, 1 GHz or 1.1 GHz is exemplified, however, it is not limited thereto. With the development of various standards and requirements, for example, one of the USB 3.0 modes can reach a rate of about 5 Gbit/s, and the MHL pixel data can reach a rate of about 3 Gbit/s. Those skilled in the art can apply to various actual signals and control switching devices based on the architecture of the schematic and the embodiments, and add or reduce or combine various signal lines when implementing various embodiments. In addition, the general knowledge can also be implemented as various electronic devices based on the above embodiments, such as smart phones, lithographic computers, multimedia players, personal digital assistants, digital cameras, and other portable devices. Therefore, the above embodiments may also cover various possible variations and implementations, and are not limited to the above text and drawings.

The above provides an embodiment of a circuit structure sharing a bus in an electronic device, which allows multiple signals to share the same bus and connector and maintain signal quality.

In conclusion, the present invention has been disclosed in the above embodiments, but it is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

20, 30, 40. . . Electronic device

100. . . Response curve

201. . . Data bus

205. . . Connector

210, 220, 320, 410, 420. . . Switching device

230, 330, 530. . . First control unit

340. . . Second control unit

430. . . control unit

IN1, IN2. . . Input 埠

OUT1, OUT2, OUT3. . . Output埠

CL1, CL2, CL3. . . Control terminal

S1. . . First signal

S2. . . Second signal

S3. . . Third signal

E1. . . First expansion signal

S200, S220-S233. . . step

S300, S320-S333, S340. . . step

S400, S420-S433. . . step

S533. . . step

Figure 1 is a diagram showing the relationship between frequency and gain of a high frequency switching device.

FIG. 2A is a schematic diagram showing an embodiment of a circuit structure sharing a bus bar in an electronic device.

FIG. 2B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 2A.

FIG. 3A is a schematic diagram showing another embodiment of a circuit structure sharing a bus bar in an electronic device, wherein the electronic device uses a dual processor.

FIG. 3B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 3A.

FIG. 4A is a schematic diagram showing still another embodiment of a circuit structure sharing a bus bar in an electronic device.

FIG. 4B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 4A.

FIG. 5A is a schematic diagram showing still another embodiment of a circuit structure sharing a bus bar in an electronic device.

FIG. 5B is a flow chart showing an embodiment of a method for sharing the bus bar in the electronic device of FIG. 5A.

20. . . Electronic device

201. . . Data bus

205. . . Connector

210, 220. . . Switching device

230. . . First control unit

S1. . . First signal

S2. . . Second signal

S3. . . Third signal

IN1, IN2. . . Input 埠

OUT1, OUT2. . . Output埠

CL1, CL2. . . Control terminal

Claims (21)

An electronic device comprising: a connector; a data bus, one end of the data bus is connected to the connector; a first group of switching devices, comprising: a first switching device, one of the first switching devices Connecting to the other end of the data bus, the first switching device selectively allows one of the first signal and the second signal to pass, wherein the transmission frequency of the first signal is substantially equal to the first switch And a second switching device, wherein one of the output devices of the second switching device is connected to the data bus, the second switching device selectively allows a third signal to pass; and a first control unit controls The first group of switching devices selectively allow one of the first group of signals to pass through the data bus and the connector, wherein the first group of signals includes the first signal, the second signal, and the third signal. The electronic device of claim 1, wherein the first control unit controls the first group of switching devices such that one of the first signal and the second signal passes only the first switching device to pass the Data bus and the connector. The electronic device of claim 1, wherein the electronic device further comprises: a first expansion switch device, wherein the output switch of the first expansion switch device is coupled to the first switch device for receiving One of the second signals The first expansion switch device selectively allows a first extended signal to pass; and a second control unit controls at least the first extended switch device to selectively allow the first extended signal to pass; wherein the first A control unit and the second control unit further control the first set of switching devices and the first extended switching device to selectively allow the first extended signal to pass through the first extended switching device. The electronic device of claim 3, wherein when the first expansion signal is allowed to pass through the first expansion switch device, the first control unit and the second control unit control the first expansion switch device to be turned on, And controlling the first group of switch devices to disable. The electronic device of claim 4, wherein the second signal and the first extended signal each represent a standard signal based on a universal serial bus. The electronic device of any one of claims 1 to 5, wherein the first signal represents a mobile high-definition link (Mobile High-Definition Link) signal. The electronic device of claim 6, wherein the second signal represents a standard signal based on a universal serial bus. The electronic device of claim 7, wherein the third signal represents an audio signal or a signal of a universal asynchronous receiving transmitter. The electronic device of any one of claims 1 to 5, wherein the first signal represents a signal based on a standard of a universal serial bus. An electronic device comprising: a connector; a data bus, one end of the data bus is connected to the connector, the other end of the data bus is coupled to a third signal; and a set of switching devices includes: a switching device, an output of the first switching device is connected to the data bus, selectively allowing a first signal to pass, wherein a frequency of transmission of the first signal is substantially equal to a bandwidth of the first switch; And a second switching device, the output of one of the second switching devices being connected to the data bus, selectively allowing a second signal to pass; and a control unit controlling the group of switching devices to selectively allow the One of the signal and one of the second signals passes through the data bus and the connector. The electronic device of claim 10, wherein the control unit controls the set of switching devices such that the first signal passes only the first switching device to pass the bus bar and the connector. The electronic device of claim 10, wherein the control unit controls the set of switching devices to allow one of the first signal and the second signal to pass to allow the passed signal to pass through the data bus and the The third signal is in a high impedance state when the connector is connected. The electronic device of any one of claims 10 to 12, wherein the first signal represents a signal of a Mobile High-Definition Link. An electronic device as claimed in claim 13, wherein The third signal represents a signal based on the standard of a universal serial bus. The electronic device of claim 13, wherein the second signal represents an audio signal or a signal of a universal asynchronous receiving transmitter. An electronic device comprising: a connector; a data bus, one end of the data bus is connected to the connector; and a set of switching devices comprising: a first switching device, one of the first switching devices The first switching device has a first input port and a second input port, and the first input port and the second port are connected to a first signal and a second signal, wherein the first The transmission frequency of the signal is substantially equal to the bandwidth of the first switch device; and a second switching device, one of the output devices of the second switching device is connected to the second input port of the first switching device, the second switch One of the devices is connected to a third signal; and a control unit controls the set of switching devices to selectively allow one of the signals to pass through the data bus and the connector, wherein the set of signals includes the first The signal, the second signal, and the third signal. The electronic device of claim 16, wherein the control unit controls the set of switching devices such that the first signal passes only the first switching device to pass the bus bar and the connector. The electronic device of claim 16, wherein the control unit controls the set of switching devices to allow the third signal to pass When the data is connected to the connector and the connector, the second signal is in a high impedance state. The electronic device of any one of claims 16 to 18, wherein the first signal represents a mobile high-definition link (Mobile High-Definition Link) signal. The electronic device of claim 19, wherein the second signal represents a signal based on a standard of a universal serial bus. The electronic device of claim 19, wherein the third signal represents an audio signal or a signal of a universal asynchronous receiving transmitter.