TWI436432B - Structure and circuit technique for uniform triggering of multifinger semiconductor devices with tunable trigger voltage - Google Patents

Description

Uniformly triggering the structure and circuit technology of a multi-finger semiconductor device with adjustable trigger voltage [Reciprocal Reference of Related Applications]

The present application is related to the application of the U.S. Patent Application Serial No. 11/692,481, the entire disclosure of which is incorporated herein by reference.

The present invention relates to a semiconductor circuit, and more particularly to a design structure in which a semiconductor circuit and a semiconductor circuit in which a multi-finger semiconductor device is uniformly triggered.

In a typical CMOS circuit, a semiconductor device having a plurality of fingers is utilized and distributed throughout the area of the wafer for various purposes. A multi-finger semiconductor device can also be considered as a plurality of parallel devices having a common control component, such as a gate of a transistor or thyristor. A typical example is an electrostatic discharge (ESD) protection circuit that requires a plurality of fingers of a MOSFET that are arranged in parallel to be spread over a wafer. In this case, it is not only advantageous to have a plurality of fingers throughout the area of the wafer, but it is also necessary to provide maximum protection for potential electrostatic discharge events that may occur anywhere in the wafer. By connecting the source and drain of the individual fingers in parallel, a large multi-finger gate-grounded NMOSFET (GGNMOSFET) is formed, allowing the ESD device to handle more static charge than any individual finger.

In an ESD event, it is preferred that all fingers of the multi-finger ESD protection MOSFET are turned on to maximize the charge handling capability of the ESD circuit because The magnitude of the voltage spike on the circuit is inversely proportional to the amount of current that the multi-finger ESD protection MOSFET can deliver. However, multiple fingers of an ESD protection MOSFET are typically not turned on at the same time due to differences in circuit parameters between the plurality of fingers. To make matters worse, once the fingers are turned on, the voltage shared by all the fingers in the multi-finger MOSFET on the drain suddenly drops back to a lower value, thus preventing the remaining fingers from turning on. In this case, the amount of current that the ESD protection MOSFET can deliver is limited by the current that the connected finger can deliver.

Figure 1 shows a semiconductor wafer in which an ESD protection MOSFET circuit is provided with a plurality of fingers distributed over a wafer area. A finger 10 of the ESD protection MOSFET is circled in a circle, and the drain 12, the gate 14, and the source 18 are indicated. Also shown in Figure 1 is a substrate ring contact 19 or guard ring. The source of each finger 10 in the ESD protection MOSFET electrically contacts the substrate ring contact 19, causing the ESD protection circuit to be grounded.

2A shows a circuit comprising an ESD protected NMOSFET finger 20 and an I/O pad 21. The gates of the fingers are joined together and connected to ground, thus forming a gate-grounded NMOSFET (GGNMOSFET) configuration. The finger 20 includes a drain 22, a gate 24, a source 28, a parasitic npn bipolar transistor, and a parasitic resistor 27. In addition, a parasitic impact ionization current source 23 is displayed between the body 26 of the finger 20 and the drain 22 .

Parasitic npn bipolar transistor and parasitic resistor 27 are derived from ESD protection The physical structure of the fingers 20 of the NMOSFET. In a typical CMOS circuit, an NFET is built into a P substrate having an n-type doped source 28 and an n-type doped drain 22. The source 28, body 26, and drain 22 of the NFET thus form a parasitic npn bipolar transistor, with source 28 being the emitter, body 26 being the base, and drain 22 being the collector. Since the semiconductor material forming source 28 and body 26 has a finite resistance, parasitic resistance exists between source 28 and body 26 of each finger. In addition, since the source 28 is coupled to the substrate ring contact 19 disposed along the periphery of the wafer region, there is a finite resistance between the source 28 and the substrate ring contact (not explicitly shown in Figure 2A). The parasitic resistor 27 reflects the above two parasitic resistances and has a resistance value from the path of the body 26 to the substrate ring contact. The circuit of Figure 2 thus presents a parasitic component of the physical fingers 10 of the ESD protected NMOSFET circuit shown in Figure 1.

The impact ionization current source 23 simulates the parasitic impact ionization current in the reverse bias junction between the body 26 and the drain 22 of one of the NMOSFET fingers. This occurs naturally because the drain 22 is n-doped and the body 26 is a p-type doped substrate, while a positive voltage is applied to the drain 22 associated with the body 26, thereby forming a reverse biased diode. This current can be modeled as an exponential function of the buck-to-body voltage.

Review views 1 and 2A show the source of circuit parameter differences between the different fingers 10 of the ESD protection NMOSFET. Even if the non-parasitic characteristics of each of the fingers 10 of the ESD-protected NMOSFET match, the parasitic components will still differ. Specifically, the resistance of the parasitic resistor 27, or "substrate resistance", mostly depends on the finger The position of the object because this resistance includes the resistance between the source 28 and the substrate ring contact 19. The fingers closer to the substrate annular joint 19 have a lower parasitic resistance than the other fingers that are further from the substrate annular contact. However, it is generally desirable to use multiple fingers to handle large amounts of current during an ESD event. To simultaneously turn on multiple fingers of the ESD protection NMOSFET during an ESD event, the trigger voltage, the lowest voltage at which the drain 22 of the finger 20 is turned on, must match.

A study illustrating the non-uniform turn-on of multi-finger ESD protection MOSFETs is shown in Lee et al., "Dynamic Current Distribution of a Multi-Fingered High-Temperature Stress and HBM ESD Event" GGNMOS under High Current Stress and HBM ESD Events)", IEEE 44th IRPS, 2006, pp. 629-630. Lee et al. observed that the current distribution in the GGNMOSFET was non-uniform during the initial transient of the ESD discharge, based on measurements performed at the nanosecond time level.

A first prior art solution to this problem is to increase the drain ballasting resistance in the individual fingers of the ESD protection MOSFET. However, this method requires a large area of semiconductor substrate for such a buckle ballast resistor. In addition, the addition of a buckle ballast resistor also adds a large on-resistance to the circuit, thereby actually reducing the current capacity of the ESD protection MOSFET and therefore requiring a large clamping voltage.

The second prior art solution was revealed in Duvvury's "ESD protection should Substrate Pump NMOS for ESD Protection Applications, Proc. EOS/ESD Symp, 2000, pp. 1A.2.1-11, which uses a substrate pump to achieve a uniform trigger voltage for a multi-finger NMOS ESD circuit. The third prior art solution is disclosed in "Multi-finger Turn-on Circuits and Design Techniques for Enhanced ESD Performance and Width-Scaling" by Mergens et al. Proc. EOS/ESD Symp, 2001, pp. 1-11, which uses a domino-type NMOS multi-finger transistor in which the source of the finger is connected to the abutment finger in a cascade configuration The gate of the object.

While prior art solutions tend to equalize the trigger voltages across multiple fingers, they also tend to introduce additional resistance into the circuit. In addition, the semiconductor area used in prior art solutions is quite large. Also, there is a need to tune the trigger voltage to cause the circuit to turn on at a predetermined bias voltage.

While the above discussion is limited to multi-finger GGNMOSFETs, it is also necessary to control the turn-on of other multi-finger devices such as general purpose NMOSFETs, general purpose PMOSFETs, and thyristors, especially where multiple fingers of such devices are spread over large areas. On the wafer.

FIG. 2B shows a circuit including a finger 20B of a PMOSFET including an I/O pad 21. The finger 20B includes a drain 22B, a gate 24B, a source 28B, a body 26B (also the base of a parasitic pnp bipolar transistor), and a parasitic resistor 27B. The impact ionization current source 23 is present between the body 26B and the drain 22B in this circuit.

2C shows an electrical circuit including fingers 20C of a multi-finger thyristor containing I/O pads 21. The thyristor has a pnpn semiconductor structure. In a typical thyristor, the external p-type doped region is the anode and is connected to the positive supply, the external n-type doped region is the cathode and is connected to the negative supply, and the internal p-doped region is the gate and is connected to the control input. . The finger 20C includes an anode 22C, a gate 26C, a cathode 28C, and a parasitic resistor 27C. Also, since the thyristor contains a reverse biased PN junction between the anode 22C and the gate 26C, the impact ionization current source 23C is a built-in component of the thyristor fluid between the gate 26C and the cathode 28C of the finger 20C. . The plurality of fingers of the thyristor must be turned on simultaneously to fully utilize the current capacity of the thyristor. This article also considers alternative configurations where the gate is connected to the internal n-doped region and the corresponding circuit changes.

In Figure 3, an exemplary prior art ESD protected NMOSFET circuit is shown in which five fingers (30A-30E) are connected in parallel. One end of the parallel connection of the five fingers is connected to the drain of each finger and is connected to the I/O pad 31, and the I/O pad 31 is connected to the positive power source. The other end is connected to the source of each finger and is connected to the substrate ring contact 39, and the substrate ring contact 39 is grounded.

Each finger (30A-30E) has a parasitic bipolar transistor (where the base (36A-36E) is the body of each finger), a parasitic implant source (33A-33E), and a parasitic resistor (37A) -37E). If the design layout of each finger (30A-30E) Again, each finger (30A-30E) has substantially the same amount of parasitic injection current. However, due to the difference in the physical resistance path between the body of each finger (36A-36E) and the substrate ring contact 39, the resistance values of the parasitic resistors (37A-37E) of each finger are different. This in turn causes a change in the trigger voltage, which is the lowest drain voltage at which each finger will be turned on. As noted above, uneven trigger voltages throughout the fingers will result in conditions in which not all of the fingers are turned on during an ESD event.

The above problems are common on semiconductor devices, and the trigger voltage (on voltage) depends on the parasitic resistance of the device. In addition to multi-finger ESD-protected NMOSFETs, typical multi-finger NMOSFETs, multi-finger PMOSFETs, and multi-finger thyristors have trigger voltages that depend on the parasitic resistance of their fingers, so not all fingers must be turned on. It can be turned on when the device is turned on.

Therefore, there is a need for a structure and circuit technique that achieves uniform switching of a multi-finger semiconductor device without increasing the resistance component or the least increase in resistance component.

Moreover, there is a need for a structure and circuit technology that achieves uniform switching of multi-finger semiconductor devices with minimal increase in the area of newly added circuit components.

In addition, there is a need for a structure and circuit technique for tuning the turn-on voltage (trigger voltage) of a multi-finger semiconductor device.

In order to meet the above needs, the present invention provides a design structure including a semiconductor circuit including a semiconductor device having a plurality of fingers, wherein the plurality of fingers are connected in parallel; and a component connected to the plurality of fingers At least one external current injection source.

In one embodiment, the semiconductor device is a metal oxide semiconductor field effect transistor (MOSFET) and the component is a body of the semiconductor device.

In another embodiment, the semiconductor device is a semiconductor thyristor and the component is a gate of the thyristor fluid.

The present invention is capable of matching the trigger voltage, which is the lowest turn-on voltage of each finger in a multi-finger semiconductor device. The trigger voltage of each finger can be matched to the trigger voltage of the other finger. At least two of the plurality of fingers have substantially matching trigger voltages via matching of the trigger voltages. Preferably, the more the substantial matching of the plurality of fingers, the better the trigger voltage. More preferably, the plurality of fingers all have a substantially matching trigger voltage.

Preferably, one end of the parallel connection is connected to the positive power supply and the other end of the parallel connection is connected to the negative power supply or ground. Preferably, but not necessarily, each finger has exactly the same basic electrical characteristics, that is, if the parasitic components of each of the plurality of fingers are not considered, the fingers are designed to have The same threshold voltage. Also, preferably, but not necessarily, the physical configuration of each of the plurality of fingers is identical, but the location of the fingers and the physical environment in which they are placed are outer.

Depending on the design, the basic electrical characteristics of each finger are the same even without considering the parasitic components, and the parasitic components used for each finger in the physical environment are not identical. In general, the most important parasitic component that causes a difference in the electrical characteristics of each finger is the parasitic resistance. In the case of a MOSFET, such parasitic resistance is caused by a parasitic resistor between the body of each of the plurality of fingers and the annular contact of the substrate. In the case of a thyristor, such parasitic resistance is caused by a parasitic resistor between the gate of each of the plurality of fingers and the annular contact of the substrate.

The CMOS circuit has a positive supply and a negative supply, or alternatively, has a positive supply and ground. Since the ground can be considered to be a zero volt supply, each of the positive, negative, and ground will be referred to as a "power supply" for the purposes of the present description. According to the invention, the external current injection source is directly connected to the power source to which the drain or anode is connected. In the case of the fingers of the NMOSFET, as shown in FIG. 2A, the source 28 is connected to ground, and an external current injection source (not shown) is directly connected to the positive supply. In the case of a PMOSFET finger, as shown in Figure 2B, source 28B is connected to a positive supply and an injection source (not shown) is directly connected to ground. In the case of a thyristor, as shown in Figure 2C, cathode 28C is connected to ground and an injection source (not shown) is directly connected to the positive supply.

Parasitic resistance in a semiconductor device, especially parasitic resistance between the finger body of the multi-finger MOSFET and the substrate ring contact, or in a multi-finger thyristor The parasitic resistance between the finger gate of the body and the ring contact of the substrate varies from one finger to another. It is highly probable that the set of resistance values of a parasitic resistor in a combination has at least one unequal value in the set. In other words, some fingers have different parasitic resistance values than some other fingers unless all parasitic resistance values are exactly the same on different fingers in some way (which is statistically rare).

In a first case in accordance with the invention, an external current injection source can be attached to some of the fingers without attaching any external current injection source to some of the other fingers to match the trigger voltage of the fingers. In this case, no external current injection source is attached to at least one of the plurality of fingers. Preferably, at least two of the plurality of fingers have substantially matching trigger voltages. More preferably, the plurality of fingers all have a substantially matching trigger voltage.

Also, in a circuit in which a plurality of trigger voltages can be matched, the circuit can incorporate an tunable component in at least one of the external current injection sources to modulate the amount of injected current. By modulating the injection current, the substantially matched trigger voltage can be further tuned to enable the circuit to turn on at a predetermined target trigger voltage.

In a second case in accordance with the invention (which may or may not overlap with the first case), different external current sources may be attached to the different fingers such that a different amount of external current is injected between the fingers. In this case, at least one external current injection source injects a different amount of injection current than another external current injection source. Preferably, at least two of the plurality of fingers have substantially matching trigger voltages. Better Yes, all of the fingers have a substantially matching trigger voltage.

Also, in a circuit in which a plurality of trigger voltages can be matched, the circuit can incorporate an tunable component in at least one of the external current injection sources to modulate the amount of injected current. By modulating the injection current, the substantially matched trigger voltage can be further tuned to enable the circuit to turn on at a predetermined target trigger voltage.

In accordance with the present invention, a particular semiconductor circuit for matching trigger voltages throughout a plurality of fingers of a multi-finger semiconductor device is disclosed.

In a specific embodiment, the semiconductor circuit includes: a semiconductor device having a plurality of fingers, wherein the plurality of fingers are connected in parallel; and at least one diode connected to a component of one of the plurality of fingers Stacking, wherein the diode stack comprises a diode or a series of at least two diodes.

In other words, one diode or a set of at least two diodes in series is used as the external current injection source disclosed above. The diode or the set of at least two diodes is connected to a power source, and the source of the plurality of fingers of the multi-finger MOSFET or the cathode of the plurality of fingers of the thyristor is not directly connected to the power source. For multi-finger NMOSFETs, the diode is directly connected to the positive supply. For multi-finger PMOSFETs, the diodes are connected directly to a negative supply or ground. For thyristor, the diode is directly connected to the positive supply. Although all of the above discussion applies to the case where the external current injection source is a diode or a group of at least two series diodes, the notable points are clearly stated in the next paragraph to emphasize that all the features discussed above are still It is feasible.

Specifically, the semiconductor device may be a MOS field effect transistor (MOSFET), in which case the component is the body of the semiconductor device; or the semiconductor device may be a semiconductor thyristor, in which case the component is a thyristor fluid The gate. Also, no external current injection source is attached to at least one of the plurality of fingers, and/or at least one external current injection source injects a different amount of injection current than the other external current injection source. Preferably, at least two of the plurality of fingers have substantially matching trigger voltages. More preferably, the plurality of fingers all have a substantially matching trigger voltage. The circuit can incorporate an tunable component in at least one external current injection source to modulate the amount of injection current.

In another embodiment, to match a trigger voltage throughout a plurality of fingers of the multi-finger semiconductor device, the semiconductor circuit includes: a semiconductor device having a plurality of fingers, wherein the plurality of fingers Connected in parallel; at least one MOSFET, wherein a drain of the at least one MOSFET is coupled to a power source, and a source of the at least one MOSFET is coupled to at least one of the components of one of the plurality of fingers; and at least one A resistor and a capacitor are connected in series between the power source and the ground, wherein a node in the series is connected to a gate of the at least one MOSFET.

In other words, RC trigger (resistor capacitor triggered) MOSFET circuit The external current injection source disclosed above is made. The RC trigger MOSFET circuit can be formed in many different embodiments, one of which is disclosed herein. In accordance with a particular embodiment disclosed herein, the drain of the RC-triggered MOSFET is connected to the drain of the plurality of fingers of the multi-finger MOSFET or the power source to which the anodes of the plurality of fingers of the thyristor are directly connected. For multi-finger NMOSFETs, the drain of the RC-triggered MOSFET is directly connected to the positive supply. For multi-finger PMOSFETs, the drain of the RC-triggered MOSFET is directly connected to the negative supply or ground. For thyristor, the drain of the RC-triggered MOSFET is directly connected to the positive supply. The resistor is located between the gate of the RC-triggered MOSFET and the source of the multi-finger MOSFET or the source connected to the cathode of the multi-finger gate fluid. In one case, one end of the capacitor is directly connected to the gate of the RC-triggered MOSFET, and the other end is directly connected to the power supply to which the drain of the RC-trigger MOSFET is connected. Alternatively, one end of the capacitor is directly connected to the gate of the RC-triggered MOSFET, and the other end is directly connected to the diode or diode stack, and the diode or diode stack is directly connected to the drain of the RC-triggered MOSFET. Power supply. While all of the above discussion applies to the case where the external current injection source is a diode or a group of at least two series diodes, the notable points are clearly set forth in the next paragraph to emphasize that all of the features discussed above are still feasible.

Specifically, the semiconductor device may be a MOS field effect transistor (MOSFET), in which case the component is the body of the semiconductor device; or the semiconductor device may be a semiconductor thyristor, in which case the component is a thyristor fluid The gate. Also, no external current injection source is attached to at least one of the plurality of fingers, or at least one external current injection source is injected and another external current is injected. The source has a different amount of injected current. Preferably, at least two of the plurality of fingers have substantially matching trigger voltages. More preferably, the plurality of fingers all have a substantially matching trigger voltage. The circuit can incorporate an tunable component in at least one external current injection source to modulate the amount of injection current.

According to the present invention, a method of matching a trigger voltage of a plurality of fingers of a multi-finger semiconductor device is disclosed, the method comprising: providing a semiconductor circuit having the multi-finger semiconductor device; providing at least one external current injection source Connecting to one of the plurality of fingers; simulating a voltage of a body of each of the plurality of fingers; and adjusting the at least one external current injection source to match the plurality of fingers The trigger voltage of one of the plurality of fingers and the trigger voltage of the other of the plurality of fingers until all of the trigger voltages match.

Moreover, in accordance with the present invention, a method of tuning a trigger voltage of a plurality of fingers of a multi-finger semiconductor device is disclosed, the method comprising: providing at least one external current injection source coupled to one of the plurality of fingers a body; providing a target trigger voltage; simulating a voltage of a body of each of the plurality of fingers; and adjusting the at least one external current injection source to match a trigger voltage and a target of each of the plurality of fingers Trigger voltage.

In two methods of matching the trigger voltage and tuning the trigger voltage, designing the external current injection source includes designing at least one diode stack connected to one of the plurality of fingers, wherein the diode stack includes one A series connection of a polar body or at least two diodes.

In the two methods of matching the trigger voltage and tuning the trigger voltage, designing the external current injection source may further include: providing at least one RC trigger MOSFET, wherein the drain of the at least one MOSFET is connected to a power source, and the at least one RC trigger MOSFET a source connected to at least one component of one of the plurality of fingers; and a series connection of at least one resistor and a capacitor between the power source and the ground, wherein a node of the series is connected to the at least The gate of an RC-triggered MOSFET.

It should be understood that for the method of matching the trigger voltage and the method of tuning the trigger voltage, all structural aspects of the semiconductor circuit having the external current injection source according to the present invention can be utilized. In particular, the semiconductor device may be a MOS field effect transistor (MOSFET), in which case the component is the body of the semiconductor device; or the semiconductor device may be a semiconductor thyristor, in which case the component is a gate of the thyristor fluid pole. Also, no external current injection source is attached to at least one of the plurality of fingers, or at least one external current injection source injects a different amount of injection current than the other external current injection source. Preferably, at least two of the plurality of fingers have substantially matching trigger voltages. More preferably, all of the fingers have substantial Matching trigger voltage. The circuit can incorporate an tunable component in at least one external current injection source to modulate the amount of injection current.

According to one aspect of the invention, a design structure embodied in a machine readable medium for designing, manufacturing, or testing a design is provided. The design structure includes: a first material representing a semiconductor device having a plurality of fingers, wherein the plurality of fingers are connected in parallel; and a second material representing a component connected to one of the plurality of fingers At least one external current injection source.

In one embodiment, the semiconductor device is a metal oxide semiconductor field effect transistor (MOSFET) and the component is a body of the semiconductor device.

In another embodiment, the semiconductor device is a semiconductor thyristor and the component is a gate of the thyristor fluid.

In yet another embodiment, the first end of the parallel connection is coupled to the first power source and the second end of the parallel connection is coupled to the second power source.

In yet another embodiment, the design structure further includes a parasitic resistor between the components of each of the plurality of fingers and the annular contact of the substrate.

In a further embodiment, the at least one external current injection source comprises at least one diode stack connected to a body of one of the plurality of fingers, wherein the The at least one diode stack comprises one diode or one of at least two diodes connected in series.

In still further embodiments, the at least one external current injection source includes: at least one MOSFET, wherein a drain of the at least one MOSFET is coupled to a power source, and a source of the at least one MOSFET is coupled to the plurality of fingers At least one of the components; and at least one resistor in series between the power source and the ground and a capacitor, wherein a node of the series is coupled to the gate of the at least one MOSFET.

In still further embodiments, the plurality of fingers all have a substantially matching trigger voltage.

While the present invention finds the application that is directly and most desirable in the specific embodiments described above, it will be apparent to those skilled in the art

The invention will now be described in detail by means of the drawings. Although the invention is illustrated by way of specific examples, such as 5 finger gated NMOSFETs (GGNMOSFETs) and 4x30 array finger configurations of multi-finger NMOSFETs, these are merely specific illustrative examples of embodiments of the invention, general techniques The invention can be easily summarized as a general-purpose multi-finger NMOSFET, a general-purpose multi-finger PMOSFET, and have any Multi-finger thyristor configured with multiple fingers.

Figure 4 shows a multi-finger NMOSFET ESD protection circuit in accordance with the present invention. The circuit of Figure 4 also has five fingers (40A-40E), each of which contains a parasitic bipolar transistor (where the base (46A-46E) is the body of each finger), a parasitic source (43A) -43E), and parasitic resistors (47A-47E). The I/O pad 41 and the substrate ring contact 49 are identical to those in FIG. If the design layout of each of the fingers (40A-40E) is the same, each finger (40A-40E) has substantially the same amount of parasitic injection current. As described above, the difference in arrangement of the fingers (40A-40E) of the multi-finger semiconductor device will cause a difference in resistance of the parasitic resistors (47A-47E).

According to the present invention, some of the fingers (40A, 40B, 40D, and 40E) have an external current injection source (45A, 45B) between the body of the fingers of the multi-finger NMOSFET and the I/O pad connected to the positive power supply. , 45D, and 45E). External current injection sources (45A, 45B, 45D, and 45E) supply a constant injection current level to the body (46A, 46B, 46D, and 46E) of each finger of the multi-finger NMOSFET.

In general, if the semiconductor device is a multi-finger MOSFET, the parasitic resistor is located between the body of the fingers of the multi-finger MOSFET and the substrate ring contact. If the semiconductor device is a multi-finger thyristor, the parasitic resistor is located between the gate of the finger of the multi-finger thyristor and the substrate ring contact. In addition to the limited case where only a very small number of fingers are involved in a multi-finger semiconductor device, the resistance value set of a parasitic resistor in a combination in a multi-finger semiconductor device is due to each finger There are many variations in the layout and environment, so there is at least one unequal value within the collection.

In particular, in the case of a multi-finger NMOSFET for non-ESD applications, an external current injection source is connected between the body of the fingers of the multi-finger NMOSFET and the positive power source, and supplies a constant current to the fingers. Base. In the case of a PMOSFET, an external current injection source is connected between the body of the fingers of the multi-finger NMOSFET and ground, and supplies a constant current from the base of the finger to ground. In the case of a thyristor, an external current injection source is connected between the gate of the finger of the multi-finger thyristor and the positive power source and supplies a constant current to the base of the finger. The external current injection source is connected between the body and the drain of the MOSFET or between the gate and the anode of the thyristor.

Since the drain of each finger of the multi-finger NMOSFET is directly connected to the positive supply, the external current injection source is directly connected to the positive supply (since the I/O pad has a very small impedance, the connection will pass through the I/O pad 41) Treated as "direct connection"). In the case of a PMOSFET, since the drain of each finger of the multi-finger PMOSFET is directly connected to the negative supply (including the case of grounding, see above), the external current injection source is also directly connected to the negative supply. In the case of a thyristor, since the external current injection source is connected to the anode of the finger of the multi-finger thyristor, the external current supply is directly connected to the positive power source. In all of the above cases, the external current injection source is directly connected to the source to which the source of the finger or the cathode is not connected.

According to the present invention, the resistance due to the parasitic resistor (47A-47E) will be compensated. The effect of the action is such that each finger (40A-40E) of the semiconductor device has a uniform trigger voltage. The amount of compensation depends on the value of the parasitic resistance, for a specific voltage of the drain (42A-42E), and the multiple fingers, the body of each finger in the multi-finger semiconductor device (46A-46E) The voltage remains essentially the same. For example, if the parasitic resistance of a particular finger is high, the external current injection source attached to that particular finger provides less external current or no external current. If the parasitic resistance of the other finger is low, the external current injection source attached to the particular finger provides more external current.

In the exemplary circuit of the present invention shown in FIG. 4, one of the fingers 40C is not attached to the finger by an external current injection source. In this example, the parasitic resistor 47C attached to the intermediate finger 40C has the highest resistance. If the external current injection source does not supply additional injection current, the intermediate finger 40C has the lowest trigger voltage in the fingers (40A-40E). In a particular configuration with five fingers as shown in Figure 4, the amount of external injection current supplied to the other fingers will be adjusted to match the lowest trigger voltage present in the intermediate fingers 40C.

Although the circuit in FIG. 4 only shows that the finger 40C has no external current injection source, the present invention allows for a general extension of the circuit of FIG. 4 such that no external current injection source is attached to the multi-finger NMOSFET in the ESD protection circuit. At least one of the plurality of fingers. Furthermore, the present invention allows for a further generalization extension such that no external current injection source is attached to at least one of a plurality of fingers of a multi-finger semiconductor device such as a multi-finger NMOSFET, a multi-finger PMOSFET, and a multi-finger thyristor. One.

Moreover, the present invention does not necessarily require that at least one of the fingers has no external current injection source. All of the fingers of the multi-finger semiconductor device may have an external current injection source attached to each finger, or only a portion of the fingers may have an external current injection source attached thereto. According to the present invention, at least one external current injection source can inject a different amount of injection current than another external current injection source. By varying the amount of injection current supplied to the different fingers, the trigger voltage at which the fingers are turned on can be matched between the different fingers.

Viewed from another point of view, the present invention locally draws current to the substrate forming the body (46A-46E) of each finger such that the trigger voltage is matched throughout the fingers.

In accordance with the present invention, at least two of the plurality of fingers in the multi-finger NMOSFET ESD protection circuit have a trigger voltage that substantially matches the finger to turn on. In general, in accordance with the present invention, at least two of the plurality of fingers in the multi-finger semiconductor device have a trigger voltage that substantially matches and turns the fingers on. More preferably, in accordance with the present invention, among all of the plurality of fingers in the multi-finger semiconductor device, there is a trigger voltage that substantially matches the finger to turn on.

Moreover, in accordance with the present invention, an adjustable component that provides a modulated external current amount can be provided to at least one external current injection source.

Figure 5 shows an exemplary layout of a 4x30 array finger for a 120-finger NMOSFET ESD protection circuit. As mentioned above, it should be understood that other arrays The configuration can also be implemented in conjunction with the present invention. The fingers are arranged in four columns labeled Column 1, Column 2, Column 3, and Column 4. Each column has 30 fingers with the first finger 101 in the leftmost position and the thirtieth finger 130 in the rightmost position. For the sake of clarity, FIG. 5 also shows the eleventh finger 111 and the twelfth finger 120. The physical location of the fingers is distributed to provide enhanced ESD protection throughout the wafer to avoid ESD events at unknown locations. In Figure 5, the electrical resistance between the body of each finger and the annular contact of the substrate is not zero due to the finite resistance of the substance therebetween.

This is illustrated in Figure 6, where two fingers (Finger A and Finger B, which have different parasitic resistances between the body and the substrate ring contacts) are plotted against the substrate potential. The curve of the pole voltage. These two fingers belong to a hypothetical multi-finger NMOSFET in an ESD protection circuit similar to that shown in FIG. Since the parasitic bipolar transistor in FIG. 3 is turned on at the "turn-on substrate potential" (about 0.70 V for the 矽-based bipolar transistor), the substrate potential becomes the substrate potential. The drain voltage will be the trigger voltage for each finger. Finger A trigger voltage and finger B trigger point are shown in Figure 6. In general, each finger of the multi-finger device shown in Figure 3 produces a different substrate potential due to the different parasitic resistance of the fingers being uncompensated. Contrary to the prior art, with the external current injection sources (45A, 45B, 45D, and 45E shown in FIG. 4 according to the present invention, it can be generalized to other multi-finger NMOSFETs, multi-finger PMOSFETs, and multi-finger The gate fluid) compensates for the difference in parasitic resistance.

Table 1 lists selected simulation results for substrate potentials throughout a plurality of fingers in a prior art NMOSFET ESD protection circuit (wherein fingers are arranged in a 4x30 array as shown in Figure 5). Similarly, Table 2 lists the simulation results for substrate potentials throughout a plurality of fingers in an NMOSFET ESD protection circuit in accordance with the present invention in which the fingers are arranged in the same 4x30 array. For this simulation, the magnitude of the parasitic internal injection current through the parasitic injection source (33A-33E of FIG. 3 or 43A-43E of FIG. 4) was set to 0.398 mA. Comparing the two tables, it can be seen that the advantage of the present invention is that the substrate potentials of the various fingers of the present invention are substantially the same for the same drain voltage. Conversely, the same gate voltage across the fingers in prior art circuits produces many variations in substrate potential.

Table 1. When the drain voltage is 8.99V, in the prior art 4x30 array NMOSFET ESD protection circuit, the substrate potential across the various fingers is compared.

Column 1, 5th finger column 2, 5th finger column 1st, 15th finger column 2, 15th finger substrate potential (V) 0.600 0.690 0.605 0.700

Table 2. When the drain voltage is 8.78V, in the NMOSFET ESD protection circuit of the 4x30 array of the present invention having an external current injection source, the substrate potentials across the plurality of fingers are compared.

Column 1, 5th index, 2nd, 5th, 1st, 15th Object 2, 15th finger substrate potential (V) 0.690 0.685 0.700 0.700

A comparison of the simulated trigger voltage (i.e., the substrate potential of each finger reaching the "turn-on substrate voltage" (the threshold voltage of 0.7 V in the NMOS-based NMOSFET parasitic npn bipolar transistor) is shown in Table 3. In prior art NMOSFET ESD protection circuits, the selected trigger voltages for the fingers that utilize the 4x30 array of Figure 6 but without the external injection current source of each finger are listed in the column of the table. In the NMOSFET ESD protection circuit of the present invention, the trigger voltage for the corresponding finger of the 4x30 array of Figure 6 and having different injection current levels to match the substrate potential is listed in another column. Comparing the ranges of the two sets of trigger voltages, it can be seen that an advantage of the present invention is that the trigger voltage distribution according to the present invention is much more uniform.

table 3. The trigger voltages of the selected fingers in the NMOSFET ESD protection circuit according to the prior art and in the NMOSFET ESD protection circuit according to the present invention are compared.

Column 1, 5th finger Column 2, 5th finger column 1, 15th finger column 2, 15th finger Trigger voltage according to prior art (V) 9.14 9.00 9.13 8.99 Trigger voltage (V) 8.81 8.81 8.78 8.78 according to the invention

Figure 7 shows the specific drain voltage (8.9V bucker voltage), compared to the figure 3 shows a prior art 120-finger NMOSFET ESD protection circuit (having a finger configuration as shown in FIG. 5) and a 120-finger NMOSFET ESD protection circuit according to the present invention as shown in FIG. A simulation result of the substrate potential (ie, the body voltage) between the body and the drain of a finger having an external current injection source and a finger configuration as shown in FIG. In the circuit according to the invention, the magnitude of the injection current from each external current source will be adjusted to substantially match the substrate potential. Since the buckling voltage versus substrate potential curve, such as that shown in Figure 6, has a similar shape throughout the fingers, once the substrate potential is substantially matched for a reasonable drain voltage, the trigger voltage is substantially matched throughout the fingers. Therefore, using an external current injection source, the variation of the trigger voltage can be reduced by the matching substrate potential approaching the on condition of the finger. The matched trigger voltage allows multiple fingers to be turned on evenly, thereby utilizing the full current transfer capacity of the multi-finger semiconductor device.

The external current injection source can be any electronic secondary circuit that can provide additional current to the body of the fingers of the multi-finger device. For example, the external current injection source can be a diode, a diode stack, a bipolar transistor, a MOSFET, or any combination of the above and can contain a resistive component. Preferably, the external current injection circuit contains at least one substantially non-resistive electronic component. Substantially non-resistive electronic components have extremely small parasitic resistances relative to the amount of current they are transferred. Examples of substantially non-resistive components include PN junctions (such as in diodes), capacitors, MOSFETs, and inductors. More preferably, the external current injection source has no resistors (resistive electronic components) in the current path from the power source to the body of the fingers of the multi-finger device.

Figure 8 shows a first exemplary embodiment of an external current injection source, each of which The injection source consists of a stack of three diodes (85A-85E). Figure 8 also shows the parasitic resistor between the body (86A-86E) of each finger (80A-80E), the positive power busbar 82, the substrate ring contact 89, and the I/O pad 81 (87A- 87E). In FIG. 8, although only the intermediate fingers 80C have no external current injection source, the present invention allows embodiments in which more than one finger has no external current injection source, or allows each finger to have the same as that accompanying FIG. An embodiment of the external current injection source described in the paragraph.

Also, similar configurations are available for general purpose multi-finger NMOSFETs, general purpose multi-finger PMOSFETs, and general purpose multi-finger gate fluids. The parameters of the diode stack can be varied to induce the same trigger voltage throughout the different fingers (80A-80E). Preferably, the width of the diode stack (85A-85E) can be adjusted to allow different amounts of leakage current to enter the body (86A-86E) of the fingers (80A-80E), causing each finger The voltages of the bodies (86A-86E) of the bodies (80A-80E) are substantially identical throughout the fingers, so all fingers have the same trigger voltage. In this case, the diode stack is an adjustable component that modulates the amount of injected current. The diode stack may contain only one diode or a series of at least two diodes.

Figure 9 shows a second exemplary embodiment of an external current injection source that includes an RC-triggered NMOSFET circuit connected to the bodies (96A-96E) of some of the fingers (90A-90E). The RC-triggered NMOSFET circuit includes two NMOSFETs (191 and 192), wherein the drains of the NMOSFETs (191 and 192) are connected to the positive power supply, and the sources of the NMOSFETs (191 and 192) are connected at most. a body (96A-96E) of one of the fingers (90A-90E); and a series connection of a resistor 195 and a capacitor 194 between the positive power source and the ground, wherein the node in series between the resistor 195 and the capacitor 194 Connect to the gates of the two MOSFETs (191 and 192). Two diodes 193 are located between the positive supply bus 92 and capacitor 194 in the RC-triggered NMOSFET circuit. The plurality of fingers (90A-90E) are connected in parallel such that the drains of the plurality of fingers (90A-90E) are connected to the positive power busbar 92, and the sources of the plurality of fingers (90A-90E) Connected to the substrate ring contact 99. Parasitic resistors (97A-97E) of unequal resistance values are connected between the body (96A-96E) and the source of each finger.

In accordance with this exemplary embodiment of the invention, two NMOSFETs (191 and 192) can be used as an adjustable component that modulates the amount of injected current into the fingers (90A-90E). The size and number of the diodes 193, as well as the resistance of the resistor 195 and the capacitance of the capacitor 194, can also be used as an adjustable component. In Figure 9, although only the intermediate fingers 90C have no external current injection source, the present invention allows for embodiments in which more than one finger has no external current injection source, or allows each finger to have a paragraph as accompanying Figure 4. An embodiment of the external current injection source described herein. Also, similar configurations are available for general purpose multi-finger NMOSFETs, general purpose multi-finger PMOSFETs, and general purpose multi-finger gate fluids. The parameters of the diode stack can be varied to induce the same trigger voltage throughout the different fingers (90A-90E).

In accordance with the present invention, the trigger voltages of the plurality of fingers of the multi-finger semiconductor device can be matched such that the plurality of fingers, and preferably all of the fingers, have substantially matched trigger voltages and can be turned on simultaneously.

First, a semiconductor circuit having a multi-finger semiconductor device is provided. The semiconductor device can be a multi-finger NMOSFET ESD protection circuit, a general purpose NMOSFET, a general purpose PMOSFET, or a general thyristor. The thyristor can be, but is not limited to, a Silicon Controlled Rectifier (SCR), an asymmetric SCR (ASCR), a reverse conduction thyristor (RCT), a light-activated SCR (LASCR; a light-triggered thyristor (LTT)) ), TRIAE (bidirectional switching device with two thyristor structures), gate-off thyristor fluid (GTO), MCT (MOSFET with two additional FET structures to control on/off MOSFET control thyristor), base resistance control Brake fluid (BRT), electrostatically induced thyristor fluid (SITh), or field controlled thyristor fluid (FCTh).

Second, at least one external current injection source is designed that is coupled to a component of one of the plurality of fingers. Only a portion of the plurality of fingers may be provided with an external current injection source, or all of the plurality of fingers may be provided with an external current injection source. If the multi-finger semiconductor device is a multi-finger MOSFET, the component of the plurality of fingers to which the external injection current source can be attached is the body of the fingers of the MOSFET, regardless of the multi-finger NMOSFET or the multi-finger PMOSFET. If the multi-finger semiconductor device is a thyristor, the component of the plurality of fingers to which the externally injected current source can be attached is the gate of the finger of the thyristor.

The external injection current source can comprise a diode, a diode stack, a bipolar transistor, a MOSFET, or any combination of the above, and can contain a resistive component. Preferably, the external current injection circuit contains at least one substantially non-resistive electronic component. More preferably, the external current injection source has no resistor (resistive electronic component) in the current path from the power source to the body of one of the fingers of the multi-finger device. For example, you can also use The diode stack shown in Figure 8 or the RC-triggered NMOSFET circuit shown in Figure 9. The external current injection source may be at least one diode stack comprising a diode or at least two diodes in series. The external current injection source or may include: at least one RC-triggered NMOSFET, wherein a drain of the at least one NMOSFET is coupled to a power supply, and a source of the at least one RC-triggered NMOSFET is coupled to at least one component of one of the plurality of fingers; A series connection of at least one resistor and capacitor between the positive supply and the ground, wherein the node in the series is coupled to the gate of the at least one RC trigger MOSFET. The external current injection source can be designed such that there is at least one parameter that modulates the injection current on at least some of the fingers. For example, the parameter can be the value of the width of the diode, the doping concentration of a portion of the substrate or well, the size of the shallow trench isolation around the finger, the number of diodes, the capacitance of the circuit component. , inductance, and / or resistance.

Third, the voltage of the body of each of the plurality of fingers is simulated. The best simulation condition is to generate a condition in the finger of the multi-finger MOSFET that is close to the body voltage of the substrate potential, or to generate a gate voltage close to the substrate potential in the finger of the multi-finger thyristor. condition.

Fourth, the at least one external current injection source is adjusted to match a trigger voltage of one of the plurality of fingers with a trigger voltage of the other of the plurality of fingers until all of the trigger voltages match. Since the external current injection source has at least one parameter that can modulate the injection current on at least some of the fingers, at least one parameter of the external current injection source can be utilized in this step, and preferably a plurality of parameters.

In accordance with the present invention, the trigger voltages of the plurality of fingers of the multi-finger semiconductor device can be tuned such that the plurality of fingers, and preferably all of the fingers, have a trigger voltage that is substantially tuned to the target trigger voltage. The method of tuning the trigger voltage to the target trigger voltage is similar to the method of matching the trigger voltage across multiple fingers with the following variations.

The target trigger voltage can be defined between or before designing the external current injection source. At least one external current injection source can be adjusted to match the trigger voltage of each of the plurality of fingers with the target trigger voltage. The same adjustment method as the matching trigger voltage of the plurality of fingers of the multi-finger semiconductor device can be used to match the trigger voltage of the plurality of fingers with the target trigger voltage.

Figure 10 shows the simulation results of the circuit shown in Figure 9 after the intermediate phase of the trigger point in the fingers of the multi-finger NMOSFET. In the simulation shown in Figure 10, for the 1 micron width setting of the two NMOSFETs (191 and 192), the transient response of the gate voltage V_gate of the two NMOSFETs (191 and 192), the body of the leftmost finger 90A is shown. The instantaneous reaction of the substrate potential V1 of the body 96E of the 96A and the rightmost finger 90E, and the transient reaction of the substrate potential V2 of the body 96B of the second finger 90B and the body 96D of the fourth finger 90D. Although this produces better results than a circuit without any external current injection source, the width of the NMOSFET 191 connected to the leftmost finger 90A and the rightmost finger 90E can be further adjusted to increase the two voltages (V1 and Match between V2). Figure 11 shows another analog junction connected to the width of the NMOSFET 191 of the outermost fingers (90A and 90E) set to 5.5 microns. As a result, it shows that the match between the four fingers is improved. Since each finger of the multi-finger NMOSFET ESD protection circuit is turned on when the substrate potential of the finger exceeds 0.7V, and is substantially turned off below 0.7V, according to the simulation shown in FIG. 10, the two outermost fingers The object is turned on for a shorter period of time than the second and fourth fingers, or worse, even not turned on, as described above. According to the simulation shown in Fig. 11, the four fingers are substantially simultaneously turned on and off. Extending this type of adjustment can match the trigger voltage throughout the five fingers shown in Figures 4, 8, and 9, and in general, can match any of the number of fingers described herein. Finger semiconductor device.

Referring to Figure 12, a block diagram of an exemplary design flow 900 is shown. The exemplary design flow 900 may vary depending on the type of integrated circuit (IC) to be designed. For example, the design flow for building an application-specific integrated circuit (ASIC) is different from the design flow for designing a standard integrated circuit component. Design structure 920 is preferably an input to design program 910. The design structure 920 may be from an intellectual property (IP) provider, a core developer, or a design company, or may be generated by an operator of the design process, or may be from other sources.

Design structure 920 can include the circuitry of FIG. 4, FIG. 8, or FIG. Design structure 920 may also include combinations of the circuits of Figures 4, 8, and 9. Typically, design structure 920 is in the form of a summary of a hardware description language (HDL) such as Verilog, VHDL, C, C++, and the like. Design structure 920 can be included on one or more machine readable mediums. For example, design structure 920 can be a textual representation or a graphical representation of the circuitry of FIG. 4, FIG. 8, or FIG.

The design program 910 preferably synthesizes or translates such circuitry contained in the design structure 920 into a netlist 980. Line connection table 980 contains a list of representations of various components in the circuit. For example, the line connection table 980 may contain a connection table describing interconnections, transistors, logic gates, control circuits, input/output (I/O), models, etc. of other components and circuits in the integrated circuit design, and recording In at least one machine readable medium. This is a repetitive procedure in which the line connection table 980 is recombined one or more times depending on the design specifications 940 and parameters of the circuit.

The design program 910 includes input using various inputs, such as from a library component 930 that houses a common set of components, circuits, and devices, including specific manufacturing techniques (eg, different technology nodes: 32 nm, 45 nm, 90) Model, layout and symbolic representation of nm, etc.; design specification 940; feature data 950; validation data 960; design rules 970; and test data archive 985 (including, for example, standard circuit design procedures such as timing analysis, validation, design rule checking, Layout and wiring work, etc.). The general practitioner of integrated circuit design should understand the range of possible electronic design automation tools and applications used in designing the program 910 without departing from the scope and spirit of the present invention. The design structure 910 of the present invention is not limited to any particular design flow.

The design program 910 preferably translates the present invention as shown in Figures 4, 8, and 9 along with any additional integrated circuit design or data into a second design structure 990, as appropriate. The second design structure 990 resides in a data format for exchanging layout data of the integrated circuit (eg, information stored in GDSII (GDS2), GL1, OASIS, or any other suitable format for storing such design structures). In the media. The second design structure 990 can include information such as: test data files, design content files, manufacturing materials, layout parameters, wiring, metal interconnect levels, vias, shapes, wiring in the manufacturing line, and semiconductor manufacturers for production The present invention is any other information required by the specific embodiments shown in Figures 4, 8, and 9. The second design structure 990 then proceeds to stage 995 where, for example, the second design structure 990 proceeds to tape-out, ie, for manufacturing, to the mask factory, to another design factory, Return to the customer, etc.

While the invention has been described with respect to the specific embodiments, the invention Accordingly, the present invention is intended to embrace all such alternatives, modifications, and variations in the scope of the invention and the scope of the invention.

10, 20, 20B, 20C, 30A-30E, 40A-40E, 80A-80E, 90A-90E‧‧‧ fingers

12, 22, 22B‧‧ ‧ bungee

14, 24, 24B, 26C‧‧ ‧ gate

18, 28, 28B‧‧‧ source

19, 39, 89, 99‧‧‧ substrate ring contacts

21, 31, 41, 81‧‧‧I/O pads

22C‧‧‧Anode

28C‧‧‧ cathode

23, 23C‧‧‧ Parasitic impact ionization current source

26, 26B, 86A-86E, 96A-96E‧‧‧ ontology

27, 27B, 27C, 37A-37E, 47A-47E, 87A-87E‧‧‧ parasitic resistors

33A-33E, 43A-43E‧‧‧ Parasitic injection source

36A-36E‧‧‧ base

45A, 45B, 45D, 45E‧‧‧ external current injection source

46A-46E‧‧‧ base

82, 92‧‧‧ positive power bus

85A-85E, 193‧‧ ‧ diode

97A-97E‧‧‧Parasitic Resistors

191, 192‧‧‧NMOSFET

194‧‧‧ capacitor

195‧‧‧Resistors

Figure 1 shows a schematic diagram of a wafer having a multi-finger NMOSFET ESD protection circuit having a plurality of fingers 10 distributed over a wafer area.

2A shows a schematic diagram of the fingers 20 of the multi-finger NMOSFET ESD protection circuit of FIG. 1 with parasitic components.

2B shows a schematic diagram of a finger 20B of a multi-finger PMOSFET circuit with parasitic components.

Figure 2C shows a schematic representation of a finger 20C of a multi-finger thyristor circuit with parasitic components.

3 shows a schematic diagram of a multi-finger NMOSFET ESD protection circuit with prior art parasitic components.

Figure 4 shows a schematic diagram of a multi-finger NMOSFET ESD protection circuit with external current injection sources 45A-45E and parasitic components.

Figure 5 shows an exemplary design of the fingers of a multi-finger NMOSFET ESD protection circuit arranged in a 4x30 array on a wafer area.

Figure 6 shows an example of a substrate potential mismatch for a particular gate voltage between two fingers (Finger A and Finger B) of a multi-finger NMOSFET in a ESD protection circuit.

Figure 7 shows simulation results of substrate voltages throughout the substrate according to prior art circuits and external current injection sources having specific I/O voltages in accordance with the present invention.

Figure 8 shows a circuit in accordance with a first exemplary embodiment of the present invention in which a diode connected to a power source is used as an external current injection source.

Figure 9 shows a circuit in accordance with a second exemplary embodiment of the present invention in which an RC trigger MOSFET circuit is used as an external current injection source.

Figure 10 shows the simulation results for a multi-finger NMOSFET ESD protection circuit with an RC trigger that triggers a voltage mismatch.

Figure 11 shows the simulation results for a multi-finger NMOSFET ESD protection circuit with RC triggering that triggers a voltage match.

Figure 12 is a flow chart of a design procedure for semiconductor design and fabrication of a semiconductor circuit in accordance with the present invention.

40A-40E‧‧‧ fingers

41‧‧‧I/O mat

43A-43E‧‧‧ Parasitic injection source

45A-45E‧‧‧External current injection source

46A-46E‧‧‧ base

47A-47E‧‧‧Parasitic Resistors

Claims (40)

A semiconductor circuit comprising: a semiconductor device having a plurality of fingers, wherein the plurality of fingers are connected in parallel; and at least one external current injection source coupled to one of the plurality of fingers, wherein No external current injection source is attached to at least one of the plurality of fingers. The semiconductor circuit of claim 1, wherein the semiconductor device is a MOS field effect transistor (MOSFET) and the component is a body of the semiconductor device. The semiconductor circuit of claim 1, wherein the semiconductor device is a semiconductor thyristor and the component is a gate of the thyristor fluid. The semiconductor circuit of claim 1, wherein the first end of the parallel connection is connected to a first power source, and the second end of the parallel connection is connected to a second power source. The semiconductor circuit of claim 4, further comprising a parasitic resistor between the component of each of the plurality of fingers and a substrate ring contact. The semiconductor circuit of claim 5, wherein the at least one external current injection source is directly connected to the power source directly connected to the drain or anode of the plurality of fingers. The semiconductor circuit of claim 6, wherein the set of resistance values of the parasitic resistors has at least one unequal value within the set. The semiconductor circuit of claim 7, wherein at least three of the plurality of fingers have substantially matching trigger voltages. The semiconductor circuit of claim 8, wherein all of the plurality of fingers have a substantially matching trigger voltage. The semiconductor circuit of claim 9, wherein at least one of the external current injection sources has an adjustable component of a modulated injection current amount. The semiconductor circuit of claim 7, wherein the at least one external current injection source injects an amount of injection current different from the other external current injection source. The semiconductor circuit of claim 1, wherein at least three of the plurality of fingers have substantially matching trigger voltages. The semiconductor circuit of claim 1, wherein all of the plurality of fingers have substantially matching trigger voltages. The semiconductor circuit of claim 13, wherein the semiconductor device is a MOS field effect transistor (MOSFET) and the component is a body of the semiconductor device. The semiconductor circuit of claim 13, wherein the semiconductor device is a semiconductor thyristor and the component is a gate of the thyristor fluid. The semiconductor circuit of claim 13, wherein at least one of the external current injection sources has an adjustable component of a modulated injection current amount. A semiconductor circuit comprising: a semiconductor device having a plurality of fingers, wherein the plurality of fingers are connected in parallel; and at least one diode stack connected to the body of one of the plurality of fingers The at least one diode stack comprises a diode or a series of at least two diodes, and wherein all of the plurality of fingers have a substantially matching trigger voltage, wherein no external current injection source Attached to at least one of the plurality of fingers. The semiconductor circuit of claim 17, further comprising at least two diode stacks, and at least one of the diode stacks is not equal to the other of the diode stacks. The semiconductor circuit of claim 17, wherein the at least one external current injection source injects an amount of injection current different from the other external current injection source. A semiconductor circuit comprising: a semiconductor device having a plurality of fingers, wherein the plurality of fingers are connected in parallel; at least two MOSFETs, wherein one of the at least two MOSFETs has a drain of the first MOSFET connected to a power source, and the first a source of the MOSFET is coupled to a component of one of the plurality of fingers, and a drain of the second MOSFET of the at least two MOSFETs is coupled to the power source, and a source of the second MOSFET is coupled to the source One of the other of the plurality of fingers; and at least one of the series connected to the resistor and the capacitor between the power source and the ground, wherein a node of the series is connected to the gate of the at least one MOSFET. The semiconductor circuit of claim 20, wherein all of the plurality of fingers have substantially matching trigger voltages. A semiconductor circuit as claimed in claim 20, wherein no external current injection source is attached to at least one of the plurality of fingers. A method of matching a trigger voltage of a plurality of fingers of a multi-finger semiconductor device, comprising: providing a semiconductor circuit comprising a semiconductor device and at least one external current injection source, wherein the semiconductor device comprises a plurality of fingers The plurality of fingers are connected in parallel, the at least one external current injection source is connected to one of the plurality of fingers, wherein no external current injection source is attached to at least one of the plurality of fingers; Providing at least one external current injection source connected to one of the plurality of fingers; simulating a voltage of the body of each of the plurality of fingers; and adjusting the at least one external current injection source to Matching a trigger voltage of one of the plurality of fingers with a trigger voltage of the other of the plurality of fingers until all of the trigger voltages match. The method of claim 23, further comprising designing at least one diode stack connected to the component of one of the plurality of fingers, wherein the at least one diode stack comprises a diode or at least A series connection of two diodes. The method of claim 23, further comprising: designing at least one RC trigger MOSFET, wherein a drain of the at least one RC trigger MOSFET is coupled to a power supply, and a source of the at least one RC trigger MOSFET is coupled to the plurality of fingers At least one of the components of the device; and at least one series connected in series, the resistor and a capacitor connected in series between the power source and the ground, wherein a node in the series is connected to the gate of the at least one RC trigger MOSFET . The method of claim 23, wherein the semiconductor device is a MOS field effect transistor (MOSFET) and the component is a body of the semiconductor device. The method of claim 23, wherein the semiconductor device is a semiconductor thyristor and the component is a gate of the thyristor fluid. A method of tuning a trigger voltage of a plurality of fingers in a multi-finger semiconductor device, comprising: providing a semiconductor circuit comprising a semiconductor device and at least one external current injection source, wherein the semiconductor device comprises a plurality of fingers The plurality of fingers are connected in parallel, the at least one external current injection source is coupled to one of the plurality of fingers, wherein no external current injection source is attached to at least one of the plurality of fingers; providing at least one An external current injection source coupled to the body of one of the plurality of fingers; defining a target trigger voltage; simulating a voltage of each of the plurality of fingers; and adjusting the at least one external current injection source And matching the trigger voltage of each of the plurality of fingers with the target trigger voltage. The method of claim 28, further comprising designing at least one diode stack connected to the component of one of the plurality of fingers, wherein the at least one diode stack comprises a diode or at least two A series of diodes. The method of claim 28, further comprising: designing at least one RC trigger MOSFET, wherein a drain of the at least one RC trigger MOSFET is coupled to a power source, and a source of the at least one RC trigger MOSFET is coupled to the plurality of fingers At least one of the components of the middle one; and at least one series connected in series, one of the resistors and one of the power supply and the grounding ground a capacitor, wherein a node of the series is connected to a gate of the at least one RC trigger MOSFET. The method of claim 28, wherein the semiconductor device is a MOS field effect transistor (MOSFET) and the component is a body of the semiconductor device. The method of claim 28, wherein the semiconductor device is a semiconductor thyristor and the component is a gate of the thyristor fluid. A machine readable medium embodying a design structure for designing, manufacturing, or testing a design, the design structure comprising: a first material representing a semiconductor device having a plurality of fingers, wherein the plurality The fingers are connected in parallel; and a second data is indicative of at least one external current injection source connected to one of the plurality of fingers, wherein no external current injection source is attached to the plurality of At least one of the fingers. The machine readable medium of claim 33, wherein the semiconductor device is a MOSFET and the component is a body of the semiconductor device. The machine readable medium of claim 33, wherein the semiconductor device in the design is a semiconductor thyristor and the component is a gate of the thyristor fluid. The machine readable medium of claim 33, wherein the first end of the parallel connection is coupled to a first power source and the second end of the parallel connection is coupled to a second power source. The machine readable medium of claim 36, wherein the design structure further comprises additional information representative of a parasitic resistor between the component of each of the plurality of fingers and a substrate ring contact. The machine readable medium of claim 33, wherein the at least one external current injection source in the design structure further comprises at least one diode stack connected to the body of one of the plurality of fingers, wherein the at least A diode stack comprises a diode or a series of at least two diodes. The machine readable medium of claim 33, wherein the at least one external current injection source further comprises: at least one MOSFET, wherein a drain of the at least one MOSFET is connected to a power source, and a source of the at least one MOSFET is connected to the plurality At least one of the components of one of the fingers; and at least one series connected in series with the resistor and a capacitor between the power source and the ground, wherein a node in the series is connected to the gate of the at least one MOSFET . The machine readable medium of claim 36, wherein all of the plurality of fingers in the design structure have substantially matching trigger voltages.