TWI436367B - Method for operating non-volatile flash memory with write protection mechanism - Google Patents

Description

Non-volatile flash memory operating method with write protection mechanism

The present disclosure relates to a method of operating a non-volatile flash memory, and more particularly to a method of operating a non-volatile flash memory having a write protection mechanism.

Non-volatile flash memory write protection techniques, such as Serial Peripheral Interface (SPI), protect non-volatile flash memory from being illegal when the micro-control unit is not functioning properly or It is an improper instruction to change the data in non-volatile flash memory.

Existing write protection techniques often utilize protection information with fewer bits to represent protected memory blocks/magnetic regions. However, the instructions used to make changes to the protection information usually have a simple structure, such as 00000001b. Therefore, when the power supply of the computer system is unstable or suddenly powered off, the protection information may be subjected to unnecessary changes. For example, when the power of the system board drops below a certain level, the micro control unit may not function properly and generate an abnormal command. If this exception instruction coincides with the instruction to change the protection information, the memory array that would otherwise be protected by writes may thus become allowed to be written. In this case, if improper data is written to these memory arrays, the system may not be able to boot or suffer more serious errors because the data is altered.

Therefore, how to design a new non-volatile flash memory operation method with write protection mechanism to avoid the above-mentioned missing occurs is an urgent problem to be solved in the industry.

Therefore, one aspect of the present disclosure is to provide a method for operating a non-volatile flash memory having a write protection mechanism, the method comprising the steps of: sending an instruction; determining that the instruction is a protection information change instruction or a flash memory The body data change instruction; when the instruction is a protection information change instruction, it is determined whether the protection information change instruction is consistent with a plurality of change instructions having a specific combination order, wherein only when the protection information change instruction matches the change order having a specific combination order The protection information is allowed to be changed according to the protection information change instruction; when the instruction is the flash memory data change instruction, it is determined whether the status register protection information indicates that a memory block/sector is located in the write protection. Status, and determine whether the protection information indicates that the memory block/magnetic area is in the write protection state, and only when the status register protection information shows that the memory block/magnetic area is not in the write protection state and the protection information display memory When the body block/magnetic area is not in the write protection state, the memory block/magnetic area is allowed to be fast. The flash memory data change command is changed.

According to an embodiment of the present disclosure, the protection information is stored in a mini-array.

In accordance with another embodiment of the present disclosure, an alternation instruction having a particular combination order includes a plurality of program instructions, an address instruction, and a set instruction. The address command corresponds to the non-volatile flash memory block, and the setting command includes a plurality of guard bits, and each of the magnetic regions of the non-volatile flash memory is in a write protection state.

In accordance with yet another embodiment of the present disclosure, a change instruction having a particular combination order includes a plurality of erase instructions.

According to still another embodiment of the present disclosure, the flash memory data change instruction is a flash memory program instruction.

According to the disclosure, there is an embodiment in which the flash memory data change instruction is a flash memory erase command.

According to another embodiment of the present disclosure, the non-volatile flash memory includes a code area and a parameter setting area, wherein the flash memory data change instruction changes the content of the code area.

According to still another embodiment of the present disclosure, the state register protection information is three-bit information to display the memory block/magnetic area of the non-volatile flash memory in the write protection state.

According to still another embodiment of the present disclosure, before the step of sending the command, the method further includes: turning the chip enable signal from an inhibited state to an enabled state.

There is further an embodiment in accordance with the present disclosure in which the instructions are transmitted by a micro control unit (MCU).

The advantage of applying the disclosure is that the protection information must be protected by a complex protection information change instruction to prevent tampering with improper instructions caused by power instability, and to make the flash memory in the flash memory. The data needs to be changed when both the protection information and the status register protection information indicate that it is not in the write protection state, and the double protection mechanism can easily achieve the above purpose.

Please refer to FIG. 1 , which is a schematic diagram of an electronic device system 1 according to an embodiment of the disclosure. In various embodiments, the electronic device system 1 can be a liquid crystal display controller (LCD scalar), a digital camera module, a mobile communication device, or a personal computer peripheral device. The electronic device system 1 includes a micro control unit 10, a non-volatile flash memory 12, a status register 14 and a mini array 16.

Microcontrol unit 10 can generate instructions to modify the data in non-volatile flash memory 12, state register 14 and mini-array 16 in the event that writes are allowed. In one embodiment, the non-volatile flash memory 12 includes a code region and a parameter setting region (not shown). The parameter setting area is used to store a plurality of parameters that can be adjusted by the user frequently. The code area stores a plurality of codes, wherein the codes are used to perform specific functions, and the user is not allowed to easily change the codes. For example, in the liquid crystal display module, the user can set and adjust parameters stored in the parameter setting area, such as brightness, chroma, and size of the display screen. On the other hand, the code area of the liquid crystal display module may store a code for enabling the liquid crystal display module to operate. If the code is improperly changed, the LCD module may not work properly. Therefore, the code area in the non-volatile flash memory 12 requires a write protection mechanism to prevent the code in the code area from being easily changed.

Please refer to Figure 2. 2 is a method of operating a non-volatile flash memory with a write protection mechanism in an embodiment of the present disclosure. This method of operation can be applied to the electronic device system 1 as shown in FIG. The operation method includes the following steps (it should be understood that the steps mentioned in the present embodiment can be adjusted according to actual needs, and can be performed simultaneously or partially simultaneously, unless otherwise specified.

In step 201, the micro control unit 10 sends an instruction, and the instruction is determined to be a protection information change instruction or a flash memory data change instruction. When the instruction is the protection information change instruction 11, step 202 is executed to determine that the instruction is the protection information change instruction 11. The protection information change command 11 is used to change the protection information 160 stored in the mini array 16.

In step 203, it is determined whether the protection information change instruction 11 matches a plurality of change instructions having a specific combination order. In one embodiment, the protection information change command 11 can be used to program the protection information 160 stored in the mini array 16. Please refer to Figure 3. FIG. 3 is a schematic diagram of a plurality of modifiers in a specific combination sequence in an embodiment of the disclosure. As shown in Figure 3, CE represents the chip enable signal, SCK represents the serial data clock signal, and SI represents the sequence data input signal. When the wafer enable signal CE goes high, no action can be taken on the wafer. Conversely, when the chip enable signal CE goes low, the instructions transmitted by the sequence data input signal SI will be able to change the wafer.

As shown in FIG. 3, the plurality of modifier commands having a specific combination order includes a plurality of program instructions, an address instruction, and at least one setting instruction. The program instructions are 55h, AAh, A0h, 55h, and 23h in this embodiment, and the address instruction is A23-A0. However, during the transfer of the program instruction, the address instruction instruction following the instruction between the first 55h and the last 55h of the program instruction is essentially unknown, and only the address after 23h is continued. The instructions contain real address information. The address shows the block address of the non-volatile flash memory 12, and the setting command shown in FIG. 3 as D7-D0 shows that the non-volatile flash memory 12 is to be stylized. The sector. In one embodiment, the set command includes eight guard bits, each indicating whether a corresponding magnetic region is in a write protected state. For example, 0 can set the corresponding magnetic region to protect the magnetic region, and 1 can set the corresponding magnetic region to allow the magnetic region to be written.

Please refer to Table 1. Table 1 shows an example of setting instructions.

As shown in Table 1, the address shows the block address of the non-volatile flash memory 12, and the bits D7-D0 of the set command correspond to the respective sectors in each block. For example, if the address instruction is 001h and the set instruction is 11101111, the fifth magnetic zone in the block having the address of 001h is in the protected state. In an embodiment, if two setting commands are transmitted as shown in FIG. 3, the address of the block corresponding to the latter is one plus the address of the block corresponding to the former. In other words, if the block address corresponding to the previous setting command is 001h, the magnetic zone to be set by the latter setting command belongs to the block whose address is 002h.

It should be noted that the above embodiments are merely an example. In essence, the number of program instructions and the order of these instructions can be easily changed by those skilled in the art. Moreover, the protection information 160 described above may also be stored in other storage modules.

In another embodiment, the protection information change command 11 can be used to erase the protection information 160 located in the mini array 16. In this case, the plurality of modifiers having a particular combination order includes a plurality of erase instructions, as depicted in FIG. The erase command may include instructions in the order of 55h, AAh, 80h, AAh, and 2Bh, and is transmitted via the sequence data input signal SI as the program instructions described above. However, since the erase command is used to erase all the data in the protection information 160, it is not necessary to transmit the actual address instruction during the erasing process.

Please refer to Figure 1 and Figure 2 again. Then, only when the protection information change instruction 11 matches the change order having the specific combination order, the step 204 is executed to allow the protection information 160 to be changed according to the protection information change instruction 11, whether it is a stylized or erased change. . Therefore, the above complicated change procedure can prevent the protection information 160 from being easily changed by an instruction that is improperly generated due to unstable or insufficient power of the system.

On the other hand, when the instruction is the flash memory data change instruction 13, step 205 is executed to determine that the instruction is the flash memory data change instruction 13. Next, in step 206, it is determined whether the state register protection information 140 indicates that the memory block/magnetic area of the non-volatile flash memory 12 is in the write protection state, and whether the protection information 160 displays the memory block/ The magnetic zone is in the write protection state.

Status register protection information 140 is stored in status register 14. In one embodiment, the state register protection information 140 is three-bit information, and each protection bit indicates whether a block range of the non-volatile flash memory 12 is in a write protection state. For example, 011 may indicate that blocks 4-7 of non-volatile flash memory 12 are in a write protected state, while 000 indicates that blocks in any non-volatile flash memory 12 are in write protection. status. However, the instructions available to change the contents of the state protector information 140 are much simpler than the protection information 160. If only the state register protection information 140 is used, the improper instructions tend to change the state register protection information 140, which may cause the electronic device system 1 to malfunction.

Therefore, in step 207, only when the state register protection information 140 and the protection information 160 indicate that the memory block/magnetic area is not in the write protection state, the memory block/magnetic area is allowed to be based on the flash memory. The volume data change command 13 is changed, whether it is erased or programmed.

In essence, during the erasing or programming of the non-volatile flash memory 12, the chip enable signal CE must be switched from the inhibit state (standby mode) to the enable state. Please refer to Figure 5. FIG. 5 is another flow chart of the erasing/staging process of the non-volatile flash memory 12 in one embodiment of the disclosure (it should be understood that the steps mentioned in the embodiment include In particular, the sequence can be adjusted according to actual needs, and can even be executed simultaneously or partially.

In step 501, the wafer enable signal CE is in an inhibit state, which is a high state in this embodiment. In step 502, the wafer enable signal CE is switched to an enabled state, which in this embodiment is a low state opposite to the high state. In step 503, an erase/stylization instruction is sent and the address and data are transmitted. Next, in step 504, the wafer enable signal CE is switched back to the suppression state. In step 505, it is determined whether the state register protection information 140 indicates that the memory block/magnetic area of the non-volatile flash memory 12 is in the write protection state. When the state register protection information 140 indicates that the memory block/magnetic area of the non-volatile flash memory 12 is in the write protection state, the erase/program command will not be able to change the non-volatile flash memory 12. . When the state register protection information 140 indicates that the memory block/magnetic area of the non-volatile flash memory 12 is not in the write protection state, step 506 is executed to determine whether the protection information 160 displays the memory block/magnetic The zone is in the write protection state. When the protection information 160 indicates that the memory block/magnetic area of the non-volatile flash memory 12 is in the write protection state, the erase/stylize command will not be able to change the non-volatile flash memory 12. When the protection information 160 indicates that the memory block/magnetic area of the non-volatile flash memory 12 is not in the write protection state, then step 507 is executed to initiate erasing/staging.

With the write protection mechanism provided by the state register protection information 140 and the more difficult protection information 160, the code in the non-volatile flash memory 12 can be prevented from being easily affected by improper instructions.

The present disclosure has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is subject to the definition of the scope of the patent application.

1. . . Electronic device system

10. . . Micro control unit

11. . . Protection information change order

12. . . Non-volatile flash memory

13. . . Flash memory data change instruction

14. . . Status register

140. . . Status register protection information

16. . . Mini array

160. . . Protection information

201-207. . . step

501-507. . . step

The above and other objects, features, advantages and embodiments of the present disclosure will become more apparent and understood.

1 is a schematic diagram of an electronic device system in an embodiment of the disclosure;

2 is a method for operating a non-volatile flash memory having a write protection mechanism in an embodiment of the present disclosure;

3 is a schematic diagram of a plurality of modifiers in a specific combination sequence in an embodiment of the disclosure;

4 is a schematic diagram of a plurality of modifiers in a specific combination sequence in another embodiment of the disclosure;

FIG. 5 is another flow chart of the erasing/staging process of the non-volatile flash memory in an embodiment of the present disclosure.

1. . . Electronic device system

10. . . Micro control unit

11. . . Protection information change order

12. . . Non-volatile flash memory

13. . . Flash memory data change instruction

14. . . Status register

140. . . Status register protection information

16. . . Mini array

160. . . Protection information

Claims (11)

A method for operating a non-volatile flash memory having a write protection mechanism, the method includes the steps of: sending an instruction; determining that the instruction is a protection information change instruction or a flash memory data change instruction; When the instruction is the protection information change instruction, determining whether the protection information change instruction is consistent with a plurality of change instructions having a specific combination order, wherein only the protection information change instruction and the change instruction having the specific combination order When matching, a protection information is allowed to be changed according to the protection information change instruction; when the instruction is the flash memory data change instruction, determining whether a status register protection information displays one of the non-volatile flash memories The body block/magnetic area is in a write protection state, and determining whether the protection information indicates that the memory block/magnetic area of the non-volatile flash memory is in the write protection state, wherein only the state is temporarily The memory protection information indicates that the memory block/magnetic area is not in the write protection state and the protection information displays the record When the body block / region is not located in the magnetic write protection state, allowing the blocks of memory / magnetic domain is changed according to the change command flash memory data. The method of operation of claim 1, wherein the protection information is stored in a mini array. The method of operation of claim 1, wherein the modifiers having the particular combination order comprise a plurality of program instructions, an address instruction, and at least one setting instruction. The method of claim 3, wherein the address instruction corresponds to a block of non-volatile flash memory, the setting command includes a plurality of guard bits, each of which displays one of the non-volatile flash memories Whether the zone is in the write protection state. The method of operation of claim 1, wherein the modifiers having the particular combination order comprise a plurality of erase instructions. The method of claim 1, wherein the flash memory data change instruction is a flash memory programized instruction. The method of claim 1, wherein the flash memory data change instruction is a flash memory erase command. The method of claim 1, wherein the non-volatile flash memory comprises a code area and a parameter setting area, wherein the flash memory data change command changes the content of the code area. The method of claim 1, wherein the state register protection information is a three-bit information to display the memory block/magnetic area of the non-volatile flash memory in the write protection state. The method of claim 1, wherein before the step of sending the instruction, the method further comprises: changing a chip enable signal from an inhibited state to a consistent state. The method of operation of claim 1, wherein the instruction is sent by a micro control unit.