TWI434200B - Display panel having photo-detection positioning functionality - Google Patents

Display panel having photo-detection positioning functionality Download PDF

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TWI434200B
TWI434200B TW99128253A TW99128253A TWI434200B TW I434200 B TWI434200 B TW I434200B TW 99128253 A TW99128253 A TW 99128253A TW 99128253 A TW99128253 A TW 99128253A TW I434200 B TWI434200 B TW I434200B
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transistor
electrically connected
signal
voltage
driving voltage
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TW201209659A (en
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pei yi Chen
Chun Wei Huang
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Au Optronics Corp
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Description

具光感測定位功能之顯示面板Display panel with light sensing position function

本發明係有關於一種顯示面板,尤指一種具光感測定位功能之顯示面板。The invention relates to a display panel, in particular to a display panel with a light sensing position function.

近年來,具面板輸入機制的電子產品已成為流行產品,利用輸入式顯示面板作為使用者與電子產品之間的溝通介面,可讓使用者直接透過顯示面板來控制電子產品的操作,而不需透過鍵盤或滑鼠。輸入式顯示面板的輸入機制分為光感測輸入模式與觸碰輸入模式,其中觸碰輸入模式會因經常性的面板觸碰動作而容易使面板受損,所以基於光感測輸入模式的顯示面板可具有較長的使用壽命。習知基於光感測輸入模式的顯示面板之光感測定位機制可分為被動式架構與主動式架構。在被動式光感測定位機制的運作中,由於光感測訊號僅根據光感應元件受光後之漏電流而產生,所以光感應靈敏度較低。至於主動式光感測定位機制則利用光感應元件之受光狀態以調整放大電晶體之閘極電壓,進而產生具高靈敏度之光感測訊號。但是由於在主動式光感測定位機制的運作中,施加於光感應相關元件與放大電晶體的高低偏壓係為固定電壓,所以元件特性容易因長期固定的電壓應力而發生偏移,如此會導致光感測訊號之誤差,進而造成後級電路的誤動作。In recent years, electronic products with panel input mechanisms have become popular products, and the input display panel is used as a communication interface between the user and the electronic product, so that the user can directly control the operation of the electronic product through the display panel without Through the keyboard or mouse. The input mechanism of the input display panel is divided into a light sensing input mode and a touch input mode, wherein the touch input mode is easy to damage the panel due to frequent panel touch actions, so the display based on the light sensing input mode is displayed. The panel can have a long service life. It is known that the light sensing position mechanism of the display panel based on the light sensing input mode can be divided into a passive architecture and an active architecture. In the operation of the passive light sensing position mechanism, since the light sensing signal is generated only according to the leakage current after the light sensing element receives light, the light sensing sensitivity is low. As for the active light sensing position mechanism, the light receiving state of the light sensing element is utilized to adjust the gate voltage of the amplifying transistor, thereby generating a light sensing signal with high sensitivity. However, since the high and low bias voltages applied to the light-sensing element and the amplifying transistor are fixed voltages during the operation of the active light sensing device, the component characteristics are easily shifted due to long-term fixed voltage stress. This causes an error in the light sensing signal, which in turn causes malfunction of the subsequent stage circuit.

依據本發明之實施例揭露一種顯示面板,其包含電壓提供單元與感測單元。電壓提供單元係用來提供第一驅動電壓與第二驅動電壓。感測單元電連接於電壓提供單元,用來根據第一驅動電壓與第二驅動電壓以提供讀出訊號。感測單元包含第一電晶體、第二電晶體以及第三電晶體。第一電晶體包含第一端、第二端與閘極端,其中第一電晶體之第一端電連接於電壓提供單元以接收第一驅動電壓,第一電晶體之第二端電連接於第一電晶體之閘極端。第二電晶體包含第一端、第二端與閘極端,其中第二電晶體之第一端電連接於第一電晶體之第二端,第二電晶體之第二端與閘極端電連接於電壓提供單元以接收第二驅動電壓。第三電晶體包含第一端、第二端與閘極端,其中第三電晶體之第一端電連接於電壓提供單元以接收第一驅動電壓,第三電晶體之閘極端電連接於第一電晶體之第二端,第三電晶體之第二端用來輸出讀出訊號。感測單元的每一運作週期包含第一時段與第二時段,第一驅動電壓在第一時段內係高於第二驅動電壓,第一驅動電壓在第二時段內係低於第二驅動電壓。A display panel includes a voltage supply unit and a sensing unit according to an embodiment of the invention. The voltage supply unit is configured to provide a first driving voltage and a second driving voltage. The sensing unit is electrically connected to the voltage supply unit for providing the read signal according to the first driving voltage and the second driving voltage. The sensing unit includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first end, a second end and a gate terminal, wherein the first end of the first transistor is electrically connected to the voltage supply unit to receive the first driving voltage, and the second end of the first transistor is electrically connected to the first The gate of a transistor is extreme. The second transistor includes a first end, a second end and a gate terminal, wherein the first end of the second transistor is electrically connected to the second end of the first transistor, and the second end of the second transistor is electrically connected to the gate terminal The voltage supply unit is configured to receive the second driving voltage. The third transistor includes a first end, a second end and a gate terminal, wherein the first end of the third transistor is electrically connected to the voltage supply unit to receive the first driving voltage, and the gate terminal of the third transistor is electrically connected to the first The second end of the transistor and the second end of the third transistor are used to output a read signal. Each operation cycle of the sensing unit includes a first time period and a second time period, the first driving voltage is higher than the second driving voltage in the first time period, and the first driving voltage is lower than the second driving voltage in the second time period .

依據本發明之實施例另揭露一種顯示面板,其包含電壓提供單元、掃描線以及感測單元。電壓提供單元係用來提供交流驅動電壓。掃描線係用來傳輸具週期性脈波之掃描訊號。感測單元電連接於電壓提供單元,用來根據交流驅動電壓與掃描訊號以提供讀出訊號。感測單元包含第一電晶體、第二電晶體以及第三電晶體。第一電晶體包含第一端、第二端與閘極端,其中第一電晶體之第一端電連接於電壓提供單元以接收交流驅動電壓,第一電晶體之第二端電連接於第一電晶體之閘極端。第二電晶體包含第一端、第二端與閘極端,其中第二電晶體之第一端電連接於第一電晶體之第二端,第二電晶體之第二端與閘極端電連接於掃描線以接收掃描訊號。第三電晶體包含第一端、第二端與閘極端,其中第三電晶體之第一端電連接於電壓提供單元以接收交流驅動電壓,第三電晶體之閘極端電連接於第一電晶體之第二端,第三電晶體之第二端用來輸出讀出訊號。感測單元的每一運作週期包含第一時段與第二時段,第一掃描訊號在第一時段內係高於交流驅動電壓,第一掃描訊號在第二時段內係低於交流驅動電壓。According to an embodiment of the invention, a display panel includes a voltage supply unit, a scan line, and a sensing unit. The voltage supply unit is used to provide an AC drive voltage. The scan line is used to transmit scan signals with periodic pulse waves. The sensing unit is electrically connected to the voltage supply unit for providing a read signal according to the AC driving voltage and the scanning signal. The sensing unit includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first end, a second end and a gate terminal, wherein the first end of the first transistor is electrically connected to the voltage supply unit to receive the AC driving voltage, and the second end of the first transistor is electrically connected to the first The gate of the transistor is extreme. The second transistor includes a first end, a second end and a gate terminal, wherein the first end of the second transistor is electrically connected to the second end of the first transistor, and the second end of the second transistor is electrically connected to the gate terminal Scan the line to receive the scan signal. The third transistor includes a first end, a second end and a gate terminal, wherein the first end of the third transistor is electrically connected to the voltage supply unit to receive the AC driving voltage, and the gate terminal of the third transistor is electrically connected to the first electrode The second end of the crystal, the second end of the third transistor is used to output a read signal. Each operation cycle of the sensing unit includes a first time period and a second time period. The first scanning signal is higher than the AC driving voltage in the first time period, and the first scanning signal is lower than the AC driving voltage in the second time period.

依據本發明之實施例另揭露一種顯示面板,其包含電壓提供單元、掃描線以及感測單元。電壓提供單元係用來提供交流驅動電壓。掃描線係用來傳輸具週期性脈波之掃描訊號。感測單元電連接於電壓提供單元,用來根據交流驅動電壓與掃描訊號以提供讀出訊號。感測單元包含第一電晶體、第二電晶體以及第三電晶體。第一電晶體包含第一端、第二端與閘極端,其中第一電晶體之第一端電連接於掃描線以接收掃描訊號,第一電晶體之第二端電連接於第一電晶體之閘極端。第二電晶體包含第一端、第二端與閘極端,其中第二電晶體之第一端電連接於第一電晶體之第二端,第二電晶體之第二端與閘極端電連接於電壓提供單元以接收交流驅動電壓。第三電晶體包含第一端、第二端與閘極端,其中第三電晶體之第一端電連接於掃描線以接收掃描訊號,第三電晶體之閘極端電連接於第一電晶體之第二端,第三電晶體之第二端用來輸出讀出訊號。感測單元的每一運作週期包含第一時段與第二時段,第一掃描訊號在第一時段內係高於交流驅動電壓,第一掃描訊號在第二時段內係低於交流驅動電壓。According to an embodiment of the invention, a display panel includes a voltage supply unit, a scan line, and a sensing unit. The voltage supply unit is used to provide an AC drive voltage. The scan line is used to transmit scan signals with periodic pulse waves. The sensing unit is electrically connected to the voltage supply unit for providing a read signal according to the AC driving voltage and the scanning signal. The sensing unit includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first end, a second end and a gate terminal, wherein the first end of the first transistor is electrically connected to the scan line to receive the scan signal, and the second end of the first transistor is electrically connected to the first transistor The extreme of the gate. The second transistor includes a first end, a second end and a gate terminal, wherein the first end of the second transistor is electrically connected to the second end of the first transistor, and the second end of the second transistor is electrically connected to the gate terminal The voltage supply unit receives the AC drive voltage. The third transistor includes a first end, a second end and a gate terminal, wherein the first end of the third transistor is electrically connected to the scan line to receive the scan signal, and the gate end of the third transistor is electrically connected to the first transistor At the second end, the second end of the third transistor is used to output a read signal. Each operation cycle of the sensing unit includes a first time period and a second time period. The first scanning signal is higher than the AC driving voltage in the first time period, and the first scanning signal is lower than the AC driving voltage in the second time period.

下文依本發明具光感測定位功能之顯示面板,特舉實施例配合所附圖式作詳細說明,但所提供之實施例並非用以限制本發明所涵蓋的範圍。In the following, the display panel with the light-sensing function is described in detail with reference to the accompanying drawings, but the embodiments are not intended to limit the scope of the invention.

第1圖為本發明具光感測定位功能之顯示面板的第一實施例示意圖。如第1圖所示,顯示面板100包含複數掃描線101、複數資料線102、複數畫素單元105、複數讀出線110、複數感測單元120、直流電壓提供單元190、以及訊號處理單元195。每一條掃描線101係用來傳輸對應掃描訊號。每一條資料線102係用來傳輸對應資料訊號。每一畫素單元105係用來根據對應掃描訊號控制對應資料訊號之寫入運作,據以輸出對應影像訊號。直流電壓提供單元190係用來提供固定之高準位驅動電壓Vdh與低準位驅動電壓Vdl至複數感測單元120。FIG. 1 is a schematic view showing a first embodiment of a display panel having a light sensing position function according to the present invention. As shown in FIG. 1 , the display panel 100 includes a plurality of scan lines 101 , a plurality of data lines 102 , a plurality of pixel units 105 , a plurality of read lines 110 , a plurality of sensing units 120 , a DC voltage supply unit 190 , and a signal processing unit 195 . . Each scan line 101 is used to transmit a corresponding scan signal. Each data line 102 is used to transmit corresponding data signals. Each pixel unit 105 is configured to control the writing operation of the corresponding data signal according to the corresponding scanning signal, thereby outputting the corresponding image signal. The DC voltage supply unit 190 is configured to provide a fixed high level driving voltage Vdh and a low level driving voltage Vdl to the complex sensing unit 120.

每一感測單元120包含第一電晶體125、第二電晶體130、第三電晶體135、電容140、以及第四電晶體150。在一實施例中,第一電晶體125係為光感應薄膜電晶體(Photo-sensing Thin Film Transistor)或光感應場效電晶體(Photo-sensing Field Effect Transistor),第二電晶體130、第三電晶體135與第四電晶體150係為薄膜電晶體或場效電晶體。在另一實施例中,第二電晶體130係為光感應薄膜電晶體或光感應場效電晶體,第一電晶體125、第三電晶體135與第四電晶體150係為薄膜電晶體或場效電晶體。閘極電壓Vg係為高準位驅動電壓Vdh與低準位驅動電壓Vdl經由第一電晶體125之通道電阻與第二電晶體130之通道電阻所產生之分壓,其中第一電晶體125之通道電阻或第二電晶體130之通道電阻係受照光影響。第三電晶體135根據閘極電壓Vg與高準位驅動電壓Vdh以產生感測電壓Vsense,而電容140則用來儲存感測電壓Vsense。由上述可知,感測單元120可根據其受光狀態以調整閘極電壓Vg,進而調整感測電壓Vsense。第四電晶體150根據對應掃描線101所傳輸之掃描訊號將感測電壓Vsense輸出為對應讀出訊號,經由對應讀出線110饋入至訊號處理單元195。訊號處理單元195係用來對複數讀出線110饋入之複數讀出訊號執行訊號處理,據以產生觸碰位置訊號Spos。Each sensing unit 120 includes a first transistor 125, a second transistor 130, a third transistor 135, a capacitor 140, and a fourth transistor 150. In one embodiment, the first transistor 125 is a Photo-sensing Thin Film Transistor or a Photo-sensing Field Effect Transistor, and the second transistor 130 is a third. The transistor 135 and the fourth transistor 150 are thin film transistors or field effect transistors. In another embodiment, the second transistor 130 is a photo-induced thin film transistor or a photo-induced field-effect transistor, and the first transistor 125, the third transistor 135, and the fourth transistor 150 are thin film transistors or Field effect transistor. The gate voltage Vg is a partial voltage generated by the high-level driving voltage Vdh and the low-level driving voltage Vdl via the channel resistance of the first transistor 125 and the channel resistance of the second transistor 130, wherein the first transistor 125 The channel resistance or the channel resistance of the second transistor 130 is affected by the illumination. The third transistor 135 generates a sensing voltage Vsense according to the gate voltage Vg and the high level driving voltage Vdh, and the capacitor 140 is used to store the sensing voltage Vsense. As can be seen from the above, the sensing unit 120 can adjust the gate voltage Vg according to the light receiving state thereof, thereby adjusting the sensing voltage Vsense. The fourth transistor 150 outputs the sensing voltage Vsense as a corresponding read signal according to the scan signal transmitted by the corresponding scan line 101, and is fed to the signal processing unit 195 via the corresponding read line 110. The signal processing unit 195 is configured to perform signal processing on the plurality of read signals fed by the plurality of read lines 110, thereby generating a touch position signal Spos.

在感測單元120的運作中,第一電晶體125、第二電晶體130與第三電晶體135係長時間承受固定之高準位驅動電壓Vdh或低準 位驅動電壓Vdl所施加的電壓應力,所以容易導致元件特性偏移(譬如電晶體臨界電壓偏移)。當第一電晶體125或第二電晶體130之元件特性偏移時,所產生之閘極電壓Vg就會發生誤差,進而使感測電壓Vsense也跟著發生誤差,如此訊號處理單元195可能會產生錯誤的觸碰位置訊號Spos。當第三電晶體135之元件特性偏移時,即使閘極電壓Vg沒有誤差,所產生之感測電壓Vsense亦會發生誤差,而訊號處理單元195也就可能產生錯誤的觸碰位置訊號Spos。請注意,若第一電晶體125、第二電晶體130與第三電晶體135為非晶矽(amorphous-Si)薄膜電晶體,則在固定偏壓下更容易導致元件特性偏移。In the operation of the sensing unit 120, the first transistor 125, the second transistor 130, and the third transistor 135 are subjected to a fixed high-level driving voltage Vdh or a low level for a long time. The voltage stress applied by the bit driving voltage Vd1 is liable to cause component characteristic shift (such as a transistor threshold voltage shift). When the component characteristics of the first transistor 125 or the second transistor 130 are shifted, an error occurs in the generated gate voltage Vg, and the sensing voltage Vsense is also followed by an error, so that the signal processing unit 195 may generate The wrong touch position signal Spos. When the element characteristics of the third transistor 135 are shifted, even if the gate voltage Vg has no error, an error occurs in the generated sensing voltage Vsense, and the signal processing unit 195 may generate an erroneous touch position signal Spos. Note that if the first transistor 125, the second transistor 130, and the third transistor 135 are amorphous-Si thin film transistors, it is more likely to cause component characteristic shift under a fixed bias.

第2圖為本發明具光感測定位功能之顯示面板的第二實施例示意圖。如第2圖所示,顯示面板200包含複數掃描線201、複數資料線202、複數畫素單元205、複數讀出線210、複數感測單元220、電壓提供單元290、以及訊號處理單元295。每一條掃描線201係用來傳輸對應掃描訊號。每一條資料線202係用來傳輸對應資料訊號。每一畫素單元205電連接於對應掃描線201與對應資料線202,用來根據對應掃描訊號控制對應資料訊號之寫入運作,據以輸出對應影像訊號。畫素單元205可為基於液晶顯示之畫素單元。電壓提供單元290係用來提供第一驅動電壓Vc1與第二驅動電壓Vc2至複數感測單元220。第7圖顯示於三個圖框的時段,第2圖電壓提供單元290提供之第一驅動電壓Vc1與第二驅動電壓Vc2的準位之示意圖。感測單元220的每一運作週期包含第一時段與第二時段,第 一時段的時間長度實質上等於一圖框週期,第二時段的時間長度亦實質上等於一圖框週期,第一時段實質上係為一圖框的時段,第二時段實質上係為另一圖框的時段,第一驅動電壓Vc1在第一圖框及第三圖框的時段係為高電位V2 ,在第二圖框的時段係為低電位V1 ,第二驅動電壓Vc2在第一圖框及第三圖框的時段係為低電位V1 ,在第二圖框的時段係為高電位V2 ,第一時段的時間長度實質上等於一圖框週期,第二時段的時間長度亦實質上等於一圖框週期,第一時段實質上係為一圖框的時段,第二時段實質上係為另一圖框的時段,第一驅動電壓Vc1在第一圖框及第三圖框的時段係為高電位V2 ,在第二圖框的時段係為低電位V1 ,第二驅動電壓Vc2在第一圖框及第三圖框的時段係為低電位V1 ,在第二圖框的時段係為高電位V2 ,第一驅動電壓Vc1在第一時段內係高於第二驅動電壓Vc2,第一驅動電壓Vc1在第二時段內係低於第二驅動電壓Vc2。在一實施例中,電壓提供單元290係用來提供交流且互為反相之第一驅動電壓Vc1與第二驅動電壓Vc2,亦即當第一驅動電壓Vc1為低準位電壓時,第二驅動電壓Vc2係為高準位電壓,反之亦然。在另一實施例中,電壓提供單元290係用來提供交流之第一驅動電壓Vc1與直流之第二驅動電壓Vc2,其中第一驅動電壓Vc1之高準位電壓高於第二驅動電壓Vc2,且第一驅動電壓Vc1之低準位電壓低於第二驅動電壓Vc2。在另一實施例中,電壓提供單元290係用來提供直流之第一驅動電壓Vc1與交流之第二驅動電壓Vc2,其中第二驅動電壓Vc2之高準位電壓高於第一驅動電壓Vc1,且第二驅動電壓Vc2之低準位電壓低於第一驅動電壓Vc1。FIG. 2 is a schematic view showing a second embodiment of a display panel having a light sensing position function according to the present invention. As shown in FIG. 2, the display panel 200 includes a plurality of scan lines 201, a plurality of data lines 202, a plurality of pixel units 205, a plurality of read lines 210, a plurality of sensing units 220, a voltage supply unit 290, and a signal processing unit 295. Each scan line 201 is used to transmit a corresponding scan signal. Each data line 202 is used to transmit corresponding data signals. Each pixel unit 205 is electrically connected to the corresponding scan line 201 and the corresponding data line 202 for controlling the writing operation of the corresponding data signal according to the corresponding scan signal, thereby outputting the corresponding image signal. The pixel unit 205 may be a pixel unit based on liquid crystal display. The voltage supply unit 290 is configured to provide the first driving voltage Vc1 and the second driving voltage Vc2 to the complex sensing unit 220. FIG. 7 is a schematic diagram showing the timings of the first driving voltage Vc1 and the second driving voltage Vc2 provided by the voltage supply unit 290 in FIG. Each operation cycle of the sensing unit 220 includes a first time period and a second time period, the time length of the first time period is substantially equal to a frame period, and the time length of the second time period is also substantially equal to a frame period, the first time period The period of the first frame is substantially the period of the other frame, and the first driving voltage Vc1 is a high potential V 2 in the period of the first frame and the third frame. The period of the second frame is the low potential V 1 , and the second driving voltage Vc2 is the low potential V 1 in the period of the first frame and the third frame, and the high potential V 2 in the period of the second frame. The time length of the first time period is substantially equal to a frame period, and the time length of the second time period is also substantially equal to a frame period, the first time period is substantially a time period of one frame, and the second time period is substantially another During the period of a frame, the first driving voltage Vc1 is at a high potential V 2 in the period of the first frame and the third frame, and the low period V 1 in the period of the second frame, and the second driving voltage Vc2 is at The time period of the first frame and the third frame is low potential V 1 , in the second frame The period is a high potential V 2 , and the first driving voltage Vc1 is higher than the second driving voltage Vc2 in the first period, and the first driving voltage Vc1 is lower than the second driving voltage Vc2 in the second period. In an embodiment, the voltage supply unit 290 is configured to provide a first driving voltage Vc1 and a second driving voltage Vc2 that are alternating and mutually inverted, that is, when the first driving voltage Vc1 is a low level voltage, the second The driving voltage Vc2 is a high level voltage and vice versa. In another embodiment, the voltage supply unit 290 is configured to provide a first driving voltage Vc1 of the alternating current and a second driving voltage Vc2 of the direct current, wherein the high level voltage of the first driving voltage Vc1 is higher than the second driving voltage Vc2, And the low level voltage of the first driving voltage Vc1 is lower than the second driving voltage Vc2. In another embodiment, the voltage supply unit 290 is configured to provide a first driving voltage Vc1 of the direct current and a second driving voltage Vc2 of the alternating current, wherein the high level voltage of the second driving voltage Vc2 is higher than the first driving voltage Vc1, And the low level voltage of the second driving voltage Vc2 is lower than the first driving voltage Vc1.

在第2圖所示之實施例中,每一畫素單元205均相鄰感測單元220。在另一實施例中,感測單元220係可間隔複數掃描線201而設置,或間隔複數資料線202而設置,亦即並非每一畫素單元205均與感測單元220相鄰。同理,讀出線210可相對應地間隔複數資料線202而設置。每一感測單元220包含第一電晶體225、第二電晶體230、第三電晶體235、電容240、以及第四電晶體250。在一實施例中,第一電晶體225係為光感應薄膜電晶體或光感應場效電晶體,第二電晶體230、第三電晶體235與第四電晶體250係為薄膜電晶體或場效電晶體。在另一實施例中,第二電晶體230係為光感應薄膜電晶體或光感應場效電晶體,第一電晶體225、第三電晶體235與第四電晶體250係為薄膜電晶體或場效電晶體。下文依感測單元DUn_m說明其內各元件之耦合關係與電路運作原理。In the embodiment shown in FIG. 2, each pixel unit 205 is adjacent to the sensing unit 220. In another embodiment, the sensing unit 220 can be disposed by spacing the plurality of scan lines 201, or by spacing the plurality of data lines 202, that is, not every pixel unit 205 is adjacent to the sensing unit 220. Similarly, the readout line 210 can be disposed correspondingly to the plurality of data lines 202. Each sensing unit 220 includes a first transistor 225, a second transistor 230, a third transistor 235, a capacitor 240, and a fourth transistor 250. In one embodiment, the first transistor 225 is a photo-induced thin film transistor or a photo-induced field-effect transistor, and the second transistor 230, the third transistor 235, and the fourth transistor 250 are thin film transistors or fields. Effect transistor. In another embodiment, the second transistor 230 is a photo-induced thin film transistor or a photo-induced field-effect transistor, and the first transistor 225, the third transistor 235, and the fourth transistor 250 are thin film transistors or Field effect transistor. The coupling unit and the operation principle of the circuit are described below according to the sensing unit DUN_m.

第一電晶體225之通道電阻或第二電晶體230之通道電阻可根據其受光狀態以調整閘極電壓VGn_m,據以驅動第三電晶體235。第三電晶體235根據閘極電壓VGn_m與第一驅動電壓Vc1以產生感測電壓VDn_m,而電容240則用來儲存感測電壓VDn_m。第四電晶體250根據掃描線SLn所傳輸之掃描訊號SSn將感測電壓VDn_m輸出為讀出訊號Sro_m,經由讀出線RLm饋入至訊號處理單元295。訊號處理單元295係用來對複數讀出線210饋入之複數讀出訊號(例如由讀出線RLm饋入之讀出訊號Sro_m與由讀出線RLj饋入之讀出訊號Sro_j)執行訊號處理,據以產生觸碰位置訊號 Spos。The channel resistance of the first transistor 225 or the channel resistance of the second transistor 230 may be adjusted according to its light receiving state to adjust the gate voltage VGn_m, thereby driving the third transistor 235. The third transistor 235 generates a sensing voltage VDn_m according to the gate voltage VGn_m and the first driving voltage Vc1, and the capacitor 240 is used to store the sensing voltage VDn_m. The fourth transistor 250 outputs the sensing voltage VDn_m as the read signal Sro_m according to the scan signal SSn transmitted by the scan line SLn, and feeds it to the signal processing unit 295 via the read line RLm. The signal processing unit 295 is configured to perform a signal on the complex read signal (for example, the read signal Sro_m fed by the read line RLm and the read signal Sro_j fed by the read line RLj) fed from the complex read line 210. Processing, according to which a touch position signal is generated Spos.

第一電晶體225包含第一端、第二端與閘極端,其中第一端電連接於電壓提供單元290以接收第一驅動電壓Vc1,第二端電連接於第二電晶體230與第三電晶體235,閘極端電連接於第一電晶體225之第二端。第一電晶體225之第二端係用來提供閘極電壓VGn_m。第二電晶體230包含第一端、第二端與閘極端,其中第一端電連接於第一電晶體225之第二端,第二端與閘極端均電連接於電壓提供單元290以接收第二驅動電壓Vc2。第三電晶體235包含第一端、第二端與閘極端,其中第一端電連接於電壓提供單元290以接收第一驅動電壓Vc1,第二端電連接於電容240與第四電晶體250,閘極端電連接於第一電晶體225之第二端以接收閘極電壓VGn_m。第三電晶體235之第二端係用來提供感測電壓VDn_m。電容240包含第一端與第二端,其中第一端電連接於第三電晶體235之第二端,第二端電連接於電壓提供單元290以接收第二驅動電壓Vc2。第四電晶體250包含第一端、第二端與閘極端,其中第一端電連接於第三電晶體235之第二端以接收感測電壓VDn_m,閘極端電連接於掃描線SLn以接收掃描訊號SSn,第二端電連接於讀出線RLm。第四電晶體250之第二端係用來輸出讀出訊號Sro_m至讀出線RLm。在一實施例中,電容240係可省略,而第三電晶體235之第二端與第二電晶體230之第二端之間係為開路。在另一實施例中,第四電晶體250係可省略,而第三電晶體235之第二端則直接連接於讀出線RLm,亦即第三電晶體235之第二端所提供之感測電 壓VDn_m係直接輸出為讀出訊號Sro_m。The first transistor 225 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the voltage supply unit 290 to receive the first driving voltage Vc1, and the second end is electrically connected to the second transistor 230 and the third The transistor 235 has a gate terminal electrically connected to the second end of the first transistor 225. The second end of the first transistor 225 is used to provide a gate voltage VGn_m. The second transistor 230 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the second end of the first transistor 225, and the second end and the gate terminal are both electrically connected to the voltage supply unit 290 for receiving The second driving voltage Vc2. The third transistor 235 includes a first end, a second end, and a gate terminal, wherein the first end is electrically connected to the voltage supply unit 290 to receive the first driving voltage Vc1, and the second end is electrically connected to the capacitor 240 and the fourth transistor 250. The gate is electrically connected to the second end of the first transistor 225 to receive the gate voltage VGn_m. The second end of the third transistor 235 is used to provide a sensing voltage VDn_m. The capacitor 240 includes a first end and a second end, wherein the first end is electrically connected to the second end of the third transistor 235, and the second end is electrically connected to the voltage supply unit 290 to receive the second driving voltage Vc2. The fourth transistor 250 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the second end of the third transistor 235 to receive the sensing voltage VDn_m, and the gate terminal is electrically connected to the scan line SLn for receiving The scan signal SSn is electrically connected to the readout line RLm. The second end of the fourth transistor 250 is for outputting the read signal Sro_m to the read line RLm. In one embodiment, the capacitor 240 can be omitted, and the second end of the third transistor 235 and the second end of the second transistor 230 are open. In another embodiment, the fourth transistor 250 can be omitted, and the second end of the third transistor 235 is directly connected to the sense line RLm, that is, the sense provided by the second end of the third transistor 235. Measuring electricity The voltage VDn_m is directly output as the read signal Sro_m.

在感測單元DUn_m的運作中,由於第一電晶體225與第二電晶體230係根據感測單元DUn_m之受光狀態,配合交流且互為反相之第一驅動電壓Vc1與第二驅動電壓Vc2以提供閘極電壓VGn_m。也就是說,第一電晶體225與第二電晶體230並不會長時間承受固定之高準位電壓或低準位電壓所施加的電壓應力,所以可避免第一電晶體225與第二電晶體230發生元件特性偏移現象,進而避免所產生之閘極電壓VGn_m發生誤差。此外,第三電晶體235係由閘極電壓VGn_m與第一驅動電壓Vc1所驅動,據以產生感測電壓VDn_m,而閘極電壓VGn_m與第一驅動電壓Vc1均為交流電壓,因此第三電晶體235亦不會長時間承受固定之高準位電壓所施加的電壓應力,所以可避免第三電晶體235發生元件特性偏移現象,進而避免所產生之讀出訊號Sro_m發生誤差。總之,在顯示面板200的運作中,複數感測單元220可長時間根據受光狀態而提供精確的複數讀出訊號,使訊號處理單元295可據以產生精確的觸碰位置訊號Spos。In the operation of the sensing unit DUn_m, since the first transistor 225 and the second transistor 230 are in accordance with the light receiving state of the sensing unit DUn_m, the first driving voltage Vc1 and the second driving voltage Vc2 are coupled to each other and are mutually inverted. To provide the gate voltage VGn_m. That is to say, the first transistor 225 and the second transistor 230 do not withstand the voltage stress applied by the fixed high-level voltage or the low-level voltage for a long time, so that the first transistor 225 and the second transistor can be avoided. 230 occurs in the characteristic shift of the component, thereby avoiding an error in the generated gate voltage VGn_m. In addition, the third transistor 235 is driven by the gate voltage VGn_m and the first driving voltage Vc1 to generate the sensing voltage VDn_m, and the gate voltage VGn_m and the first driving voltage Vc1 are both AC voltages, so the third power The crystal 235 also does not withstand the voltage stress applied by the fixed high-level voltage for a long time, so that the element characteristic shift phenomenon of the third transistor 235 can be avoided, thereby avoiding the error of the generated read signal Sro_m. In summary, in the operation of the display panel 200, the plurality of sensing units 220 can provide accurate complex read signals according to the light receiving state for a long time, so that the signal processing unit 295 can generate an accurate touch position signal Spos.

第3圖為本發明具光感測定位功能之顯示面板的第三實施例示意圖。如第3圖所示,顯示面板300係類似於第2圖所示之顯示面板200,主要差異在於將電壓提供單元290置換為電壓提供單元390,以及將複數感測單元220置換為複數感測單元320,其中感測單元DUn_m係被置換為感測單元DWn_m。電壓提供單元390係用 來提供交流驅動電壓Vc3。每一感測單元320包含第一電晶體325、第二電晶體330、第三電晶體335、電容340、以及第四電晶體350,其中第一電晶體325係為光感應薄膜電晶體或光感應場效電晶體,第二電晶體330、第三電晶體335與第四電晶體350係為薄膜電晶體或場效電晶體。下文依感測單元DWn_m說明其內各元件之耦合關係與電路運作原理。FIG. 3 is a schematic view showing a third embodiment of a display panel having a light sensing position function according to the present invention. As shown in FIG. 3, the display panel 300 is similar to the display panel 200 shown in FIG. 2, and the main difference is that the voltage supply unit 290 is replaced with the voltage supply unit 390, and the complex sensing unit 220 is replaced with a complex sense. The unit 320, wherein the sensing unit DUn_m is replaced with the sensing unit DWn_m. The voltage supply unit 390 is used To provide the AC drive voltage Vc3. Each sensing unit 320 includes a first transistor 325, a second transistor 330, a third transistor 335, a capacitor 340, and a fourth transistor 350, wherein the first transistor 325 is a light-sensitive thin film transistor or light. Inductive field effect transistors, the second transistor 330, the third transistor 335 and the fourth transistor 350 are thin film transistors or field effect transistors. The sensing unit DWn_m is used to describe the coupling relationship between the components and the circuit operation principle.

閘極電壓VGn_m係為交流驅動電壓Vc3與掃描訊號SSn+1經由第一電晶體325之通道電阻與第二電晶體330之通道電阻所產生之分壓,其中第一電晶體325之通道電阻係受照光影響,亦即閘極電壓VGn_m可根據第一電晶體325之通道電阻的受光狀態而調整。第三電晶體335根據閘極電壓VGn_m與交流驅動電壓Vc3以產生感測電壓VDn_m,而電容340則用來儲存感測電壓VDn_m。第四電晶體350根據掃描訊號SSn將感測電壓VDn_m輸出為讀出訊號Sro_m,經由讀出線RLm饋入至訊號處理單元295。The gate voltage VGn_m is a partial voltage generated by the AC drive voltage Vc3 and the scan signal SSn+1 via the channel resistance of the first transistor 325 and the channel resistance of the second transistor 330, wherein the channel resistance of the first transistor 325 is The gate voltage VGn_m can be adjusted according to the light receiving state of the channel resistance of the first transistor 325. The third transistor 335 generates a sensing voltage VDn_m according to the gate voltage VGn_m and the alternating current driving voltage Vc3, and the capacitor 340 is used to store the sensing voltage VDn_m. The fourth transistor 350 outputs the sensing voltage VDn_m as the read signal Sro_m according to the scan signal SSn, and feeds it to the signal processing unit 295 via the read line RLm.

第一電晶體325包含第一端、第二端與閘極端,其中第一端電連接於電壓提供單元390以接收交流驅動電壓Vc3,第二端電連接於第二電晶體330與第三電晶體335,閘極端電連接於第一電晶體325之第二端。第一電晶體325之第二端係用來提供閘極電壓VGn_m。第二電晶體330包含第一端、第二端與閘極端,其中第一端電連接於第一電晶體325之第二端,第二端與閘極端均電連接於掃描線SLn+1以接收掃描訊號SSn+1。第三電晶體335包含第一端、 第二端與閘極端,其中第一端電連接於電壓提供單元390以接收交流驅動電壓Vc3,第二端電連接於電容340與第四電晶體350,閘極端電連接於第一電晶體325之第二端以接收閘極電壓VGn_m。第三電晶體335之第二端係用來提供感測電壓VDn_m。電容340包含第一端與第二端,其中第一端電連接於第三電晶體335之第二端,第二端電連接於掃描線SLn+1以接收掃描訊號SSn+1。第四電晶體350包含第一端、第二端與閘極端,其中第一端電連接於第三電晶體335之第二端以接收感測電壓VDn_m,閘極端電連接於掃描線SLn以接收掃描訊號SSn,第二端電連接於讀出線RLm。第四電晶體350之第二端係用來輸出讀出訊號Sro_m至讀出線RLm。在一實施例中,電容340係可省略,而第三電晶體335之第二端與第二電晶體330之第二端之間係為開路。在另一實施例中,第四電晶體350係可省略,而第三電晶體335之第二端則直接連接於讀出線RLm,亦即第三電晶體335之第二端所提供之感測電壓VDn_m係直接輸出為讀出訊號Sro_m。The first transistor 325 includes a first end, a second end, and a gate terminal, wherein the first end is electrically connected to the voltage supply unit 390 to receive the AC driving voltage Vc3, and the second end is electrically connected to the second transistor 330 and the third electrode. The crystal 335 has a gate terminal electrically connected to the second end of the first transistor 325. The second end of the first transistor 325 is used to provide a gate voltage VGn_m. The second transistor 330 includes a first end, a second end, and a gate terminal, wherein the first end is electrically connected to the second end of the first transistor 325, and the second end and the gate terminal are electrically connected to the scan line SLn+1. The scanning signal SSn+1 is received. The third transistor 335 includes a first end, The second end is connected to the gate terminal, wherein the first end is electrically connected to the voltage supply unit 390 to receive the AC driving voltage Vc3, the second end is electrically connected to the capacitor 340 and the fourth transistor 350, and the gate terminal is electrically connected to the first transistor 325. The second end receives the gate voltage VGn_m. The second end of the third transistor 335 is used to provide a sensing voltage VDn_m. The capacitor 340 includes a first end and a second end, wherein the first end is electrically connected to the second end of the third transistor 335, and the second end is electrically connected to the scan line SLn+1 to receive the scan signal SSn+1. The fourth transistor 350 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the second end of the third transistor 335 to receive the sensing voltage VDn_m, and the gate terminal is electrically connected to the scan line SLn for receiving The scan signal SSn is electrically connected to the readout line RLm. The second end of the fourth transistor 350 is for outputting the read signal Sro_m to the read line RLm. In one embodiment, the capacitor 340 can be omitted, and the second end of the third transistor 335 and the second end of the second transistor 330 are open. In another embodiment, the fourth transistor 350 can be omitted, and the second end of the third transistor 335 is directly connected to the sense line RLm, that is, the sense provided by the second end of the third transistor 335. The measured voltage VDn_m is directly output as the read signal Sro_m.

感測單元DWn_m的運作週期包含第一時段與第二時段,掃描訊號SSn+1在第一時段內係高於交流驅動電壓Vc3,掃描訊號SSn+1在第二時段內係低於交流驅動電壓Vc3。掃描訊號SSn+1包含週期性正脈波或週期性負脈波。若掃描訊號SSn+1包含週期性正脈波,則掃描訊號SSn+1之脈波時段係對應於交流驅動電壓Vc3之低準位時段。若掃描訊號SSn+1包含週期性負脈波,則掃描訊號SSn+1之脈波時段係對應於交流驅動電壓Vc3之高準位時段。顯示面板300 之其餘電連接關係與功能運作係類同於顯示面板200,不再贅述。The operation period of the sensing unit DWn_m includes a first period and a second period, the scanning signal SSn+1 is higher than the AC driving voltage Vc3 in the first period, and the scanning signal SSn+1 is lower than the AC driving voltage in the second period Vc3. The scan signal SSn+1 includes a periodic positive pulse or a periodic negative pulse. If the scan signal SSn+1 includes a periodic positive pulse wave, the pulse wave period of the scan signal SSn+1 corresponds to the low level period of the AC drive voltage Vc3. If the scan signal SSn+1 includes a periodic negative pulse wave, the pulse wave period of the scan signal SSn+1 corresponds to the high-level period of the AC drive voltage Vc3. Display panel 300 The remaining electrical connection relationship and functional operation are similar to the display panel 200, and will not be described again.

第4圖為本發明具光感測定位功能之顯示面板的第四實施例示意圖。如第4圖所示,顯示面板400係類似於第3圖所示之顯示面板300,主要差異在於將複數感測單元320置換為複數感測單元420,其中感測單元DWn_m係被置換為感測單元DXn_m。感測單元DXn_m係類似於感測單元DWn_m,主要差異在於將第二電晶體330置換為第二電晶體430,以及將電容340置換為電容440。第二電晶體430係為薄膜電晶體或場效電晶體。第二電晶體430包含第一端、第二端與閘極端,其中第一端電連接於第一電晶體325之第二端,第二端與閘極端均電連接於掃描線SLn以接收掃描訊號SSn。電容440包含第一端與第二端,其中第一端電連接於第三電晶體335之第二端,第二端電連接於掃描線SLn以接收掃描訊號SSn。感測單元DXn_m的運作週期包含第一時段與第二時段,掃描訊號SSn在第一時段內係高於交流驅動電壓Vc3,掃描訊號SSn在第二時段內係低於交流驅動電壓Vc3。掃描訊號SSn包含週期性正脈波或週期性負脈波。若掃描訊號SSn包含週期性正脈波,則掃描訊號SSn之脈波時段係對應於交流驅動電壓Vc3之低準位時段。若掃描訊號SSn包含週期性負脈波,則掃描訊號SSn之脈波時段係對應於交流驅動電壓Vc3之高準位時段。顯示面板400之其餘電連接關係與功能運作係類同於顯示面板300,不再贅述。4 is a schematic view showing a fourth embodiment of a display panel having a light sensing position function according to the present invention. As shown in FIG. 4, the display panel 400 is similar to the display panel 300 shown in FIG. 3, and the main difference is that the complex sensing unit 320 is replaced with a complex sensing unit 420, wherein the sensing unit DWn_m is replaced with a sense. Measuring unit DXn_m. The sensing unit DXn_m is similar to the sensing unit DWn_m, the main difference being that the second transistor 330 is replaced with the second transistor 430, and the capacitor 340 is replaced by the capacitor 440. The second transistor 430 is a thin film transistor or a field effect transistor. The second transistor 430 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the second end of the first transistor 325, and the second end and the gate terminal are electrically connected to the scan line SLn for receiving the scan. Signal SSn. The capacitor 440 includes a first end and a second end, wherein the first end is electrically connected to the second end of the third transistor 335, and the second end is electrically connected to the scan line SLn to receive the scan signal SSn. The operation period of the sensing unit DXn_m includes a first period and a second period, the scanning signal SSn is higher than the AC driving voltage Vc3 in the first period, and the scanning signal SSn is lower than the AC driving voltage Vc3 in the second period. The scan signal SSn contains a periodic positive pulse or a periodic negative pulse. If the scan signal SSn includes a periodic positive pulse wave, the pulse wave period of the scan signal SSn corresponds to a low level period of the AC drive voltage Vc3. If the scan signal SSn includes a periodic negative pulse wave, the pulse wave period of the scan signal SSn corresponds to the high level period of the AC drive voltage Vc3. The remaining electrical connection relationship and function operation of the display panel 400 are similar to those of the display panel 300, and will not be described again.

第5圖為本發明具光感測定位功能之顯示面板的第五實施例示 意圖。如第5圖所示,顯示面板500係類似於第2圖所示之顯示面板200,主要差異在於將電壓提供單元290置換為電壓提供單元590,以及將複數感測單元220置換為複數感測單元520,其中感測單元DUn_m係被置換為感測單元DYn_m。電壓提供單元590係用來提供交流驅動電壓Vc4。每一感測單元520包含第一電晶體525、第二電晶體530、第三電晶體535、電容540、以及第四電晶體550,其中第二電晶體530係為光感應薄膜電晶體或光感應場效電晶體,第一電晶體525、第三電晶體535與第四電晶體550係為薄膜電晶體或場效電晶體。下文依感測單元DYn_m說明其內各元件之耦合關係與電路運作原理。FIG. 5 is a fifth embodiment of a display panel with a light sensing position function according to the present invention. intention. As shown in FIG. 5, the display panel 500 is similar to the display panel 200 shown in FIG. 2, and the main difference is that the voltage supply unit 290 is replaced with the voltage supply unit 590, and the complex sensing unit 220 is replaced with a complex sense. Unit 520, wherein the sensing unit DUn_m is replaced with a sensing unit DYn_m. The voltage supply unit 590 is for providing an AC drive voltage Vc4. Each sensing unit 520 includes a first transistor 525, a second transistor 530, a third transistor 535, a capacitor 540, and a fourth transistor 550, wherein the second transistor 530 is a light-sensitive thin film transistor or light. Inductive field effect transistors, the first transistor 525, the third transistor 535 and the fourth transistor 550 are thin film transistors or field effect transistors. The sensing unit DYn_m is used to describe the coupling relationship between the components and the circuit operation principle.

閘極電壓VGn_m係為掃描訊號SSn與交流驅動電壓Vc4經由第一電晶體525之通道電阻與第二電晶體530之通道電阻所產生之分壓,其中第二電晶體530之通道電阻係受照光影響,亦即閘極電壓VGn_m可根據第二電晶體530之通道電阻的受光狀態而調整。第三電晶體535根據閘極電壓VGn_m與掃描訊號SSn以產生感測電壓VDn_m,而電容540則用來儲存感測電壓VDn_m。第四電晶體550根據掃描訊號SSn將感測電壓VDn_m輸出為讀出訊號Sro_m,經由讀出線RLm饋入至訊號處理單元295。The gate voltage VGn_m is a partial voltage generated by the channel resistance of the scan signal SSn and the AC drive voltage Vc4 via the channel resistance of the first transistor 525 and the channel resistance of the second transistor 530, wherein the channel resistance of the second transistor 530 is illuminated. The influence, that is, the gate voltage VGn_m can be adjusted according to the light receiving state of the channel resistance of the second transistor 530. The third transistor 535 generates a sensing voltage VDn_m according to the gate voltage VGn_m and the scanning signal SSn, and the capacitor 540 is used to store the sensing voltage VDn_m. The fourth transistor 550 outputs the sensing voltage VDn_m as the read signal Sro_m according to the scan signal SSn, and feeds it to the signal processing unit 295 via the read line RLm.

第一電晶體525包含第一端、第二端與閘極端,其中第一端電連接於掃描線SLn以接收掃描訊號SSn,第二端電連接於第二電晶體530與第三電晶體535,閘極端電連接於第一電晶體525之第二 端。第一電晶體525之第二端係用來提供閘極電壓VGn_m。第二電晶體530包含第一端、第二端與閘極端,其中第一端電連接於第一電晶體525之第二端,第二端與閘極端均電連接於電壓提供單元590以接收交流驅動電壓Vc4。第三電晶體535包含第一端、第二端與閘極端,其中第一端電連接於掃描線SLn以接收掃描訊號SSn,第二端電連接於電容540與第四電晶體550,閘極端電連接於第一電晶體525之第二端以接收閘極電壓VGn_m。第三電晶體535之第二端係用來提供感測電壓VDn_m。電容540包含第一端與第二端,其中第一端電連接於第三電晶體535之第二端,第二端電連接於電壓提供單元590以接收交流驅動電壓Vc4。第四電晶體550包含第一端、第二端與閘極端,其中第一端電連接於第三電晶體535之第二端以接收感測電壓VDn_m,閘極端電連接於掃描線SLn以接收掃描訊號SSn,第二端電連接於讀出線RLm。第四電晶體550之第二端係用來輸出讀出訊號Sro_m至讀出線RLm。在一實施例中,電容540係可省略,而第三電晶體535之第二端與第二電晶體530之第二端之間係為開路。在另一實施例中,第四電晶體550係可省略,而第三電晶體535之第二端則直接連接於讀出線RLm,亦即第三電晶體535之第二端所提供之感測電壓VDn_m係直接輸出為讀出訊號Sro_m。The first transistor 525 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the scan line SLn to receive the scan signal SSn, and the second end is electrically connected to the second transistor 530 and the third transistor 535. The gate is electrically connected to the second of the first transistor 525 end. The second end of the first transistor 525 is used to provide a gate voltage VGn_m. The second transistor 530 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the second end of the first transistor 525, and the second end and the gate terminal are both electrically connected to the voltage providing unit 590 for receiving AC drive voltage Vc4. The third transistor 535 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the scan line SLn to receive the scan signal SSn, and the second end is electrically connected to the capacitor 540 and the fourth transistor 550, the gate terminal It is electrically connected to the second end of the first transistor 525 to receive the gate voltage VGn_m. The second end of the third transistor 535 is used to provide a sensing voltage VDn_m. The capacitor 540 includes a first end and a second end, wherein the first end is electrically connected to the second end of the third transistor 535, and the second end is electrically connected to the voltage supply unit 590 to receive the AC driving voltage Vc4. The fourth transistor 550 includes a first end, a second end and a gate terminal, wherein the first end is electrically connected to the second end of the third transistor 535 to receive the sensing voltage VDn_m, and the gate terminal is electrically connected to the scan line SLn for receiving The scan signal SSn is electrically connected to the readout line RLm. The second end of the fourth transistor 550 is for outputting the read signal Sro_m to the read line RLm. In one embodiment, the capacitor 540 can be omitted, and the second end of the third transistor 535 and the second end of the second transistor 530 are open. In another embodiment, the fourth transistor 550 can be omitted, and the second end of the third transistor 535 is directly connected to the sense line RLm, that is, the sense provided by the second end of the third transistor 535. The measured voltage VDn_m is directly output as the read signal Sro_m.

感測單元DYn_m的運作週期包含第一時段與第二時段,掃描訊號SSn在第一時段內係高於交流驅動電壓Vc4,掃描訊號SSn在第二時段內係低於交流驅動電壓Vc4。掃描訊號SSn包含週期性正 脈波或週期性負脈波。若掃描訊號SSn包含週期性正脈波,則掃描訊號SSn之脈波時段係對應於交流驅動電壓Vc4之低準位時段。若掃描訊號SSn包含週期性負脈波,則掃描訊號SSn之脈波時段係對應於交流驅動電壓Vc4之高準位時段。顯示面板500之其餘電連接關係與功能運作係類同於顯示面板200,不再贅述。The operation period of the sensing unit DYn_m includes a first period and a second period, the scanning signal SSn is higher than the AC driving voltage Vc4 in the first period, and the scanning signal SSn is lower than the AC driving voltage Vc4 in the second period. Scan signal SSn contains periodic positive Pulse wave or periodic negative pulse wave. If the scan signal SSn includes a periodic positive pulse wave, the pulse wave period of the scan signal SSn corresponds to a low level period of the AC drive voltage Vc4. If the scan signal SSn includes a periodic negative pulse wave, the pulse wave period of the scan signal SSn corresponds to the high level period of the AC drive voltage Vc4. The remaining electrical connection relationship and function operation of the display panel 500 are similar to those of the display panel 200, and will not be described again.

第6圖為本發明具光感測定位功能之顯示面板的第六實施例示意圖。如第6圖所示,顯示面板600係類似於第5圖所示之顯示面板500,主要差異在於將複數感測單元520置換為複數感測單元620,其中感測單元DYn_m係被置換為感測單元DZn_m。感測單元DZn_m係類似於感測單元DYn_m,主要差異在於將第一電晶體525置換為第一電晶體625,以及將第三電晶體535置換為第三電晶體635。第一電晶體625與第三電晶體635係為薄膜電晶體或場效電晶體。第一電晶體625包含第一端、第二端與閘極端,其中第一端電連接於掃描線SLn+1以接收掃描訊號SSn+1,第二端與閘極端均電連接於第二電晶體530之第一端。第三電晶體635包含第一端、第二端與閘極端,其中第一端電連接於掃描線SLn+1以接收掃描訊號SSn+1,第二端電連接於第四電晶體550之第一端,閘極端電連接於第一電晶體625之第二端。感測單元DZn_m的運作週期包含第一時段與第二時段,掃描訊號SSn+1在第一時段內係高於交流驅動電壓Vc4,掃描訊號SSn+1在第二時段內係低於交流驅動電壓Vc4。掃描訊號SSn+1包含週期性正脈波或週期性負脈波。若掃描訊號SSn+1包含週期性正脈波,則掃描訊號SSn+1之脈波時段係對 應於交流驅動電壓Vc4之低準位時段。若掃描訊號SSn+1包含週期性負脈波,則掃描訊號SSn+1之脈波時段係對應於交流驅動電壓Vc4之高準位時段。顯示面板600之其餘電連接關係與功能運作係類同於顯示面板500,不再贅述。Fig. 6 is a view showing a sixth embodiment of the display panel having the light sensing position function of the present invention. As shown in FIG. 6, the display panel 600 is similar to the display panel 500 shown in FIG. 5, and the main difference is that the complex sensing unit 520 is replaced with a complex sensing unit 620, wherein the sensing unit DYn_m is replaced with a sense. Measuring unit DZn_m. The sensing unit DZn_m is similar to the sensing unit DYn_m, the main difference being that the first transistor 525 is replaced with the first transistor 625, and the third transistor 535 is replaced with the third transistor 635. The first transistor 625 and the third transistor 635 are thin film transistors or field effect transistors. The first transistor 625 includes a first end, a second end, and a gate terminal, wherein the first end is electrically connected to the scan line SLn+1 to receive the scan signal SSn+1, and the second end and the gate terminal are electrically connected to the second The first end of the crystal 530. The third transistor 635 includes a first end, a second end, and a gate terminal, wherein the first end is electrically connected to the scan line SLn+1 to receive the scan signal SSn+1, and the second end is electrically connected to the fourth transistor 550. At one end, the gate is electrically connected to the second end of the first transistor 625. The operation period of the sensing unit DZn_m includes a first period and a second period, the scanning signal SSn+1 is higher than the AC driving voltage Vc4 in the first period, and the scanning signal SSn+1 is lower than the AC driving voltage in the second period Vc4. The scan signal SSn+1 includes a periodic positive pulse or a periodic negative pulse. If the scanning signal SSn+1 includes a periodic positive pulse wave, the pulse wave period of the scanning signal SSn+1 is It should be at the low level of the AC drive voltage Vc4. If the scan signal SSn+1 includes a periodic negative pulse wave, the pulse wave period of the scan signal SSn+1 corresponds to the high level period of the AC drive voltage Vc4. The remaining electrical connection relationship and functional operation of the display panel 600 are similar to those of the display panel 500, and will not be described again.

綜上所述,在本發明具光感測定位功能之顯示面板的運作中,感測單元係由電壓提供單元所提供之至少一交流驅動電壓所驅動,亦即感測單元所包含之複數電晶體均不會長時間承受固定偏壓應力,據以避免其內各電晶體發生元件特性偏移現象,進而避免訊號處理單元所接收之讀出訊號發生誤差。換句話說,顯示面板之複數感測單元可長時間根據受光狀態而提供精確的複數讀出訊號,使訊號處理單元可據以產生精確的觸碰位置訊號。In summary, in the operation of the display panel with the light sensing position function of the present invention, the sensing unit is driven by at least one AC driving voltage provided by the voltage providing unit, that is, the plurality of electric powers included in the sensing unit. The crystals are not subjected to a fixed bias stress for a long time, so as to avoid the occurrence of component characteristic shift in each of the transistors, thereby avoiding errors in the read signals received by the signal processing unit. In other words, the plurality of sensing units of the display panel can provide an accurate complex read signal according to the light receiving state for a long time, so that the signal processing unit can generate an accurate touch position signal.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何具有本發明所屬技術領域之通常知識者,在不脫離本發明之精神和範圍內,當可作各種更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。While the present invention has been described above by way of example, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100、200、300、400、500、600‧‧‧顯示面板100, 200, 300, 400, 500, 600‧‧‧ display panels

101、201‧‧‧掃描線101, 201‧‧‧ scan lines

102、202‧‧‧資料線102, 202‧‧‧ data line

105、205‧‧‧畫素單元105, 205‧‧ ‧ pixel unit

110、210‧‧‧讀出線110, 210‧‧‧ readout lines

120、220、320、420、520、620‧‧‧感測單元120, 220, 320, 420, 520, 620‧ ‧ sensing unit

125、225、325、 525、625‧‧‧ 第一電晶體125, 225, 325, 525, 625‧‧ First transistor

130、230、330、430、530‧‧‧第二電晶體130, 230, 330, 430, 530‧‧‧ second transistor

135、235、335、535、635‧‧‧第三電晶體135, 235, 335, 535, 635‧‧‧ third transistor

140、240、340、440、540‧‧‧電容140, 240, 340, 440, 540‧‧ ‧ capacitors

150、250、350、550‧‧‧第四電晶體150, 250, 350, 550‧‧‧ fourth transistor

190‧‧‧直流電壓提供單元190‧‧‧DC voltage supply unit

195、295‧‧‧訊號處理單元195, 295‧‧‧ signal processing unit

290、390、590‧‧‧電壓提供單元290, 390, 590‧‧‧ voltage supply unit

DUn_m、DWn_m、DXn_m、DYn_m、DZn_m‧‧‧感測單元DUn_m, DWn_m, DXn_m, DYn_m, DZn_m‧‧‧ sensing unit

RLj、RLm‧‧‧讀出線RLj, RLm‧‧‧ readout line

SLn、SLn+1‧‧‧掃描線SLn, SLn+1‧‧‧ scan line

Spos‧‧‧觸碰位置訊號Spos‧‧‧Touch position signal

Sro_j、Sro_m‧‧‧讀出訊號Sro_j, Sro_m‧‧‧ read signal

SSn、SSn+1‧‧‧掃描訊號SSn, SSn+1‧‧‧ scan signal

Vc1‧‧‧第一驅動電壓Vc1‧‧‧ first drive voltage

Vc2‧‧‧第二驅動電壓Vc2‧‧‧second drive voltage

Vc3、Vc4‧‧‧交流驅動電壓Vc3, Vc4‧‧‧ AC drive voltage

Vdh‧‧‧高準位驅動電壓Vdh‧‧‧ high level drive voltage

Vdl‧‧‧低準位驅動電壓Vdl‧‧‧low level drive voltage

Vg、VGn_m‧‧‧閘極電壓Vg, VGn_m‧‧‧ gate voltage

Vsense、VDn_m‧‧‧感測電壓Vsense, VDn_m‧‧‧ sense voltage

V1‧‧‧低電位V1‧‧‧ low potential

V2‧‧‧高電位V2‧‧‧ high potential

第1圖為本發明具光感測定位功能之顯示面板的第一實施例示意圖。FIG. 1 is a schematic view showing a first embodiment of a display panel having a light sensing position function according to the present invention.

第2圖為本發明具光感測定位功能之顯示面板的第二實施例示 意圖。2 is a second embodiment of a display panel with a light sensing position function according to the present invention. intention.

第3圖為本發明具光感測定位功能之顯示面板的第三實施例示意圖。FIG. 3 is a schematic view showing a third embodiment of a display panel having a light sensing position function according to the present invention.

第4圖為本發明具光感測定位功能之顯示面板的第四實施例示意圖。4 is a schematic view showing a fourth embodiment of a display panel having a light sensing position function according to the present invention.

第5圖為本發明具光感測定位功能之顯示面板的第五實施例示意圖。FIG. 5 is a schematic view showing a fifth embodiment of a display panel having a light sensing position function according to the present invention.

第6圖為本發明具光感測定位功能之顯示面板的第六實施例示意圖。Fig. 6 is a view showing a sixth embodiment of the display panel having the light sensing position function of the present invention.

第7圖顯示於三個圖框的時段,第2圖電壓提供單元提供之第一驅動電壓Vc1與第二驅動電壓Vc2的準位之示意圖。FIG. 7 is a schematic diagram showing the timings of the first driving voltage Vc1 and the second driving voltage Vc2 provided by the voltage supply unit of FIG. 2 in the period of three frames.

200...顯示面板200. . . Display panel

201...掃描線201. . . Scanning line

202...資料線202. . . Data line

205...畫素單元205. . . Pixel unit

210...讀出線210. . . Readout line

220...感測單元220. . . Sensing unit

225...第一電晶體225. . . First transistor

230...第二電晶體230. . . Second transistor

235...第三電晶體235. . . Third transistor

240...電容240. . . capacitance

250...第四電晶體250. . . Fourth transistor

295...訊號處理單元295. . . Signal processing unit

290...電壓提供單元290. . . Voltage supply unit

DUn_m...感測單元DUn_m. . . Sensing unit

RLj、RLm...讀出線RLj, RLm. . . Readout line

SLn、SLn+1...掃描線SLn, SLn+1. . . Scanning line

Spos...觸碰位置訊號Spos. . . Touch position signal

Sro_j、Sro_m...讀出訊號Sro_j, Sro_m. . . Read signal

SSn、SSn+1...掃描訊號SSn, SSn+1. . . Scanning signal

Vc1...第一驅動電壓Vc1. . . First drive voltage

Vc2...第二驅動電壓Vc2. . . Second drive voltage

VGn_m...閘極電壓VGn_m. . . Gate voltage

VDn_m...感測電壓VDn_m. . . Sense voltage

Claims (20)

一種具光感測定位功能之顯示面板,其包含:一電壓提供單元,用來提供一第一驅動電壓與一第二驅動電壓;以及一感測單元,電連接於該電壓提供單元,用來提供一第一讀出訊號,該感測單元包含:一第一電晶體,包含一第一端、一第二端與一閘極端,其中該第一電晶體之第一端電連接於該電壓提供單元以接收該第一驅動電壓,該第一電晶體之第二端電連接於該第一電晶體之閘極端;一第二電晶體,包含一第一端、一第二端與一閘極端,其中該第二電晶體之第一端電連接於該第一電晶體之第二端,該第二電晶體之第二端與閘極端電連接於該電壓提供單元以接收該第二驅動電壓;以及一第三電晶體,包含一第一端、一第二端與一閘極端,其中該第三電晶體之第一端電連接於該電壓提供單元以接收該第一驅動電壓,該第三電晶體之閘極端電連接於該第一電晶體之第二端,該第三電晶體之第二端用來輸出該第一讀出訊號;其中該感測單元的每一運作週期包含一第一時段與一第二時段,該第一驅動電壓在該第一時段內係高於該第二驅動電壓,該第一驅動電壓在該第二時段內係低於該第二 驅動電壓。 A display panel with a light sensing position function, comprising: a voltage supply unit for providing a first driving voltage and a second driving voltage; and a sensing unit electrically connected to the voltage providing unit for Providing a first read signal, the sensing unit includes: a first transistor, including a first end, a second end, and a gate terminal, wherein the first end of the first transistor is electrically connected to the voltage Providing a unit to receive the first driving voltage, a second end of the first transistor is electrically connected to a gate end of the first transistor; a second transistor includes a first end, a second end, and a gate Extremely, wherein the first end of the second transistor is electrically connected to the second end of the first transistor, and the second end of the second transistor is electrically connected to the gate terminal to the voltage providing unit to receive the second driving And a third transistor comprising a first end, a second end and a gate terminal, wherein the first end of the third transistor is electrically connected to the voltage supply unit to receive the first driving voltage, The gate of the third transistor is electrically connected to the gate a second end of the transistor, the second end of the third transistor is configured to output the first read signal; wherein each operation cycle of the sensing unit includes a first time period and a second time period, the first a driving voltage is higher than the second driving voltage in the first period, the first driving voltage being lower than the second in the second period Drive voltage. 如請求項1所述之顯示面板,其中:該第一電晶體係為一光感應薄膜電晶體或一光感應場效電晶體;以及該第二電晶體與該第三電晶體係為薄膜電晶體或場效電晶體。 The display panel of claim 1, wherein: the first electro-crystal system is a photo-inductive thin film transistor or a photo-sensing field-effect transistor; and the second electro-optic crystal and the third electro-crystalline system are thin film Crystal or field effect transistor. 如請求項1所述之顯示面板,其中:該第二電晶體係為一光感應薄膜電晶體或一光感應場效電晶體;以及該第一電晶體與該第三電晶體係為薄膜電晶體或場效電晶體。 The display panel of claim 1, wherein: the second electro-crystal system is a photo-induced thin film transistor or a photo-induced field-effect transistor; and the first transistor and the third electro-crystal system are thin film Crystal or field effect transistor. 如請求項1所述之顯示面板,另包含:一電容,包含一第一端與一第二端,其中該電容之第一端電連接於該第三電晶體之第二端,該電容之第二端電連接於該第二電晶體之第二端。 The display panel of claim 1, further comprising: a capacitor comprising a first end and a second end, wherein the first end of the capacitor is electrically connected to the second end of the third transistor, the capacitor The second end is electrically connected to the second end of the second transistor. 如請求項1所述之顯示面板,另包含:一掃描線,用來傳輸一掃描訊號;一第一讀出線,用來傳輸該第一讀出訊號;以及一第四電晶體,包含一第一端、一第二端與一閘極端,其中該第四電晶體之第一端電連接於該第三電晶體之第二端,該第四電晶體之閘極端電連接於該掃描線以接收該掃描訊號,該 第四電晶體之第二端電連接於該第一讀出線;其中該第四電晶體係為一薄膜電晶體或一場效電晶體。 The display panel of claim 1, further comprising: a scan line for transmitting a scan signal; a first read line for transmitting the first read signal; and a fourth transistor comprising a a first end, a second end and a gate terminal, wherein the first end of the fourth transistor is electrically connected to the second end of the third transistor, and the gate terminal of the fourth transistor is electrically connected to the scan line To receive the scan signal, the The second end of the fourth transistor is electrically connected to the first readout line; wherein the fourth electro-crystalline system is a thin film transistor or a field effect transistor. 如請求項5所述之顯示面板,另包含:一資料線,用來傳輸一資料訊號;以及一畫素單元,電連接於該掃描線與該資料線,用來根據該掃描訊號與該資料訊號以輸出一影像訊號。 The display panel of claim 5, further comprising: a data line for transmitting a data signal; and a pixel unit electrically connected to the scan line and the data line for using the scan signal and the data Signal to output an image signal. 如請求項5所述之顯示面板,另包含:一第二讀出線,用來傳輸一第二讀出訊號;以及一訊號處理單元,電連接於該第一讀出線與該第二讀出線,用來對該第一讀出訊號與該第二讀出訊號執行訊號處理,據以產生一觸碰位置訊號。 The display panel of claim 5, further comprising: a second read line for transmitting a second read signal; and a signal processing unit electrically connected to the first read line and the second read The outgoing line is configured to perform signal processing on the first read signal and the second read signal to generate a touch position signal. 如請求項1所述之顯示面板,其中該電壓提供單元係用來提供交流且互為反相之該第一驅動電壓與該第二驅動電壓。 The display panel of claim 1, wherein the voltage providing unit is configured to provide the first driving voltage and the second driving voltage that are alternating and mutually inverted. 如請求項1所述之顯示面板,其中該電壓提供單元係用來提供交流之該第一驅動電壓與直流之該第二驅動電壓,其中該第一驅動電壓之高準位電壓高於該第二驅動電壓,且該第一驅動電壓之低準位電壓低於該第二驅動電壓。 The display panel of claim 1, wherein the voltage supply unit is configured to provide the first driving voltage of the alternating current and the second driving voltage of the direct current, wherein the high level voltage of the first driving voltage is higher than the first And driving the voltage, and the low level voltage of the first driving voltage is lower than the second driving voltage. 如請求項1所述之顯示面板,其中該電壓提供單元係用來提供 直流之該第一驅動電壓與交流之該第二驅動電壓,其中該第二驅動電壓之高準位電壓高於該第一驅動電壓,且該第二驅動電壓之低準位電壓低於該第一驅動電壓。 The display panel of claim 1, wherein the voltage providing unit is configured to provide The first driving voltage of the direct current and the second driving voltage of the alternating current, wherein the high level voltage of the second driving voltage is higher than the first driving voltage, and the low level voltage of the second driving voltage is lower than the first driving voltage A drive voltage. 一種具光感測定位功能之顯示面板,其包含:一電壓提供單元,用來提供一交流驅動電壓;一第一掃描線,用來傳輸具週期性脈波之一第一掃描訊號;以及一感測單元,電連接於該電壓提供單元與該第一掃描線,用來提供一讀出訊號,該感測單元包含:一第一電晶體,包含一第一端、一第二端與一閘極端,其中該第一電晶體之第一端電連接於該電壓提供單元以接收該交流驅動電壓,該第一電晶體之第二端電連接於該第一電晶體之閘極端;一第二電晶體,包含一第一端、一第二端與一閘極端,其中該第二電晶體之第一端電連接於該第一電晶體之第二端,該第二電晶體之第二端與閘極端電連接於該第一掃描線以接收該第一掃描訊號;以及一第三電晶體,包含一第一端、一第二端與一閘極端,其中該第三電晶體之第一端電連接於該電壓提供單元以接收該交流驅動電壓,該第三電晶體之閘極端電連接於該第一電晶體之第二端,該第三電晶體之第二端用來輸出該讀出訊號; 其中該感測單元的每一運作週期包含一第一時段與一第二時段,該第一掃描訊號在該第一時段內係高於該交流驅動電壓,該第一掃描訊號在該第二時段內係低於該交流驅動電壓。 A display panel with a light sensing position function, comprising: a voltage supply unit for providing an alternating current driving voltage; a first scanning line for transmitting a first scanning signal having a periodic pulse wave; and a The sensing unit is electrically connected to the voltage supply unit and the first scan line for providing a read signal. The sensing unit includes: a first transistor, including a first end, a second end, and a first a gate terminal, wherein the first end of the first transistor is electrically connected to the voltage supply unit to receive the AC driving voltage, and the second end of the first transistor is electrically connected to the gate terminal of the first transistor; The second transistor includes a first end, a second end and a gate terminal, wherein the first end of the second transistor is electrically connected to the second end of the first transistor, and the second transistor is second The terminal and the gate are electrically connected to the first scan line to receive the first scan signal; and a third transistor includes a first end, a second end and a gate terminal, wherein the third transistor is One end is electrically connected to the voltage supply unit to receive the Current drive voltage, the gate terminal of the third transistor is electrically connected to the second terminal of the first transistor, the second terminal of the crystal of the third electrical output to the read signal; Each operation cycle of the sensing unit includes a first time period and a second time period. The first scanning signal is higher than the AC driving voltage in the first time period, and the first scanning signal is in the second time period. The internal system is lower than the AC drive voltage. 如請求項11所述之顯示面板,其中:該第一電晶體係為一光感應薄膜電晶體或一光感應場效電晶體;以及該第二電晶體與該第三電晶體係為薄膜電晶體或場效電晶體。 The display panel of claim 11, wherein: the first electro-crystal system is a photo-induced thin film transistor or a photo-induced field-effect transistor; and the second electro-optic crystal and the third electro-crystalline system are thin film Crystal or field effect transistor. 如請求項11所述之顯示面板,另包含:一電容,包含一第一端與一第二端,其中該電容之第一端電連接於該第三電晶體之第二端,該電容之第二端電連接於該第二電晶體之第二端。 The display panel of claim 11, further comprising: a capacitor comprising a first end and a second end, wherein the first end of the capacitor is electrically connected to the second end of the third transistor, the capacitor The second end is electrically connected to the second end of the second transistor. 如請求項11所述之顯示面板,另包含:一讀出線,用來傳輸該讀出訊號;一第四電晶體,包含一第一端、一第二端與一閘極端,其中該第四電晶體之第一端電連接於該第三電晶體之第二端,該第四電晶體之閘極端電連接於該第一掃描線以接收該第一掃描訊號,該第四電晶體之第二端電連接於該讀出線;一資料線,用來傳輸一資料訊號;以及一畫素單元,電連接於該第一掃描線與該資料線,用來根據該 第一掃描訊號與該資料訊號以輸出一影像訊號;其中該第四電晶體係為一薄膜電晶體或一場效電晶體。 The display panel of claim 11, further comprising: a readout line for transmitting the read signal; a fourth transistor comprising a first end, a second end and a gate end, wherein the The first end of the fourth transistor is electrically connected to the second end of the third transistor, and the gate of the fourth transistor is electrically connected to the first scan line to receive the first scan signal, and the fourth transistor a second end electrically connected to the readout line; a data line for transmitting a data signal; and a pixel unit electrically connected to the first scan line and the data line for The first scan signal and the data signal output an image signal; wherein the fourth electro-crystal system is a thin film transistor or a field effect transistor. 如請求項11所述之顯示面板,另包含:一第二掃描線,用來傳輸具週期性脈波之一第二掃描訊號;一讀出線,用來傳輸該讀出訊號;一第四電晶體,包含一第一端、一第二端與一閘極端,其中該第四電晶體之第一端電連接於該第三電晶體之第二端,該第四電晶體之閘極端電連接於該第二掃描線以接收該第二掃描訊號,該第四電晶體之第二端電連接於該讀出線;一資料線,用來傳輸一資料訊號;以及一畫素單元,電連接於該第二掃描線與該資料線,用來根據該第二掃描訊號與該資料訊號以輸出一影像訊號。 The display panel of claim 11, further comprising: a second scan line for transmitting a second scan signal having a periodic pulse wave; a read line for transmitting the read signal; The transistor includes a first end, a second end and a gate terminal, wherein the first end of the fourth transistor is electrically connected to the second end of the third transistor, and the gate of the fourth transistor is electrically Connecting to the second scan line to receive the second scan signal, the second end of the fourth transistor is electrically connected to the read line; a data line for transmitting a data signal; and a pixel unit, The second scan line and the data line are connected to output an image signal according to the second scan signal and the data signal. 一種具光感測定位功能之顯示面板,其包含:一電壓提供單元,用來提供一交流驅動電壓;一第一掃描線,用來傳輸具週期性脈波之一第一掃描訊號;以及一感測單元,電連接於該電壓提供單元與該第一掃描線,用來提供一讀出訊號,該感測單元包含:一第一電晶體,包含一第一端、一第二端與一閘極端,其中該第一電晶體之第一端電連接於該第一掃描線以接收該第一掃描訊號,該第一電晶體之第二端電連接於該 第一電晶體之閘極端;一第二電晶體,包含一第一端、一第二端與一閘極端,其中該第二電晶體之第一端電連接於該第一電晶體之第二端,該第二電晶體之第二端與閘極端電連接於該電壓提供單元以接收該交流驅動電壓;以及一第三電晶體,包含一第一端、一第二端與一閘極端,其中該第三電晶體之第一端電連接於該第一掃描線以接收該第一掃描訊號,該第三電晶體之閘極端電連接於該第一電晶體之第二端,該第三電晶體之第二端用來輸出該讀出訊號;其中該感測單元的每一運作週期包含一第一時段與一第二時段,該第一掃描訊號在該第一時段內係高於該交流驅動電壓,該第一掃描訊號在該第二時段內係低於該交流驅動電壓。 A display panel with a light sensing position function, comprising: a voltage supply unit for providing an alternating current driving voltage; a first scanning line for transmitting a first scanning signal having a periodic pulse wave; and a The sensing unit is electrically connected to the voltage supply unit and the first scan line for providing a read signal. The sensing unit includes: a first transistor, including a first end, a second end, and a first a gate terminal, wherein the first end of the first transistor is electrically connected to the first scan line to receive the first scan signal, and the second end of the first transistor is electrically connected to the gate a gate of the first transistor; a second transistor comprising a first end, a second end and a gate terminal, wherein the first end of the second transistor is electrically connected to the second transistor The second end of the second transistor is electrically connected to the voltage supply unit to receive the AC driving voltage, and a third transistor includes a first end, a second end and a gate terminal. The first end of the third transistor is electrically connected to the first scan line to receive the first scan signal, and the gate end of the third transistor is electrically connected to the second end of the first transistor, the third The second end of the transistor is configured to output the read signal; wherein each operation cycle of the sensing unit includes a first time period and a second time period, and the first scan signal is higher than the first time period The AC driving voltage is lower than the AC driving voltage during the second period of time. 如請求項16所述之顯示面板,其中:該第二電晶體係為一光感應薄膜電晶體或一光感應場效電晶體;以及該第一電晶體與該第三電晶體係為薄膜電晶體或場效電晶體。 The display panel of claim 16, wherein: the second electro-crystal system is a photo-induced thin film transistor or a photo-induced field-effect transistor; and the first transistor and the third electro-crystal system are thin film Crystal or field effect transistor. 如請求項16所述之顯示面板,另包含:一電容,包含一第一端與一第二端,其中該電容之第一端電連接於該第三電晶體之第二端,該電容之第二端電連接於該第 二電晶體之第二端。 The display panel of claim 16, further comprising: a capacitor comprising a first end and a second end, wherein the first end of the capacitor is electrically connected to the second end of the third transistor, the capacitor The second end is electrically connected to the first The second end of the second transistor. 如請求項16所述之顯示面板,另包含:一讀出線,用來傳輸該讀出訊號;一第四電晶體,包含一第一端、一第二端與一閘極端,其中該第四電晶體之第一端電連接於該第三電晶體之第二端,該第四電晶體之閘極端電連接於該第一掃描線以接收該第一掃描訊號,該第四電晶體之第二端電連接於該讀出線;一資料線,用來傳輸一資料訊號;以及一畫素單元,電連接於該第一掃描線與該資料線,用來根據該第一掃描訊號與該資料訊號以輸出一影像訊號;其中該第四電晶體係為一薄膜電晶體或一場效電晶體。 The display panel of claim 16, further comprising: a readout line for transmitting the read signal; a fourth transistor comprising a first end, a second end and a gate extremity, wherein the The first end of the fourth transistor is electrically connected to the second end of the third transistor, and the gate of the fourth transistor is electrically connected to the first scan line to receive the first scan signal, and the fourth transistor The second end is electrically connected to the readout line; a data line is used for transmitting a data signal; and a pixel unit is electrically connected to the first scan line and the data line for using the first scan signal and The data signal outputs an image signal; wherein the fourth electro-crystal system is a thin film transistor or a field effect transistor. 如請求項16所述之顯示面板,另包含:一第二掃描線,用來傳輸具週期性脈波之一第二掃描訊號;一讀出線,用來傳輸該讀出訊號;一第四電晶體,包含一第一端、一第二端與一閘極端,其中該第四電晶體之第一端電連接於該第三電晶體之第二端,該第四電晶體之閘極端電連接於該第二掃描線以接收該第二掃描訊號,該第四電晶體之第二端電連接於該讀出線;一資料線,用來傳輸一資料訊號;以及一畫素單元,電連接於該第二掃描線與該資料線,用來根據該第二掃描訊號與該資料訊號以輸出一影像訊號。The display panel of claim 16, further comprising: a second scan line for transmitting a second scan signal having a periodic pulse wave; a read line for transmitting the read signal; The transistor includes a first end, a second end and a gate terminal, wherein the first end of the fourth transistor is electrically connected to the second end of the third transistor, and the gate of the fourth transistor is electrically Connecting to the second scan line to receive the second scan signal, the second end of the fourth transistor is electrically connected to the read line; a data line for transmitting a data signal; and a pixel unit, The second scan line and the data line are connected to output an image signal according to the second scan signal and the data signal.
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