TWI431579B - Source driver with low power consumption and driving method thereof - Google Patents

Description

Source driver with low power consumption and driving method thereof

The present invention relates to a source driver and a method of driving the same, and more particularly to a source driver that reduces power consumption, wherein the source driver includes an output buffer that charges a display panel.

FIG. 1 illustrates a block diagram of a conventional source driver 110 and a display panel 140. Referring to FIG. 1 , the source driver 110 includes a plurality of driving channels 120 . Each drive channel 120 includes a latch 122, a digital analog converter 124 (DAC), an output buffer 126, and an output switch 128. The video data on the data bus is continuously input to the driving channel 120, wherein the driving channel 120 is controlled by a control signal CON provided by a timing controller (not shown). The source driver 110 converts the digital video data into an analog driving signal through the digital analog converter 124 and transmits the driving signal to the output buffer 126. The output buffer 126 further enhances the driving capability of the driving signal through the turned-on output switch 128 and transmits the driving signal to the display panel 140, thereby driving the pixels on the display panel 140.

In general, in a liquid crystal display (Liquid Crystal Dipaly) driving system, it is necessary to periodically reverse the polarity of a driving signal transmitted to a pixel to avoid image sticking caused by liquid crystal polarization. There are three main types of polarity inversions used to drive the display panel, such as frame inversion, column inversion, and dot inversion. Taking dot inversion as an example, the driving signals of adjacent pixels are in a frame. The opposite polarity is present during the period, and the pixels at the same position are driven with driving voltages of opposite polarities in two consecutive frames. Since the opposite polarity drive signals have different voltage levels, the voltage swing of the output buffer 126 produces significant power consumption, and the output buffer 126 provides a large proportion of power consumption to the source driver 120. Therefore, how to solve such problems becomes an important topic worth exploring and discussing.

The present invention provides a source driver and a driving method thereof that can reduce low power consumption.

The present invention provides a source driver in which a source driver is adapted to drive a display panel. The source driver includes an output buffer and a first pre-charge path. The output buffer has a first input terminal, a second input terminal and an output terminal. The first input terminal receives a pixel signal, and the output terminal is coupled to the second input terminal and the display panel. The first precharge path charges the output of the output buffer to a predetermined voltage associated with the pixel signal during a precharge period, wherein the output buffer is turned off during the precharge period and after the precharge period A preset period is the startup state.

In an embodiment of the invention, the source driver further includes an operational amplifier. The operational amplifier provides a pixel signal to the first input of the output buffer, wherein the output buffer is turned off during a transmission period after the preset period, and the pixel signal provided by the operational amplifier is transmitted to the transmission period. The output of the output buffer.

The invention provides a driving method, wherein the driving method is suitable for one The source driver drives a display panel. The source driver includes an output buffer having a first input terminal, a second input terminal, and an output terminal. The first input terminal receives a pixel signal, and the second input terminal and the output terminal are coupled to a display panel. In the driving method of the present invention, first, the output of the output buffer is precharged to a preset voltage associated with the pixel signal during a precharge period, wherein the output buffer is turned off during the precharge period. Then, the output buffer is activated for a preset period after the precharge period.

In an embodiment of the driving method described above, the output buffer is turned off during a transfer period after the preset period, and the pixel signal is transmitted to the output of the output buffer during the transfer.

The present invention dynamically charges the output of the output buffer to a preset voltage associated with the pixel signal, thus facilitating charging of the output of the output buffer to a voltage level of the pixel signal. During the precharge period and/or during the transfer period, the output buffer is turned off to reduce the startup time of the output buffer and reduce the power consumption of the source driver.

The above described features and advantages of the present invention will be more apparent from the following description.

2 is an equivalent circuit diagram of a source driver according to an embodiment of the present invention. Referring to FIG. 2, the source driver 210 of the present embodiment is adapted to drive a display panel 220. The display panel 220 may be a liquid crystal display panel or a liquid crystal on silicon (LCoS) panel. general In other words, the display panel 220 includes a plurality of pixel circuits (not shown), and the liquid crystal alignment corresponding to the position of each pixel circuit can control the liquid crystal through the voltage difference between the pixel electrodes and the common electrodes. The light rate, wherein the voltage of the pixel electrode can be changed by using the pixel signal, and the voltage of the common electrode can be a direct current (DC) voltage or an alternating current (AC) voltage. For convenience of description of the embodiment, a first end and a second end of the display panel 220 can be regarded as a pixel electrode and a common electrode, respectively.

The source driver 210 includes an output buffer 211, a precharge path 212, a switching unit 213, and a switching unit 214. The switching units 213, 214 can be implemented by switches, transistors, or other semiconductor components, and the switching unit 213, The conduction state of 214 is determined by two control signals OE, SHRT, respectively. In addition, those skilled in the art should understand that the source driver 210 may further include other components not shown in FIG. 2A, such as a shift register, a digital analog converter, etc., and the relevant details of these components are This is not much to describe. The output buffer 211 is realized, for example, by an operational amplifier, and a first input terminal (such as a positive phase terminal) receives a pixel signal Vin provided by an operational amplifier 215, and a second input terminal (such as an inverting terminal). The output ends of the output buffer 211 are coupled to the display panel 220 through the switching unit 213 . The previous stage of the output buffer 211 is an operational amplifier 215 that supplies a pixel signal Vin.

The output buffer 211 enhances the driving capability of the pixel signal Vin to avoid signal attenuation when the signal is transmitted. When the switching unit 213 is turned on, the pixel signal of the enhanced driving capability can be transmitted to the display panel 220. The output buffer 211 is based on a control signal PON (for example, a power supply) Signal) to determine its startup status or shutdown status. The switching unit 214 is coupled between the first input end and the output end of the output buffer 211, and when the switching unit 214 is turned on, it can directly transmit the output of the pixel signal Vin provided by the operational amplifier 215 to the output buffer 211. end.

The pre-charging circuit 212 includes a switch M1 and a switch M2, wherein the switch M1 and the switch M2 are, for example, an N-type transistor and a P-type transistor, respectively. A first end and a second end of the switch M1 are respectively coupled to a first voltage VCI and a switch M2, wherein the first voltage VCI is a DC voltage that is smaller than the positive power supply voltage VDDA of the output buffer 211. The on state of the switch M1 is determined by the pixel signal Vin to provide a predetermined voltage VA associated with the pixel signal Vin. The conduction state of the switch M2 is determined by a control signal PREOE to transmit the preset voltage VA to the first end of the display panel 220. The pre-charging circuit 212 is configured to pre-charge the first end of the display panel 220 to the preset voltage VA to assist the output buffer 211 to charge the display panel 220 to the voltage level of the pixel signal Vin. Next, the operation of the source driver 210 will be described in detail.

FIG. 3 is a timing chart of driving of the source driver according to FIG. Referring to FIG. 2 and FIG. 3 simultaneously, the source driver 200 drives the display panel 220 with a positive polarity during a frame period F1, and drives the display panel 220 with a negative polarity during a frame period F2. Taking the precharge operation of the source driver 200 in the frame period F1 as an example, the switch M2 that is turned on by the control signal PREOE in a precharge period T1 before the output buffer 211 is activated by the control signal PON, the precharge path 212 The first end of the display panel 220 can be precharged to a preset voltage VA associated with the pixel signal Vin. At the same time, switching unit The 213 is turned on by the enabling action of the control signal OE to transmit the preset voltage VA to the display panel 220. During the precharge period T1, the output buffer 211 is controlled to be in a closed state by the control signal PON to reduce power consumption.

Referring to FIG. 2, when the pixel signal Vin is smaller than the sum of the first voltage VCI and the threshold voltage Vth of the switch M1, the first end of the display panel 220 can be precharged to the preset voltage VA through the precharge path 212. = (Vin-Vth). In addition, when the pixel signal Vin is greater than the sum of the first voltage VCI and the threshold voltage Vth of the switch M1, the first end of the display panel 220 may be precharged to a preset voltage VA substantially equal to the first voltage VCI. Therefore, the precharge path 212 can dynamically precharge the first end of the display panel 220 to the preset voltage VA associated with the pixel signal Vin.

After the precharge period T1, the output buffer 211 is activated by the enabling operation of the control signal PON in a predetermined period T2, so that the output buffer 211 can pass the turned-on switching unit 213 to increase the pixel signal Vin. The higher pixel signal Vin is transmitted to the display panel 220, wherein the switching unit 213 controlled by the control signal OE is still turned on during the precharge period T1. The voltage at the output of the output buffer 211 changes with the voltage of the pixel signal Vin, and the output buffer 211 then charges the first end of the display panel 220 to charge the voltage from the preset voltage VA to the pixel signal Vin. During the precharge period T1, the output buffer 211 is in an off state to reduce power consumption.

After the preset period T2, the output buffer 211 is turned off again during a transfer period T3, wherein the output buffer 211 is sufficient to charge the first end of the display panel 220 to the voltage of the pixel signal Vin for a preset period T2. Similarly, during the transmission period T3, the pixel signal Vin provided by the operational amplifier 215 is directly transmitted to the output end of the output buffer 211 by the turned-on switching unit 214, and is transmitted to the display panel 220 through the turned-on switching unit 213, wherein the switching unit 213 is still in a conducting state during the transmission period T3. The precharge action of the source driver 210 during the frame period F2 is similar to the precharge action of the source driver 210 during the frame period F1.

4 is a circuit diagram of a source driver according to another embodiment of the present invention. Please refer to FIG. 2 and FIG. 4 simultaneously, wherein the main difference between the two embodiments in FIG. 2 and FIG. 4 is that the pre-charging circuit 412 includes a switch N1 implemented by an N-type transistor and implemented by a P-type transistor. Switch N2. The first end and the second end of the switch N2 are respectively coupled to the first voltage VCI and the switch N1, wherein the conduction state of the switch N2 is determined by the control signal PREOE to transmit the first voltage VCI to the switch N1. The on state of the switch N1 is determined by the pixel signal Vin to provide a predetermined voltage VA associated with the pixel signal Vin to the display panel 220. Similarly, referring to the driving timing diagram in FIG. 3 , the pre-charging circuit 412 is configured to pre-charge the first end of the display panel 220 to the preset voltage VA to assist the output buffer 211 to charge the display panel 220 to the pixel signal Vin. Voltage level.

In summary, the above embodiment utilizes a precharge path to provide a preset voltage associated with the pixel signal to assist the output buffer 211 in charging the first end of the display panel to the voltage of the pixel signal Vin. According to the pixel signal Vin, the preset voltage provided by the pre-charging circuit 211 can be adaptively adjusted. It can be seen that when the output buffer 211 is in the startup state, the voltage swing of the output buffer 211 is reduced to save power consumption. In addition, due to slow output The buffer 211 is in the off state during the precharge period T1 and/or during the transmission period T3, thereby reducing the startup time of the output buffer 211, thereby reducing the power consumption of the source driver 210.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

110, 210‧‧‧ source driver

120‧‧‧ drive channel

122‧‧‧Latch

124‧‧‧Digital Analog Converter

126, 211‧‧‧ output buffer

128‧‧‧Output switch

140, 220‧‧‧ display panel

212, 412‧‧‧Precharge road

213, 214‧‧‧Switch unit

215‧‧‧Operational Amplifier

CON, OE, PON, PREOE, SHRT‧‧‧ control signals

F1, F2‧‧‧ frame period

M1, M2‧‧‧ switch

T1‧‧‧Precharge period

T2‧‧‧Predetermined period

T3‧‧‧Transfer period

VA‧‧‧Preset voltage

VCI‧‧‧ first voltage

VDDA‧‧‧ positive supply voltage

Vin‧‧‧ Picture signal

1 is a block diagram of a conventional source driver and a display panel.

2 is an equivalent circuit diagram of a source driver according to an embodiment of the present invention.

FIG. 3 is a timing chart of driving of the source driver according to FIG.

4 is an equivalent circuit diagram of a source driver according to another embodiment of the present invention.

210‧‧‧Source Driver

211‧‧‧Output buffer

220‧‧‧ display panel

212‧‧‧Precharge road

213, 214‧‧‧Switch unit

215‧‧‧Operational Amplifier

CON, OE, PON, PREOE, SHRT‧‧‧ control signals

M1, M2‧‧‧ switch

VA‧‧‧Preset voltage

VCI‧‧‧ first voltage

VDDA‧‧‧ positive supply voltage

Vin‧‧‧ Picture signal

Claims (7)

A source driver is adapted to drive a display panel, wherein the source driver includes: an output buffer having a first input end, a second input end, and an output end, wherein the first input end receives a picture a signal signal, the output end is coupled to the second input end and the display panel; and a first pre-charging circuit, the output end of the output buffer is charged to the pixel signal during a pre-charge period a preset voltage, wherein the output buffer is in an off state during the precharge period, and the output buffer is in an activated state after a preset period of the precharge period, wherein the first precharge path comprises: a first transistor, wherein the gate receives the pixel signal, the first source/drain is coupled to a first voltage, the second source/drain outputs the predetermined voltage; and a switch has a first end coupled Connected to the second source/drain of the first transistor, the second end of which is coupled to the output end of the output buffer, wherein the switch is turned on during the pre-charge to transmit the preset voltage to the output buffer The output of the device. The source driver of claim 1, further comprising: a first switching unit that turns on the output of the output buffer to the display panel to output the output of the output buffer A signal is transmitted to the display panel. The source driver as described in claim 1 of the patent scope further includes: An operational amplifier providing the pixel signal to the first input of the output buffer, wherein the output buffer is turned off during a transmission period after the preset period, and the picture provided by the operational amplifier The prime signal is transmitted to the output of the output buffer during the transfer period. The source driver of claim 3, further comprising: a second switching unit that turns on the first input of the output buffer to the output of the output buffer during the transfer. The source driver of claim 1, wherein the first voltage is a DC voltage and the DC voltage is less than a positive power supply voltage of the output buffer. The source driver of claim 1, wherein the first voltage is between a voltage of the positive polarity of the pixel signal and a voltage of the negative polarity of the pixel signal. A driving method is suitable for driving a display panel with a source driver, wherein the source driver includes an output buffer having a first input terminal, a second input terminal and an output terminal, the first input terminal receiving a a pixel signal, the second input end and the output end are coupled to the display panel, the driving method includes: precharging the output end of the output buffer to the pixel signal in a precharge period a preset voltage, wherein the output buffer is in an off state during the precharge period; the output buffer is activated during a predetermined period after the precharge period; The output buffer is turned off during a transfer subsequent to the preset period; and during the transfer, the pixel signal is transmitted to the output of the output buffer.