TWI429230B - Method of porcessing information system - Google Patents

Description

Method of processing information systems

The present invention relates to network traffic for a processing system, and more particularly to the core of a control system to handle network traffic for the system.

With advances in wafer technology and the proliferation of the Internet, most high-speed network devices can handle Gigabit's network bandwidth, but using a processor in a chip to execute a software solution can't load a lot of network traffic. When the network traffic on the receiving end cannot be loaded, the processor's execution of the upper layer application is almost stagnant.

Please refer to the first figure, which is a schematic diagram of a conventional high speed packet processing system. The conventional high speed packet processing system 10 includes a network card 11 and a host computer 12. The host 12 includes a processor 124. The computing power and resources used by the processor 124 are primarily distributed by a Linux kernel 122. The packet 13 is processed by the physical layer of the network card 11 and sent to the host 12, and then processed by the network access control layer (MAC layer) by the network card driver 121 to obtain the packet 14, and the packet 14 is obtained. It is sent to the Linux core 122 for processing of the internet protocol layer (IP layer), processing of the transmission control protocol layer (TCP layer), and user datagram protocol layer (user datagram protocol layer, The UDP layer is processed, and then the data of the packet 15 is extracted to provide the data required for the application 123 to execute.

At present, the packet receiving mechanism of the NAPI (New API) adopted by the Linux core and the interrupt mitigation mechanism adopted by the Intel NIC driver are as follows: when the packet 13 is connected to the NIC 11 via a peripheral component interconnect bus (PCI bus) 18 When transmitting to the host 12, the network card 11 notifies the host 12 of the processing of the packet 13 by a hardware interrupt 17 (Hardware Interrupt). When the network card 11 detects that the external packet 16 has a large traffic, or the core protocol processing rate is high, the frequency of the hardware interrupt 17 of the network card 11 can be reduced, and the packet receiving mechanism of the host 12 is adjusted accordingly. The method can avoid the congestion problem of the packet 13 and the packet 14 caused by the hardware interrupt 17, but cannot avoid the congestion problem of the packet 15 reaching the upper application 123, and the application 123 performs performance degradation. Therefore, the NAPI packet receiving mechanism and the interrupt mitigation mechanism adopted by the Intel NIC driver in the Linux kernel can only alleviate the packet congestion caused by the hardware interrupt 17, but the high-traffic network upper-layer application has not been considered. 123 performance.

In view of the above-mentioned problem of low performance of the upper layer application of the network, a method for processing an information system is proposed, the method comprising the steps of: (a) detecting a first load and a second load of the information system. (b) determining the agreed processing of the information system based on the first load and the second load of the information system.

According to the above concept, another method for processing an information system is proposed, the method comprising the steps of: (a) detecting a load of the information system, wherein the information system has a high priority travel environment and a low priority The itinerary environment. (b) determining whether the information system should operate in the high priority travel environment or the low priority travel environment based on the load of the information system.

According to the above concept, another method of processing an information system is proposed, the method comprising the steps of: (a) detecting a load of the information system. (b) Decide whether to discard the information in advance based on the load of the information system.

According to the above concept, a method for controlling a core includes the following steps: (a) detecting a packet loss rate of the core. (b) The timing at which the core is in the execution of a low priority interrupt handling function is determined based on the packet loss rate.

According to the above concept, another method for controlling a core includes the following steps: (a) detecting a packet loss rate of the core. (b) Determine the mode of operation of the core based on the loss rate of the packet.

According to the above concept, another method for controlling a core includes the following steps: (a) detecting a packet loss rate of the core, wherein the core has a core protocol processing rate and a network application service rate. (b) reducing the core protocol processing rate based on the packet loss rate to increase the network application service rate.

In accordance with the above concept, another method of controlling a core is proposed, the method comprising the steps of: (a) detecting a packet loss rate of the core, wherein the core has a network application service rate. (b) Increasing the network application service rate based on the packet loss rate.

According to the above concept, another method of controlling a core is proposed, the method comprising the following steps: (a) detecting a packet loss rate of the core. (b) Decide whether to discard the packet from the bottom layer in advance based on the packet loss rate.

According to the above concept, a device for processing an information is proposed, and the device for processing an information comprises an information filtering unit and a core unit. The information filtering unit filters the information. The core unit processes the information filtered by the information filtering unit, and the core unit determines the timing at which the core unit is in the execution of the low priority interrupt processing function according to the packet loss rate.

According to the above concept, a device for processing an information is provided, the information includes a header and a content, and the device for processing an information comprises an information filtering unit and an information processing unit. The information filtering unit maintains a first header filtering rule, and filters the header by the first header filtering rule. The information processing unit checks the content of the filtered information to obtain a second header filtering rule, and causes the second header filtering rule to replace the first header filtering rule, and the information filtering unit filters according to the second header. The rules filter subsequent information to avoid viewing the content of the subsequent information.

In accordance with the above concept, a method of processing an information is presented, the information comprising a header and a content, the method comprising the steps of: (a) filtering the header to classify the information. (b) receiving the classified information and viewing the content of the classified information to obtain a header filtering rule. (c) Store the header filtering rules to filter subsequent information.

In accordance with the above concept, a method of processing an information is provided, the method comprising the steps of: (a) establishing a content filtering rule based on a connection condition. (b) Converting the content filtering rule into a header filtering rule. (c) Update the header filtering rules to filter the headers of subsequent messages.

According to the above-mentioned concept in this case, the problem of low performance of the application can be implemented and effectively solved, and when a large number of packets are poured into the device for processing information, the core uses the computing power and computing time of the processor to deal with the information. It is discarded after the memory area is full, and information can be discarded in the early stage of processing the communication protocol according to the information flow, which can improve the application performance.

Please refer to the second figure (a), which is a schematic diagram of the high-speed information system of the case. The high speed information system 20 of the present invention includes a network interface card 21 and a host 22 (host). The host 22 includes a processing unit 226, and a peripheral component interconnect bus (PCI bus) is interconnected. The host 22 and the network interface card 21 can store information. The network interface card 21 includes a direct memory access (GPU) 211, which is a buffer. The network interface card 21 can be a network card or a hardware device that processes the underlying protocol. The host 22 further includes a DMA receive ring 221 and a socket received buffer 222. The direct memory access receiving ring 221 is equivalent to a buffer, and the direct memory The access receiving ring 221 controls the traffic of the information 25 and the information 26 by the network card driver 223. The socket receiving buffer 222 controls the traffic of the information 27 by the core 224, and the core 224 controls the information of the socket receiving buffer 222. access. When the application 225 executes the program 2251, the application 225 extracts the information 27 stored in the socket receiving buffer 222 via the system call 28 at the top of the communication protocol.

Taking the Linux kernel of the open source code as an example, after the network interface card 21 receives the information 29, the information 29 is processed in the network interface card 21, and the network interface card 21 generates the information 25 stored in the memory. In the access engine 211, the mechanism moves the information 25 from the direct memory access engine 211 to the direct memory access receiving ring 221 of the host 22 by a direct memory access (DMA) mechanism. When the direct memory access receiving ring 221 is filled by the information 25, the network card driver 223 controls the direct memory access receiving ring 221 to directly discard the information 25. When the network interface card 21 completes the DMA behavior, the network interface card 21 triggers a hardware interrupt 24 to notify the host 22 to process the information 25, and then the host 22 stores the current working state, and The call interrupt handler 2241 handles the work of the interrupt. The interrupt handling function 2241 will then trigger the softirq handler 2242 to perform subsequent complex processing to complete the protocol processing 2240, which may include, for example, Internet Protocol (IP) processing, transport layer communication protocols. Protocol processing 2240, such as (TCP) processing and User Data Protocol (UDP) processing. When the information 25 enters the direct memory access receiving ring 221, the network card driver 223 processes the information 25 as a protocol of the media access layer (MAC), and generates the information 26, which is completed by the agreement processing 2240. The core 224 generates information 27, which is placed in the jack receive buffer 222. The application 225 specifies a port (not shown) that configures the jack receive buffer 222, the upper application 225 A network related system call 28 is called to clear the socket receive buffer 222 and the information 27 is transferred from the core 224 to the application 225 for processing.

The interrupt in this case can be divided into hardware interrupt 24 and software interrupt. The interrupt processing can be divided into interrupts of an interrupt handler 2241 and a softirq handler 2242, the order of which is as shown in the second diagram (b).

The second figure (b) is a schematic diagram of the interrupt processing of the present case. The line segments connected by the solid circles represent the execution period 31 of the application 225, and the line segments connected by the hollow circles represent the execution period 32 of the interrupt processing function 2241, and the line segments connected by the hollow triangles represent the software interrupt processing function 2242. The execution period 33. When the hardware interrupt 24 occurs, the high speed information system 20 of the present case switches from the user mode to the kernel mode to execute the interrupt processing function 2241. After the interrupt processing function 2241 ends, the software interrupt processing is executed. The function 2242, after all software interrupt processing is completed, will return to the execution of the normal process, and the execution of the application 225 includes the execution of at least one general itinerary.

Please refer to the second figure (c), which is a schematic diagram of the priority order of the software interruption. The horizontal axis represents the execution time of the software interrupt, the left vertical axis represents the execution priority, and the right vertical axis represents the execution environment, which includes the interrupt execution environment and the general execution environment. As can be seen from the second figure (c), the interrupt handling function 2241 has the highest priority, the software interrupt processing function 2242 is second, and the general stroke has the lowest priority, the time occupied by the execution period and the priority of the software interrupt. In inverse proportion, that is, the execution period of the interrupt processing function 2241 having the highest priority is the shortest, and the execution period of the general stroke having the lowest priority is the longest.

The continuous hardware interrupt 24 will trigger a series of high-priority interrupt processing function 2241 software interrupts, and the software interrupt is not completed, and the low-priority software interrupt processing function 2242 is triggered again, as shown in the second figure (d ) shown. The second figure (d) is a schematic diagram of the interrupt handling of the case.

In the second diagram (d), the line segments connected by the solid circles represent the execution period 31 of the application 225, and the line segments connected by the hollow circles represent the execution period 32 of the interrupt processing function 2241, and the hollow triangles are connected. The line segment represents the execution period 33 of the software interrupt processing function 2242. The open diamond represents the end of the software interruption, and the line segment formed by the solid diamond represents the execution period 34 of the low priority software interrupt processing. As can be seen from the second diagram (d), the order of low priority software interrupt processing is executed at the end.

In the high-traffic network environment, after receiving the information 29, the network interface device 21 notifies the processing unit 226 to process the information 25 by using the mechanism of the hardware interrupt 24, and after the processing unit 226 accepts the hardware interrupt 24, The current working state needs to be saved and jumped to the interrupt handler 2241 (interrupt handler) to process the information 26. The priority of the interrupt handling function 2241 is higher than the normal process. A large amount of continuous information 29 entering the network interface card 21 will cause a series of hardware interrupts 24, and the upper layer network application 225 cannot process the information. 27. Although the information 27 has passed the agreement processing 2240, the information 27 is discarded because the socket receiving buffer 222 is occupied, so that the throughput of the entire high speed information system 20 is reduced to zero.

The solution proposed in the present case is to detect the first load and the second load of the information system, and determine the protocol processing of the information system according to the first load and the second load of the information system. The first load may be the traffic load processed by the system core, including the traffic load of the information 26 or the information 27, or the traffic load from the information 29 of the Internet, or the information caused by the hardware interrupt 24 25 The traffic load. The second load can be the traffic load handled by the application 225.

Please refer to the third figure (a), which is a schematic diagram of the information system of the first embodiment of the present invention. The information system 50 has a network card driver 523, a core 524, and an application 525. The information system 50 includes a host 52 and a network interface card 51. The host 52 includes a direct memory access receiving ring 521, a socket received buffer 522, and a processing unit 526. The network card driver 523 controls the direct memory access receiving ring 521. The core 524 has a protocol process 5241 with a core protocol processing rate 52413. Information 56 enters socket receive buffer 522 from core 524, and information 57 is output from socket receive buffer 522 and then processed by application 525. The application 525 has an application service rate of 5250 (application service rate). The socket receive buffer 522 has a packet loss rate of 5220. The protocol processing 5241 includes interrupt processing for the high priority travel environment 52411 and interrupt processing for the low priority travel environment 52412. The network interface card 51 generates a hardware interrupt 54, which allocates the time and computing resources of the processing unit 526 for the operation of the information system 50.

When the first load or the second load is higher, because the priority of the interrupt processing of the high priority travel environment 52411 is higher, a large amount of system resources of the core 524 are occupied, and the execution performance of the application 525 is lowered. . The priority of the interrupt processing of the low priority trip environment 52412 is lower, thus disabling or limiting the interrupt handling of the high priority trip environment 52411, while the interrupt processing of the information 55 to the low priority trip environment 52412 is subject to the protocol processing 5041. Helps prevent the execution performance of the application 525 from being low, and can reduce the agreement processing 5041 of the information system 50.

The second embodiment of the present invention can be referred to the third figure (a). The method for processing an information system provided by the third diagram (a) is to detect a load of the information system 50, wherein the information system 50 has a high priority travel environment 52411 and a low priority travel environment. 52412. Based on the load of the information system 50, it is determined whether the information system 50 should operate in the high priority travel environment 52411 or the low priority travel environment 52212. The load can be the load handled by the application 525 or the traffic load of the information 53 or the information 55.

In the third diagram (a), when the interrupt processing of the high priority travel environment 52411 is disabled or restricted, the information 56 does not easily fill the socket receive buffer 522 without causing the information 56 after the agreed processing 5241 to be discarded. Moreover, the direct memory access receiving ring 521 is relatively easy to be filled and discards information from the network. This mechanism of discarding information from the network in advance at the bottom layer can slow down the protocol processing 5241 of the core 524, and can also prevent the application 525 from performing low performance.

The third embodiment of the present invention can be referred to the third figure (a). The method provided by the third figure (a) for processing an information system is to detect a load of the information system 50. Based on the load of the information system 50, it is determined whether the information 55 is discarded in advance. When the load of the information system 50 is in a high load condition, the information 55 is discarded at the bottom/previous stage of the protocol processing.

Although the above method can slow down the protocol processing 5241 of the core 524, after the information 55 enters the core 524 and passes through the agreement processing 5241, the information 56 obtained by the information still fills the socket receiving buffer 522, thereby causing the socket to receive the buffer. The lack of space in 522 causes the information 56 to be discarded and cannot be smoothly transmitted to the application 525 for processing, resulting in low performance of the application 525. Therefore, this case proposes a core control method to solve the problem of low performance of the application 525.

The fourth embodiment of the present invention can be referred to the third figure (a). The fourth embodiment of the present invention provides a method for controlling a core 524 by detecting a packet loss rate 5220 of the core 524. Based on the packet loss rate 5220, the timing at which the core 524 is executing the low priority interrupt handling function is determined.

Please refer to the third figure (b), which is a schematic diagram of the information receiving mode switching in the fourth embodiment of the present invention. When the packet loss rate 5220 is greater than an upper limit value, the information system 50 switches to the high load mode. When the packet loss rate 5220 is less than the lower limit value, the information system 50 switches to the low load mode. When the receive mode of the information is switched to the high load mode, the high priority travel environment 52411 is restricted, or the core 524 is switched from the high priority execution environment 52411 to the low priority travel environment 52412.

Please refer to the third figure (c), which is a schematic diagram of the implementation of the switching mechanism of the fourth embodiment of the present invention. The receiving mode is switched in the core 524. The predetermined receiving mode is to set the core protocol processing 5241 in the high priority 52411 travel environment. When the packet loss rate 5220 is greater than an upper limit value, the receiving mode is the high load mode. Then, the execution of the high-priority core software interrupt processing function is restricted, and the ksoftirq daemon is processed by the lower-priority process-context; when the receiving mode is the low-load mode, the original core is used. The software interrupt processing function is processed in a high priority travel environment 52411 to avoid unnecessary delays. Since the core software interrupt processing function and the lower priority trip environment ksoftirq daemon only have different priorities for the protocol processing and different execution environments, and the processing flow does not change, the switching mechanism has little overhead, switching The process does not create additional burdens and loss of information.

The fifth embodiment of the present invention can be referred to the third figure (a). The fifth embodiment proposes a method for controlling a core, the method comprising the following steps: (a) detecting a packet loss rate 5220 of the core. (b) The mode of operation of the core 524 is determined based on the packet loss rate 5220.

The sixth embodiment of the present invention can be referred to the third figure (a). The sixth embodiment provides a method for controlling a core, the method comprising the steps of: detecting a packet loss rate 5220 of the core 524, wherein the core 524 has a core protocol processing rate 52413 and an application service rate 5250. The core agreement processing rate 52413 is lowered based on the packet loss rate 520 to increase the network application service rate 5250. The method according to the sixth embodiment can cause the core 524 not to allocate a large amount of time to the protocol processing 5241, but allows the application 525 to allocate sufficient processing unit time to make the application service rate 5250 larger than the core protocol processing rate 52413 to The core 524 is prevented from allocating unnecessary time for the contract processing 5241.

The seventh embodiment of the present invention can be referred to the third figure (a). The seventh embodiment provides a method for controlling a core, the method comprising the steps of: (a) detecting a packet loss rate of the core, wherein the core has a network application service rate. (b) Increasing the network application service rate based on the packet loss rate.

The eighth embodiment of the present invention can be referred to the third figure (a). The eighth embodiment proposes a method of controlling a core, the method comprising the steps of: detecting a packet loss rate 5220 of the core 524. A hardware interrupt 54 is determined based on the packet loss rate 5220.

The ninth embodiment of the present invention can be referred to the third figure (a). The ninth embodiment proposes a method of controlling a core, the method comprising the steps of: detecting a packet loss rate 5220 of the core 524. Based on the packet loss rate 5220, it is determined whether or not the packet is discarded from the bottom layer in advance. When the network traffic is increased, according to the above method, the information 56 of the completed agreement processing 5241 can be prevented from being discarded in the socket receiving buffer 522, so the information is discarded earlier than the network interface card 51 to increase the application service rate. 5250.

According to the experimental verification, in the high-traffic network environment, the method proposed in this case can increase the throughput of the application 525 by up to 108% compared with the current NAPI packet receiving mechanism of Linux.

Please refer to the fourth figure (a), which is the apparatus 60 for processing an information according to the tenth embodiment of the present invention. The device 60 for processing an information includes an information filtering unit 61 and a core unit 62. The core unit 62 has a packet loss rate 621, a high priority interrupt processing function 622, and a low priority interrupt processing function 623. The core unit 62 processes the information, and the core unit 62 according to its packet loss rate. 621 determines the timing at which the core unit 62 is in the execution of the low priority interrupt handling function 623. The information filtering unit 61 includes a control unit 614, a first processing module 611, a second processing module 612, and a third processing module 613. The first processing module 611 includes a first temporary storage unit 6111 and a first memory unit 6112. The second processing module 612 includes a second temporary storage unit 6121 and a second memory unit 6122. The third processing module 613 includes a third temporary storage unit 6131 and a third memory unit 6132. The first processing module 611, the second processing module 612, and the third processing module 613 are connected in a pipeline manner to process information 63, information 64, information 65, and information 66. Information 67, information 68, information 69. The information filtering unit 61 is connected to the core unit 62 by a PCI bus 601.

A schematic diagram of the agreement of the information 65 transfer between the first memory unit 6112 and the second memory unit 6122 is shown in the fourth diagram (b). In the fourth diagram (b), the transmission of the information 65 uses four types of signals: a data signal, a control signal, a write signal, and a read signal. When the first memory unit 6112 receives the signal ready 632, the second memory unit 6122 writes the data 651 to the second memory unit 6122 in response to a write signal 653. Or the second memory unit 6122 reads the data from the second memory unit 6122 in response to the read signal 654. Similarly, after receiving the signal ready for 652, the second memory unit 6122 also writes data or reads data to the third memory unit.

The advantage of the device 60 for processing a message may first filter out unwanted information in the information filtering unit 61. For example, the information may be virus information or network intrusion information, and the information may be filtered before being attacked. The core unit 62 is caused to load, for example, the core unit 62 is always performing the contract processing and cannot execute the application. The control unit can transmit the filtered information to the core unit 62.

Please refer to FIG. 5( a ), which is a schematic diagram of an apparatus for processing an information according to the eleventh embodiment of the present invention. The information 73 includes a header 731 (Header) and a content 732. The information processing device 70 includes an information filtering unit 71 and an information processing unit 72. The information filtering unit 71 maintains a first header filtering rule, and filters the header 731 by the first header filtering rule. The information processing unit 72 checks the content 732 of the filtered information 74 to obtain a second header filtering rule 712, and causes the second header filtering rule 712 to replace the first header filtering rule 711. The information filtering unit 71 The subsequent information 75 is filtered according to the second header filtering rule 712 to avoid viewing the content 752 of the subsequent information 75, as shown in the fifth figure (b), and the fifth figure (b) is the replacement header rule of the present case. schematic diagram.

In the fifth diagram (b), after the deep packet inspection unit 721 views the content 732 of the filtered information 74, a content processing rule 722 is generated first, and then converted into the second header filtering rule 712.

In the fifth diagram (a), the header filtering unit 71 is responsible for high-speed filtering and classification of the header level of the first stage, and complex decision determination or content-level traffic identification. Then, it is processed by software in the information processing unit 72 of the second stage, for example, by deep packet inspection (DPI) unit processing. The header filtering unit can be a programmable logic gate array FPGA or a network programmable logic gate array NetFPGA, which can store the first header filtering rule 711 or the second header filtering rule 712. The information processing unit 72 can be a host, such as the host 52.

In the fifth (a) and fifth (b) diagrams, the information 73 is first processed by the information filtering unit 71 at the preliminary header level. If the information 73 is a message containing unknown traffic, the information filtering unit cannot be used. If the processing is 71, the information 73 is transmitted to the information processing unit 72 to perform subsequent complicated processing on the filtered information 74. If the information filtering unit 71 filters the header 732, and finds that the destination address of the information 73 is not the address of the device that processes the information, the information filtering unit 71 directly discards the information 73 to The time and resources consumed by the information processing unit 72 in processing the information 73 are reduced. If the information 73 is filtered and classified by the information filtering unit 71 and sent to the upper layer information processing unit 72, the DPI unit 721 analyzes and compares the filtered information 74. After the result is recognized by the DPI unit 721, the DPI unit 721 converts the content processing rule 722 into the second header filtering rule 712 that the information filtering unit 71 can process. Finally, the first header filtering rule 711 is updated to the second header filtering rule 712, and the information 75 of the subsequent connection is directly processed by the information filtering unit 71, without filtering the information. 74 leads to the information processing unit 72 processing in software. The purpose of the eleventh embodiment of the present invention is to process the underlying information of the communication protocol at a high speed as much as possible, and to avoid processing by the upper layer software to avoid affecting the execution performance of the upper application.

Please refer to FIG. 5(c), which is a flow chart of filtering information according to the eleventh embodiment of the present invention. In the eleventh embodiment of the present invention, the method for processing an information includes the following steps: Step S501, filtering the header 731 to classify the information 73. Step S502, receiving the classified information 74, and viewing the content 732 of the classified information 74 to obtain a header filtering rule 712. In step S503, the header filtering rule 712 is stored to filter the subsequent information 75.

Please refer to FIG. 5(d), which is a flow chart of filtering information according to traffic according to the eleventh embodiment of the present invention. In the eleventh embodiment of the present invention, the information 73 can be processed according to the traffic. In step S511, the device 70 for processing an information establishes a content filtering rule according to a connection condition. In step S512, the DPI unit 721 converts the content filtering rule into a header filtering rule. In step S513, the information filtering unit 71 updates the header filtering rule to filter the header of the subsequent information.

In one embodiment, the device 70 that processes an information groups all of the connections. When the information processing unit 72 determines that the importance of the information 73 is high, and the traffic of the information 73 is large, the information processing unit 72 sets the rule as follows: the connection of the information 73 is set to a high priority connection. Line, and restrict traffic to low priority connections, or discard this information early in the underlying layer 73. Then, the rule is updated to the information filtering unit 71, and the traffic of the subsequent information 75 is classified, filtered, and isolated directly from the information filtering unit 71 to avoid occupying resources of the information processing unit 72.

In a first embodiment, a method of processing an information system is provided, the method comprising the steps of: (a) detecting a first load and a second load of the information system. (b) determining the agreed processing of the information system based on the first load and the second load of the information system.

According to any of the above embodiments, the method further comprises the step of: (c) reducing the protocol processing of the information system when the first load or the second load is a high load.

According to any of the above embodiments, the first load is a traffic load processed by a system core, and the second load is a traffic load processed by an application.

In a second embodiment, a method of processing an information system is provided, the method comprising the steps of: (a) detecting a load of the information system, wherein the information system has a high priority travel environment and a low Priority travel environment. (b) determining whether the information system should operate in the high priority travel environment or the low priority travel environment based on the load of the information system.

According to any of the above embodiments, the method further comprises the following steps: (c) when the load is high load, the information system operates in the low priority travel environment.

In accordance with any of the above embodiments, wherein the high priority travel environment is an execution environment for a software break agreement process, the low priority travel environment being an execution environment for general trip agreement processing.

In a third embodiment, a method of processing an information system is provided, the method comprising the steps of: (a) detecting a load of the information system. (b) Decide whether to discard the information in advance based on the load of the information system.

According to any of the above embodiments, the method further comprises the following steps: (c) when the load is high load, the information is discarded in advance.

According to any of the above embodiments, the load is a load of network traffic or a load of an application.

In accordance with any of the above embodiments, wherein the information is discarded at the bottom/previous stage of the protocol processing.

In a fourth embodiment, a method of controlling a core is provided, the method comprising the steps of: (a) detecting a packet loss rate of the core. (b) The timing at which the core is in the execution of a low priority interrupt handling function is determined based on the packet loss rate.

According to any of the above embodiments, the method further comprises the following steps: (c) when the packet loss rate exceeds an upper limit value, the core is in a low priority interrupt processing function.

In a fifth embodiment, a method of controlling a core is provided, the method comprising the steps of: (a) detecting a packet loss rate of the core. (b) Determine the mode of operation of the core based on the loss rate of the packet.

According to any of the above embodiments, the method further comprises the steps of: (c) limiting the high priority travel environment when the packet loss rate exceeds an upper limit, or the core is from a high priority The execution environment switches to a low priority travel environment.

In a sixth embodiment, a method of controlling a core is provided, the method comprising the steps of: (a) detecting a packet loss rate of the core, wherein the core has a core protocol processing rate and a network application service rate . (b) reducing the core protocol processing rate based on the packet loss rate to increase the network application service rate.

In accordance with any of the above embodiments, the method further comprises the step of: (c) reducing the core protocol processing rate when the packet loss rate exceeds an upper limit.

In a seventh embodiment, a method of controlling a core is provided, the method comprising the steps of: (a) detecting a packet loss rate of the core, wherein the core has a network application service rate. (b) Increasing the network application service rate based on the packet loss rate.

According to any of the above embodiments, the method further comprises the following steps: (c) increasing the network application service rate when the packet loss rate exceeds an upper limit value.

In the eighth embodiment, a method of controlling a core is proposed, the method comprising the steps of: (a) detecting a packet loss rate of the core. (b) A hardware interrupt is determined based on the packet loss rate.

According to any of the above embodiments, the method further comprises the step of: (c) reducing the hardware interruption when the packet loss rate exceeds an upper limit value.

In the ninth embodiment, a method of controlling a core is proposed, the method comprising the steps of: (a) detecting a packet loss rate of the core. (b) Decide whether to discard the packet from the bottom layer in advance based on the packet loss rate.

According to any of the above embodiments, the method further comprises the step of: (c) discarding the packet from the bottom layer in advance when the packet loss rate exceeds an upper limit value.

In a tenth embodiment, a device for processing an information is provided, and the device for processing an information comprises an information filtering unit and a core unit. The information filtering unit filters the information. The core unit processes the information filtered by the information filtering unit, and the core unit determines the timing at which the core unit is in the execution of the low priority interrupt processing function according to the packet loss rate.

According to any of the above embodiments, the information includes one of a first information and a second information, the first information including control information, the second information including a virus information or a network intrusion News. The core unit is a processor. The information filtering unit is a programmable logic gate array FPGA.

According to any of the above embodiments, the programmable logic gate array comprises a plurality of processing modules and a control unit. Each processing module of the plurality of processing modules includes a temporary memory and a memory area, and each processing module is connected in a pipeline to process the information to obtain the first information. The control unit receives the first information and transmits the first information to the core.

In the eleventh embodiment, a device for processing an information is provided. The information includes a header and a content. The device for processing an information includes an information filtering unit and an information processing unit. The information filtering unit maintains a first header filtering rule, and filters the header by the first header filtering rule. The information processing unit checks the content of the filtered information to obtain a second header filtering rule, and causes the second header filtering rule to replace the first header filtering rule, and the information filtering unit filters according to the second header. The rules filter subsequent information to avoid viewing the content of the subsequent information.

According to any of the above embodiments, the information filtering unit comprises a programmable logic gate array FPGA. The first header rule and the first header rule are stored in the programmable logic gate array. The information processing unit processes the information filtered by the information filtering unit. The information processing unit includes a Deep Packet Inspection (DPI) unit. The deep packet inspection unit views the content of the filtered data. The information is filtered and classified into a high priority information or a low priority information, the high priority information being received by the information processing unit, and the low priority information is discarded.

In an eleventh embodiment, a method of processing an information is provided, the information comprising a header and a content, the method comprising the steps of: (a) filtering the header to classify the information. (b) receiving the classified information and viewing the content of the classified information to obtain a header filtering rule. (c) Store the header filtering rules to filter subsequent information.

According to any of the above embodiments, wherein step (b) comprises the steps of: analyzing and comparing the information to generate a content processing rule. Converting the content processing rule becomes a header filtering rule.

In the eleventh embodiment, the flow of filtering information according to the traffic is as follows: (a) A content filtering rule is established according to a connection condition. (b) Converting the content filtering rule into a header filtering rule. (c) Update the header filtering rules to filter the headers of subsequent messages.

According to any of the above embodiments, the step (a) comprises the step of setting the connection to a high priority connection when the connection condition is a high load. When the connection status is low load, the connection is set to a low priority connection.

According to any of the above embodiments, wherein the connection is a high priority connection, the subsequent information is isolated. When the connection is a low priority connection, the connection is restricted or prohibited. When the connection is a low priority connection, the subsequent information is discarded early.

The description and examples of the present invention have been disclosed, but are not intended to limit the present invention, and it is understood that those skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. It should be within the scope of the invention patent.

10. . .知知High speed packet processing system

11. . . Network card

12. . . Host

13,14,15. . . Packet

16. . . External packet

17. . . Hardware interruption

18. . . Peripheral component interconnection bus

121. . . NIC driver

122. . . Linux core

123. . . application

124. . . processor

20. . . High-speed information system

twenty one. . . Network interface card

twenty two. . . Host

twenty three. . . Peripheral component interconnection bus

twenty four. . . Hardware interruption

25,26,27,29. . . News

28. . . System call

211. . . Direct memory access engine

221. . . Direct memory access receiving ring

222. . . Socket receive buffer

223. . . NIC driver

224. . . core

225. . . application

226. . . Processing unit

2240. . . Agreement processing

2241. . . Interrupt processing function

2242. . . Software interrupt processing function

2251. . . program

50. . . Information system

51. . . Network interface card

52. . . Host

53,55,56,57. . . News

54. . . Hardware interruption

521. . . Direct memory access receiving ring

522. . . Socket receive buffer

523. . . NIC driver

524. . . core

525. . . application

526. . . Processing unit

52413. . . Core agreement processing rate

5241. . . Agreement processing

52,411. . . High priority travel environment

52412. . . Low priority travel environment

5220. . . Packet loss rate

5250. . . Application service rate

60. . . Device for processing an information

61. . . Information filtering unit

62. . . Core unit

601. . . PCI bus

63, 64, 65, 66, 67, 68, 69. . . News

611. . . First processing module

614. . . control unit

612. . . Second processing module

613. . . Third processing module

6111. . . First temporary storage unit

6112. . . First memory unit

6121. . . Second temporary storage unit

6122. . . Second memory unit

6131. . . Third temporary storage unit

6132. . . Third memory unit

621. . . Packet loss rate

622. . . High priority interrupt processing function

623. . . Low priority interrupt processing function

70. . . Device for processing an information

71. . . Information filtering unit

72. . . Information processing unit

73. . . News

731. . . Head

732. . . content

711. . . First header filtering rule

721. . . Deep packet inspection unit

74. . . Filtered information

75. . . Follow-up information

752. . . Follow-up information

712. . . Second header filtering rule

722. . . Content processing rule

The first picture: a schematic diagram of a conventional high-speed packet processing system;

Figure 2 (a): Schematic diagram of the high-speed information system of the case;

Figure 2 (b): Schematic diagram of interrupt handling in this case;

Figure 2 (c): Schematic diagram of the priority order of software interruption in this case;

Figure 2 (d): Schematic diagram of interrupt handling in this case;

Figure 3 (a) is a schematic diagram of the information system of the first embodiment of the present invention;

Third diagram (b): a schematic diagram of information receiving mode switching in the fourth embodiment of the present invention;

Figure 3 (c) is a schematic diagram showing the implementation of the switching mechanism of the fourth embodiment of the present invention;

Figure 4 (a) is a device for processing an information in the tenth embodiment of the present invention;

Figure 4 (b): Schematic diagram of an agreement for information transfer between a plurality of memory cells;

Figure 5 (a) is a schematic diagram of an apparatus for processing an information in the eleventh embodiment of the present invention;

Figure 5 (b): Schematic diagram of the replacement header rule in this case;

Figure 5 (c) is a flow chart of filtering information in the eleventh embodiment of the present invention;

Figure 5 (d): Flow chart of filtering information according to traffic in the eleventh embodiment of the present invention.

20. . . High-speed information system

twenty one. . . Network interface card

twenty two. . . Host

twenty three. . . Peripheral component interconnection bus

twenty four. . . Hardware interruption

25,26,27,29. . . News

28. . . System call

211. . . Direct memory access engine

221. . . Direct memory access receiving ring

222. . . Socket receive buffer

223. . . NIC driver

224. . . core

225. . . application

226. . . Processing unit

2240. . . Agreement processing

2241. . . Interrupt processing function

2242. . . Software interrupt processing function

2251. . . program

50. . . Information system

51. . . Network interface card

52. . . Host

53,55,56,57. . . News

54. . . Hardware interruption

521. . . Direct memory access receiving ring

522. . . Socket receive buffer

523. . . NIC driver

524. . . core

525. . . application

526. . . Processing unit

52413. . . Core agreement processing rate

5241. . . Agreement processing

52,411. . . High priority travel environment

52412. . . Low priority travel environment

5220. . . Packet loss rate

5250. . . Application service rate

70. . . Device for processing an information

71. . . Information filtering unit

72. . . Information processing unit

73. . . News

731. . . Head

732. . . content

711. . . First header filtering rule

721. . . Deep packet inspection unit

74. . . Filtered information

75. . . Follow-up information

752. . . Follow-up information

712. . . Second header filtering rule

722. . . Content processing rule

Claims (9)

A method of processing an information system, wherein the information system has a high priority travel environment and a low priority travel environment, the method comprising the steps of: detecting a first load and a second load of the information system; Determining the protocol processing of the information system according to the first load and the second load of the information system; and when the first load or the second load is high load, the information system operates in the low priority travel environment . The method of claim 1, wherein the method further comprises the step of reducing the protocol processing of the information system when the first load or the second load is a high load. The method of claim 1, wherein: the first load is a traffic load processed by a system core; and the second load is a traffic load processed by an application. A method of processing an information system, the method comprising the steps of: detecting a load of the information system, wherein the information system has a high priority travel environment and a low priority travel environment; and according to the information system The load determines whether the information system should operate in the high priority travel environment or the low priority travel environment; and when the load is high load, the information system operates in the low priority travel environment . The method of claim 4, wherein: the high priority travel environment is an execution environment for a software break agreement processing; and the low priority travel environment is an execution environment for general trip agreement processing. A method of processing an information system, wherein the information system has a high priority travel environment and a low priority travel environment, the method comprising the steps of: detecting a load of the information system; according to the information system The load determines whether to discard the information in advance; and when the load is high load, the information system operates in the low priority travel environment. As in the method of claim 6, the method further comprises the following steps: (c) when the load is high load, the information is discarded in advance. The method of claim 6, wherein the load is a load of network traffic or a load of an application. The method of claim 6, wherein the information is discarded at the bottom/previous stage of the protocol processing.