TWI426709B - Clock and ramp generator circuit with low operational voltage - Google Patents

Description

Clock and triangle wave generating circuit with low working voltage

The invention relates to a clock and triangular wave generating circuit with a low working voltage, in particular to a low voltage 1V operation provided by a clean energy single cell (such as a fuel cell, a solar photovoltaic).

The clock and triangle wave generating circuit composed of the traditional operational amplifier circuit architecture is limited by the transistor threshold voltage problem. The operating voltage of the operational amplifier is limited to 1.5V, which causes the clock and triangle wave generating circuit to work above 1.5V. It cannot operate at a low voltage of 1V provided by clean energy single cells (such as fuel cells and solar photovoltaics).

The implementation structure of references [1]-[2] is composed of a voltage/current converter, a comparator and an RS flip-flop, which is also used in a current mode control pulse width modulation circuit, and The slope of the triangle wave is adjusted by an external resistor and capacitor, and the pulse frequency is adjusted from the voltages of VH and VL, so that the clock and triangle wave generating circuit can adjust the required slope and frequency according to different applications.

Referring to reference [3], the clock and triangle wave generation circuit is used in a 1V current mode control pulse width modulation boost DC/DC converter circuit when applied to the voltage of the clock and triangle wave generating circuit / In the current converter circuit (to compensate for the subharmonic phenomenon caused by the inductor current when the duty cycle is greater than 0.5), the reference voltage (Vref) node cannot provide more than 0.2V voltage. The biggest problem of this limitation comes from the transistor threshold voltage limit. To achieve the desired value, the op amp needs to operate above 1.2V, which causes the clock and triangle generation circuits to operate at 1.2V to operate properly and not to operate at lower voltages. It can be seen that there are still many shortcomings in the above-mentioned conventional technology, which is not a good designer, but needs to be improved.

In view of the shortcomings and shortcomings derived from the above-mentioned conventional technologies, the inventors of the present invention have improved and innovated, and after years of painstaking research, they finally succeeded in researching and developing the clock and triangular wave generating circuit of the low working voltage of the piece.

In order to make it possible to further understand and understand the features and functions of the driving method for the purpose of the present invention, the detailed description is as follows: The present invention provides a clock and triangle wave generating circuit with low working voltage, which aims to plan a perfect low work. The clock and triangle wave generating circuit of the voltage, and the base driving the operational amplifier as the core of the clock and triangular wave generating circuit of the low working voltage, and the integrated circuit layout technology has been established as an interconnected communication bridge. It becomes a circuit that can be integrated into any DC/DC converter power management control chip circuit mechanism with low operating voltage and other related requirements.

The invention is to solve the traditional voltage mode control and current mode control using the clock and triangle wave generating circuit whose operating voltage is limited to 1.5V or more, so if it is to be used for a lower operating voltage, the conventional voltage mode control and current mode Control is bound to be unusable. In the voltage mode control and the current mode control circuit, the clock and triangle wave generating circuits have a considerable correlation with the feedback control. For example, the clock and triangle wave generating circuits cannot operate at low voltage, then the voltage mode control and the current mode control are performed. It is not working properly.

Due to the limitation of the operating voltage of an operational amplifier composed of a metal oxide half field effect transistor (MOSFET), such as the threshold voltage of the MOS transistor (about 0.8 V) and the saturation voltage of the pMOS transistor and the saturation voltage of the nMOS transistor (about 0.2) V) and so on, so the operating voltage is limited by the operating voltage of the circuit core op amp itself, the most serious of which is the threshold voltage limit, which will cause the op amp's minimum operating voltage of the traditional circuit architecture to be limited to 1.5V.

Therefore, the present invention provides a clock and triangle wave generating circuit with a low operating voltage, which can improve the operating voltage of the conventional operational amplifier to be limited to 1.5V, and the clock and triangular wave generating circuit also needs to work above 1.5V, and cannot be cleaned. The problem of operating at low voltages provided by energy cells (such as fuel cells, solar photovoltaics).

The present invention resides in an operational amplifier [4]-[5] using a substrate-driven main architecture to overcome the 0.8V limit of the transistor threshold voltage of a conventional operational amplifier circuit. This circuit can be integrated into any DC/DC converter power management control chip with low operating voltage, and normally generates clock and triangle signals.

The clock and triangle wave generating circuit for achieving the low working voltage of the above object is a voltage follower, an external resistor, an external capacitor, a current mirror, a comparator group, an RS flip-flop and a switch. The crystal is composed of. The voltage follower senses a certain voltage source, and the external resistor Rt generates a certain current source. The constant current source senses through the current mirror and charges and discharges the external capacitor. The voltage value is via the negative terminal of the comparator group. Determine the maximum value of this voltage and the minimum value of this voltage, and compare it with the positive terminal of the comparator, and then standardize the high voltage level and low voltage level of the triangular wave, and the output result of the comparator group is positive through RS The counter generates a clock signal. At this time, the switch transistor is determined to be turned on or off by the clock signal of the RS flip-flop, thereby generating a triangular wave signal.

Referring to FIG. 1 , a circuit diagram of a clock and a triangular wave generating circuit for a low operating voltage, the clock and triangular wave generating circuit of the low operating voltage of the present invention includes: a voltage follower 100 having a substrate driving operational amplifier therein 106, and connected to the external resistor 110 and the current mirror 101; an external resistor 110, connected to a certain voltage source for adjusting the current value; an external capacitor 105 for charging and discharging; a current mirror 101 for sensing Current and external resistor 110, external capacitor 105, switching transistor 104 Connected to the comparator group 102; a comparator group 102 connected to the RS flip-flop 103 to regulate the high voltage level and low voltage level of the triangular wave; an RS flip-flop 103, and the switching transistor 104 The connection is used to generate a clock signal; and a switching transistor 104 is configured to turn on or off the switching transistor 104 according to a signal generated by the RS flip-flop 103, thereby generating a triangular wave signal. The clock and triangle wave generating circuit of the low working voltage generates a certain current source according to the voltage follower 100 and the external resistor 110, and senses the constant current source to charge and discharge the external capacitor 105 through the current mirror 101. The voltage value determines the maximum value of the voltage and the minimum value of the voltage via the negative terminal of the comparator group 102, and compares with the positive terminal of the comparator group 102, thereby standardizing the high voltage level and the low voltage level of the triangular wave. The bit, and the output of the comparator group 102, generates a clock signal via the RS flip-flop 103. At this time, the switch transistor 104 is determined by the clock signal of the RS flip-flop 103 to be turned on or off. This action in turn produces a triangular wave signal.

The clock and triangle wave generating circuit of the low working voltage of the invention is used for generating the clock and triangle wave signals, and can be used for compensating the current mode control of the DC/DC converter, and the inductor current generates the subharmonic when the duty cycle is greater than 0.5. phenomenon. In order to generate the required clock and triangular wave signals, first, the base driving operational amplifier 106 in the voltage follower 100 is connected with the M1 transistor and the external resistor Rt (Off Chip) 110 in the current mirror 101, so that the reference voltage (Vref) It is sensed to the M1 transistor, and a constant current source is generated with the external resistor 110. The current mirror principle can be used to know that the M2 transistor senses the M1 transistor current value equal to the multiple of the M2 transistor, and the calculation formula is as follows: i ₁ =V _ref /R _t (1)

Comparator group in clock and triangle wave generating circuit of low working voltage of the invention 102 can determine the voltage maximum value and the voltage minimum value, thereby adjusting the pulse wave frequency, and adjusting the triangular wave slope through the external resistor 110 and the external capacitor 105. Here, the aspect ratio (W/L-Ratio) is set to be the same, so i1=i2 in the equations (1) and (2). Then, the sensed current i2 charges the external capacitor 105 until the voltage (Vramp) of the external capacitor 105 reaches VH, and the CMP comparator output of the comparator group 102 is at a high level (High), while the comparator group 102 The CMP1 comparator output is low level (Low), and a high level signal on switch transistor 104 is sent via the RS flip-flop 103, and the external capacitor 105 begins to discharge the path of the switch transistor 104 until Vramp falls to the VL voltage. At this time, the CMP1 comparator of the comparator group 102 and the CMP comparator are in a conversion state, and a low-level signal is output via the RS flip-flop 103 to turn off the switching transistor 104, and then the external capacitor 105 is charged again, so that the continuous cycle Sexual changes also generate triangular wave signals on the Vramp node and pulse signals on the Clock node. The slope of the triangle wave can be adjusted through the external resistor 110 and the external capacitor 105. The pulse frequency can be adjusted from the voltage settings of the VH and VL of the comparator group 102, so that the clock and triangle wave generating circuit can adjust the required slope according to different applications. frequency.

Referring to the comparator embodiment of the comparator group of Figure 2, the comparator has a very fast response time (about 10 ns) and uses a hysteresis architecture to improve the problems caused by noise. The comparator group 102 architecture The minimum operating voltage is Vdd-min=Vsd(M1)+Vsd(M2)+Vds(M4)<1V.

In addition, please refer to the voltage/current converter of Figure 3. When the pulse and triangle wave generating circuit generates the clock and triangle wave according to the required slope and frequency, a voltage/current converter can be connected to convert the current into a circuit, and the circuit can not be used. use.

4 is an embodiment of a substrate driving operational amplifier 106 of the present invention. The substrate driving operational amplifier 106 includes a bias circuit 107, a fold/serial amplifying circuit 108, and a rear output amplifying circuit 109. Bias circuit 107 is used to provide a bias voltage The pre-folding/serializing amplifier circuit 108 is pre-folded. The fold/serial amplifying circuit 108 is used as the main structure of the base operational amplifier 106 for providing a first-stage amplification function, and provides the main function "amplification" of the substrate-driven operational amplifier 106. The post-stage output amplifying circuit 109 is configured to provide a second-stage amplifying function to enhance the signal of the first-stage amplification. The substrate is used to drive the operational amplifier 106 to improve the input common mode voltage amplitude. Since the base drive operational amplifier 106 is used, the M1 first transistor and the M2 second transistor in the fold/serial amplifier circuit 108 are not limited by the threshold voltage, and thus are folded. The M1 first transistor and the M2 second transistor of the series-connected amplifying circuit 108 are completely in a saturation region, and the minimum operating voltage of the substrate driving operational amplifier 106 is Vdd-min=Vds(M3)+Vsd(M1)+Vds (M8) <1V. The base drive operational amplifier 106 is a TSMC 0.35 μm 2P4M CMOS process technology with a relatively high gain margin (approximately 60 dB) and a phase boundary (approximately 90 degrees) and a high frequency bandwidth (approximately 1.5 MHz), and due to the use of low operating voltages, The power consumption of this architecture is approximately 149μW.

Please refer to Table 1 for the low operating voltage clock and triangular wave generating circuit specifications of the present invention. The present invention utilizes the HSPICE simulation software to simulate the low operating voltage clock and triangular wave generating circuit of the present invention, and is fabricated by TSMC 0.35 μm 2P4M CMOS process technology. , wherein the low voltage 1V is the operating voltage, thereby generating a triangular wave frequency of 500KHz and a pulse period of 2μs.

Table 1 Clock and Triangle Wave Generation Circuit Specifications

Please refer to Table 2 for the substrate-driven operational amplifier specification. In order to solve the problem that the conventional clock and triangle wave generating circuit cannot operate at low voltage 1V due to the threshold voltage limitation, the substrate driving operational amplifier 106 is proposed and applied to the low operating voltage. Pulse and triangle wave generating circuits.

Referring to the base drive op amp gain boundary and phase boundary analog waveform of FIG. 5A, the base drive operational amplifier 106 has a gain boundary of approximately 60 dB and a phase boundary of approximately 90 degrees and a bandwidth of approximately 1.5 MHz.

Referring to FIG. 5B, the substrate driving operational amplifier 106 outputs a swing, and a set of sine waves is input to observe the output change of the substrate driving operational amplifier 106. As shown in FIG. 5B, the output of the sine wave and the substrate driving operational amplifier 106 are almost equal. Therefore, this base op amp has a very wide range of output swings. Referring to FIG. 5C, when the substrate driving operational amplifier 106 operating voltage Vdd operates from +0.5V to -0.5V, the substrate driving operational amplifier 106 inputs a common mode voltage range of -0.45V to +0.5V. Please refer to Figure 5D. When the operating voltage Vdd is operated at 1V, the operation is placed. The mains input common mode voltage range is 1V to 0.02V. Please refer to the clock circuit and triangle wave generating circuit architecture of the low working voltage in Figure 1. The waveforms of the triangular wave (Vramp) and pulse wave (q1) nodes of the analog clock and triangle wave generating circuit are shown in Figure 6A~C. The changes are observed in the TT mode (Typical Model), the FF mode (Fast nMOS Fast pMOS Model), and the SS mode (Slow nMOS Slow pMOS Model). See Table 3 for the relevant setting conditions.

Please refer to the TT mode of Figure 6A as a reference to see the difference between the Figure BF and the FF mode. It is known that the frequency of the FF mode becomes faster and a set of waveforms is added at the same time. Please refer to Figure 6 C for the SS mode low operating voltage clock and triangle wave generating circuit voltage simulation diagram and Figure 6A TT mode low operating voltage clock and triangle wave generating circuit voltage simulation diagram difference, it can be obvious The output frequency is reduced to approximately 250 KHz. This phenomenon can be corrected by lowering the value of the external capacitor 105. When the actual wafer is measured, if the clock and triangle wave generating circuit cannot find the 500KHz frequency under the set circuit related parameter value, the frequency can be increased by lowering the size of the external capacitor 105 to achieve the ideal operating frequency.

Please refer to Figure 7. The maximum frequency of the clock and triangle wave generating circuit is 1.1MHz analog wave. Shape, the relevant conditions are set as shown in Table 4.

When the value of the external capacitor 105 is adjusted from 0.0005μF to 0.0002μF, the frequency of the triangular wave of the clock and triangle wave generating circuit is about 1.1MHz. This case can be known by the following formula (3). When the current and voltage are fixed, By changing the value of the capacitor, a large period can be obtained, so the maximum operating frequency of 1 MHz can be realized.

T=CV/I (3)

In the above formula, T is a triangular wave period, C is an external capacitor 105, V is a reference voltage, and I is a current value on the external resistor 110.

Please refer to Figure 8 for the variation of the analog clock and triangle wave generating circuit during temperature variation. The temperature changes are simulated at 0 degrees Celsius, 25 degrees Celsius and 50 degrees Celsius respectively. When the system is in three different temperatures, the present invention is low. The clock of the working voltage and the triangular wave signal of the triangular wave generating circuit have a phase delay, but the three groups of different temperature triangular wave signal periods are unchanged, and the phase delay situation does not affect the operation of the circuit. The pulse wave generated by the clock pulse and triangular wave generating circuit of the invention can be used to determine the voltage switching mode DC/DC converter transistor switching period, and thereby generate an inductor current signal to make the inductor current period and pulse The wave period is consistent, and the DC/DC converter transistor switching period for current mode control avoids a large duty cycle At 0.5 o'clock, the inductor current produces a subharmonic oscillation phenomenon. It can be seen from the above two examples that the present invention focuses on the degree of influence of the periodic variation, and the phase delay caused by the temperature change has no influence on the present invention.

The clock and triangular wave generating circuit of the low working voltage provided by the invention has the following advantages when compared with other conventional technologies: the clock and triangular wave generating circuit of the low working voltage of the invention can improve the traditional operational amplifier circuit The clock and triangle wave generating circuit composed of the architecture is limited by the threshold voltage of the transistor. The operating voltage of the operational amplifier is limited to 1.5V, which causes the clock and triangle wave generating circuit to work above 1.5V, and cannot be cleaned. The operating voltage of the single cell (such as fuel cell, solar photovoltaic) provides low voltage operation, so the clock and triangle wave generating circuit of the invention can be integrated into any DC/DC converter power management with low working voltage. In the control wafer, the present invention is quite industrially usable.

The clock and triangle wave generating circuit of the low working voltage of the invention is not limited to the power management control chip, and can be applied to other circuits requiring pulse wave and triangular wave signals, and uses a low working voltage. The unit energy cost can be reduced, and thus the present invention is quite novel.

The clock and triangle wave generating circuit of the low working voltage of the invention adopts the substrate driving mechanism as the main structure of the operational amplifier to overcome the threshold voltage threshold of the conventional operational amplifier circuit, so that the present invention is obviously more advanced than the conventional technology.

The clock and triangle wave generating circuit of the low working voltage of the invention adopts the substrate driving mechanism as the main structure of the operational amplifier to overcome the threshold voltage threshold of the conventional operational amplifier circuit, and the invention can work lower than the conventional technology. Under the voltage, the present invention is significantly more advanced than conventional techniques.

The detailed description of the preferred embodiments of the present invention is intended to be limited to the scope of the invention, and is not intended to limit the scope of the invention. The patent scope of this case.

In summary, this case is not only innovative in terms of space type, but also can enhance the above-mentioned multiple functions compared with the customary items. It should fully meet the statutory invention patent requirements of novelty and progressiveness, and apply for it according to law. This invention patent application, in order to invent invention, to the sense of virtue.

【references】

[1] WR Liou, ML Yeh, and YL Kuo, "A high efficiency dual-mode buck converter IC for portable applications," IEEE Trans. Power Electron., vol.23, no. 2, pp. 667-677, March 2008.

[2] CF Lee and KT Philip, "A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique," IEEE Journal of Solid-State Circuit, vol. 39, no. 1, pp. 3- 14, Jan. 2004.

[3] C. Y Leung, P. K. T Mok, and K. N. Leung, “A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS Technologies,” Journal of Solid-State Circuits, vol. 40, no. 11, pp. 2265-2274, Nov. 2005.

[4] BJ Blalock, PE Allen, and GA Rincon-Mora, “Designing 1-V OP Amps using standard digital CMOS technology,” IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, vol. 45, no. 7 , pp. 769-780, July 1998.

[5] S. Karthikeyan, S. Mortezapour, A. Tammineedi, and EKF Lee, “Low-voltage analog circuit design based on biased inverting OP Amp configuration,” IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, vol 47, no. 3, pp. 176-184, Mar. 2000.

100‧‧‧Voltage follower

101‧‧‧current mirror

102‧‧‧ Comparator Group

103‧‧‧RS forward and reverse

104‧‧‧Switching transistor

105‧‧‧External capacitor

106‧‧‧Base Drive Operational Amplifier

107‧‧‧Substrate operational amplifier bias circuit

108‧‧‧Folding/serial amplification circuit for base operational amplifier

109‧‧‧Substrate operational amplifier after the stage output amplifier circuit

110‧‧‧ external resistor

FIG. 1 is a circuit diagram of a clock and triangle wave generating circuit of a low operating voltage of the present invention; FIG. 2 is a comparator architecture diagram of a clock and triangular wave generating circuit of the invention with a low operating voltage; Figure 3 shows a voltage/current converter architecture; Figure 4 shows a low-voltage clock and triangular wave generation circuit for a substrate-driven operational amplifier; Figure 5A shows a substrate driver. The operational amplifier gain boundary and phase boundary analog waveform diagram; Figure 5B shows the output swing analog waveform of a base-driven operational amplifier; Figure 5C shows the base drive operation when the input voltage Vdd is operated at ±0.5V. Amplifier input common mode voltage range map.

Figure 5D shows a common-mode voltage range of the base-driven operational amplifier input when the input voltage Vdd is operated at 1V; Figure 6A shows a voltage simulation diagram of the clock and triangular wave generating circuit of a low operating voltage of a TT mode; Figure 6B shows the voltage simulation diagram of the clock and triangle wave generating circuit of a low operating voltage of FF mode; Figure 6C shows the voltage simulation diagram of the clock and triangle wave generating circuit of a low operating voltage of SS mode; Figure 7 shows the maximum frequency waveform of a clock and triangle wave generating circuit simulation; Figure 8 shows the simulated temperature change of a clock and triangle wave generating circuit.

100‧‧‧Voltage follower

101‧‧‧current mirror

102‧‧‧ Comparator Group

103‧‧‧RS forward and reverse

104‧‧‧Switching transistor

105‧‧‧External capacitor

106‧‧‧Base Drive Operational Amplifier

110‧‧‧ external resistor

Claims (6)

A low operating voltage clock and triangular wave generating circuit comprising: a voltage follower comprising a substrate driving operational amplifier, the substrate driving operational amplifier comprising a fold/serial amplifying circuit, the substrate driving an operational amplifier for improving Inputting a common mode voltage amplitude, and a first transistor and a second transistor in the folding/serializing amplifier circuit are not limited by the threshold voltage, and the first transistor and the second transistor are in a saturated state; An external resistor is connected to a certain voltage source and connected to the voltage follower for adjusting the current value; an external capacitor for charging and discharging; and a current mirror for sensing current and the external resistor, The external capacitor and the voltage are connected with the coupler; a comparator group connected to the current mirror for regulating the high voltage level and the low voltage level of the triangular wave; an RS flip-flop, and the comparator group Connected to generate a clock signal; and a switching transistor coupled to the current mirror and the RS flip-flop and to turn the switch on or off according to a signal generated by the RS flip-flop a body, thereby generating a triangular wave signal; the low operating voltage clock and triangular wave generating circuit, according to the voltage follower and the external resistor to generate a certain current source, and sensing the constant current source through the current mirror The external capacitor is charged and discharged. The negative terminal of the comparator group is used to determine the voltage maximum value and the voltage minimum value, and the comparator group compares the voltage value of the external capacitor according to the voltage value of the external capacitor. The minimum voltage, which in turn regulates the high voltage level and low voltage level of the triangular wave, and the output of the comparator group is A clock signal is generated by the RS flip-flop, wherein the switch transistor is determined to be turned on or off by a clock signal of the RS flip-flop, thereby generating a triangular wave signal; wherein the comparator generates a triangular wave signal; The voltage maximum and voltage minimum determined by the group can adjust the pulse frequency; and the external resistor and the external capacitor are used to adjust the triangular wave slope. The clock and triangular wave generating circuit of the low working voltage according to the first claim of the patent scope, wherein the substrate drives the operational amplifier by sensing the constant voltage source and connecting with the external resistor to generate the constant current source. The clock and triangle wave generating circuit of the low working voltage according to the first item of the patent application scope, wherein the external resistor is used for adjusting the magnitude of the constant current generated by the voltage follower. The clock and triangular wave generating circuit of the low working voltage according to Item 1 of the patent application scope, wherein the current mirror is composed of two transistors for sensing the constant current value of the voltage follower. The clock and triangular wave generating circuit of the low working voltage according to the first aspect of the patent application, wherein the base driving operational amplifier further comprises a bias circuit and a rear output amplifying circuit, wherein the folding/serializing amplifying circuit is coupled to The bias circuit is coupled to the subsequent stage output amplifying circuit. A clock and triangular wave generating circuit of a low operating voltage according to item 5 of the patent application scope, wherein the folding/serializing amplifying circuit is configured to provide a first stage amplifying function, and the rear stage output amplifying circuit is configured to provide a second stage amplifying circuit Function to enhance the signal of the first level of amplification.