TWI419560B - System and method for calibrating output of a demodulator and tv receiver - Google Patents

Description

Demodulator, method and television receiver capable of automatically calibrating output

The present invention relates to a receiver for a digital/analog television, and more particularly to a power-saving and auto-calibratable demodulator, method and television receiver thereof having a current digital to analog converter (IDAC).

In recent years, countries around the world are gradually popularizing the broadcasting and reception of digital television (DTV), thus forming a situation in which digital television and traditional analog TV (ATV) coexist. The first figure shows a system block diagram of a conventional digital/analog television receiver 1, which mainly includes a tuner 10, a demodulator 12 and a decoder 14. The demodulator 12 and the decoder 14 of the conventional receiver 1 are respectively fabricated on individual printed circuit boards (PCBs), and the coaxial cables 16 are used to transmit signals between the two boards. Since the impedance of the general coaxial cable is 75 ohms (Ω), in order to match the impedance of the receiver 1, two precisions of 75 ohms are required between the two boards of the demodulator 12 and the decoder 14. Resistor 18, and demodulator 12 requires the use of a precision reference resistor R _ref to produce an accurate current output and to ensure stable output voltage.

Since the demodulator 12 and the decoder 14 are respectively fabricated on individual printed circuit boards, the receiver system 1 is susceptible to noise interference and the circuit area cannot be miniaturized. Moreover, even with the use of the precision resistor 18, the output voltage swing of the demodulator 12 is still quite equivalent due to the die-to-die process error and the power supply voltage itself. The deviation of the deviation may cause a signal transmission error.

Therefore, there is a need to propose a novel digital/analog TV receiver that is resistant to noise interference, such that the output voltage swing of the demodulator has a small offset.

In view of the many shortcomings of the conventional digital/analog television receivers of the prior art described above, one of the objects of the present invention is to provide a digital/analog television receiver that auto-calibrates the output voltage swing of the demodulator. Make it less biased. In addition, another object of the present invention is to reduce power consumption.

According to one of the embodiments of the present invention, a television receiver includes a demodulator, a decoder, a resistor, and a circuit board. The demodulator, the decoder and the resistor are fixed on the circuit board, and the demodulator and the decoder are connected by a trace of the circuit board, and the resistor is coupled to the demodulator via the above-mentioned trace decoder. Thereby, no coaxial cable is required between the demodulator and the decoder, and the resistance is not necessarily limited to 75 ohms. Furthermore, the current consumption of the demodulator can be reduced by moderately increasing the resistance of the resistor to achieve power saving. With the automatic calibration of the present invention, the error caused by the resistor and the process error of the production process can be eliminated.

In accordance with another embodiment of the present invention, a television demodulator includes a reference voltage generation circuit, a reference resistor, a current digital to analog converter (IDAC), a comparison device, and a calibration program device. Wherein, the reference resistor converts the reference voltage to provide a reference current. A current digital to analog converter (IDAC) receives a digital code and produces an output signal. Comparison device compares reference voltage and The signal is output to produce a comparison output. The calibration program device updates the digital code based on the comparison output. Thereby, the deviation of the output voltage swing of the demodulator can be automatically calibrated without an external reference resistor.

A demodulator output calibration method according to another embodiment of the present invention includes the steps of: obtaining a reference digit code according to a reference voltage; sending a calibration code to a current-scale digital to analog converter (IDAC); and applying a current digital to analogy The output of the converter (IDAC) is digitized to obtain a corresponding digital code; the digital code and the reference digital code are compared to produce a comparison output; and the calibration code is updated based on the comparison output.

The second figure shows a system block diagram 2 of a digital/analog television receiver according to one embodiment of the present invention, which mainly includes a tuner 20, a demodulator 22 and a decoder 24. Although the receiver 2 of the present embodiment can receive and process both digital and analog television signals, the present invention is also applicable to receiving, processing only digital television signals or only receiving and processing analog television signals.

Tuner 20 is used to match the impedance of an antenna or cable (not shown) and to downconvert the RF signal to a baseband signal. Next, the demodulator 22 receives the matching of the television signal is demodulated (Demodulation), for capturing a television signal V _out from the carrier wave is modulated signals (modulated carrier wave) of. The decoder 24 is then further decoded to display the television signal on a screen (not shown). As shown in the second figure, the demodulator 22 of the present embodiment includes a serially connected filter 221, an analog to digital converter (ADC) 220, a digital signal processor (DSP) 224, and a current digital to analog converter ( IDAC) 222. For example, the filter 221 can filter the noise and distortion caused by the channel effect in the signal, and then feed it to the analog to digital converter (ADC) 220. Analog to digital converter (ADC) output 220 is fed to a digital signal processor (DSP) 224 for baseband signal processing, using a current-mode digital to analog converter 222 generates an output V _out is transmitted via analog television (ATV) signal path 26A To decoder 24, decoding is performed by analog to digital converter (ADC) 240 and digital signal processor (DSP) 242 within decoder 24. Alternatively, the digital output of the digital signal processor (DSP) 224 of the demodulator 22 can also be transmitted to the digital signal processor (DSP) 242 of the decoder 24 via the digital television (DTV) signal path 26B for decoding. That is to say, the same demodulator IC can support digital TV signal output and analog TV signal output at the same time, reducing the overall production cost.

In this embodiment, the demodulator 22 and the decoder 24 can be implemented as separate integrated circuits (ICs), respectively, and the two integrated circuits are fixed to a common printed circuit board (PCB) 21. The analog television (ATV) signal path 26A and the digital television (DTV) signal path 26B can be implemented by routing traces of the board (e.g., copper conductor traces). Demodulator 22 and decoder 24 The production is not limited to the above. In other embodiments, demodulator 22 and decoder 24 may also be implemented using techniques such as system on chip or stereo (3D IC).

An external resistor R _{ext is} disposed between the integrated circuit of the demodulator 22 and the integrated circuit of the decoder 24, and is fixed to the printed circuit board (PCB) 21. One end of the external resistor R _ext is connected to the output V _{out of the} demodulator 22, and the other end is grounded. In the present embodiment, the resistance of the external resistor R _ext is not necessarily limited to a precision resistor of 75 ohms, and for example, a resistor of 300 ohms can be used. Moreover, in this way, the circuit structure can be tripped off, and the current value can be inversely proportional to the resistance value by appropriately increasing the resistance of the external resistor R _ext to maintain the same output voltage V _out swing. The current consumption of the demodulator 22 can be reduced to achieve power saving.

The third A diagram shows a detailed functional block diagram of the demodulator 22 of the embodiment of the present invention. The reference voltage generating circuit 223 can generate a predetermined voltage swing that is unaffected by environmental changes and loads. In this embodiment, the reference voltage generating circuit 223 may be, for example, a bandgap (BG) circuit that generates a predetermined reference voltage value corresponding to an electronic energy level value (about 1.2 volts) of 矽, and The resulting reference voltage is virtually unaffected by ambient temperature. The output voltage V _{base of the} reference voltage generating circuit 223 (for example, the energy level voltage V _bg ) is supplied with a reference current via a conversion of an internal resistance R _int , and has a value of V _base /R _int (for example, V _bg /R _int ), Can be used as a comparison reference point for the calibration process.

In the present embodiment, the digital to analog converter (DAC) 222 of the demodulator 22 is implemented in a current digital to analog converter (IDAC). As shown in FIG. B, the current-to-digital converter (IDAC) 222 mainly includes a plurality of current mirrors 2220 for mirroring the reference voltage generating circuit 223 and the internal resistance R _int . The current V _base /R _int , and the control switch SW coupled to the current mirror 2220 can be used to determine the external driving capability. The embodiment shown in FIG. 3A shows a current-to-digital converter (IDAC) 222. However, it is also practical to use a plurality of current-to-digital to analog converters (IDACs) 222 to separately handle different The signal of the channel.

Continuing to refer to FIG. A third comparing means 225 and the calibration process (calibration routine) device 226 may automatically calibrate the output voltage of the demodulator 22 (V _out) swing. In this embodiment, the comparing means 225 can be, for example, a progressive approximation register to a digital converter (SARADC), or a low cost search device, such as a binary search device, mainly by comparison. The means to produce the output.

The third C diagram shows the calibration procedure of an embodiment of the present invention. First, it closes the switch SW1, to the node voltage V _base as a reference voltage, and comparator 225 generates a comparison output via the means, for example, can be compared with a predetermined comparison voltage (not shown), and the number of bits to obtain The reference digit code DBASE (step 31). In step 32, the calibration program means 226 sends a digital code corresponding to the reference voltage Vbase to the current digital to analog converter (IDAC) 222, and activates the current digital to analog converter (IDAC) 222 to output a corresponding analog signal. , that is, V _base . Since the converted analog signal has a deviation from the true reference voltage V _base , the calibration operation must be continued. Initially (step 33), calibration program device 226 sends the lowest level calibration code (code 0; n = 0) to current digital to analog converter (IDAC) 222, the output of which is controlled by comparator 225 via closed switch SW2. For example, SARADC is digitized into a digital code DCODE (step 34). The calibration program means 226 compares the digital code DCODE with the reference digital code DBASE (step 35). If the digit code DCODE is less than the reference digit code DBASE (i.e., DCODE-DBASE < 0), the calibration program means 226 sends the next calibration code (code 1; n = n + 1) (step 36). Repeat the above digitization and comparison with the reference digit code DBASE until the digit code DCODE is greater than the reference digit code DBASE (ie, DCODE-DBASE>0), at which point the calibration level can be obtained (step 37) and calibrated. The deviation of the output voltage V _out . The calibration codes of the foregoing embodiments are sent out in small but large order, but are not limited to this manner; in other embodiments, the calibration codes may be sent from large to small or in other orders; or, by binary approximation method. The calibration code closest to the reference digit code DBASE can be output.

The fourth A diagram shows a circuit of the demodulator 22 that automatically corrects the driving capability according to an embodiment of the present invention, which shows the reference current V _base /R _int , the current correcting circuit 228 , the calibration program means 226 and the external resistor R _ext . The fourth B diagram shows a detailed circuit of the demodulator 22 that automatically corrects the driving capability according to an embodiment of the present invention, which shows the reference current V _base /R _int and the current correcting circuit 228. For example, the current correction circuit 228 includes a plurality of replica current mirrors, and the magnitude of the current drawn by the current correction circuit 228 can be changed by the control of the five-digit calibration codes C4, C3, C2, C1, C0, thereby changing the current. The total current output produced by the last mirror of the digital to analog converter (IDAC) 222.

The digital/analog TV receiver 2 of the embodiment of the present invention does not need to use the coaxial cable 16, and the external resistor R _{ext is} not necessarily limited to 75 ohms, and may be other resistance values, for example, 300 ohms may be used, and the automatic correction circuit of the present invention may automatically Correct its drive capability. The value of the external resistor R _ext can be selected to correlate to the sampling frequency of the current digital to analog converter (IDAC) 222. Preferably, the embodiment of the present invention can reduce the current consumption of the demodulator 22 by increasing the resistance of the external resistor R _ext to achieve power saving. For example, if the output voltage swing of the demodulator 22 is 1.2 volts, the conventional demodulator 12 consumes 16 milliamps (= 1.2/75). For the same 1.2 volt voltage swing, this embodiment uses a 300 ohm external resistor R _ext , which consumes 4 milliamps (= 1.2/300), thus saving a total of 75% power consumption. This power saving has an overall improvement in overall performance for portable electronic devices. Compared with the conventional digital/analog TV receiver 1, the embodiment of the present invention further uses a feedback loop formed by an analog-to-digital converter (ADC) 225 and a calibration program device 226 for swinging the output voltage. automatic calibration of the deviation, so that the output voltage V _out will not be an external resistor R _ext, the internal resistance R _int and the reference voltage generating circuit 223 is affected by the error. The invention can eliminate the error caused by the resistance and the process error of the production process.

In one aspect, the present invention discloses a television demodulator capable of automatically calibrating an output, including a reference voltage generating circuit, a reference resistor, a current digital to analog converter (IDAC), a comparing device, a first switch, a second switch, and a calibration program device; a reference voltage generating circuit for generating a reference voltage, for example, an energy level voltage generating circuit for generating an energy level voltage; and a reference resistor, which may be an internal resistor for converting the reference voltage to provide a reference current; An analog converter (IDAC) for receiving a digital code and generating an output signal; the comparing means comparing the reference voltage and the output signal to generate a comparison output; the calibration program means updating the digital code according to the comparison output; the comparing means may be of a class The first switch is coupled between the reference voltage generating circuit and the analog to digital converter (ADC) for selectively feeding the reference voltage to the analog to digital converter (ADC). A reference digital code is obtained; the second switch is coupled between the current digital to analog converter (IDAC) and the analog to digital converter (ADC) for selectively outputting the current digital to analog converter (IDAC) The ground is fed to an analog to digital converter (ADC) to obtain a corresponding digital code.

The invention also discloses a television receiver comprising a demodulator, a demodulator, a decoder, an external resistor and a circuit board; the demodulator is configured to demodulate the carrier modulated signal to generate a demodulated output; and the decoder is configured to solve the solution The output is decoded; the demodulator, the decoder and the external resistor are fixed on the circuit board, and the demodulator and the decoder are connected by a circuit board trace, and the external resistor is coupled to the demodulation via the trace And decoder.

The invention also discloses a method for calibrating an output of a demodulator, comprising the steps of: obtaining a reference digital code according to a reference voltage; sending a calibration code to a current digital to analog converter (IDAC); and applying a current digital to an analog converter (IDAC) The output is digitized to obtain a corresponding digital code; the digital code and the reference digital code are compared to produce a comparison output; and the calibration code is updated based on the comparison output.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the invention should be included in the following Within the scope of the patent application.

1‧‧‧Receiver for traditional digital/analog TV

10‧‧‧ Tuner

12‧‧‧ Demodulator

14‧‧‧Decoder

16‧‧‧Coaxial cable

18‧‧‧Resistors

2‧‧‧Digital/analog TV receivers in one of the embodiments

20‧‧‧ Tuner

21‧‧‧ Printed Circuit Board (PCB)

22‧‧‧ Demodulator

220‧‧‧ Analog to Digital Converter (ADC)

221‧‧‧ filter

222‧‧‧ Current Digital to Analog Converter (IDAC)

2220‧‧‧current mirror

223‧‧‧reference voltage generating circuit

224‧‧‧Digital Signal Processor (DSP)

225‧‧‧Comparative device

226‧‧‧ calibration procedure device

228‧‧‧ Current Correction Circuit

24‧‧‧Decoder

240‧‧‧ Analog to Digital Converter (ADC)

242‧‧‧Digital Signal Processor (DSP)

26A‧‧‧ analog television (ATV) signal path

26B‧‧‧Digital Television (DTV) Signal Path

31-37‧‧‧ Calibration process steps

V _base ‧‧‧reference voltage generation circuit output voltage

V _out ‧‧‧ demodulator output voltage

R _ext ‧‧‧External resistance

R _int ‧‧‧Internal resistance

R _ref ‧‧‧reference resistor

SW‧‧ switch

SW1‧‧‧ switch

SW2‧‧‧ switch

The first figure shows a system block diagram of a conventional digital/analog TV receiver.

The second figure shows a system block diagram of a receiver of a digital/analog television according to one embodiment of the present invention.

Figure 3A shows a detailed functional block diagram of the demodulator of the embodiment of the present invention.

Figure 3B shows the current mirror to analog converter (IDAC) current mirror versus reference current.

The third C diagram shows the calibration procedure of an embodiment of the present invention.

The fourth and fourth B diagrams show the circuit of the demodulator that automatically corrects the drive capability.

22‧‧‧ Demodulator

222‧‧‧ Current Digital to Analog Converter (IDAC)

223‧‧‧reference voltage generating circuit

225‧‧‧Comparative device

226‧‧‧ calibration procedure device

V _base ‧‧‧reference voltage generation circuit output voltage

V _out ‧‧‧ demodulator output voltage

R _ext ‧‧‧External resistance

R _int ‧‧‧Internal resistance

SW1‧‧‧ switch

SW2‧‧‧ switch

Claims (16)

A television demodulator capable of automatically calibrating an output, comprising: a reference voltage generating circuit for generating a reference voltage; a reference resistor for converting the reference voltage to provide a reference current; and a current digital to analog converter (IDAC) for receiving a digit code and generating an output signal; a comparing means for comparing the reference voltage and the output signal to generate a comparison output; and a calibration program means for updating the comparison output according to the comparison Digital code. The television demodulator of claim 1, wherein the reference voltage generating circuit is a bandgap circuit. The television demodulator of claim 1, wherein the calibration program device increments the digital code according to the comparison output to calibrate one of the output signals to output a swing. The television demodulator of claim 1, wherein the current digital to analog converter (IDAC) comprises a plurality of current mirrors for mirroring the reference current. The television demodulator of claim 1, wherein the reference resistor is an internal resistor. The television demodulator of claim 1, wherein the comparing device is an analog to digital converter (ADC) that converts the reference voltage to obtain a reference digital code. The television demodulator of claim 6, wherein the calibration program device sends a calibration code to the current digital to analog converter (IDAC), the output signal via the analog to digital converter (ADC) To obtain a corresponding digit code; the calibration program device updates the calibration code until its corresponding digit code is close to the reference digit code. The television demodulator of claim 6, wherein the analog-to-digital converter (ADC) is an analog-to-digital converter (SARADC) that is a step-by-step approximation register. The television demodulator of claim 6, further comprising a first switch coupled between the reference voltage generating circuit and the analog-to-digital converter (ADC) for selecting the reference voltage The analogy is fed to the analog to digital converter (ADC) to obtain the reference digital code. The television demodulator of claim 9, further comprising a second switch coupled between the current digital to analog converter (IDAC) and the analog to digital converter (ADC), The output of the current digital to analog converter (IDAC) is selectively fed to the analog to digital converter (ADC) to obtain a corresponding digital code. The television demodulator of claim 10, wherein the calibration program means updates the calibration code based on the corresponding digital code. A method for calibrating an output of a demodulator, comprising: obtaining a reference digit code according to a reference voltage; sending a calibration code to a current digital to analog converter (IDAC); and applying the current digital to an analog converter (IDAC) The output is digitized to obtain a corresponding digit code; the digit code and the reference digit code are compared to produce a comparison output; and the calibration code is updated based on the comparison output. The output calibration method of the demodulator of claim 12, wherein the updating step updates the calibration code according to the comparison output until the corresponding digital code is adjacent to the reference digit code. The method of outputting a demodulator according to claim 12, wherein the reference voltage is a bandgap voltage. The output calibration method of the demodulator according to claim 12, wherein the digital code is obtained by digitizing an analog-to-digital converter (SARADC) of a progressive approximation register. The output calibration method of the demodulator according to claim 12, wherein the calibration code is sent out in small and large order.