TWI418977B - Overclock test method for core processors - Google Patents

Overclock test method for core processors Download PDF

Info

Publication number
TWI418977B
TWI418977B TW99145332A TW99145332A TWI418977B TW I418977 B TWI418977 B TW I418977B TW 99145332 A TW99145332 A TW 99145332A TW 99145332 A TW99145332 A TW 99145332A TW I418977 B TWI418977 B TW I418977B
Authority
TW
Taiwan
Prior art keywords
processors
core
test
logical
processor
Prior art date
Application number
TW99145332A
Other languages
Chinese (zh)
Other versions
TW201227274A (en
Inventor
Xing Hu
Chih Feng Chen
Original Assignee
Inventec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inventec Corp filed Critical Inventec Corp
Priority to TW99145332A priority Critical patent/TWI418977B/en
Publication of TW201227274A publication Critical patent/TW201227274A/en
Application granted granted Critical
Publication of TWI418977B publication Critical patent/TWI418977B/en

Links

Description

多核心處理器的超頻測試方法 Multi-core processor overclocking test method

本發明係關於一種多核心處理器的超頻測試方法,特別是一種能測試多種超頻等級的多核心處理器的超頻測試方法。 The present invention relates to an overclocking test method for a multi-core processor, and more particularly to an overclocking test method for a multi-core processor capable of testing multiple overclocking levels.

SpeedStep是英特爾(INTEL)處理器為節能設計的一種降頻技術,以往適用於筆記型電腦(notebook,NB)。其能使處理器在高、中、低等多個確定的頻率間切換;通常當用電池時頻率降的較低,而在用交流電源時恢復到較高頻的頻率甚至以全速運轉。而INTEL的Nehalem及Sandy Bridge系列處理器則為了在節能的基礎上提高效率,而在SpeedStep技術基礎上增加了超頻功能。Nehalem及Sandy Bridge系列的多核心處理器具有以高負荷之核心處理器的數量決定一最高超頻等級之超頻特性。也就是說,未負荷滿載之核心處理器的個數越多,已負荷滿載的核心處理器可超頻到的標稱頻率等級越高。此外,即使具有相同的核心處理器個數,不同型號的多核心處理器也可能對應不同的最高超頻等級。因此在負荷滿載的核心處理器個數較少時,其可超頻至相當高的頻 率等級。 SpeedStep is a frequency-down technology designed by Intel (INTEL) processor for energy saving. It used to be suitable for notebooks (NB). It enables the processor to switch between multiple defined frequencies, high, medium, and low; typically, the frequency drop is lower when the battery is used, and even to the higher frequency when the AC power is used. INTEL's Nehalem and Sandy Bridge series processors have added overclocking capabilities to SpeedStep technology in order to improve efficiency on the basis of energy saving. The multi-core processors of the Nehalem and Sandy Bridge series have overclocking characteristics that determine the highest overclocking level based on the number of high-load core processors. That is, the more core processors that are not fully loaded, the higher the nominal frequency level that the fully loaded core processor can overclock to. In addition, even with the same number of core processors, different models of multi-core processors may correspond to different highest overclocking levels. Therefore, when the number of core processors with full load is small, it can be overclocked to a relatively high frequency. Rate level.

Nehalem處理器在超頻狀態下設置一個暫存器(register)為狀態暫存器,以記錄處理器的運轉速率。但是狀態暫存器的最大值是處理器的標稱頻率等級再加1,因此透過狀態暫存器也只能得之處理器是否處於低頻、高頻或是超頻之狀態。換句話說,即使能了解處理器是處於超頻狀態,亦無法確定處於哪個頻率等級。因此傳統測試超頻的方法無法測試覆蓋所有可能的超頻等級。 The Nehalem processor sets a register to the status register in the overclocked state to record the operating speed of the processor. However, the maximum value of the state register is the processor's nominal frequency level plus one, so the state register can only be obtained whether the processor is in the low frequency, high frequency or overclocking state. In other words, even if you know that the processor is in an overclocked state, you cannot determine which frequency level it is in. Therefore, the traditional method of overclocking cannot be tested to cover all possible overclocking levels.

此外,傳統測試超頻的方法受系統影響較大,無法保證測試的成功率。如果系統的後臺空閒時,系統會利用SpeedStep功能並強制令處理器以閒置速度(Idle,即較低速度)運行。此時測試超頻的程序可能會隨機地發生因為與系統衝突(系統要求以低速運行,但測試程序要求高速運行)而得到錯誤的測試結果,影響測試準確度。 In addition, the traditional method of overclocking is greatly affected by the system, and the success rate of the test cannot be guaranteed. If the system's background is idle, the system uses the SpeedStep feature and forces the processor to run at idle speed (Idle). At this point, the program that tests overclocking may occur randomly due to a conflict with the system (the system requires running at a low speed, but the test program requires high speed operation) to get the wrong test result, which affects the test accuracy.

為了解決上述問題,於此提出一種多核心處理器的超頻測試方法;其適用於測試多個核心處理器,其中這些核心處理器具有相同的一標稱頻率等級。多核心處理器的超頻測試方法包括:選取所有的核心處理器中的i個核心處理器作為i個測試處理器,其中i為大於0的正整數,且i小於或等於所有的核心處理器的個數;依據所有的核心處理器的個數、i值以及標稱頻率等級計算一指定頻率等級;產生i個壓 力執行緒,並將i個壓力執行緒與i個測試處理器綁定,以利用i個壓力執行緒個別對i個測試處理器加壓;當i個測試處理器的頻率等級都達到指定頻率等級,且以尚未以該指定頻率等級測試過所有的該些核心處理器時,重新選取新的i個核心處理器作為新的i個測試處理器,其中新的i個測試處理器包括尚未以對應i的指定頻率等級測試過的至少一個核心處理器;以及重複上述步驟直到以指定頻率等級測試過所有的核心處理器。 In order to solve the above problems, an overclocking test method for a multi-core processor is proposed herein; it is suitable for testing a plurality of core processors, wherein the core processors have the same nominal frequency level. The overclocking test method of the multi-core processor includes: selecting i core processors among all core processors as i test processors, where i is a positive integer greater than 0, and i is less than or equal to all core processors Number; calculate a specified frequency level based on the number of all core processors, the i value, and the nominal frequency level; generate i voltages Force thread, and bind i pressure threads to i test processors to pressurize i test processors individually using i pressure threads; when the frequency levels of i test processors reach the specified frequency Level, and when all of the core processors have not been tested at the specified frequency level, re-select the new i core processors as the new i test processors, where the new i test processors include At least one core processor tested corresponding to the specified frequency level of i; and repeating the above steps until all core processors have been tested at the specified frequency level.

於一實施範例,其中i的起始值等於1。多核心處理器的超頻測試方法另可包括:以1遞增i值;以及對應遞增的i值重複測試核心處理器,直到i值等於所有的核心處理器的個數,以利用對應遞增的i值的指定頻率等級測試所有的核心處理器。 In an embodiment, where the starting value of i is equal to one. The overclocking test method of the multi-core processor may further include: incrementing the i value by 1; and repeating the test of the core processor corresponding to the incremented i value until the value of i is equal to the number of all core processors to utilize the corresponding incremented i value Test all core processors at the specified frequency level.

於另一實施範例,其中i的起始值等於所有的核心處理器的個數。多核心處理器的超頻測試方法則可另包括:以1遞減i值;以及對應遞減的i值重複測試核心處理器,直到i值等於1,以利用對應遞減的i值的指定頻率等級測試所有的核心處理器。 In another embodiment, where the starting value of i is equal to the number of all core processors. The overclocking test method of the multi-core processor may further include: decrementing the i value by 1; and repeating the test of the core processor with the corresponding decremented i value until the value of i is equal to 1, to test all of the specified frequency levels corresponding to the decremented i value. Core processor.

其中指定頻率等級可以是標稱頻率等級加上所有的核心處理器的個數再減去i。而多核心處理器的超頻測試方法另可包括:當i個測試處理器的頻率等級都達到指定頻率等級時,結束這i個壓力執行緒。 The specified frequency level can be the nominal frequency level plus the number of all core processors minus i. The overclocking test method of the multi-core processor may further include: ending the i pressure threads when the frequency levels of the i test processors all reach the specified frequency level.

此外,根據一實施範例,其中每一個核心處理器對應於兩個邏輯處理器。而「選取所有的核心處理器中的i個該核心處理器作為i個測試處理器,其中i為大於0的正整數,且i小於或等於所有的核心處理器的個數」的步驟可包括:依序給予所有的邏輯處理器一邏輯編號;以及選取邏輯處理器中的i個邏輯處理器作為i個測試處理器,其中被選取的每一個邏輯處理器的邏輯編號為偶數。 Moreover, according to an embodiment, each of the core processors corresponds to two logical processors. And "selecting all of the core processors in the core processor as i test processors, where i is a positive integer greater than 0, and i is less than or equal to the number of all core processors" may include : All logical processors are given a logical number; and i logical processors in the logical processor are selected as i test processors, wherein the logical number of each logical processor selected is an even number.

根據另一實施範例,其中每一個核心處理器對應於兩個邏輯處理器。而「選取所有的核心處理器中的i個該核心處理器作為i個測試處理器,其中i為大於0的正整數,且i小於或等於所有的核心處理器的個數」的步驟可包括:依序給予所有的邏輯處理器一邏輯編號;以及選取邏輯處理器中的i個邏輯處理器作為i個測試處理器,其中被選取的每一個邏輯處理器的邏輯編號為奇數。 According to another embodiment, each core processor corresponds to two logical processors. And "selecting all of the core processors in the core processor as i test processors, where i is a positive integer greater than 0, and i is less than or equal to the number of all core processors" may include : All logical processors are assigned a logical number; and i logical processors in the logical processor are selected as i test processors, wherein the logical number of each logical processor selected is an odd number.

綜上所述,多核心處理器的超頻測試方法計算可能達到的指定頻率等級,並利用綁定的i個壓力執行緒個別對i個測試處理器加壓。因此多核心處理器的超頻測試方法不會被SpeedStep功能干擾,還能使超頻的頻率等級之測試覆蓋率達到100%。 In summary, the multi-core processor overclocking test method calculates the specified frequency level that can be reached, and uses the bound i pressure threads to individually pressurize the i test processors. Therefore, the multi-core processor overclocking test method will not be interfered by the SpeedStep function, and the test coverage of the overclocked frequency level will be 100%.

20‧‧‧多核心處理器 20‧‧‧Multicore processor

22,22a-d‧‧‧核心處理器 22,22a-d‧‧‧ core processor

24,24a-h‧‧‧邏輯處理器 24,24a-h‧‧‧Logical Processor

30‧‧‧主執行緒 30‧‧‧Master Thread

32‧‧‧壓力執行緒 32‧‧‧Pressure Threads

第1圖係為一實施範例之核心處理器之示意圖。 Figure 1 is a schematic diagram of a core processor of an embodiment.

第2圖係為一實施範例之多核心處理器的超頻測試方法之流程圖。 Figure 2 is a flow chart of an overclocking test method for a multi-core processor of an embodiment.

第3圖係為一實施範例之壓力執行緒之示意圖。 Figure 3 is a schematic diagram of a pressure thread of an embodiment.

第4A圖係為另一實施範例之多核心處理器的超頻測試方法之流程圖。 4A is a flow chart of an overclocking test method for a multi-core processor of another embodiment.

第4B圖係為又一實施範例之多核心處理器的超頻測試方法之流程圖。 4B is a flow chart of an overclocking test method for a multi-core processor of still another embodiment.

第5圖係為一實施範例之邏輯處理器之示意圖。 Figure 5 is a schematic diagram of a logical processor of an embodiment.

以下在實施方式中詳細敘述本發明之詳細特徵以及優點,其內容足以使任何熟習相關技藝者了解本發明之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。 The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art.

本發明係關於一種多核心處理器的超頻測試方法,其適用於測試多個核心處理器。請參照「第1圖」,其係為一實施範例之核心處理器之示意圖。多核心處理器20可以是英特爾(INTEL)的Nehalem及Sandy Bridge系列的處理器,其包括多個核心處理器22。 The present invention relates to an overclocking test method for a multi-core processor that is suitable for testing multiple core processors. Please refer to "FIG. 1", which is a schematic diagram of a core processor of an embodiment. The multi-core processor 20 may be a processor of the Nehalem and Sandy Bridge series of Intel (INTEL), which includes a plurality of core processors 22.

以下以型號為「Intel(R)Xeon(R)CPU E7520@1.87GHz」之處理器為多核心處理器20的例子,然而本方法亦可應用於其他不同型號或是具有不同核心個數的多核心處理器20。 The following example uses the processor of the type "Intel(R)Xeon(R) CPU E7520@1.87GHz" as the multi-core processor 20. However, the method can also be applied to other different models or with different core numbers. Core processor 20.

「Intel(R)Xeon(R)CPU E7520@1.87GHz」之多核心處理器20包括4個核心處理器22a、22b、22c以及22d(實 際的內建編號可為0~3),且每一個核心處理器22具有相同的一標稱頻率等級。核心處理器22的標稱頻率(又稱為標稱速度)為1.87十億赫茲(GHz),而其外頻為133百萬赫茲(MHz)。由於核心處理器22的速度為頻率等級乘以外頻,因此可知標稱頻率等級為1.87÷0.133=14。 The multi-core processor 20 of "Intel(R)Xeon(R) CPU E7520@1.87GHz" includes four core processors 22a, 22b, 22c and 22d (real The built-in numbers can be 0~3), and each core processor 22 has the same nominal frequency level. The nominal frequency of the core processor 22 (also known as the nominal speed) is 1.87 billion hertz (GHz) and its external frequency is 133 megahertz (MHz). Since the speed of the core processor 22 is frequency-frequency multiplied by an external frequency, it can be seen that the nominal frequency level is 1.87 ÷ 0.133 = 14.

此外,Nehalem及Sandy Bridge系列的多核心處理器20具有以高負荷之核心處理器22的數量決定一最高超頻等級之超頻特性。根據一實施範例,已負荷滿載的核心處理器22可超頻到標稱頻率等級加上未負荷滿載之核心處理器22的個數。但實際上最高標稱頻率的計算方式可以有所不同,本發明並不對其進行限制。 In addition, the multi-core processor 20 of the Nehalem and Sandy Bridge series has an overclocking characteristic that determines the highest overclocking level by the number of high-load core processors 22. According to an embodiment, the fully loaded core processor 22 can be overclocked to a nominal frequency level plus the number of core processors 22 that are not fully loaded. However, the calculation of the highest nominal frequency may be different, and the invention is not limited thereto.

例如當多核心處理器20中只有核心處理器22a在負荷滿載的情況下運行時,核心處理器22a的最高超頻等級為17。而當核心處理器22a以及22b在負荷滿載的情況下運行時,核心處理器22a以及22b的最高超頻等級為16。當所有的核心處理器22都負荷滿載時,這些核心處理器22的最高超頻等級僅能是標稱頻率等級。 For example, when only the core processor 22a of the multi-core processor 20 is operating with full load, the core processor 22a has a highest overclocking level of 17. When core processors 22a and 22b are operating with full load, core processors 22a and 22b have a maximum overclocking level of 16. When all of the core processors 22 are fully loaded, the highest overclocking level of these core processors 22 can only be the nominal frequency level.

由上述超頻特性可見,在負荷滿載的核心處理器22個數較少時,其可超頻至相當高的頻率等級。為了測試是否每個核心處理器22都具備了足夠的超頻能力,故提出了此多核心處理器的超頻測試方法。 It can be seen from the above overclocking characteristics that when the number of core processors 22 with full load is small, it can be overclocked to a relatively high frequency level. In order to test whether each core processor 22 has sufficient overclocking capability, an overclocking test method for this multi-core processor is proposed.

請參照「第2圖」,其係為一實施範例之多核心 處理器的超頻測試方法之流程圖。多核心處理器的超頻測試方法可被時作為一主執行緒(thread),且主執行緒可產生至少一壓力執行緒以測試核心執行緒。 Please refer to "Figure 2", which is a multi-core of an implementation example. Flowchart of the overclocking test method of the processor. The multi-core processor overclocking test method can be used as a main thread, and the main thread can generate at least one stress thread to test the core thread.

主執行緒首先選取所有的核心處理器22中的i個核心處理器22作為i個測試處理器(步驟S110),以測試這i個測試處理器。多核心處理器的超頻測試方法可同時測試被選取的i個測試處理器,其中i為大於0的正整數,且i小於或等於所有的核心處理器22的個數。因此於此實施範例中,1≦i≦4。 The main thread first selects i core processors 22 of all the core processors 22 as i test processors (step S110) to test the i test processors. The overclocking test method of the multi-core processor can simultaneously test the selected i test processors, where i is a positive integer greater than 0, and i is less than or equal to the number of all core processors 22. Therefore, in this embodiment, 1≦i≦4.

接著依據所有的核心處理器22的個數、i值以及標稱頻率等級計算一指定頻率等級(步驟S120)。由於超頻特性係與高負荷之核心處理器22的數量有關,因此不同的i值會對應到不同的指定頻率等級。根據一實施範例,指定頻率等級等於標稱頻率加上所有的核心處理器22的個數再減去i。但實際上指定頻率等級的指定方式可以依實際需求調整,本發明並不對其進行限制。例如當i等於1時,指定頻率等級為17;而當i等於2時,指定頻率等級為16。此外,由於外頻為133MHz,當i等於1時,指定頻率為2.26GHz;而當i等於2時,指定頻率為2.13GHz。 A specified frequency level is then calculated based on the number of all core processors 22, the i value, and the nominal frequency level (step S120). Since the overclocking characteristics are related to the number of high load core processors 22, different i values will correspond to different specified frequency levels. According to an embodiment, the specified frequency level is equal to the nominal frequency plus the number of all core processors 22 minus i. However, the specified manner of specifying the frequency level can be adjusted according to actual needs, and the present invention does not limit it. For example, when i is equal to 1, the specified frequency level is 17; and when i is equal to 2, the specified frequency level is 16. Further, since the FSB is 133 MHz, when i is equal to 1, the specified frequency is 2.26 GHz; and when i is equal to 2, the specified frequency is 2.13 GHz.

得到指定頻率等級後,主執行緒產生i個壓力執行緒,並將i個壓力執行緒與i個測試處理器綁定(步驟S130),以利用i個壓力執行緒個別對i個測試處理器加壓。 當測試環境為視窗(Windows)系統時,可使用微軟(Microsoft)提供的MS應用程式介面(MS application program interface,MS API)中的「SetThreadAffinityMask」函式(function)將壓力執行緒與測試處理器綁定。而當試環境為Linux系統時,可使用系統API中的「sched_setaffinity」函式將壓力執行緒與測試處理器綁定。而壓力執行緒的內容可以例如是計算圓週率或是不斷執行處理器內部的SIMD,以大量佔用測試處理器的資源,而使測試處理器變成負荷滿載的狀態。 After the specified frequency level is obtained, the main thread generates i pressure threads, and binds the i pressure threads to the i test processors (step S130) to utilize i pressure threads to individually test the i test processors. Pressurize. When the test environment is a Windows (Windows) system, you can use the "SetThreadAffinityMask" function in the MS application program interface (MS API) provided by Microsoft to connect the stress thread to the test processor. Bind. When the test environment is a Linux system, you can use the "sched_setaffinity" function in the system API to bind the stress thread to the test processor. The content of the stress thread can be, for example, calculating the pi or continuously executing the SIMD inside the processor to occupy a large amount of resources of the test processor, and the test processor becomes a state of full load.

主執行緒利用這i個壓力執行緒對i個測試處理器加壓的同時,不斷偵測這i個測試處理器目前的頻率等級,並判斷是否i個測試處理器的頻率等級都達到指定頻率等級(步驟S140)。 The main thread uses the i pressure threads to pressurize the i test processors, continuously detects the current frequency level of the i test processors, and determines whether the frequency levels of the i test processors reach the specified frequency. Level (step S140).

在超頻狀態下,偵測核心處理器22目前的頻率等級的方法簡單舉例如下。清零欲偵測頻率等級之核心處理器22的IA32_MPERF暫存器(Rs),並記錄起始點時間戳記計數(Time Stamp Counter,TSC,Ts)。讀取IA32_MPERF暫存器(Re),並記錄結束點TSC。將結束點的IA32_MPERF暫存器的值除以起始點與結束點TSC的差值可得到目前的頻率,再除以外頻便可得到目前的頻率等級。 A simple example of a method of detecting the current frequency level of the core processor 22 in the overclocked state is as follows. The IA32_MPERF register (Rs) of the core processor 22 whose frequency level is to be detected is cleared, and the time stamp counter (TSC, Ts) is recorded. Read the IA32_MPERF register (Re) and record the end point TSC. The current frequency is obtained by dividing the value of the IA32_MPERF register at the end point by the difference between the start point and the end point TSC, and then the current frequency level is obtained by dividing the external frequency.

每一個核心處理器22都具有自己的IA32_MPERF暫存器,其定義為「Maximum Performance Frequency Clock Count」,故此暫存器是個計數器。其中Rs是 表示將暫存器的值清零之後的結果,也就是「零」的值。而Re則為結束時此暫存器的值。 Each core processor 22 has its own IA32_MPERF register, which is defined as "Maximum Performance Frequency Clock Count", so the register is a counter. Where Rs is Indicates the result of clearing the value of the scratchpad, which is the value of "zero". And Re is the value of this register at the end.

若在一特定時間內無法都達到指定頻率等級,則代表測試失敗,並可結束此測試。而當所有的i個測試處理器的頻率等級都達到指定頻率等級時,表示這i個測試處理器都能夠順利地超頻到指定頻率等級。主執行緒並判斷是否以指定頻率等級測試過所有的核心處理器22(步驟S150),若是,則可結束此次測試。而若多核心處理器20中尚有未以此指定頻率等級測試過的核心處理器22,則重新選取新的i個核心處理器22作為新的i個測試處理器(步驟S160)。其中新的i個測試處理器包括至少一個尚未以對應i的指定頻率等級測試過的核心處理器22。主執行緒並重複上述步驟直到以指定頻率等級測試過所有的核心處理器22。 If the specified frequency level cannot be reached within a certain time, it means the test failed and the test can be ended. When the frequency levels of all the i test processors reach the specified frequency level, it means that the i test processors can smoothly overclock to the specified frequency level. The master thread determines whether all core processors 22 have been tested at the specified frequency level (step S150), and if so, the test can be ended. If there are still core processors 22 in the multi-core processor 20 that have not been tested at the specified frequency level, the new i core processors 22 are reselected as the new i test processors (step S160). The new i test processors include at least one core processor 22 that has not been tested at the specified frequency level corresponding to i. The main thread repeats the above steps until all core processors 22 have been tested at the specified frequency level.

舉例而言,當i等於1時,主執行緒可依照核心處理器22a、22b、22c以及22d的順序以17之指定頻率等級逐一進行測試。當i等於2時,主執行緒則可依照核心處理器22a與22b,以及22c與22d的順序以16之指定頻率等級,分兩次對所有的核心處理器22進行測試。 For example, when i is equal to 1, the main thread can be tested one by one at a specified frequency level of 17 in accordance with the order of the core processors 22a, 22b, 22c, and 22d. When i is equal to 2, the master thread can test all of the core processors 22 twice in the order of the core processors 22a and 22b, and 22c and 22d at a specified frequency level of 16.

請參照「第3圖」,其係為一實施範例之壓力執行緒之示意圖。主執行緒30可應測試需要產生i個壓力執行緒32,以「第3圖」為例,主執行緒30於步驟S130產生3個壓力執行緒32,並分別將其與3個測試處理器綁定。而當 在步驟S140確認這3個測試處理的測試結果後,主執行緒30便結束這i個壓力執行緒32。換句話說,這i個測試處理器的頻率等級都達到指定頻率等級時,或是在特定期間內有任何的測試處理器的頻率等級無法達到指定頻率等級時,主執行緒30令所有的壓力執行緒32終止。 Please refer to "3rd figure", which is a schematic diagram of the pressure thread of an embodiment. The main thread 30 can generate i pressure threads 32 according to the test. Taking "FIG. 3" as an example, the main thread 30 generates three pressure threads 32 in step S130, and respectively, and three test processors. Bind. And when After confirming the test results of the three test processes in step S140, the main thread 30 ends the i pressure threads 32. In other words, when the frequency level of the i test processors reaches the specified frequency level, or when the frequency level of any test processor cannot reach the specified frequency level within a certain period of time, the main thread 30 makes all the pressure. The thread 32 is terminated.

為了能夠完整地以超頻的各個指定頻率等級測試多核心處理器20,多核心處理器的超頻測試方法並可改變i的值,並以對應於不同i值之指定頻率等級進行測試。請參照「第4A圖」以及「第4B圖」,其分別為不同實施範例之多核心處理器的超頻測試方法之流程圖。 In order to be able to fully test the multi-core processor 20 at each of the specified frequency levels of overclocking, the multi-core processor overclocking test method can change the value of i and test at a specified frequency level corresponding to a different value of i. Please refer to "4A" and "4B", which are flowcharts of overclocking test methods for multi-core processors of different embodiments.

主執行緒30可先初始化i等於1(步驟S100)或是所有的核心處理器22的個數(步驟S101)。以對應i的初始值的指定頻率等級成功測試所有的核心處理器22之後,主執行緒30可以1遞增(步驟S170)或遞減(步驟S171)i值,並回到步驟S110以新的i值繼續測試。例如可以以1、2、3以及4之i值的順序,以17、16、15、14之指定頻率等級進行測試;亦可以相反的順序或任意順序進行測試。且主執行緒並可確認「i是否大於所有的核心處理器22的個數」(步驟S180)或「i是否小於1」(步驟S181)等邊界條件,以判斷是否所有的核心處理器22已經完成針對各種可能的超頻情況的測試。 The main thread 30 may first initialize i equal to 1 (step S100) or the number of all core processors 22 (step S101). After successfully testing all of the core processors 22 at a specified frequency level corresponding to the initial value of i, the master thread 30 may increment (step S170) or decrement (step S171) the value of i, and return to step S110 with a new value of i. Continue testing. For example, the test may be performed at the specified frequency levels of 17, 16, 15, and 14 in the order of the values of 1, 2, 3, and 4; the test may be performed in the reverse order or in any order. And the main thread can confirm whether "i is greater than the number of all core processors 22" (step S180) or "i is less than 1" (step S181) and other boundary conditions to determine whether all core processors 22 have Complete testing for all possible overclocking situations.

此外,多核心處理器的超頻測試方法亦可針對開 啟超執行緒(Hyper-Threading,HT)功能的多核心處理器20。Intel的超執行緒技術主要是將同步多執行緒的概念導入Intel處理器架構中,實現執行緒的平行處理。此技術可讓單一個實體的核心處理器22設置為兩個邏輯處理器(logic processor,亦稱為虛擬處理器),並讓對應於同一個核心處理器22的兩個邏輯處理器共享一組處理器執行資源。因此單一個核心處理器22能同時處理兩組不同的工作,充分利用以往閒置的資源,使整體效能更上一層樓。簡單來說,Intel超執行緒技術將單一個核心處理器22當做兩個邏輯(或虛擬)處理器來使用;雖然電腦中只有一顆實體的處理器,但卻能同時執行兩個執行緒。 In addition, multi-core processor overclocking test methods can also be targeted A multi-core processor 20 that functions as a Hyper-Threading (HT). Intel's hyper-threading technology mainly introduces the concept of synchronous multi-thread into the Intel processor architecture to realize parallel processing of threads. This technique allows a single entity core processor 22 to be configured as two logical processors (also referred to as virtual processors) and to share a set of two logical processors corresponding to the same core processor 22. The processor executes resources. Therefore, a single core processor 22 can simultaneously handle two different sets of work, making full use of the idle resources in the past, so that the overall performance is further improved. In simple terms, Intel Hyper-Threading Technology uses a single core processor 22 as two logical (or virtual) processors; although there is only one physical processor in the computer, it can execute two threads simultaneously.

請參照「第5圖」,其係為一實施範例之邏輯處理器之示意圖。對於開啟超執行緒功能的多核心處理器20,原先的4個核心處理器22a、22b、22c以及22d化為邏輯處理器24a、24b、24c、24d、24e、24f、24g以及24h。這些邏輯處理器24實際上的內建編號可為0~7,並倆倆對應一個核心處理器22。例如邏輯處理器24a與24b都對應於核心處理器22a,邏輯處理器24c與24d都對應於核心處理器22b。 Please refer to FIG. 5, which is a schematic diagram of a logical processor of an embodiment. For the multi-core processor 20 that turns on the hyper-thread function, the original four core processors 22a, 22b, 22c, and 22d are turned into logical processors 24a, 24b, 24c, 24d, 24e, 24f, 24g, and 24h. These logical processors 24 may have a built-in number of 0-7, and the two correspond to a core processor 22. For example, both logical processors 24a and 24b correspond to core processor 22a, and logical processors 24c and 24d both correspond to core processor 22b.

而多核心處理器的超頻測試方法另可包括:依序給予所有的邏輯處理器24一邏輯編號;以及選取邏輯處理器24中的i個邏輯處理器24該作為i個測試處理器,其中被選取的每一個邏輯處理器24的邏輯編號為偶數。多核心處理器 的超頻測試方法亦可包括:依序給予所有的邏輯處理器24邏輯編號;以及選取邏輯處理器24中的i個邏輯處理器24該作為i個測試處理器,其中被選取的每一個邏輯處理器24的邏輯編號為奇數。 The overclocking test method of the multi-core processor may further include: sequentially assigning all logical processors 24 a logical number; and selecting i logical processors 24 in the logical processor 24 as the i test processors, wherein The logical number of each logical processor 24 selected is an even number. Multi-core processor The overclocking test method may also include: sequentially assigning all logical processors 24 logical numbers; and selecting i logical processors 24 in the logical processor 24 as i test processors, wherein each of the selected logical processes The logical number of the device 24 is an odd number.

由於邏輯編號同為奇數或同為偶數的邏輯處理器24一定是對應於不同的核心處理器22,因此這種選擇的方法能夠正確地選擇測試處理器。但是主執行緒30亦可在步驟S110中選擇對應於相同核心處理器22的兩個邏輯處理器24。若對應於相同核心處理器22的兩個邏輯處理器24都被選取作為測試處理器,則更可對此核心處理器22施加測試壓力。唯在步驟S120計算指定頻率等級時需配合進行調整。例如當i等於4但選擇的測試處理器為邏輯處理器24a、24b、24c以及24d時,由於實際上只有核心處理器22a以及22b被選取,因此指定頻率等級應為16而非14。 Since the logical processor 24, which has an odd number or an even number, must correspond to a different core processor 22, this method of selection enables the correct selection of the test processor. However, the master thread 30 can also select two logical processors 24 corresponding to the same core processor 22 in step S110. If both logical processors 24 corresponding to the same core processor 22 are selected as test processors, then test pressure can be applied to the core processor 22. Only when the specified frequency level is calculated in step S120, adjustment is required. For example, when i is equal to 4 but the selected test processors are logical processors 24a, 24b, 24c, and 24d, since only core processors 22a and 22b are actually selected, the specified frequency level should be 16 instead of 14.

綜上所述,多核心處理器的超頻測試方法依據核心處理器的總個數、標稱頻率等級以及測試處理器的個數計算指定頻率等級,並利用綁定的i個壓力執行緒個別對i個測試處理器加壓。因此多核心處理器的超頻測試方法不會被SpeedStep功能干擾,而能夠正確地對測試處理器加壓。此外,藉由監測每一個測試處理器是否達到不同的指定頻率等級,能使超頻的頻率等級之測試覆蓋率達到100%。也就是說,對於每一個核心處理器,所有可能的超頻的頻率等級都能被測 試到。 In summary, the overclocking test method of the multi-core processor calculates the specified frequency level according to the total number of core processors, the nominal frequency level, and the number of test processors, and utilizes the bundled i pressure threads to perform individual pairs. i test processors are pressurized. Therefore, the overclocking test method of the multi-core processor is not interfered by the SpeedStep function, and the test processor can be properly pressurized. In addition, by monitoring whether each test processor reaches a different specified frequency level, the test coverage of the overclocked frequency level can be 100%. In other words, for each core processor, all possible overclocked frequency levels can be measured. Try it.

以上較佳具體實施範例之詳述,是希望藉此更加清楚描述本發明之特徵與精神,並非以上述揭露的較佳具體實施範例對本發明之範疇加以限制。相反地,其目的是希望將各種改變及具相等性的安排涵蓋於本發明所欲申請之專利範圍的範疇內。 The above detailed description of the preferred embodiments of the present invention is intended to provide a further understanding of the scope of the invention. On the contrary, the intention is to cover various modifications and equivalent arrangements within the scope of the invention as claimed.

Claims (7)

一種多核心處理器的超頻測試方法,適用於測試多個核心處理器,該些核心處理器具有相同的一標稱頻率等級,該多核心處理器的超頻測試方法包括:選取所有的該些核心處理器中的i個該核心處理器作為i個測試處理器,其中i為大於0的正整數,且i小於或等於所有的該些核心處理器的個數;依據該些核心處理器的個數、i值以及該標稱頻率等級計算一指定頻率等級;產生i個壓力執行緒,並將該i個壓力執行緒與該i個測試處理器綁定,以利用該i個壓力執行緒個別對該i個測試處理器加壓;當該i個測試處理器的頻率等級都達到該指定頻率等級,且尚未以該指定頻率等級測試過所有的該些核心處理器時,重新選取新的該i個核心處理器作為新的該i個測試處理器,其中新的該i個測試處理器包括尚未以對應i的該指定頻率等級測試過的至少一該核心處理器;以及重複上述步驟直到以該指定頻率等級測試過所有的該些核心處理器。 An overclocking test method for a multi-core processor, which is suitable for testing a plurality of core processors having the same nominal frequency level, and the overclocking test method of the multi-core processor includes: selecting all of the cores i of the core processor in the processor as i test processors, where i is a positive integer greater than 0, and i is less than or equal to the number of all of the core processors; according to the core processors The number, the i value, and the nominal frequency level calculate a specified frequency level; generating i pressure threads and binding the i pressure threads to the i test processors to utilize the i pressure threads individually Pressurizing the i test processors; when the frequency levels of the i test processors reach the specified frequency level, and all of the core processors have not been tested at the specified frequency level, the new one is reselected. i core processors as the new one of the test processors, wherein the new one of the test processors includes at least one of the core processors that have not been tested at the specified frequency level corresponding to i; Repeat the above steps until all of the core processors have been tested at the specified frequency level. 如請求項第1項所述之多核心處理器的超頻測試方法,其中i等於1,且該多核心處理器的超頻測試方法另包括:以1遞增i值;以及對應遞增的i值重複測試該些核心處理器,直到i值等於該些核 心處理器的個數,以利用對應遞增的i值的該指定頻率等級測試所有的該些核心處理器。 The overclocking test method of the multi-core processor of claim 1, wherein i is equal to 1, and the overclocking test method of the multi-core processor further comprises: incrementing an i value by 1; and repeating the test corresponding to the incremented i value The core processors until the value of i is equal to the cores The number of heart processors to test all of the core processors with the specified frequency level corresponding to the incremented i value. 如請求項第1項所述之多核心處理器的超頻測試方法,其中i等於該些核心處理器的個數,且該多核心處理器的超頻測試方法另包括:以1遞減i值;以及對應遞減的i值重複測試該些核心處理器,直到i值等於1,以利用對應遞減的i值的該指定頻率等級測試所有的該些核心處理器。 The overclocking test method of the multi-core processor of claim 1, wherein i is equal to the number of the core processors, and the overclocking test method of the multi-core processor further comprises: decrementing the value of i by 1; The core processors are repeatedly tested for decreasing i values until the i value is equal to one to test all of the core processors with the specified frequency level corresponding to the decreasing i value. 如請求項第1項所述之多核心處理器的超頻測試方法,其中該指定頻率等級等於該標稱頻率等級加上該些核心處理器的個數再減去i。 The overclocking test method of the multi-core processor of claim 1, wherein the specified frequency level is equal to the nominal frequency level plus the number of core processors minus i. 如請求項第1項所述之多核心處理器的超頻測試方法,另包括:當該i個測試處理器的頻率等級都達到該指定頻率等級時,結束該i個壓力執行緒。 The overclocking test method of the multi-core processor of claim 1, further comprising: ending the i pressure threads when the frequency levels of the i test processors all reach the specified frequency level. 如請求項第1項所述之多核心處理器的超頻測試方法,其中每一該核心處理器對應於兩個邏輯處理器,而該選取所有的該些核心處理器中的i個該核心處理器作為該i個測試處理器,其中i為大於0的正整數,且i小於或等於所有的該些核心處理器的個數的步驟包括:依序給予所有的該些邏輯處理器一邏輯編號;以及選取所有的該些邏輯處理器中的i個該邏輯處理器作為該i個測試處理器,其中被選取的每一該邏輯處理器的該邏輯編號為偶數。 An overclocking test method for a multi-core processor according to claim 1, wherein each of the core processors corresponds to two logical processors, and wherein all of the core processors of the core processors are selected As the i test processors, where i is a positive integer greater than 0, and i is less than or equal to all of the number of core processors includes: sequentially assigning all of the logical processors a logical number And selecting all one of the logical processors as the i test processors, wherein the logical number of each of the selected logical processors is an even number. 如請求項第1項所述之多核心處理器的超頻測試方法,其中每一該核心處理器對應於兩個邏輯處理器,而該選取所有的該些核心處理器中的i個該核心處理器作為該i個測試處理器,其中i為大於0的 正整數,且i小於或等於所有的該些核心處理器的個數的步驟包括:依序給予所有的該些邏輯處理器一邏輯編號;以及選取所有的該些邏輯處理器中的i個該邏輯處理器作為該i個測試處理器,其中被選取的每一該邏輯處理器的該邏輯編號為奇數。 An overclocking test method for a multi-core processor according to claim 1, wherein each of the core processors corresponds to two logical processors, and wherein all of the core processors of the core processors are selected As the i test processors, where i is greater than 0 a positive integer, and i is less than or equal to all of the number of core processors: sequentially assigning all of the logical processors a logical number; and selecting all of the one of the logical processors The logical processor acts as the i test processors, wherein the logical number of each of the logical processors selected is an odd number.
TW99145332A 2010-12-22 2010-12-22 Overclock test method for core processors TWI418977B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW99145332A TWI418977B (en) 2010-12-22 2010-12-22 Overclock test method for core processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW99145332A TWI418977B (en) 2010-12-22 2010-12-22 Overclock test method for core processors

Publications (2)

Publication Number Publication Date
TW201227274A TW201227274A (en) 2012-07-01
TWI418977B true TWI418977B (en) 2013-12-11

Family

ID=46933165

Family Applications (1)

Application Number Title Priority Date Filing Date
TW99145332A TWI418977B (en) 2010-12-22 2010-12-22 Overclock test method for core processors

Country Status (1)

Country Link
TW (1) TWI418977B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI547900B (en) * 2014-04-11 2016-09-01 技嘉科技股份有限公司 Frequency control system for a display card and the method thereof
CN109669827B (en) * 2018-12-14 2021-10-29 郑州云海信息技术有限公司 Automatic test method for BIOS module TurboMode function

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200722957A (en) * 2005-12-02 2007-06-16 Hon Hai Prec Ind Co Ltd System and method for controlling over clocking of a CPU
US20090094437A1 (en) * 2007-10-07 2009-04-09 Masahiro Fukuda Method And Device For Controlling Multicore Processor
TW201039092A (en) * 2009-04-30 2010-11-01 Asustek Comp Inc Method for overclock of CPU and overclock control application program

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200722957A (en) * 2005-12-02 2007-06-16 Hon Hai Prec Ind Co Ltd System and method for controlling over clocking of a CPU
US20090094437A1 (en) * 2007-10-07 2009-04-09 Masahiro Fukuda Method And Device For Controlling Multicore Processor
TW201039092A (en) * 2009-04-30 2010-11-01 Asustek Comp Inc Method for overclock of CPU and overclock control application program

Also Published As

Publication number Publication date
TW201227274A (en) 2012-07-01

Similar Documents

Publication Publication Date Title
Jiao et al. Improving GPGPU energy-efficiency through concurrent kernel execution and DVFS
EP2466460B1 (en) Compiling apparatus and method for a multicore device
JP5988444B2 (en) Method for testing an optimized binary module, computer for testing the optimized binary module, and computer program therefor
US20110283286A1 (en) Methods and systems for dynamically adjusting performance states of a processor
EP2790106A2 (en) Performance measurement unit, processor core including the same and process profiling method
JP2006285350A (en) Charging processor for smt processor, charging processing method and charging processing program
JP6825449B2 (en) Information processing equipment, test programs and test methods
TWI418977B (en) Overclock test method for core processors
Lawson et al. Energy evaluation for applications with different thread affinities on the Intel Xeon Phi
Sundriyal et al. Modeling of the CPU frequency to minimize energy consumption in parallel applications
Sundriyal et al. Initial investigation of a scheme to use instantaneous CPU power consumption for energy savings format
Sawalha et al. Energy-efficient phase-aware scheduling for heterogeneous multicore processors
US20190250919A1 (en) Method for managing computation tasks on a functionally asymmetric multi-core processor
Krampe et al. A hybrid markov chain model for workload on parallel computers
Mochocki et al. Practical on-line dvs scheduling for fixed-priority real-time systems
EP2418582A2 (en) Apparatus and method for thread progress tracking using deterministic progress index
Child et al. Using DVFS to optimize time warp simulations
CN111782454B (en) Fine-grained GPDSP power consumption testing method, system and medium based on instruction EPI
US9690616B2 (en) Based on natural load determination either adjust processor sleep time or generate artificial load
CN102479135B (en) Overclocking test method for multiple core processors
CN103718158B (en) Multicomputer system
CN103914121B (en) Multicomputer system and method and device for optimizing power consumption of same
CN108038029B (en) CPU frequency conversion capability detection method and device
Antolak et al. Validation of task scheduling techniques in multithread time predictable systems
US8468405B2 (en) Integrated circuit testing

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees