TWI412928B - 伺機的分頁放大 - Google Patents

伺機的分頁放大 Download PDF

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Publication number
TWI412928B
TWI412928B TW098134956A TW98134956A TWI412928B TW I412928 B TWI412928 B TW I412928B TW 098134956 A TW098134956 A TW 098134956A TW 98134956 A TW98134956 A TW 98134956A TW I412928 B TWI412928 B TW I412928B
Authority
TW
Taiwan
Prior art keywords
page table
page
memory
physical memory
items
Prior art date
Application number
TW098134956A
Other languages
English (en)
Chinese (zh)
Other versions
TW201022939A (en
Inventor
Forrest C Foltz
David N Cutler
Original Assignee
Microsoft Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp filed Critical Microsoft Corp
Publication of TW201022939A publication Critical patent/TW201022939A/zh
Application granted granted Critical
Publication of TWI412928B publication Critical patent/TWI412928B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/50—Control mechanisms for virtual memory, cache or TLB
    • G06F2212/502—Control mechanisms for virtual memory, cache or TLB using adaptive policy
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/651—Multi-level translation tables
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/652—Page size control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
  • Document Processing Apparatus (AREA)
TW098134956A 2008-10-23 2009-10-15 伺機的分頁放大 TWI412928B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/257,091 US8024546B2 (en) 2008-10-23 2008-10-23 Opportunistic page largification

Publications (2)

Publication Number Publication Date
TW201022939A TW201022939A (en) 2010-06-16
TWI412928B true TWI412928B (zh) 2013-10-21

Family

ID=42118616

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098134956A TWI412928B (zh) 2008-10-23 2009-10-15 伺機的分頁放大

Country Status (11)

Country Link
US (1) US8024546B2 (enExample)
EP (1) EP2350833B1 (enExample)
JP (1) JP5646498B2 (enExample)
KR (1) KR101645753B1 (enExample)
CN (1) CN102197380B (enExample)
AU (1) AU2009308007B2 (enExample)
BR (1) BRPI0919075B1 (enExample)
CA (1) CA2736035C (enExample)
RU (1) RU2509347C2 (enExample)
TW (1) TWI412928B (enExample)
WO (1) WO2010047918A2 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102460400B (zh) * 2009-06-29 2014-09-24 惠普开发有限公司 基于管理程序的本地和远程虚拟内存页面管理
US8661213B2 (en) 2010-01-06 2014-02-25 Vmware, Inc. Method and system for frequent checkpointing
US8533382B2 (en) * 2010-01-06 2013-09-10 Vmware, Inc. Method and system for frequent checkpointing
US8549241B2 (en) * 2010-01-06 2013-10-01 Vmware, Inc. Method and system for frequent checkpointing
US8364932B2 (en) * 2010-10-29 2013-01-29 Vmware, Inc. System and method to prioritize large memory page allocation in virtualized systems
US8683169B2 (en) 2011-05-05 2014-03-25 International Business Machines Corporation Selecting an auxiliary storage medium for writing data of real storage pages
US8793444B2 (en) * 2011-05-05 2014-07-29 International Business Machines Corporation Managing large page memory pools
US8656133B2 (en) 2011-05-05 2014-02-18 International Business Machines Corporation Managing storage extents and the obtaining of storage blocks within the extents
US8799611B2 (en) 2011-05-05 2014-08-05 International Business Machines Corporation Managing allocation of memory pages
US8832411B2 (en) 2011-12-14 2014-09-09 Microsoft Corporation Working set swapping using a sequentially ordered swap file
US8868876B2 (en) 2011-12-28 2014-10-21 International Business Machines Corporation Dedicated large page memory pools
US9058268B1 (en) 2012-09-20 2015-06-16 Matrox Graphics Inc. Apparatus, system and method for memory management
US9658775B2 (en) * 2014-10-06 2017-05-23 Vmware, Inc. Adjusting page sharing scan rates based on estimation of page sharing opportunities within large pages
US9619401B2 (en) * 2015-02-20 2017-04-11 Wisconsin Alumni Research Foundation Efficient memory management system for computers supporting virtual machines
US9632924B2 (en) 2015-03-02 2017-04-25 Microsoft Technology Licensing, Llc Using memory compression to reduce memory commit charge
US9658792B2 (en) * 2015-06-11 2017-05-23 International Business Machines Corporation Reserving a storage area and building page frame table entries
US11249968B2 (en) * 2016-05-09 2022-02-15 Sap Se Large object containers with size criteria for storing mid-sized large objects

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US6523104B2 (en) * 2001-07-13 2003-02-18 Mips Technologies, Inc. Mechanism for programmable modification of memory mapping granularity
US6715057B1 (en) * 2000-08-31 2004-03-30 Hewlett-Packard Development Company, L.P. Efficient translation lookaside buffer miss processing in computer systems with a large range of page sizes
US20040117594A1 (en) * 2002-12-13 2004-06-17 Vanderspek Julius Memory management method
US20050097298A1 (en) * 2003-10-30 2005-05-05 Cohen Ernest S. Shadow page tables for address translation control
US20060288187A1 (en) * 2005-06-16 2006-12-21 International Business Machines Corporation Method and mechanism for efficiently creating large virtual memory pages in a multiple page size environment
TW200707192A (en) * 2005-03-17 2007-02-16 Qualcomm Inc Method and system for optimizing translation lookaside buffer entries

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EP0506236A1 (en) 1991-03-13 1992-09-30 International Business Machines Corporation Address translation mechanism
JPH10301848A (ja) * 1997-04-28 1998-11-13 Hitachi Ltd 多重ページサイズを有する仮想記憶装置
US6182089B1 (en) 1997-09-23 2001-01-30 Silicon Graphics, Inc. Method, system and computer program product for dynamically allocating large memory pages of different sizes
US6112285A (en) 1997-09-23 2000-08-29 Silicon Graphics, Inc. Method, system and computer program product for virtual memory support for managing translation look aside buffers with multiple page size support
US6760805B2 (en) 2001-09-05 2004-07-06 M-Systems Flash Disk Pioneers Ltd. Flash management system for large page size
US6751159B2 (en) 2001-10-26 2004-06-15 Micron Technology, Inc. Memory device operable in either a high-power, full-page size mode or a low-power, reduced-page size mode
GB2381886B (en) * 2001-11-07 2004-06-23 Sun Microsystems Inc Computer system with virtual memory and paging mechanism
US7085889B2 (en) * 2002-03-22 2006-08-01 Intel Corporation Use of a context identifier in a cache memory
US7243208B2 (en) 2003-08-13 2007-07-10 Renesas Technology Corp. Data processor and IP module for data processor
US20060253682A1 (en) * 2005-05-05 2006-11-09 International Business Machines Corporation Managing computer memory in a computing environment with dynamic logical partitioning
US7395406B2 (en) 2005-05-12 2008-07-01 International Business Machines Corporation System and method of large page handling in a virtual memory system
US7353361B2 (en) * 2005-06-06 2008-04-01 International Business Machines Corporation Page replacement policy for systems having multiple page sizes
US7475183B2 (en) 2005-12-12 2009-01-06 Microsoft Corporation Large page optimizations in a virtual machine environment
US7827381B2 (en) * 2006-06-05 2010-11-02 Oracle America, Inc. Hybrid techniques for memory virtualization in a computer system
US7917710B2 (en) * 2006-06-05 2011-03-29 Oracle America, Inc. Memory protection in a computer system employing memory virtualization
US7752417B2 (en) * 2006-06-05 2010-07-06 Oracle America, Inc. Dynamic selection of memory virtualization techniques

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6715057B1 (en) * 2000-08-31 2004-03-30 Hewlett-Packard Development Company, L.P. Efficient translation lookaside buffer miss processing in computer systems with a large range of page sizes
US6523104B2 (en) * 2001-07-13 2003-02-18 Mips Technologies, Inc. Mechanism for programmable modification of memory mapping granularity
US20040117594A1 (en) * 2002-12-13 2004-06-17 Vanderspek Julius Memory management method
US20050097298A1 (en) * 2003-10-30 2005-05-05 Cohen Ernest S. Shadow page tables for address translation control
TW200707192A (en) * 2005-03-17 2007-02-16 Qualcomm Inc Method and system for optimizing translation lookaside buffer entries
US20060288187A1 (en) * 2005-06-16 2006-12-21 International Business Machines Corporation Method and mechanism for efficiently creating large virtual memory pages in a multiple page size environment

Also Published As

Publication number Publication date
CA2736035C (en) 2016-07-05
CN102197380A (zh) 2011-09-21
WO2010047918A3 (en) 2010-06-17
KR20110085989A (ko) 2011-07-27
JP5646498B2 (ja) 2014-12-24
US20100106930A1 (en) 2010-04-29
EP2350833A2 (en) 2011-08-03
RU2509347C2 (ru) 2014-03-10
CA2736035A1 (en) 2010-04-29
JP2012507071A (ja) 2012-03-22
EP2350833A4 (en) 2012-04-25
HK1160944A1 (en) 2012-08-17
AU2009308007A1 (en) 2010-04-29
CN102197380B (zh) 2012-12-19
EP2350833B1 (en) 2013-11-06
BRPI0919075A2 (pt) 2015-12-15
KR101645753B1 (ko) 2016-08-04
TW201022939A (en) 2010-06-16
US8024546B2 (en) 2011-09-20
AU2009308007B2 (en) 2014-05-15
WO2010047918A2 (en) 2010-04-29
RU2011116188A (ru) 2012-10-27
BRPI0919075B1 (pt) 2019-12-24

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MM4A Annulment or lapse of patent due to non-payment of fees