TWI389437B - A power supply with improved light load efficiency - Google Patents
A power supply with improved light load efficiency Download PDFInfo
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- TWI389437B TWI389437B TW098114648A TW98114648A TWI389437B TW I389437 B TWI389437 B TW I389437B TW 098114648 A TW098114648 A TW 098114648A TW 98114648 A TW98114648 A TW 98114648A TW I389437 B TWI389437 B TW I389437B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Description
本發明有關於一種諧振轉換器,尤指一種採用功率因數修正器之輸出電壓動態追隨輸入電壓,並具有自動切換功率因數修正器之開關以降低切換頻率之轉換器。The invention relates to a resonant converter, in particular to a converter which uses an output voltage of a power factor corrector to dynamically follow an input voltage and has a switch for automatically switching a power factor corrector to reduce a switching frequency.
如第一圖所示,習知兩級式電源供應器,係為在前級的功率因數修正器1後再加一級諧振轉換器2,功率因數修正器1為了擁有廣域輸入下均能實現功率因數修正的功能,即使操作在低壓輸入下,其輸出電壓仍高於輸入最大交流電壓的峰值。以峰值電流控制法所實現之功率因數修正器之開關切換頻率與輸出電壓成正比之特性。若將功率因數修正器之輸出電壓定為高壓,除了功率因數修正器本身的開關切換頻率增加外,後級串連諧振轉換器的切換頻率也必須提升來維持後級穩壓的功能。在輸出負載不足以使後級轉換器開關零切換的條件下,高切換頻率導致之損耗使整體效率降低。As shown in the first figure, the conventional two-stage power supply is to add a first-order resonant converter 2 after the power factor corrector 1 of the preceding stage, and the power factor corrector 1 can be realized in order to have a wide-area input. The power factor correction function, even when operating at low voltage input, is still higher than the peak value of the input maximum AC voltage. The switching frequency of the power factor corrector implemented by the peak current control method is proportional to the output voltage. If the output voltage of the power factor corrector is set to a high voltage, in addition to the increase of the switching frequency of the power factor corrector itself, the switching frequency of the subsequent series resonant converter must also be increased to maintain the function of the post-stage voltage regulation. Under the condition that the output load is insufficient to make the converter of the latter converter switch to zero, the loss caused by the high switching frequency reduces the overall efficiency.
由於功率因數修正器的電流取樣訊號在高壓輸入條件下欠佳,導致功率因數修正器無法正確修正電流波形若要改善此狀況必須增加升壓電感量或增加電流取樣電阻,但都必須付出更多損耗且改善效果不彰。Since the current sampling signal of the power factor corrector is not good under high voltage input conditions, the power factor corrector cannot correct the current waveform correctly. To improve this condition, the boost inductor or the current sampling resistor must be increased, but all must pay more. Loss and improvement are not effective.
本發明所欲解決的技術問題,在於提供一種改善輕載效率之電源供應器,以解決習知輕載時切換頻率過高造成切換損失之問題。因此本發明之目的係降低串聯諧振轉換器於輕載時的切換頻率,並且易於柔性切換,且當輕載不需考慮功率因數(PF)值時,將功率因數修正器關閉,以改善輕載效率。The technical problem to be solved by the present invention is to provide a power supply device for improving light load efficiency, which solves the problem of switching loss caused by excessive switching frequency at a light load. Therefore, the object of the present invention is to reduce the switching frequency of the series resonant converter at light load, and to facilitate flexible switching, and to turn off the power factor corrector when the light load does not need to consider the power factor (PF) value to improve the light load. effectiveness.
有鑑於此,本發明提供一種改善輕載效率之電源供應器,結合功率因數修正器(PFC)與串聯諧振轉換器(SRC),藉由一控制電路設計於電路中,達到功率因數修正器之輸出電壓動態追隨輸入電壓,使後級串聯諧振轉換器具有柔性切換的特性,以提昇功率因數修正器以及串聯諧振轉換器的轉換效率。In view of this, the present invention provides a power supply device for improving light load efficiency, which is combined with a power factor corrector (PFC) and a series resonant converter (SRC), and is designed in a circuit by a control circuit to achieve a power factor corrector. The output voltage dynamically follows the input voltage, making the post-stage series resonant converter flexible switching characteristics to improve the conversion efficiency of the power factor corrector and the series resonant converter.
為了解決上述技術問題,本發明之一技術方案係提供一種改善輕載效率之電源供應器,其係包括一第一整流電路、一功率因數修正器、一串聯諧振轉換器、一控制電路及一驅動電路,其中該第一整流電路用以全波整流輸入之交流電源;而其中該功率因數修正器與該第一整流電路耦接,提供一穩定之直流電壓;而其中該串聯諧振轉換器與該功率因數修正器耦接,用以提供直流/直流轉換;而其中該控制電路與該功率因數修正器耦接,用以根據該功率因數修正器之輸入電壓及該串聯諧振轉換器之輸出電流之大小,產生一切換訊號,並可隨該控制電路之輸入電壓調整該功率因數修正器之輸出電壓;而其中該驅動電路與該控制電路耦接,用以接收該切換訊號並控制功率因數修正器之開關。In order to solve the above technical problem, one technical solution of the present invention provides a power supply device for improving light load efficiency, which comprises a first rectifying circuit, a power factor corrector, a series resonant converter, a control circuit and a a driving circuit, wherein the first rectifying circuit is used for full-wave rectifying the input AC power; wherein the power factor corrector is coupled to the first rectifying circuit to provide a stable DC voltage; wherein the series resonant converter The power factor corrector is coupled to provide a DC/DC conversion; wherein the control circuit is coupled to the power factor corrector for determining an input voltage of the power factor corrector and an output current of the series resonant converter The size of the switching signal is generated, and the output voltage of the power factor corrector is adjusted according to the input voltage of the control circuit; wherein the driving circuit is coupled to the control circuit for receiving the switching signal and controlling the power factor correction Switch.
當市電之交流電源高壓輸入(230V)且輸出負載小於75W,則關閉該功率因數修正器,以降低該串聯諧振轉換器之切換頻率及提升整機效率。When the AC power supply high voltage input (230V) of the mains and the output load is less than 75W, the power factor corrector is turned off to reduce the switching frequency of the series resonant converter and improve the overall efficiency.
藉此,透過控制電路根據該功率因數修正器之輸入電壓及該串聯諧振轉換器之輸出電流大小切換功率因數修正器之開關,以降低後級SRC轉換器之開關切換頻率,且後級SRC轉換器因輸入電壓僅為輸入電壓的峰值電壓並無提升電壓之動作,為維持功率平衡下SRC之輸入電流增加,使開關得以達到柔性切換。因而達到改善輕載效率之目的。Thereby, the switching of the power factor corrector is switched by the control circuit according to the input voltage of the power factor corrector and the output current of the series resonant converter to reduce the switching frequency of the switching of the SRC converter of the latter stage, and the SRC conversion of the subsequent stage Because the input voltage is only the peak voltage of the input voltage, there is no action of boosting the voltage. In order to maintain the power supply, the input current of the SRC increases, so that the switch can achieve flexible switching. Therefore, the purpose of improving light load efficiency is achieved.
以上的概述與接下來的詳細說明皆為示範性質,是為了進一步說明本發明的申請專利範圍。而有關本發明的其他目的與優點,將在後續的說明與圖示加以闡述。The above summary and the following detailed description are exemplary in order to further illustrate the scope of the claims. Other objects and advantages of the present invention will be described in the following description and drawings.
本發明係以一控制電路設計於一功率因數修正器與一串聯諧振轉換器之間,提供切換功率因數修正器動作之開關,且使該功率因數修正器之輸出電壓隨交流電源之輸入電壓改變,使該串聯諧振轉換器在低電壓輸入條件下,降低後級轉換器開關之切換頻率,並增加後級的輸入電流量,使開關得以達到柔性切換效果,改善輕載效率。為了提供更詳盡的說明與解釋,以下將配合方塊圖及示意圖針對本發明進行解說,以便更為明確而清楚地揭露本發明所使用的技術及手段,以彰顯本發明所具有的優點及其所能達成的功效。The invention is designed with a control circuit between a power factor corrector and a series resonant converter, providing a switch for switching the power factor corrector action, and changing the output voltage of the power factor corrector with the input voltage of the alternating current power source. The series resonant converter reduces the switching frequency of the switching converter of the latter stage under the condition of low voltage input, and increases the input current amount of the latter stage, so that the switch can achieve the flexible switching effect and improve the light load efficiency. The present invention will be described with reference to the accompanying drawings and drawings, in order to illustrate the embodiments of the invention The effect that can be achieved.
請參考第二圖,為本發明所提供的一種改善輕載效率之電源供應器之一實施例之電路圖。如第二圖所示,本發明之改善輕載效率之轉換器,其包括有一第一整流電路10、一功率因數修正器20、一串聯諧振轉換器40、一控制電路50及一驅動電路30。其中第一整流電路10與一交流電源耦接;而功率因數修正器20與第一整流電路10耦接;而串聯諧振轉換器40與功率因數修正器20耦接;而控制電路50分別與功率因數修正器20之輸入端x、功率因數修正器20之輸出端y、串聯諧振轉換器40之輸出端p、q耦接;而驅動電路30其ZCD端與該控制電路50耦接,其另一端z與功率因數修正器20耦接。Please refer to the second figure, which is a circuit diagram of an embodiment of a power supply for improving light load efficiency provided by the present invention. As shown in the second figure, the converter for improving light load efficiency of the present invention comprises a first rectifying circuit 10, a power factor corrector 20, a series resonant converter 40, a control circuit 50 and a driving circuit 30. . The first rectifier circuit 10 is coupled to an AC power source; the power factor modifier 20 is coupled to the first rectifier circuit 10; and the series resonant converter 40 is coupled to the power factor modifier 20; and the control circuit 50 is coupled to the power The input terminal x of the factor corrector 20, the output terminal y of the power factor corrector 20, and the output terminals p, q of the series resonant converter 40 are coupled; and the ZCD terminal of the driving circuit 30 is coupled to the control circuit 50, and the other One end z is coupled to the power factor corrector 20.
其中第一整流電路10包括複數二極體Da 、Db 、Dc 、Dd ,用以全波整流輸入之交流電源;其中功率因數修正器20包括一第一儲能電路201、一第一開關電路202,而第一儲能電路201與第一整流電路10耦接,用以儲存或釋放能量,而第一開關電路202與該第一儲能電路201耦接,用以切換電流之導通或截止;其中串聯諧振轉換器40包括一第二開關電路401、一諧振電路402、一變壓器403、一第二整流電路404及一第二儲能電路405,而第二開關電路401與功率因數修正器20耦接,用以切換電流之導通或截止,而諧振電路402與第二開關電路401耦接,用以產生諧振,使第二開關電路401交互導通,達到零電壓切換條件,而變壓器403與諧振電路402耦接,用以將諧振電路402之電流感應至下一級電路,而第二整流電路404與變壓器403耦接,用以整流變壓器403所感應之電流,而第二儲能電路405與第二整流電路404耦接,用以儲存或釋放能量。The first rectifier circuit 10 includes a plurality of diodes D a , D b , D c , D d , and is used for full-wave rectified input AC power; wherein the power factor corrector 20 includes a first energy storage circuit 201 , The first switching circuit 202 is coupled to the first rectifying circuit 10 for storing or releasing energy, and the first switching circuit 202 is coupled to the first energy storage circuit 201 for switching current. Turning on or off; wherein the series resonant converter 40 includes a second switch circuit 401, a resonant circuit 402, a transformer 403, a second rectifier circuit 404, and a second tank circuit 405, and the second switch circuit 401 and The power factor corrector 20 is coupled to switch the current on or off, and the resonant circuit 402 is coupled to the second switch circuit 401 for generating a resonance, and the second switch circuit 401 is mutually turned on to achieve a zero voltage switching condition. The transformer 403 is coupled to the resonant circuit 402 for sensing the current of the resonant circuit 402 to the next stage circuit, and the second rectifying circuit 404 is coupled to the transformer 403 for rectifying the current induced by the transformer 403, and the second storage Energy 405 and 404 is coupled to second rectifier circuit, to store or release energy.
其中第一儲能電路201包括一電容Cin 及一電感L1 ,而第一開關電路202包括一功率開關電晶體SW1 及一二極體De 。The first energy storage circuit 201 includes a capacitor C in and an inductor L 1 , and the first switch circuit 202 includes a power switch transistor SW 1 and a diode D e .
其中第二開關電路401包括功率開關電晶體SW2 、SW3 ;而諧振電路402包括一電感L2 、一電容Cb 及一激磁電感Lm ;而變壓器403包括一次側線圈Np 及二次側線圈Ns ;而第二整流電路404為同步整流電路,其包括功率開關電晶體SW4 、SW5 ,用以確保串聯諧振轉換器40在死區時間內,避免變壓器403之二次側線圈Ns 之能量反灌回一次側線圈Np ;而第二儲能電路405包括一電容Co 。The second switch circuit 401 includes power switch transistors SW 2 and SW 3 ; and the resonant circuit 402 includes an inductor L 2 , a capacitor C b and a magnetizing inductance L m ; and the transformer 403 includes a primary side coil N p and a second The side coil N s ; and the second rectifying circuit 404 is a synchronous rectifying circuit including power switching transistors SW 4 , SW 5 for ensuring that the series resonant converter 40 avoids the secondary side coil of the transformer 403 during the dead time. The energy of N s is reversed back to the primary side coil N p ; and the second tank circuit 405 includes a capacitor C o .
另外,串聯諧振轉換器40之輸出端更包括一檢測電阻Ro ,用以提供負載之電流檢測。In addition, the output of the series resonant converter 40 further includes a sense resistor R o for providing current detection of the load.
請參考第三圖,為本發明所提供的一種改善輕載效率之轉換器之控制電路之一實施例之方塊圖。如第三圖所示,本發明之改善輕載效率之轉換器,其控制電路50包括一濾波電路501、一電壓隨耦器502、一調節回授分壓電路503、一第一比較器504、一誤差放大器505、一第二比較器506、一訊號隔離電路507、一邏輯電路508、一防彈跳電路509及一訊號開關電路510。Please refer to the third figure, which is a block diagram of an embodiment of a control circuit for a converter for improving light load efficiency. As shown in the third figure, the control circuit 50 of the present invention for improving light load efficiency includes a filter circuit 501, a voltage follower 502, an adjustment feedback voltage dividing circuit 503, and a first comparator. 504, an error amplifier 505, a second comparator 506, a signal isolation circuit 507, a logic circuit 508, a bounce circuit 509 and a signal switch circuit 510.
請配合參考第二圖,其中濾波電路501與功率因數修正器20之輸入端x耦接,而電壓隨耦器502與濾波電路501耦接,而調節回授分壓電路503分別與電壓隨耦器502及功率因數修正器20之輸出端y耦接,而第一比較器504與調節回授分壓電路503耦接,而誤差放大器505與串聯諧振轉換器40之輸出端上之檢測電阻Ro 兩端p、q耦接,而第二比較器506與誤差放大器505耦接,訊號隔離電路507與第二比較器506耦接,而邏輯電路508分別與第一比較器504及訊號隔離電路507耦接,而防彈跳電路509與邏輯電路508耦接,而訊號開關電路510與防彈跳電路509耦接。Please refer to the second figure, wherein the filter circuit 501 is coupled to the input terminal x of the power factor corrector 20, and the voltage follower 502 is coupled to the filter circuit 501, and the feedback feedback voltage divider 503 is respectively associated with the voltage. The coupler 502 and the output terminal y of the power factor corrector 20 are coupled, and the first comparator 504 is coupled to the regulated feedback voltage divider circuit 503, and the error amplifier 505 and the output of the series resonant converter 40 are coupled. both ends of the resistor R o p, q coupling, and the second comparator 506 is coupled to the error amplifier 505, the signal isolation circuit 507 is coupled to a second comparator 506, and the logic circuit 508, respectively, the first comparator 504 and the signal The isolation circuit 507 is coupled, and the bounce circuit 509 is coupled to the logic circuit 508, and the signal switch circuit 510 is coupled to the bounce circuit 509.
請參考第四圖,為本發明所提供的一種改善輕載效率之電源供應器之控制電路之一實施例之電路圖。如第四圖所示,本發明之改善輕載效率之轉換器,其中濾波電路501包括電容Cm1 、Cm2 ,用以對全波整流後之交流電壓Vm 作直流取樣,並取得一取樣訊號;而電壓隨耦器502係為一運算放大器Op1 ,其非反相輸入端與濾波電路501耦接,其反相輸入端與其輸出端耦接,使其輸出電壓與輸入電壓相同,用以提供隔離來防止負載效應;而調節回授分壓電路503包括電阻R2 、Radj1 、一穩壓器TL431及一電晶體Q1 ,其中電阻R2 、Radj1 與電壓隨耦器502之輸出端耦接,用以根據該取樣訊號提供一參考分壓Vref ,而穩壓器TL431其參考端R接收參考分壓Vref ,且其正極端A與電阻Radj1 耦接,其負極端K提供一輸入電壓取樣訊號Vin_SG ,而電晶體Q1 與穩壓器TL431之負極端K耦接,並接收一回授電壓訊號Vfb ,該回授電壓訊號Vfb 為功率因數修正器20之輸出電壓分壓,藉由該穩壓器TL431使輸入電壓取樣訊號Vin_SG 符合,當輸入電壓取樣訊號Vin_SG 升高時,電晶體Q1 之等效電阻(Rds-on)變小,回授電壓訊號Vfb 降低,由於負回授的機制必須將回授電壓訊號Vfb 重新調整為2.5V,所以功率因數修正器20之輸出電壓會上升,達到升壓的功能,反之亦然,因此功率因數修正器20之輸出電壓追隨該取樣訊號。Please refer to the fourth figure, which is a circuit diagram of an embodiment of a control circuit for improving a light load efficiency power supply according to the present invention. As shown in the fourth figure, the converter for improving light load efficiency of the present invention, wherein the filter circuit 501 includes capacitors C m1 , C m2 for DC sampling of the full-wave rectified AC voltage V m and obtaining a sampling The voltage follower 502 is an operational amplifier Op1 , the non-inverting input is coupled to the filter circuit 501, and the inverting input is coupled to its output terminal so that the output voltage is the same as the input voltage. To provide isolation to prevent load effects; and adjust the feedback voltage dividing circuit 503 to include resistors R 2 , R adj1 , a voltage regulator TL431 and a transistor Q 1 , wherein the resistors R 2 , R adj1 and the voltage follower 502 The output end is coupled to provide a reference voltage divider V ref according to the sampling signal, and the voltage regulator TL431 receives the reference voltage divider V ref at the reference terminal R thereof, and the positive terminal A thereof is coupled to the resistor R adj1 , and the negative terminal thereof is coupled to the resistor R adj1 . terminal K to provide a sampled input voltage signal V in_SG, the transistor Q 1 and the negative terminal of the TL431 regulator is coupled to K, and receives a feedback voltage V fb signal, the feedback voltage V fb signal power factor corrector 20 output voltage divided by the regulator TL431 Sampling the voltage signal V in_SG accord When the input voltage sampling signal V in_SG rises, the equivalent resistance (Rds-on) of the transistor Q 1 becomes smaller, and the feedback voltage signal V fb decreases. Since the negative feedback mechanism must return the voltage signal V fb The voltage is re-adjusted to 2.5V, so the output voltage of the power factor corrector 20 rises to the boost function, and vice versa, so the output voltage of the power factor corrector 20 follows the sampled signal.
而第一比較器504係為一磁滯比較器,其包括一運算放大器Op2 及電阻R3 、Radj3 ,其中運算放大器Op2 之反相端輸入一參考電壓Vin_ref ,其非反相輸入端經由電阻R3 取得輸入電壓取樣訊號Vin_SG ,且其非反相輸入端經由電阻Radj3 與其輸出端耦接,用以根據參考電壓Vin_ref 所設定之電壓大小(225V~230V)與該輸入電壓取樣訊號Vin_SG 作比較後,產生一輸入電壓判斷命令Vin_SGout 。The first comparator 504 is a hysteresis comparator system, which comprises an operational amplifier O p2 and the resistor R 3, R adj3, wherein the inverting terminal of the operational amplifier O p2 input a reference voltage V in_ref, its non-inverting input The terminal obtains the input voltage sampling signal V in_SG via the resistor R 3 , and the non-inverting input terminal thereof is coupled to the output terminal thereof via the resistor R adj3 for the voltage magnitude (225V~230V) set according to the reference voltage V in_ref and the input. After the voltage sampling signal V in_SG is compared, an input voltage determination command V in_SGout is generated .
復參考第四圖,其中誤差放大器505包括一運算放大器Op3 ,其反相輸入端與非反相輸入端分別與檢測電阻Ro 兩端p、q耦接,用以將檢測電阻Ro 兩端之跨壓差作放大處理,產生一輸出電流取樣訊號Io_SG ;而第二比較器506係為一磁滯比較器,其包括一運算放大器Op4 及電阻R8 、Radj4 ,其中運算放大器Op4 之反相輸入端輸入一參考電流Io_ref ,其非反相輸入端經由電阻R8 取得輸出電流取樣訊號Io_SG 且經由電阻Radj4 與其輸出端耦接,用以根據該參考電流Io-ref 所設定之輸出電流之大小(4.2A~4.4A)與該輸出電流取樣訊號Io_SG 比較後,產生一第一輸出電流判斷命令Io_SGout ;而訊號隔離電路507係為一光耦合器PC817,其包括一發光二極體D1 及一雙載子接面電晶體Qp1 ,用以將第一輸出電流判斷命令Io_SGout 作訊號隔離,亦將本發明之改善輕載效率之轉換器之輸出與輸入作電氣隔離,並產生一第二輸出電流判斷命令Io_SGout2 。Referring to FIG fourth complex, wherein the error amplifier 505 comprises an operational amplifier O p3, its inverting input and the non-inverting input terminal, respectively, at both ends of the detection resistor R o p, q are coupled to the two detection resistor R o the differential pressure across the end of the amplification process for generating an output current sample signal I o_SG; second comparator 506 is a hysteresis comparator system, which comprises an operational amplifier O p4 and resistors R 8, R adj4, wherein the operational amplifier O p4 inverting input terminal of a reference input current I o_ref, its non-inverting input terminal of the sample signal to obtain an output current I o_SG via a resistor R 8 and via the resistor R adj4 its output coupled to the reference current I o the The magnitude of the output current set by -ref (4.2A~4.4A) is compared with the output current sampling signal Io_SG to generate a first output current determination command Io_SGout ; and the signal isolation circuit 507 is an optical coupler PC817. The method includes a light-emitting diode D 1 and a dual-carrier junction transistor Q p1 for isolating the first output current determination command I o_SGout , and also converting the light load efficiency converter of the present invention. Output and input for electrical Isolate and generate a second output current determination command I o_SGout2 .
而邏輯電路508係為一及閘,其包括二極體DA1 、DA2 ,其中二極體DA1 與第一比較器504之輸出端耦接,而二極體DA2 與訊號隔離電路507之雙載子接面電晶體Qp1 耦接,用以將輸入電壓判斷命令Vin_SGout 及第二輸出電流判斷命令Io_SGout2 作邏輯AND處理,產生一判斷訊號作為關閉功率因數修正器20之依據;而防彈跳電路509包括一雙載子接面電晶體Qp2 及一電容C4 ,其中雙載子接面電晶體Qp2 之基極端與邏輯電路508耦接,而電容C4 與雙載子接面電晶體Qp2 之射極端耦接,且該射極端耦接一定電壓源Vcc1 ,用以將該判斷訊號作防彈跳處理,避免電路誤動作,並產生一控制訊號Vc1 ;而訊號開關電路510包括一電晶體Q2 ,其閘極端與防彈跳電路509耦接,用以根據該控制訊號Vc1 來控制驅動電路30,進而使功率因數修正器20關閉或正常運作。The logic circuit 508 is a gate, which includes diodes DA 1 and DA 2 , wherein the diode DA 1 is coupled to the output end of the first comparator 504, and the diode DA 2 and the signal isolation circuit 507 are coupled. The bipolar junction transistor Q p1 is coupled to logically AND the input voltage determination command V in_SGout and the second output current determination command I o_SGout2 to generate a determination signal as a basis for turning off the power factor corrector 20; The bounce circuit 509 includes a dual carrier junction transistor Q p2 and a capacitor C 4 , wherein the base terminal of the bipolar junction transistor Q p2 is coupled to the logic circuit 508 , and the capacitor C 4 and the bicarrier The emitter of the junction transistor Q p2 is coupled to the emitter, and the emitter pole is coupled to a certain voltage source V cc1 for bounce processing of the determination signal to avoid circuit malfunction and generate a control signal V c1 ; and the signal switch The circuit 510 includes a transistor Q 2 having a gate terminal coupled to the bounce preventing circuit 509 for controlling the driving circuit 30 according to the control signal V c1 to turn off or operate the power factor corrector 20 .
請參考第五A圖及第五B圖,分別為本發明所提供的一種改善輕載效率之電源供應器之第一比較器及第二比較器之一實施例之電壓操作圖。如第五A及五B圖所示,當輸入電壓取樣訊號Vin_SG 大於高臨界電壓Vth 時,則輸入電壓判斷命令Vin_SGout 為高輸入電壓判斷命令Vin_h ,當輸入電壓取樣訊號Vin_SG 小於低臨界電壓Vt1 時,則輸入電壓判斷命令Vin_SGout 為低輸入電壓判斷命令Vin_1 ;當輸出電流取樣訊號Io_SG 大於高臨界電流Ith 時,則第一輸出電流判斷命令Io_SGout 為高輸出電流判斷命令Io_h ,當輸出電流取樣訊號Io_SG 小於低臨界電流It1 時,則第一輸入電壓判斷命令Io_SGout 為低輸入電壓判斷命令Io_1 。Please refer to FIG. 5A and FIG. 5B respectively for the voltage operation diagram of an embodiment of the first comparator and the second comparator for improving the light load efficiency of the power supply provided by the present invention. As shown in the fifth and fifth B diagrams, when the input voltage sampling signal V in — SG is greater than the high threshold voltage V th , the input voltage determination command V in — SGout is a high input voltage determination command V in — h when the input voltage sampling signal V in — SG is less than When the threshold voltage V t1 is low, the input voltage determination command V in_SGout is the low input voltage determination command V in_1 ; when the output current sampling signal I o — SG is greater than the high threshold current I th , the first output current determination command I o_SGout is the high output The current determination command I o_h , when the output current sampling signal I o_SG is less than the low critical current I t1 , the first input voltage determination command I o_SGout is the low input voltage determination command I o_1 .
接著參考第六圖,為本發明所提供的一種改善輕載效率之電源供應器之防彈跳操作時序圖。如第六圖所示並配合第四圖,當時間為t1 時,輸入電壓判斷命令Vin_SGout 為高輸入電壓判斷命令Vin_h 且第一輸出電流判斷命令Io_SGout 為高輸出電流判斷命令Io_h ,則雙載子接面電晶體Qp2 截止且電容C4 由定電壓源Vcc 充電,控制訊號Vc1 漸漸上升,直到電容C4 充電到穩態時,控制訊號Vc1 到達高位準,即電晶體之Q2 閘極為高位準,而電晶體Q2 之汲極端與接地之源極端導通,即ZCD端訊號拉地,則驅動電路30關閉功率因數修正器20;當時間為t2 時,輸入電壓判斷命令Vin_SGout 為低輸入電壓判斷命令Vin_1 ,而第一輸出電流判斷命令Io_SGout 仍為高輸出電流判斷命令Io_h ,則 雙載子接面電晶體Qp2 導通且電容C4 放電,控制訊號Vc1 降為低位準,即電晶體Q2 之閘極為低位準,而電晶體Q2 之汲極端與源極端不導通,則驅動電路30不影響功率因數修正器20,功率因數修正器20正常運作;同理,當第一輸出電流判斷命令Io_SGout 為低輸入電流判斷命令Io_1 ,而輸入電壓判斷命令Vin_SGout 為低輸入電壓判斷命令Vin_h 時,則雙載子接面電晶體Qp2 導通且電容C4 放電,控制訊號Vc1 降為低位準,即電晶體Q2 之閘極為低位準,而電晶體Q2 之汲極端與源極端不導通,則驅動電路30不影響功率因數修正器20,功率因數修正器20正常運作。Referring to the sixth figure, a timing chart of the bounce prevention operation of the power supply for improving light load efficiency is provided. As shown in the sixth figure and in conjunction with the fourth figure, when the time is t 1 , the input voltage determination command V in — SGout is the high input voltage determination command V in — h and the first output current determination command I o — SGout is the high output current determination command I o — h Then, the bipolar junction transistor Q p2 is turned off and the capacitor C 4 is charged by the constant voltage source V cc , and the control signal V c1 gradually rises until the capacitor C 4 is charged to the steady state, and the control signal V c1 reaches a high level, that is, The Q 2 gate of the transistor is extremely high, and the terminal of the transistor Q 2 is extremely conductive with the source of the ground, that is, the ZCD signal is pulled, the driving circuit 30 turns off the power factor corrector 20; when the time is t 2 , The input voltage determination command V in_SGout is the low input voltage determination command V in_1 , and the first output current determination command I o_SGout is still the high output current determination command I o — h , then the bipolar junction transistor Q p2 is turned on and the capacitor C 4 is discharged. The control signal V c1 is lowered to a low level, that is, the gate of the transistor Q 2 is extremely low, and the terminal of the transistor Q 2 is not electrically connected to the source terminal, the driving circuit 30 does not affect the power factor corrector 20, and the power factor correction is performed. 20 is normal Operation; similarly, when the first output current determination command I o_SGout is the low input current determination command I o_1 and the input voltage determination command V in_SGout is the low input voltage determination command V in_h , then the bipolar junction transistor Q p2 When the capacitor C 4 is discharged and the control signal V c1 is lowered to a low level, that is, the gate of the transistor Q 2 is extremely low, and the terminal of the transistor Q 2 is not conductive with the source terminal, the driving circuit 30 does not affect the power factor correction. The power factor corrector 20 operates normally.
綜上所述所列舉實施方式之作法,可知本發明係利用控制電路設計於功率因數修正器與串聯諧振轉換器之間,不僅使功率因數修正器之輸出電壓動態追隨其輸入電壓,更將功率因數修正器之輸入電壓與串聯諧振轉換器之輸出電流作邏輯判斷後,在輕載條件下關閉功率因數修正器,搭配同步整流式之串聯諧振轉換器,降低輕載的切換頻率,且易於柔性切換,達到提升輕載效率之目的。如此,本發明之改善輕載效率之轉換器可以解決傳統轉換器與輕載時切換頻率高造成切換損耗之問題。In summary, the present invention is constructed by using a control circuit between a power factor corrector and a series resonant converter, which not only causes the output voltage of the power factor corrector to dynamically follow its input voltage, but also the power. After the input voltage of the factor corrector and the output current of the series resonant converter are logically judged, the power factor corrector is turned off under light load conditions, and the synchronous rectification series resonant converter is used to reduce the switching frequency of the light load and is easy to be flexible. Switching to achieve the purpose of improving light load efficiency. In this way, the converter for improving light load efficiency of the present invention can solve the problem of switching loss caused by the high switching frequency of the conventional converter and the light load.
惟上述所揭露之圖示及說明,僅為本發明之實施例而已,然其並非用以限定本發明,任何熟習此技藝者,當可依據上述之說明做各種之更動與潤飾,如有其他符合本發明之精神與未實質改變本發明之技術手段者,皆屬本發明所涵蓋保護之範圍。The illustrations and descriptions disclosed above are only examples of the present invention, and are not intended to limit the present invention. Anyone skilled in the art can make various changes and retouching according to the above description, if other The spirit of the present invention and the technical means for not substantially changing the present invention are within the scope of protection covered by the present invention.
1...功率因數修正器1. . . Power factor corrector
2...諧振轉換器2. . . Resonant converter
10...第一整流電路10. . . First rectifier circuit
20...功率因數修正器20. . . Power factor corrector
201...第一儲能電路201. . . First energy storage circuit
202...第一開關電路202. . . First switching circuit
30...驅動電路30. . . Drive circuit
40...串聯諧振轉換器40. . . Series resonant converter
401...第二開關電路401. . . Second switching circuit
402...諧振電路402. . . Resonant circuit
403...變壓器403. . . transformer
404...第二整流電路404. . . Second rectifier circuit
405...第二儲能電路405. . . Second energy storage circuit
50...控制電路50. . . Control circuit
501...濾波電路501. . . Filter circuit
502...電壓隨耦器502. . . Voltage follower
503...調節回授分壓電路503. . . Adjusting feedback voltage divider circuit
504...第一比較器504. . . First comparator
505...誤差放大器505. . . Error amplifier
506...第二比較器506. . . Second comparator
507...訊號隔離電路507. . . Signal isolation circuit
508...邏輯電路508. . . Logic circuit
509...防彈跳電路509. . . Anti-bounce circuit
510...訊號開關電路510. . . Signal switching circuit
Da 、Db 、Dc 、Dd 、De 、DA1 、DA2 ...二極體D a , D b , D c , D d , D e , DA 1 , DA 2 . . . Dipole
Cin 、Ca 、Cb 、Co 、Cm1 、Cm2 、C4 ...電容C in , C a , C b , C o , C m1 , C m2 , C 4 . . . capacitance
L1 、L2 、Lm ...電感L 1 , L 2 , L m . . . inductance
Ro ...檢測電阻R o . . . Sense resistor
SW1 、SW2 、SW3 、SW4 、SW5 ...功率開關電晶體SW 1 , SW 2 , SW 3 , SW 4 , SW 5 . . . Power switch transistor
Np ...一次側線圈N p . . . Primary side coil
Ns ...二次側線圈N s . . . Secondary side coil
Op1 、Op2 、Op3 、Op4 ...運算放大器O p1 , O p2 , O p3 , O p4 . . . Operational Amplifier
R2 、Radj1 、R3 、Radj3 、R8 、Radj4 ...電阻R 2 , R adj1 , R 3 , R adj3 , R 8 , R adj4 . . . resistance
TL431...穩壓器TL431. . . Stabilizer
Q1 、Q2 ...電晶體Q 1 , Q 2 . . . Transistor
Vref ...參考分壓V ref . . . Reference partial pressure
Vin_SG ...輸入電壓取樣訊號V in_SG . . . Input voltage sampling signal
Vfb ...回授電壓訊號V fb . . . Feedback voltage signal
Vin_ref ...參考電壓V in_ref . . . Reference voltage
Vin_SGout ...輸入電壓判斷命令V in_SGout . . . Input voltage judgment command
Io_SG ...輸出電流取樣訊號I o_SG . . . Output current sampling signal
Io_ref ...參考電流I o_ref . . . Reference current
Io_SGout ...輸出電流判斷命令I o_SGout . . . Output current judgment command
Vcc1 、Vcc2 ...電壓源V cc1 , V cc2 . . . power source
PC817...光耦合器PC817. . . Optocoupler
D1 ...發光二極體D 1 . . . Light-emitting diode
Qp1 、Qp2 ...雙載子接面電晶體Q p1 , Q p2 . . . Double carrier junction transistor
Vc1 ...控制訊號V c1 . . . Control signal
Vth 、Vt1 ...臨界電壓V th , V t1 . . . Threshold voltage
Vin_h ...高輸入電壓判斷命令V in_h . . . High input voltage judgment command
Io_h ...高輸出電流判斷命令I o_h . . . High output current judgment command
Vin_1 ...低輸入電壓判斷命令V in_1 . . . Low input voltage judgment command
Io_1 ...低輸出電流判斷命令I o_1 . . . Low output current judgment command
第一圖為習知電源轉換器之方塊圖;The first figure is a block diagram of a conventional power converter;
第二圖為本發明之改善輕載效率之電源供應器之一實施例之電路圖;The second figure is a circuit diagram of an embodiment of a power supply for improving light load efficiency of the present invention;
第三圖為本發明之改善輕載效率之電源供應器之控制電路之一實施例之方塊圖;3 is a block diagram of an embodiment of a control circuit of a power supply for improving light load efficiency of the present invention;
第四圖為本發明之改善輕載效率之電源供應器之控制電路之一實施例之電路圖;The fourth figure is a circuit diagram of an embodiment of a control circuit for a power supply for improving light load efficiency of the present invention;
第五A圖為本發明之改善輕載效率之電源供應器之第一比較器之一實施例之電壓操作圖;Figure 5A is a voltage operation diagram of an embodiment of the first comparator of the power supply for improving light load efficiency of the present invention;
第五B圖為本發明之改善輕載效率之電源供應器之第二比較器之一實施例之電壓操作圖;及5B is a voltage operation diagram of an embodiment of a second comparator of the power supply for improving light load efficiency of the present invention; and
第六圖為本發明之改善輕載效率之電源供應器之防彈跳操作時序圖。The sixth figure is a timing chart of the bounce prevention operation of the power supply for improving light load efficiency of the present invention.
10‧‧‧第一整流電路10‧‧‧First rectifier circuit
20‧‧‧功率因數修正器20‧‧‧Power Factor Corrector
201‧‧‧第一儲能電路201‧‧‧First energy storage circuit
202‧‧‧第一開關電路202‧‧‧First switch circuit
30‧‧‧驅動電路30‧‧‧Drive circuit
40‧‧‧串聯諧振轉換器40‧‧‧Series resonant converter
401‧‧‧第二開關電路401‧‧‧Second switch circuit
402‧‧‧諧振電路402‧‧‧Resonance circuit
403‧‧‧變壓器403‧‧‧Transformer
404‧‧‧第二整流電路404‧‧‧Second rectifier circuit
405‧‧‧第二儲能電路405‧‧‧Second energy storage circuit
50‧‧‧控制電路50‧‧‧Control circuit
Ro ‧‧‧檢測電阻R o ‧‧‧Detection resistance
SW1 、SW2 、SW3 、SW4 、SW5 ‧‧‧功率開關電晶體SW 1 , SW 2 , SW 3 , SW 4 , SW 5 ‧‧‧ power switch transistor
Np ‧‧‧一次側線圈N p ‧‧‧ primary side coil
Ns ‧‧‧二次側線圈N s ‧‧‧second side coil
Claims (20)
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TW098114648A TWI389437B (en) | 2009-05-01 | 2009-05-01 | A power supply with improved light load efficiency |
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TW098114648A TWI389437B (en) | 2009-05-01 | 2009-05-01 | A power supply with improved light load efficiency |
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TWI389437B true TWI389437B (en) | 2013-03-11 |
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US10044275B2 (en) | 2016-06-21 | 2018-08-07 | Delta Electronics, Inc. | Power delivery device and control method thereof |
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US8564989B2 (en) * | 2010-12-22 | 2013-10-22 | Intel Corporation | Cold swap load adaptive power supply |
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US10044275B2 (en) | 2016-06-21 | 2018-08-07 | Delta Electronics, Inc. | Power delivery device and control method thereof |
US10630185B2 (en) | 2016-06-21 | 2020-04-21 | Delta Electronics, Inc. | Power delivery device and control method thereof |
US10715047B1 (en) | 2019-02-15 | 2020-07-14 | Chicony Power Technology Co., Ltd. | Resonant power conversion device |
US10790752B1 (en) | 2019-05-07 | 2020-09-29 | Acer Incorporated | Power supply device |
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