TWI387802B - Acitve device array substrate and liquid crystal display panel - Google Patents

Description

Active device array substrate and liquid crystal display panel

The present invention relates to an array substrate and a display panel, and more particularly to an active device array substrate having inspection units and a liquid crystal display panel having the active device array substrate.

Thin Film Transistor Liquid Crystal Display (TFT-LCD), which has high image quality, good space utilization efficiency, low power consumption, and no radiation, has gradually become the mainstream of displays. During display, the liquid crystal display panel selects a specific pixel by scanning lines and data lines, and provides an appropriate operating voltage of the pixel to display a picture corresponding to the pixel. In particular, in the process of fabricating a liquid crystal display panel, it is necessary to test it to determine that the liquid crystal display panel produced can operate normally.

In general, a liquid crystal display panel is tested using a shorting bar design. In detail, the liquid crystal display panel includes an active device array substrate, a color filter substrate, and a liquid crystal layer disposed between the two substrates. The active device array substrate includes a display area and a peripheral circuit area, and the shorting bar is disposed on the peripheral circuit area.

When testing, for example, all of the scan lines are simultaneously contacted by a gate shorting bar, and the same gate test signal is applied to each scan line. Therefore, all of the thin film transistors connected to the pixels on each scan line can be turned on at the same time. In addition, all the data lines are simultaneously touched by the source shorting bar and passed through this. The source shorting bar inputs a common test signal to the data line to input the display data into each pixel to observe the display condition of the entire display screen.

With the above test method of the shorting bar, all the thin film transistors and the pixel electrodes receive and reflect the same signal. Defects in the circuit (such as open or open circuits) will cause the component to receive no predetermined signals and exhibit electrical and optical characteristics that are different from normal components (pixels). The tester can observe the location of the defect based on this observation.

FIG. 1A is a schematic diagram of a conventional active device array substrate. 1B and 1C are schematic cross-sectional views of the detecting unit of FIG. 1A taken along line A-A', respectively. Referring to FIG. 1A and FIG. 1B simultaneously, the active device array substrate 10 includes a plurality of electrode wires 20 and a plurality of detecting units 22 corresponding to the electrode wires 20, wherein the detecting unit 22 includes a plurality of shorting bars 90 and a plurality of corresponding shorting bars 90. Electrical connection unit 30. The electrical connection unit 30 includes a first conductive pattern 40 , a first dielectric layer 70 , a second conductive pattern 50 , a second dielectric layer 80 , and a transparent conductive pattern 60 .

As shown in FIG. 1A and FIG. 1B, the first conductive pattern 40 in each of the electrical connection units 30 is connected to the second conductive pattern 50 and the transparent conductive pattern 60 through the first contact window opening H1. The second conductive pattern 50 is connected to the transparent conductive pattern 60 by the second contact window opening H2.

Referring to FIG. 1C, during the fabrication of the first dielectric layer 70, the slope of the film layer near the opening H1 of the first contact window is often discontinuous due to over-etching, so that the transparent conductive pattern 60 is broken. It is impossible to smoothly overlap the first conductive pattern 40. Therefore, the detection signal cannot be input, and the detection of the active device array substrate cannot be performed efficiently. in this way As a result, subsequent production costs will increase and yields will fall.

In order to solve the problem that the first dielectric layer 70 is disconnected in the vicinity of the first contact window opening H1 due to over-etching, the size of the first contact window opening H1 may be reduced, and the first dielectric layer may be slowed down. 70 over-etching phenomenon. However, reducing the size of the first contact opening H1 will face the problem that the resistance value is too high.

In view of this, the present invention proposes an active device array substrate having a detecting unit that prevents the conductive pattern from being broken.

The present invention relates to another liquid crystal display panel having the above-described active device array substrate.

To specifically describe the content of the present invention, an active device array substrate is provided. The active device array substrate has a display area and a peripheral circuit area. The active device array substrate includes a plurality of electrode lines and a plurality of detecting units. A plurality of electrode wires are disposed in the display area and extend into the peripheral circuit area. The plurality of detecting units are disposed in the peripheral circuit area, and the detecting unit has a plurality of shorting bars and a plurality of electrical connecting units, wherein each of the electrical connecting units is electrically connected to the corresponding shorting bar and the corresponding electrode wire, respectively The electrical connection unit includes a first conductive pattern, a first dielectric layer, a second conductive pattern, a second dielectric layer, and a transparent conductive pattern. The first conductive pattern connects the electrode wirings and is disposed on the first side and the opposite second side of the electrode wiring, respectively. The first dielectric layer covers the first conductive pattern. The second conductive pattern is disposed on the first dielectric layer above the conductive pattern and perpendicular to the electrode wiring. Second The electrical layer covers the second conductive pattern. The transparent conductive pattern is disposed on the second dielectric layer above the second conductive pattern. The shorting bar is composed of the second conductive pattern. Providing a first contact window opening on the first side of the electrode wiring, so that the transparent conductive pattern is electrically connected to the shorting bar and the first conductive pattern through the first contact window opening, and at least part of the first contact window opening The two conductive patterns are removed. A second contact opening is disposed on the second side of the electrode wiring such that the transparent conductive pattern is electrically connected to the shorting bar through the second contact opening.

The present invention further provides a liquid crystal display panel comprising the above-described active device array substrate, color filter substrate and liquid crystal layer. The color filter substrate is disposed on the opposite side of the active device array substrate, and the liquid crystal layer is disposed between the color filter substrate and the active device array substrate.

In an embodiment of the invention, the second conductive pattern in the vicinity of the opening of the first contact window is completely removed, and the shorting bar is disconnected.

In an embodiment of the invention, the electrical connection unit further includes a third contact window opening disposed on the first side of the electrode wiring such that the transparent conductive pattern is electrically connected to the short circuit through the third contact window opening. Rod.

In an embodiment of the invention, the electrical connection unit further includes a semiconductor layer disposed on the first dielectric layer from which the second conductive pattern is removed, and the semiconductor layer is located on the first dielectric layer and the second layer Between dielectric layers.

In an embodiment of the invention, the electrode wiring is a scan wiring. In another embodiment, the electrode wiring includes a plurality of data wirings, and the data wirings and the second conductive patterns are the same film layer.

In an embodiment of the invention, the first conductive pattern and the electrode wiring are The same film layer.

In an embodiment of the invention, the material of the transparent conductive pattern comprises indium tin oxide or indium zinc oxide.

In an embodiment of the invention, the active device array substrate further includes a pixel array disposed in the display region and electrically connected to the electrode wiring.

In summary, the active device array substrate and the liquid crystal display panel of the present invention are removed by at least a portion of the second conductive pattern in the vicinity of the first contact window opening in the electrical connection unit, thereby effectively reducing the disconnection due to the transparent conductive pattern. The resulting detection is invalid.

The above and other objects, features and advantages of the present invention will become more <RTIgt;

First embodiment

2A is a schematic view of an active device array substrate according to a first embodiment of the present invention. This embodiment only shows one part of the active device array substrate 200, and takes the three sets of electrode wirings 220 and the corresponding detecting unit 222 as an example.

Referring to FIG. 2A , the active device array substrate 200 has a display area D and a peripheral circuit region P. The active device array substrate 200 includes a plurality of electrode wires 220 and a plurality of detecting units 222 . The plurality of electrode wirings 220 are disposed in the display region D and extend into the peripheral circuit region P. The plurality of detecting units 222 are disposed in the peripheral circuit area P, wherein the detecting unit 222 has a plurality of shorting bars 292 and a plurality of electrical connecting units 230, and each of the electrical connecting units 230 They are electrically connected to the corresponding short-circuit bar 292 and the corresponding electrode wire 220, respectively. Among them, the electrode wiring 220 is a scanning wiring. In addition, in the embodiment, the active device array substrate 200 further includes a pixel array 214 disposed in the display region D and electrically connected to the electrode wiring 220.

2B is a schematic cross-sectional view taken along line BB' of FIG. 2A. Referring to FIG. 2A and FIG. 2B , each electrical connection unit 230 includes a first conductive pattern 240 , a first dielectric layer 270 , a second conductive pattern 250 , a second dielectric layer 280 , and a transparent conductive pattern 260 . The first conductive pattern 240 is connected to the electrode wiring 220 and is disposed on the first side 210A of the electrode wiring 220 and the opposite second side 210B, respectively. The first dielectric layer 270 is overlaid on the first conductive pattern 240. The second conductive pattern 250 is disposed on the first dielectric layer 270 above the conductive pattern and perpendicular to the electrode wiring 220. The second dielectric layer 280 covers the second conductive pattern 250. The transparent conductive pattern 260 is disposed on the second dielectric layer 280 above the second conductive pattern 250. The material of the first dielectric layer 270 and the second dielectric layer 280 is, for example, a dielectric material such as hafnium oxide, tantalum nitride or hafnium oxynitride, and the material of the transparent conductive pattern 260 is, for example, indium tin oxide or indium zinc. Oxide.

As shown in FIG. 2A, a first contact window opening H1 is disposed on the first side 210A of the electrode wiring 220 such that the transparent conductive pattern 260 is electrically connected to the first conductive pattern 240 through the first contact window opening H1, in particular At least a portion of the second conductive pattern 250 near the first contact opening H1 is removed. A second contact window opening H2 is disposed on the second side 210B of the electrode wiring 220 such that the transparent conductive pattern 260 is electrically connected to the shorting bar 292 through the second contact window opening H2.

In detail, when detecting, a detection signal S is input from the shorting bar 292, and the detection signal S is first transmitted to the transparent conductive pattern 260 via the second contact opening H2. Thereafter, the detection signal S is transferred from the transparent conductive pattern 260 to the first conductive pattern 240 via the first contact window opening H1. Then, the detection signal S can be transmitted to the display area D by the first conductive pattern 240 for detection.

It should be noted that, unlike the design of the first contact window opening H1 of the conventional electrical connection unit 30 (as shown in FIG. 1A ), the present embodiment enables the vicinity of the first contact window opening H1 in the electrical connection unit 230 . At least a portion of the second conductive pattern 250 is removed, as shown in FIG. 2A. The second conductive pattern 250 near the first contact window opening H1 is removed to form a notch N. Moreover, the notch N is such that the film layer between the transparent conductive pattern 260 and the first conductive pattern 240 is composed only of the first dielectric layer 270 and the second dielectric layer 280.

Since the film structure of the first dielectric layer 270 and the second dielectric layer 280 are similar, the electrical connection unit 230 does not cause discontinuity of the film gradient due to different etching rates in the vicinity of the first contact window opening H1. Therefore, it is possible to effectively avoid the situation in which the transparent conductive pattern 260 is disconnected without reducing the size of the first contact window opening H1. In particular, even if the disconnection of the transparent conductive pattern 260 occurs on the left side of FIG. 2B, the transparent conductive pattern on the right side of FIG. 2B can be effectively electrically connected to the underlying first conductive pattern 240. In this way, the normal operation of the electrical connection unit 230 can be effectively maintained, and the yield of the active device array substrate 200 can be improved.

In addition, in the embodiment, the first conductive pattern 240 and the electrode wiring 220 are the same film layer, and the second conductive pattern 250 and the first conductive pattern 240 It is a different film layer, as shown in FIG. 2B, that is, the first conductive pattern 240 is a first metal layer, the second conductive pattern 250 is a second metal layer, and the transparent conductive pattern 260 is a pixel electrode layer. . However, the present invention does not limit the film layer for fabricating the electrode wiring 220, the first conductive pattern 240, the second conductive pattern 250, and the transparent conductive pattern 260, and may also be combined with the first metal layer (metal 1) and the second metal layer (metal 2). And a pixel electrode layer for line layout.

Second embodiment

FIG. 3A is a schematic diagram of an active device array substrate according to a second embodiment of the present invention. 3B is a schematic cross-sectional view taken along line CC' of FIG. 3A. Referring to FIG. 3A and FIG. 3B, the active device array substrate 300 of the present embodiment is similar to the first embodiment, but the electrical connection unit 320 of the active device array substrate 300 further includes a semiconductor layer 290 disposed to be removed from the second The first dielectric layer 270 of the conductive pattern 250 is disposed, and the semiconductor layer 290 is located between the first dielectric layer 270 and the second dielectric layer 280.

Since the semiconductor layer 290 is formed by a dry etching process, the underlying first dielectric layer 270 can be prevented from being over-etched, so that the discontinuity of the film layer can be prevented, and the technical effect of preventing the transparent conductive pattern 260 from being broken can be achieved. At the same time, the semiconductor layer 290 can make the slope below the transparent conductive pattern 260 more gentle, and cause the transparent conductive pattern 260 to overlap with the first conductive pattern more easily.

Third embodiment

4A is a diagram showing an active device array substrate according to a third embodiment of the present invention; Schematic diagram. 4B is a schematic cross-sectional view taken along line DD' of FIG. 4A. 4A and 4B, the active device array substrate 400 of the present embodiment is similar to the first embodiment, but the second conductive pattern of the electrical connection unit 420 in the active device array substrate 400 near the first contact window opening H1. 250 was completely removed.

In this embodiment, the electrical connection unit 420 further includes a third contact window opening H3 disposed on the first side 210A of the electrode wiring 220 such that the transparent conductive pattern 260 is electrically connected through the third contact window opening H3. Shorting rod 292. In detail, after the second conductive pattern 250 near the first contact window opening H1 is removed, the shorting bar 292 is disconnected to form two portions 292A and 292B, wherein the partial shorting bar 292A is located on the first side 210A of the electrode wiring 220. And connected to the transparent conductive pattern 260 via the third contact window opening H3. Another portion of the shorting bar 292B is located on the second side 210B of the electrode wiring 220 and is connected to the transparent conductive pattern 260 via the second contact opening H2.

Specifically, the detection signal S is input by the partial shorting bar 292B, and the detection signal S is transmitted to the transparent conductive pattern 260 via the second contact window opening H2. Then, the detection signal S is transmitted to the first conductive pattern 240 via the transparent conductive pattern 260 and the first contact window opening H1 to further transmit the detection signal S into the display area D for detection.

In particular, the detection signal S is simultaneously transmitted to the other portion of the shorting bar 292A via the transparent conductive pattern 260 and the third contact window opening H3, so that the shorting bar 292B and the shorting bar 292A are again turned on.

FIG. 5 illustrates a liquid crystal display panel according to a preferred embodiment of the present invention. schematic diagram. Referring to FIG. 5 , the liquid crystal display panel 500 includes an active device array substrate 510 , a color filter substrate 520 , and a liquid crystal layer 530 . The active device array substrate 510 may be any of the above-described active device array substrates 200, 300, 400, and the related components have been described above and will not be repeated herein. The color filter substrate 520 is disposed on the opposite side of the active device array substrate 510. The liquid crystal layer 530 is disposed between the color filter substrate 520 and the active device array substrate 510.

Similarly, since the active device array substrate 510 has an electrical connection unit 540, and the electrical connection unit 540 can be any of the above electrical connection units 230, 320, 420, the electrical connection unit 540 can prevent the transparent conductive pattern 260. In the case of disconnection, when the liquid crystal display panel 500 is fabricated, the electrical connection unit 540 on the active device array substrate 510 can be used for detection, thereby increasing production yield and reducing cost.

In summary, the active device array substrate and the liquid crystal display panel of the present invention have at least the following advantages: electrical properties can be avoided because at least part of the second conductive pattern near the first contact window opening of the electrical connection unit is removed. The transparent conductive pattern in the splicing unit is broken in a subsequent process (eg, an etch process). Therefore, the electrical connection unit can operate normally, and the active device array substrate and the liquid crystal display panel are not missed, thereby improving the production yield. By designing the structure of the film layer near the opening of the first contact window in the electrical connection unit, the disconnection of the transparent conductive pattern can be effectively avoided, without reducing the size of the opening of the first contact window as in the prior art, and avoiding electrical properties. The problem that the connection unit resistance is too high.

Although the present invention has been disclosed above in the preferred embodiment, it is not intended to be used The scope of the present invention is defined by the scope of the appended claims, and the scope of the invention is defined by the scope of the appended claims. Subject to it.

10, 200, 300, 400‧‧‧ active device array substrate

20, 210, 220‧‧‧ electrode wiring

30, 320, 420, 540‧‧‧Electrical connection unit

40, 240‧‧‧ first conductive pattern

50, 250‧‧‧ second conductive pattern

60, 260‧‧‧ transparent conductive pattern

70, 270‧‧‧ first dielectric layer

80, 280‧‧‧ second dielectric layer

210A‧‧‧ first side

210B‧‧‧ second side

214‧‧‧ pixel array

292A, 292B‧‧‧ partial shorting rod

290‧‧‧Semiconductor layer

292‧‧‧Short rod

500‧‧‧LCD panel

510‧‧‧Active component array substrate

520‧‧‧Color filter substrate

530‧‧‧Liquid layer

D‧‧‧ display area

H1‧‧‧first contact window opening

H2‧‧‧Second contact window opening

H3‧‧‧ third contact window opening

N‧‧‧ gap

P‧‧‧ peripheral circuit area

S‧‧‧Detection signal

FIG. 1A is a schematic diagram of a conventional active device array substrate.

1B and 1C are schematic cross-sectional views of the detecting unit of FIG. 1A taken along line A-A', respectively.

2A is a schematic view of an active device array substrate according to a first embodiment of the present invention.

2B is a schematic cross-sectional view taken along line BB' of FIG. 2A.

FIG. 3A is a schematic diagram of an active device array substrate according to a second embodiment of the present invention.

3B is a schematic cross-sectional view taken along line CC' of FIG. 3A.

4A is a schematic diagram of an active device array substrate according to a third embodiment of the present invention.

4B is a schematic cross-sectional view taken along line DD' of FIG. 4A.

FIG. 5 is a schematic diagram of a liquid crystal display panel according to a preferred embodiment of the present invention.

200‧‧‧Active component array substrate

210A‧‧‧ first side

210B‧‧‧ second side

214‧‧‧ pixel array

220‧‧‧Electrical wiring

230‧‧‧Electrical connection unit

250‧‧‧Second conductive pattern

260‧‧‧Transparent conductive pattern

292‧‧‧Short rod

D‧‧‧ display area

H1‧‧‧first contact window opening

H2‧‧‧Second contact window opening

N‧‧‧ gap

P‧‧‧ peripheral circuit area

S‧‧‧Detection signal

Claims (18)

An active device array substrate having a display area and a peripheral circuit area, the active device array substrate comprising: a plurality of electrode lines disposed in the display area and extending into the peripheral circuit area; a plurality of detecting units disposed on the In the peripheral circuit area, the detecting unit has a plurality of shorting bars and a plurality of electrical connecting units, wherein each of the electrical connecting units is electrically connected to the corresponding shorting bar and the corresponding electrode wire, and each electrical connecting unit The first conductive pattern is connected to the electrode wiring, and is respectively disposed on a first side of the electrode wiring and the opposite second side; a first dielectric layer covering the first a second conductive pattern disposed on the first dielectric layer above the conductive pattern and perpendicular to the electrode lines; a second dielectric layer covering the second conductive pattern; and a a transparent conductive pattern disposed on the second dielectric layer above the second conductive pattern; wherein the shorting bars are formed by the second conductive pattern and are in the electrode wiring a first contact window opening is disposed on the first side, such that the transparent conductive pattern is electrically connected to the shorting bar and the first conductive pattern through the first contact window opening, and at least a portion of the first contact window opening The second conductive pattern is removed; and a second contact window is disposed on the second side of the electrode wiring Opening, such that the transparent conductive pattern is electrically connected to the shorting bar by the second contact opening. The active device array substrate according to claim 1, wherein the second conductive pattern in the vicinity of the opening of the first contact window is completely removed, and the shorting bar is disconnected. The active device array substrate according to claim 2, further comprising a third contact opening disposed on the first side of the electrode wiring such that the transparent conductive pattern is opened by the third contact window The shorting bar is electrically connected. The active device array substrate of claim 1, further comprising a semiconductor layer disposed on the first dielectric layer from which the second conductive pattern is removed, and the semiconductor layer is located in the first dielectric layer Between the layer and the second dielectric layer. The active device array substrate according to claim 1, wherein the electrode wires are scan wires. The active device array substrate according to claim 1, wherein the electrode wires comprise a plurality of data wires, and the data wires and the second conductive patterns are the same film layer. The active device array substrate according to claim 1, wherein the first conductive pattern and the electrode wiring are the same film layer. The active device array substrate according to claim 1, wherein the material of the transparent conductive pattern comprises indium tin oxide or indium zinc oxide. For example, the active device array substrate described in claim 1 is Furthermore, a pixel array is disposed in the display area and electrically connected to the electrode wires. A liquid crystal display panel includes: a color filter substrate; an active device array substrate having a display area and a peripheral circuit area, the active device array substrate comprising: a plurality of electrode lines disposed in the display area and extending to the In the peripheral circuit area, a plurality of detecting units are disposed in the peripheral circuit area, the detecting units have a plurality of shorting bars and a plurality of electrical connecting units, wherein each of the electrical connecting units respectively has a corresponding shorting bar and a corresponding The electrode wires are electrically connected, and each of the electrical connection units includes: a first conductive pattern, the conductive patterns are connected to the electrode wires, and are respectively disposed on a first side of the electrode wires and an opposite second side a first dielectric layer covering the first conductive pattern; a second conductive pattern disposed on the first dielectric layer above the conductive pattern and perpendicular to the electrode lines; a second dielectric a layer covering the second conductive pattern; a transparent conductive pattern disposed on the second dielectric layer above the second conductive pattern; wherein the shorting bars are A conductive pattern formed, and is disposed on the first side of the electrode wiring has a first contact opening, so that the transparent conductive pattern by the first access The touch window opening is electrically connected to the shorting bar and the first conductive pattern, and at least a portion of the second conductive pattern in the vicinity of the first contact window opening is removed; and a second side is disposed on the second side of the electrode wiring Contacting the window opening such that the transparent conductive pattern is electrically connected to the shorting bar through the second contact window opening; and a liquid crystal layer disposed between the color filter substrate and the active device array substrate. The liquid crystal display panel of claim 10, wherein the second conductive pattern near the opening of the first contact window is completely removed, and the shorting bar is disconnected. The liquid crystal display panel of claim 11, further comprising a third contact window opening disposed on the first side of the electrode wiring such that the transparent conductive pattern is electrically connected by the third contact window opening The shorting rod is connected sexually. The liquid crystal display panel of claim 10, further comprising a semiconductor layer disposed on the first dielectric layer from which the second conductive pattern is removed, and the semiconductor layer is located on the first dielectric layer Between the second dielectric layer and the second dielectric layer. The liquid crystal display panel of claim 10, wherein the electrode wirings are scanning wirings. The liquid crystal display panel of claim 10, wherein the electrode wires comprise a plurality of data wires, and the data wires and the second conductive patterns are the same film layer. The liquid crystal display panel of claim 10, wherein the first conductive pattern and the electrode wiring are the same film layer. The liquid crystal display panel of claim 10, wherein the material of the transparent conductive pattern comprises indium tin oxide or indium zinc oxide. The liquid crystal display panel of claim 10, further comprising a pixel array disposed in the display area and electrically connected to the electrode wires.