TWI384346B - Power factor correction converter with fast load regulation capability - Google Patents
Power factor correction converter with fast load regulation capability Download PDFInfo
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- TWI384346B TWI384346B TW098110517A TW98110517A TWI384346B TW I384346 B TWI384346 B TW I384346B TW 098110517 A TW098110517 A TW 098110517A TW 98110517 A TW98110517 A TW 98110517A TW I384346 B TWI384346 B TW I384346B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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本發明係與功率因數修正之轉換器有關,特別係指一種具有快速負載調節能力之功率因數修正轉換器。The present invention relates to a power factor correction converter, and more particularly to a power factor correction converter having fast load regulation capability.
近年來由於科技日新月異使大部份電子產品日益趨向輕、薄、短、小發展,而直流供電為目前電子產品之重要趨勢,故需一整流電路將市電交流電源轉換為直流電源以供其使用。In recent years, due to the rapid development of science and technology, most electronic products have become increasingly light, thin, short and small, and DC power supply is an important trend of current electronic products. Therefore, a rectifier circuit is needed to convert the commercial AC power to DC power for its use. .
請參閱第一圖所示,為習知單相整流電路架構示意圖,而其係包含有由四二極體11、12、13及14所組成之橋式整流電路10,並且與一輸出電容器C1並聯,且該橋式整流電路10間更跨接有一交流電源P1,而當交流電源P1為正時輸入電流經由二極體11、13傳輸,當交流電源P1為負時則輸入電流經二極體12、14傳輸,再由輸出電容器C1濾波後,即可得一直流電源。雖此種整流電路有架構簡單之優點,但由於橋式整流電路10對輸出電容器C1充電,容易引起很高的突波電流,而影響其他用電設備。Referring to the first figure, it is a schematic diagram of a conventional single-phase rectification circuit architecture, which includes a bridge rectifier circuit 10 composed of quadrupoles 11, 12, 13 and 14, and an output capacitor C1. Parallel, and the bridge rectifier circuit 10 is further connected with an AC power source P1, and when the AC power source P1 is positive, the input current is transmitted through the diodes 11, 13 and when the AC power source P1 is negative, the input current is passed through the poles. After the bodies 12 and 14 are transmitted, and then filtered by the output capacitor C1, a DC power source can be obtained. Although such a rectifying circuit has the advantage of simple structure, since the bridge rectifying circuit 10 charges the output capacitor C1, it is easy to cause a high surge current, which affects other electric equipment.
請同時配合參閱第二圖所示,為第一圖單相整流電路所產生的輸出電壓波形圖,假設市電之輸入電壓波形W1為正弦波,其輸出電源波形W2以直流成份為主,而輸入橋式整流電路10之突波電流W3並非正弦波,除功率因數較差外其突波電流亦會增加元件與配線電路之容量,直接增加供電系統之損失與間接影響同一配電系統之其他用戶。Please also refer to the second figure, which is the output voltage waveform generated by the single-phase rectifier circuit of the first figure. It is assumed that the input voltage waveform W1 of the mains is a sine wave, and the output power waveform W2 is dominated by the DC component. The surge current W3 of the bridge rectifier circuit 10 is not a sine wave. In addition to the poor power factor, the surge current also increases the capacity of the component and the wiring circuit, directly increasing the loss of the power supply system and indirectly affecting other users of the same power distribution system.
有鑒於此,許多習知技術使用功率因數修正技術來改善上述之缺失;其中,功率因數修正技術依組成元件之不同可分為被動式與主動式功率因數修正。而被動式功率因數修正之電路設計簡單,主要是在上述橋式整流電路10與交流電源P1間加入電感及電容(圖未示)所組成之濾波電路來緩和突波電流以提升功率因數,但此方法輸入電流總諧波失真高、體積過大且功率因數改善效果亦不盡理想。In view of this, many conventional techniques use power factor correction techniques to improve the above-mentioned lack; wherein the power factor correction technique can be divided into passive and active power factor correction depending on the components. The circuit design of the passive power factor correction is simple, mainly adding a filter circuit composed of an inductor and a capacitor (not shown) between the bridge rectifier circuit 10 and the AC power source P1 to mitigate the surge current to improve the power factor, but this The method of input current total harmonic distortion is high, the volume is too large and the power factor improvement effect is not satisfactory.
而主動式功率因數修正,雖然電路設計較為複雜,需於電路架構中加入開關元件,並藉由電力電子技術,施以適當之控制法則以調控主動功率開關之導通與截止,使輸入電源電流接近正弦波並追隨輸入電源電壓,其功率因數可達0.97以上,並且有體積小、重量輕及電流總諧波失真低等優點。Active power factor correction, although the circuit design is more complicated, it is necessary to add switching components to the circuit architecture, and by means of power electronics technology, appropriate control rules are applied to regulate the conduction and cut-off of the active power switch, so that the input power supply current is close. The sine wave follows the input supply voltage, and its power factor can reach above 0.97, and it has the advantages of small size, light weight and low total current harmonic distortion.
請再參閱第三圖所示,習知傳統單相主動式PFC專用控制IC(UCC3854)之控制架構電路示意圖,其主要是利用分壓電阻器20取得直流輸出電壓回授訊號經電壓放大器21和一直流電壓命令V ref 相比較得一電壓誤差訊號A,再與二極體橋式整流器22整流後以電阻器23取得輸入電壓訊號B經多工器24相乘積,藉此即可得一與輸入電壓同相位且根據負載變動調整振幅大小之正弦電流命令。其中,經低通濾波器25所得之訊號C送至多工器24中取其平方倍後再與電壓誤差訊號A和輸入電壓訊號B之乘積相除,此舉可使電壓放大器21所構成之回路的增益維持固定,並使其之輸出變成一種功率的控制,如此一來,便可增大系統所允許之輸入電源26的變動範圍;而後,再將上述之正弦電流命令與由感測電阻器27所感測之實際輸入電流之回授於電流放大器28做比較,經其可得一電流誤差補償訊號,再將此電流誤差補償訊號與鋸齒波或三角波V s 於脈波寬度調變器(Pulse Width Modulation,PWM)29中比較,而得到一脈波調變訊號,經閘極驅動器(Gate Driver)30轉換成主動功率開關31之驅動訊號,用以控制功率開關31之責任週期(Dudy Cycle)的大小。當實際輸入電流大於正弦電流命令時,則經電流放大器28得一負值或較小的電流誤差補償訊號以降低責任週期;反之,則增加責任週期,如此即可使輸入電流追隨著正弦電流命令而變化,而達輸入電源26電流與電壓接近同相位,提升功率因數之目的,但習知修正電路仍存有多項缺點,如:Please refer to the third figure, the schematic diagram of the control architecture circuit of the conventional single-phase active PFC dedicated control IC (UCC3854), which mainly uses the voltage dividing resistor 20 to obtain the DC output voltage feedback signal through the voltage amplifier 21 and A DC voltage command V ref is compared with a voltage error signal A, and then rectified with the diode bridge rectifier 22, and the resistor 23 is used to obtain the input voltage signal B multiplied by the multiplexer 24, thereby obtaining one. A sinusoidal current command that is in phase with the input voltage and that adjusts the magnitude of the amplitude based on load variations. The signal C obtained by the low-pass filter 25 is sent to the multiplexer 24 to be squared, and then divided by the product of the voltage error signal A and the input voltage signal B. This can make the circuit formed by the voltage amplifier 21. The gain remains fixed and its output becomes a power control, which increases the range of variation of the input power supply 26 allowed by the system; then, the sinusoidal current command and the sense resistor are The feedback of the actual input current sensed by 27 is compared with the current amplifier 28, and a current error compensation signal is obtained, and the current error compensation signal is combined with the sawtooth wave or the triangular wave V s in the pulse width modulator (Pulse). Width Modulation (PWM) 29 compares to obtain a pulse modulation signal, which is converted into a driving signal of the active power switch 31 via a gate driver 30 to control the duty cycle of the power switch 31 (Dudy Cycle). the size of. When the actual input current is greater than the sinusoidal current command, a negative value or a smaller current error compensation signal is obtained by the current amplifier 28 to reduce the duty cycle; otherwise, the duty cycle is increased, so that the input current follows the sinusoidal current command. And the change, and the input power source 26 current and voltage are close to the same phase, to improve the power factor, but the conventional correction circuit still has a number of shortcomings, such as:
(A)由於其控制架構是由硬體實施,故易受限於各電路元件之特性及製程時所產生之誤差值,造成控制策略實施不易。(A) Since the control architecture is implemented by hardware, it is easily limited by the characteristics of each circuit component and the error value generated during the process, which makes the implementation of the control strategy difficult.
(B)請同時配合參閱第四圖所示,由於其正弦電流命令之取得是根據電阻器23所感測之輸入電壓訊號B獲得,當輸入電源26電壓為非純正弦波時,此時若採用上述方式得之電流命令W4,會使其含有諧波成份,進而使得實際之輸入電源26電流存在與輸入電壓相同之諧波成份,而導致功率因數受到影響且衍生輸入電源26電流之高頻諧波而惡化供電系統之電源品質。(B) Please refer to the fourth figure at the same time, because the sinusoidal current command is obtained according to the input voltage signal B sensed by the resistor 23, when the input power source 26 voltage is a non-pure sine wave, at this time, if The current command W4 obtained in the above manner will make it contain harmonic components, so that the actual input power source 26 current has the same harmonic component as the input voltage, and the power factor is affected and the high frequency harmonic of the input power source 26 current is derived. The wave deteriorates the power quality of the power supply system.
(C)習知主動式功率因數修正轉換器會因為整流濾波之非線性特性,而於直流輸出電壓出現之電源頻率之二次諧波成份,為消除此二次諧波之影響通常於電壓回授路徑中加上一個頻寬約為10~20Hz的一階RC低通濾波器,此舉雖可衰減回授迴路中的二次諧波,使直流輸出電壓得以穩定,但頻寬亦因此受限而造成系統動態響應不佳的情形。因此,當直流輸出電壓連接快速變動負載時,會造成輸出電壓達無法達到穩態,且負載變動所造成之輸出電壓最大超越量(Over shoot)及掉幅深度(Dip)都大幅增加而間接惡化功率因數及輸入電流諧波之改善效果。(C) The conventional active power factor correction converter will have a second harmonic component of the power supply frequency at the DC output voltage due to the nonlinear characteristic of the rectification filter, and the voltage is usually removed from the voltage to eliminate the influence of the second harmonic. Adding a first-order RC low-pass filter with a bandwidth of about 10~20Hz, which can attenuate the second harmonic in the feedback loop, so that the DC output voltage is stabilized, but the bandwidth is also affected. Limit the situation that the system dynamic response is not good. Therefore, when the DC output voltage is connected to the rapidly changing load, the output voltage will not reach the steady state, and the maximum output overshoot and the depth of the output (Dip) caused by the load fluctuation will increase greatly and indirectly deteriorate. Improvements in power factor and input current harmonics.
再配合參閱美國專利案號第2006245219號,其名稱標的係為「Digital Implementation of Power Factor Correction」,其主要係以數位電路實現傳統之主動式功率因數修正轉換器,並揭示以回授電壓前饋至電流迴路命令輸入端以提高輸出電壓之動態響應。Referring to U.S. Patent No. 2006245219, the name of the system is "Digital Implementation of Power Factor Correction", which is mainly implemented by a digital circuit to implement a conventional active power factor correction converter, and reveals a feedback voltage feedforward. Go to the current loop command input to increase the dynamic response of the output voltage.
同時再配合參閱中華民國專利公開編號第200423516號專利案,其名稱標的係為「用於運動設備驅動馬達之電源供應控制器」,其主要係以數位處理器實現傳統之主動式功率因數修正轉換器,並揭示以查表方式讀取輸入電壓波形作為調變輸入電流波形之依據。At the same time, refer to the Patent No. 200423516 of the Republic of China, the title of which is "Power Supply Controller for Sports Equipment Drive Motors", which mainly implements traditional active power factor correction conversion with digital processor. And reveals that the input voltage waveform is read as a basis for modulating the input current waveform.
本發明之目的係在提供一種具有快速負載調節能力之功率因數修正轉換器,使可將交流電源轉換為直流電源之過程中保持輸入交流電源之電流為正弦波且與電壓同相位,亦即功率因數接近壹或為壹之控制。The object of the present invention is to provide a power factor correction converter with fast load regulation capability, which can keep the current of the input AC power source sinusoidal and in phase with the voltage, that is, the power, during the process of converting the AC power into the DC power source. The factor is close to 壹 or is the control of 壹.
本發明之另一目的係在使直流輸出電壓具有快速負載調節能力,以降低輸出電壓受到負載變化影響。Another object of the present invention is to provide a fast load regulation capability for the DC output voltage to reduce the output voltage from load variations.
本發明具有快速負載調節能力之功率因數修正轉換器,其對於習知技術缺點所提之改善方法分別為:The power factor correction converter with fast load regulation capability of the present invention has improved methods for the shortcomings of the prior art:
A、本發明所提之控制策略皆以微處理器及其軟體來實現,由於數位化系統中主要係利用軟體演算法則及邏輯判斷來實現控制策略,故其策略之修改和參數之調整,相較於類比控制大幅地增加靈活度;另外,數位化系統由於採用元器件較少,信號全部經由數位處理故不易受干擾具有高可靠性之優點。A. The control strategy proposed by the present invention is implemented by a microprocessor and a software thereof. Since the digital system mainly uses a software algorithm and a logical judgment to implement a control strategy, its strategy modification and parameter adjustment are Compared with the analog control, the flexibility is greatly increased. In addition, the digital system has the advantages of high reliability due to the small number of components and the fact that the signals are all processed through digital processing, which is not easily interfered.
B、本發明以外部之電壓零交越點偵測電路,偵測整流輸出電壓相位為0度時會產生數位脈波訊號,經由微處理器以其內置之計數器及軟體程式產生與輸入數位脈波之高倍頻率訊號,再以此訊號查詢微處理器內建之正弦波表以產生0至180度之正弦波作為軟體計算輸入電流波形之依據;與習知技術相較本發明之輸入電源電流追隨之電流命令是偵測輸入電源電壓之相位為依據來產生而非其波形,請同時參考第五圖所示,故當輸入電源26電壓為非純正弦波時,此時電流命令W5依然為一正弦波形,此項可以有效改善因輸入電壓諧波成份所造成之電流波形之諧波失真;另外,從整流輸出端偵測電壓波形之方法亦可簡化微處理器內建正弦波表所需之長度與計算複雜度,來提升系統可靠度與降低成本;此點之電壓量測亦可簡化電路設計直接將微處理器與量測電路對直流輸出電壓做共同參考地電位之連接。B. The present invention uses an external voltage zero-crossing point detection circuit to detect a digital output pulse signal when the phase of the rectified output voltage is 0 degrees, and generates and inputs a digital pulse through a microprocessor with its built-in counter and software program. The high frequency signal of the wave, and then query the microprocessor's built-in sine wave table to generate a sine wave of 0 to 180 degrees as the basis for calculating the input current waveform of the software; compared with the input power supply current of the present invention The tracking current command is based on detecting the phase of the input power supply voltage instead of its waveform. Please refer to the fifth figure at the same time. Therefore, when the input power supply 26 voltage is a non-pure sine wave, the current command W5 is still A sinusoidal waveform, this can effectively improve the harmonic distortion of the current waveform caused by the input voltage harmonic components; in addition, the method of detecting the voltage waveform from the rectified output can also simplify the microprocessor built-in sine wave table Length and computational complexity to improve system reliability and reduce cost; voltage measurement at this point can also simplify circuit design directly to the microprocessor and measurement circuit to DC The output voltage is connected to a common reference ground potential.
C、本發明為改善習知技術動態響應不佳之缺點,提出一強健控制器之設計以提升系統抑制負載擾動的能力,因當直流輸出側連接至快速變動負載,例如負載為一馬達驅動器時,可提供其更穩定之直流輸出電壓需求。本發明將輸出負載電流經由適當設計之高通濾波器,取得合適之暫態補償訊號作為額外之命令加入電流迴路,以提供補償負載擾動所需之額外電流,當擾動結束後該暫態補償訊號亦會自動消失使系統控制回歸至正常之電壓迴路參數之調控。C. In order to improve the shortcomings of the dynamic response of the prior art, the present invention proposes a robust controller design to enhance the system's ability to suppress load disturbances, because when the DC output side is connected to a rapidly varying load, such as when the load is a motor drive, Provides a more stable DC output voltage requirement. The present invention applies an output current through a suitably designed high-pass filter to obtain a suitable transient compensation signal as an additional command to be added to the current loop to provide additional current required to compensate for the load disturbance. When the disturbance is over, the transient compensation signal is also It will automatically disappear and the system control will return to the normal voltage loop parameters.
首先,請參閱第六圖所示,為本發明較佳實施例之電路架構示意圖,本發明採取之架構為升壓型交流-直流轉換器,而電路係至少包含有一輸入電源41、一整流器42、一功率因數修正元件43、一功率開關44、一二極體45、一儲能元件46、一電壓感測單元47及一閘極驅動器48,於本發明較佳實施例中該整流器42係為二極體橋式整流器,該功率因數修正元件43係為電感器,該電壓感測單元47則係包含有相串聯連接之二分壓電阻器471、472,而上述元件之連接係與習知技術相同故不再加以贅敘。First, please refer to the sixth embodiment, which is a schematic diagram of a circuit architecture according to a preferred embodiment of the present invention. The architecture of the present invention is a step-up AC-DC converter, and the circuit includes at least one input power source 41 and one rectifier 42. A power factor correction component 43, a power switch 44, a diode 45, an energy storage component 46, a voltage sensing unit 47, and a gate driver 48. In the preferred embodiment of the invention, the rectifier 42 is In the diode bridge rectifier, the power factor correction component 43 is an inductor, and the voltage sensing unit 47 includes two voltage dividing resistors 471 and 472 connected in series, and the connection between the above components and the habit Knowing the same technology, it will not be described.
請同時配合參閱第七圖所示,為本發明降壓電路及零交越點偵測電路所產生之波形圖,根據本發明之需求,故於上述電路中更包含有一負載49、一第一電流感測單元50、一微處理器60、一第二電流感測單元70及一零交越點偵測單元80,該負載49係與該第一電流感測單元50串聯,並再進一步並聯於該等分壓電阻器471、472之相對端,而該等分壓電阻器471、472之相對端係界定出一直流輸出電壓Vo,於本發明較佳實施例中該第一電流感測單元50係為一電阻或一霍爾感測元件,而使其可用以取得該負載49變動時之電流,又,該微處理器60係分別與該負載49、該電壓感測單元47、該閘極驅動器48、該第二電流感測單元70及該零交越點偵測單元80相連接,而該第二電流感測單元70係再連接於該整流器42及該功率因數修正元件43間,又,該零交越點偵測單元80係更包含有一降壓電路81及一零交越點偵測電路82,該降壓電路81係連接於該整流器42兩端,另再與該零交越點偵測電路82連接,而該零交越點偵測電路82更與該微處理器60連接,使可藉由該降壓電路81將該整流器42所輸出之電壓降壓,得一降壓電壓V1,而該降壓電壓V1係配合該零交越點偵測電路82之電壓準位,且該零交越點偵測電路82之參考地電位與該微處理器60係相同,而該零交越點偵測電路82會將該降壓電路81降壓後之電壓轉換為脈波數位訊號S1。Please also refer to the seventh figure, which is a waveform diagram generated by the step-down circuit and the zero-crossing point detecting circuit of the present invention. According to the requirements of the present invention, the circuit further includes a load 49 and a first The current sensing unit 50, a microprocessor 60, a second current sensing unit 70 and a zero-crossing point detecting unit 80 are connected in series with the first current sensing unit 50 and further connected in parallel. The opposite ends of the voltage dividing resistors 471, 472, and the opposite ends of the voltage dividing resistors 471, 472 define a DC output voltage Vo, which is used in the preferred embodiment of the present invention. The unit 50 is a resistor or a Hall sensing component, so that it can be used to obtain the current when the load 49 changes. Moreover, the microprocessor 60 is respectively associated with the load 49, the voltage sensing unit 47, and the The gate driver 48, the second current sensing unit 70, and the zero-crossing point detecting unit 80 are connected, and the second current sensing unit 70 is reconnected between the rectifier 42 and the power factor correcting component 43. In addition, the zero-crossing point detection unit 80 further includes a step-down power The circuit 81 and the zero-crossing point detecting circuit 82 are connected to the two ends of the rectifier 42 and further connected to the zero-crossing point detecting circuit 82, and the zero-crossing point detecting circuit 82 is further connected to the microprocessor 60, so that the voltage outputted by the rectifier 42 can be stepped down by the step-down circuit 81 to obtain a step-down voltage V1, and the step-down voltage V1 is matched with the zero-crossing point. Detecting the voltage level of the circuit 82, and the reference ground potential of the zero-crossing point detecting circuit 82 is the same as that of the microprocessor 60, and the zero-crossing point detecting circuit 82 drops the step-down circuit 81. The voltage after the voltage is converted into a pulse wave digital signal S1.
該微處理器60係更包含有一強健控制器61、一電壓控制器62、一正弦信號計算器63、一電流控制器64及一脈波寬度調變器65,其中:該強健控制器61一端係藉由一第一類比數位轉換接點611連接於該負載49及該第一電流感測單元50間,使可將該負載49之訊號轉換為一負載電流i s 並輸入至該強健控制器61,而該強健控制器61係進一步包含有經適當設計之一高通濾波器612及一時間延遲模組613,該高通濾波器612係一端與該第一類比數位轉換接點611連接,並可取出該負載電流i s 之變動成份,另端則與該時間延遲模組613連接,且由該時間延遲模組613產生一暫態補償訊號i r ,使可有效提升系統之動態響應,進而增加直流輸出電壓Vo對負載49擾動之抑制能力,同時,再藉由一第二類比數位轉換接點614連接於該等分壓電阻器471、472間,並可由該分壓電阻472所量測出之電壓送入該第二類比數位轉換接點614轉換為一直流回授電壓v fb ,並再以一直流電壓命令v *減去該直流回授電壓v fb 以得一電壓誤差量v e ,而該電壓誤差量v e 再進一步送入該電壓控制器62,且計算得一電流誤差補償訊號i ref 1 ,並使該電壓誤差補償訊號i ref 1 與該暫態補償訊號i r 相加得一電流參考命令i ref , 另,再以一數位輸入點631連接於該零交越點偵測電路82與該正弦信號計算器63間,使可接受該零交越點偵測電路82所轉換之脈波數位訊號S1,且進一步將該脈波數位訊號S1輸入至該正弦信號計算器63。The microprocessor 60 further includes a robust controller 61, a voltage controller 62, a sinusoidal signal calculator 63, a current controller 64 and a pulse width modulator 65, wherein: the robust controller 61 has one end Connected between the load 49 and the first current sensing unit 50 by a first analog-to-digital conversion node 611, so that the signal of the load 49 can be converted into a load current i s and input to the robust controller. 61. The robust controller 61 further includes a properly designed high pass filter 612 and a time delay module 613. The high pass filter 612 is connected at one end to the first analog digital conversion contact 611, and The variable component of the load current i s is taken out, and the other end is connected to the time delay module 613 , and a transient compensation signal i r is generated by the time delay module 613 , so that the dynamic response of the system can be effectively improved, thereby increasing The DC output voltage Vo is suppressed by the load 49, and is connected to the voltage dividing resistors 471, 472 by a second analog-to-digital switching contact 614, and can be measured by the voltage dividing resistor 472. Voltage feed A second analog to digital converter 614 converts the contact to always flow back to the feedback voltage v fb, and then to a DC voltage by subtracting the current command v * v fb feedback voltage to obtain a voltage error amount v e, and the amount of voltage error The v e is further sent to the voltage controller 62, and a current error compensation signal i ref 1 is calculated, and the voltage error compensation signal i ref 1 is added to the transient compensation signal i r to obtain a current reference command i REF, another, and then to a digital input point 631 is connected to the zero-crossing point detection circuit 82 and the sinusoidal signal calculator 63, so that the zero-crossing point acceptable to detect the pulse circuit 82 converts the digital signal S1, and further inputting the pulse wave digital signal S1 to the sine signal calculator 63.
請再配合參閱第八圖所示,為本發明正弦信號計算器之計算流程示意圖,該正弦信號計算器63會使上述脈波數位訊號S1經由一計時器632轉換為增量之位置資訊,此資訊會再與一正弦波表起始位置633相加以取得目前所欲估算之正弦波之記憶體位置,並由此記憶體位置經由一正弦波表634即可得到一輸入電流波形(sinθ)W6,且該脈波數位訊號S1之上升緣會將計時器632之位置資訊重新設定為零使上述輸入電流波形W6之輸出呈現與該脈波數位訊號S1相同頻率之週期性輸出,同時,該正弦波表634係由較低位置之記憶體依序存放該輸入電流波形由0度至180度之內容,又,該輸入電流波形W6會再與該電流參考命令i ref 相乘,並得到一正弦電流命令i *,且可根據該負載49變動調節該正弦電流命令i *之振幅,另,該微處理器60係以一第三類比數位轉換接點635連接於該第二電流感測單元70,並取得一實際輸入電流i fb ,且該實際輸入電流i fb 並再與該正弦電流命令i *相減得一電流誤差量i e ,而該電流誤差量i e 會由該電流控制器64得一電流誤差補償訊號i ref 2 ,再經該脈波寬度調變器65產生脈波調變訊號,並且由一數位接點651經閘極驅動器48轉換為驅動訊號,以調控該功率開關44之責任週期大小,而當實際輸入電流l fb 大於該正弦電流命令i *時,則經該電流控制器64輸出一負值或較小的電流誤差補償信號以降低責任週期;反之,則增加責任週期,如此便可使實際輸入電流l fb 以一微小之誤差量追隨正弦電流命令i *而變化,以達該輸入電源41之電壓與電流同相位來提升功率因數之目的,藉此除可得穩定直流輸出電壓Vo外,更促使該輸入電源41之電流相位更接近輸入電源41之電壓而達到功率因數為1之需求。Please refer to the eighth figure, which is a schematic diagram of the calculation process of the sinusoidal signal calculator of the present invention. The sinusoidal signal calculator 63 converts the pulse wave digital signal S1 into an incremental position information via a timer 632. The information is then added to a sine wave table start position 633 to obtain the memory position of the sine wave currently estimated, and the memory position is obtained via a sine wave table 634 to obtain an input current waveform (sin θ) W6. And the rising edge of the pulse wave digital signal S1 resets the position information of the timer 632 to zero, so that the output of the input current waveform W6 exhibits a periodic output of the same frequency as the pulse wave digital signal S1, and the sine is simultaneously The wave table 634 sequentially stores the input current waveform from 0 degrees to 180 degrees from the memory of the lower position, and the input current waveform W6 is multiplied by the current reference command i ref to obtain a sine. The current command i *, and the amplitude of the sinusoidal current command i * can be adjusted according to the load 49. The microprocessor 60 is connected to the second current sensing by a third analog-to-digital conversion contact 635. The unit 70 obtains an actual input current i fb , and the actual input current i fb is further subtracted from the sinusoidal current command i * by a current error amount i e , and the current error amount i e is controlled by the current The device 64 obtains a current error compensation signal i ref 2 , and then generates a pulse modulation signal via the pulse width modulator 65, and is converted into a driving signal by the digital driver 48 via a digital contact 651 to regulate the power. The duty cycle of the switch 44 is large, and when the actual input current l fb is greater than the sinusoidal current command i *, the current controller 64 outputs a negative value or a smaller current error compensation signal to reduce the duty cycle; otherwise, Increasing the duty cycle, so that the actual input current l fb can be changed with a small error amount following the sinusoidal current command i *, so that the voltage and current of the input power source 41 are in phase to improve the power factor, thereby eliminating In addition to the stable DC output voltage Vo, the current phase of the input power source 41 is further brought closer to the voltage of the input power source 41 to achieve a power factor of 1.
請同時參閱第九圖所示,本發明交流輸入電壓110V之滿载(400W)時之實測波形圖,當該輸入電源41之交流電壓為110V/60Hz、直流輸出電壓Vo 200V及負載49滿載(400W)時,所測得輸入電源41之輸入電壓波形126與輸入電流波形128,此時之功率因數可達0.997。Please also refer to the measured waveform diagram of the AC input voltage of 110V at full load (400W), when the AC voltage of the input power source 41 is 110V/60Hz, the DC output voltage Vo 200V and the load 49 are fully loaded. At 400 W), the input voltage waveform 126 of the input power source 41 and the input current waveform 128 are measured, and the power factor at this time is up to 0.997.
請再同時參閱第十及第十一圖所示,分別為本發明為未加入強健控制器之步階負載變化(10%至100%額定負載)之實測波形圖及加入強健控制之步階負載變化(10%至100%額定負載)之實測波形圖,由該等圖式中可明顯看出如施加該強健控制器61以作為補償策略,其相對產生之直流輸出電壓Vo之輸出電壓波形130的掉幅深度、最大超越量及安定時間皆可獲得良好之改善,同時,亦相對改善該輸入電流波形128。Please refer to the tenth and eleventh figures at the same time, which are the measured waveforms of the step load change (10% to 100% rated load) without the robust controller, and the step load added with the robust control. Measured waveform diagram of variation (10% to 100% of rated load), as apparent from these figures, if the robust controller 61 is applied as a compensation strategy, the output voltage waveform 130 of the DC output voltage Vo generated relative to it The drop depth, maximum overshoot and settling time are all improved, and the input current waveform 128 is relatively improved.
請同時參閱第十二圖所示,為本發明加入強健控制之週期性(4Hz)步階負載變化(10%至100%額定負載)之實測波形圖,由圖中可看出直流鏈上之輸出電壓波形130可回復至穩定狀態,相對地未加強健控制器61之交流功率因數修正轉換器在相同測試條件下直流輸出電壓Vo會失控,而相對應產生直流鏈輸出電流波形132。Please also refer to the twelfth figure, which is the measured waveform of the periodic (4Hz) step load variation (10% to 100% rated load) of the robust control of the present invention. It can be seen from the figure that the DC link is The output voltage waveform 130 can be returned to a steady state, and the DC power factor correction converter of the unenhanced controller 61 is out of control under the same test conditions, and the DC link output current waveform 132 is correspondingly generated.
綜上所述,本發明在同類產品中實有其極佳之進步實用性,同時遍查國內外關於此類結構之技術資料,文獻中亦未發現有相同的構造存在在先,是以,本發明實已具備發明專利要件,爰依法提出申請。In summary, the present invention has excellent advancement and practicability in similar products, and at the same time, the technical materials of such structures are frequently investigated at home and abroad, and the same structure is not found in the literature. The invention already has the invention patent requirements, and the application is filed according to law.
惟,以上所述者,僅係本發明之一較佳可行實施例而已,故舉凡應用本發明說明書及申請專利範圍所為之等效結構變化,理應包含在本發明之專利範圍內。However, the above-mentioned ones are merely preferred embodiments of the present invention, and the equivalent structural changes of the present invention and the scope of the claims are intended to be included in the scope of the present invention.
10...橋式整流電路10. . . Bridge rectifier circuit
11...二極體11. . . Dipole
12...二極體12. . . Dipole
13...二極體13. . . Dipole
14...二極體14. . . Dipole
20...分壓電阻器20. . . Voltage dividing resistor
21...電壓放大器twenty one. . . Voltage amplifier
22...二極體橋式整流器twenty two. . . Diode bridge rectifier
23...電阻器twenty three. . . Resistor
24...多工器twenty four. . . Multiplexer
25...低通濾波器25. . . Low pass filter
26...輸入電源26. . . Input power
27...感測電阻器27. . . Sense resistor
28...電流放大器28. . . Current amplifier
29...脈波寬度調變器29. . . Pulse width modulator
30...閘極驅動器30. . . Gate driver
31...主動功率開關31. . . Active power switch
A...電壓誤差訊號A. . . Voltage error signal
B...輸入電壓訊號B. . . Input voltage signal
C...訊號C. . . Signal
C1...輸出電容器C1. . . Output capacitor
P1...交流電源P1. . . AC power
W1...輸入電壓波形W1. . . Input voltage waveform
W2...輸出電源波形W2. . . Output power waveform
W3...突波電流W3. . . Surge current
W4...電流命令W4. . . Current command
126...輸入電壓波形126. . . Input voltage waveform
128...輸入電流波形128. . . Input current waveform
130...輸出電壓波形130. . . Output voltage waveform
132...輸出電流波形132. . . Output current waveform
41...輸入電源41. . . Input power
42...整流器42. . . Rectifier
43...功率因數修正元件43. . . Power factor correction component
44...功率開關44. . . Power switch
45...二極體45. . . Dipole
46...儲能元件46. . . Energy storage component
47...電壓感測單元47. . . Voltage sensing unit
471...分壓電阻器471. . . Voltage dividing resistor
472...分壓電阻器472. . . Voltage dividing resistor
48...閘極驅動器48. . . Gate driver
49...負載49. . . load
50...第一電流感測單元50. . . First current sensing unit
60...微處理器60. . . microprocessor
61...強健控制器61. . . Robust controller
611...第一類比數位轉換接點611. . . First analog digital conversion junction
612...高通濾波器612. . . High pass filter
613...時間延遲模組613. . . Time delay module
614...第二類比數位轉換接點614. . . Second analog digital conversion junction
62...電壓控制器62. . . Voltage controller
63...正弦信號計算器63. . . Sinusoidal signal calculator
631...數位輸入點631. . . Digital input point
632...計時器632. . . Timer
633...正弦波表起始位置633. . . Sine wave table start position
634...正弦波表634. . . Sine wave table
635...第三類比數位轉換接點635. . . Third analog digital conversion junction
64...電流控制器64. . . Current controller
65...脈波寬度調變器65. . . Pulse width modulator
651...數位接點651. . . Digital contact
70...第二電流感測單元70. . . Second current sensing unit
80...零交越點偵測單元80. . . Zero crossover detection unit
81...降壓電路81. . . Buck circuit
82...零交越點偵測電路82. . . Zero crossover detection circuit
Vo...直流輸出電壓Vo. . . DC output voltage
V1...降壓電壓V1. . . Step-down voltage
S1...脈波數位訊號S1. . . Pulse wave digital signal
W5...電流命令W5. . . Current command
W6...輸入電流波形W6. . . Input current waveform
第一圖為習知單相整流電路架構示意圖。The first figure is a schematic diagram of a conventional single-phase rectification circuit architecture.
第二圖為第一圖單相整流電路之輸出入電壓波形圖。The second figure is a waveform diagram of the input and output voltages of the single-phase rectifier circuit of the first figure.
第三圖為習知傳統單相主動式PFC專用控制IC(UCC3854)之控制架構電路示意圖。The third figure is a schematic diagram of the control architecture circuit of the conventional traditional single-phase active PFC dedicated control IC (UCC3854).
第四圖為第三圖輸入電源電壓為非純正弦波時所產生之波形圖。The fourth figure is the waveform diagram generated when the input power supply voltage is a non-pure sine wave.
第五圖為本發明輸入電源電壓為非純正弦波時所產生之波形圖。The fifth figure is a waveform diagram generated when the input power supply voltage of the present invention is a non-pure sine wave.
第六圖為本發明較佳實施例之電路架構示意圖。Figure 6 is a schematic diagram of a circuit architecture of a preferred embodiment of the present invention.
第七圖為本發明降壓電路及零交越點偵測電路所產生之波形圖。The seventh figure is a waveform diagram generated by the step-down circuit and the zero-crossing point detecting circuit of the present invention.
第八圖為本發明正弦信號計算器之計算流程示意圖。The eighth figure is a schematic diagram of the calculation flow of the sinusoidal signal calculator of the present invention.
第九圖為本發明交流輸入電壓110V之滿载(400W)時之實測波形圖。The ninth figure is a measured waveform diagram of the AC input voltage of 110V at full load (400W).
第十圖為本發明未加入強健控制器之步階負載變化(10%至100%額定負載)之實測波形圖。The tenth figure is a measured waveform diagram of the step load variation (10% to 100% rated load) of the present invention without adding a robust controller.
第十一圖為本發明加入強健控制之步階負載變化(10%至100%額定負載)之實測波形圖。The eleventh figure is a measured waveform diagram of the step load variation (10% to 100% rated load) added to the robust control of the present invention.
第十二圖為本發明加入強健控制之週期性(4Hz)步階負載變化(10%至100%額定負載)之實測波形圖。The twelfth figure is a measured waveform diagram of the periodic (4 Hz) step load variation (10% to 100% of rated load) added to the robust control of the present invention.
41...輸入電源41. . . Input power
42...整流器42. . . Rectifier
43...功率因數修正元件43. . . Power factor correction component
44...功率開關44. . . Power switch
45...二極體45. . . Dipole
46...儲能元件46. . . Energy storage component
47...電壓感測單元47. . . Voltage sensing unit
471...分壓電阻器471. . . Voltage dividing resistor
472...分壓電阻器472. . . Voltage dividing resistor
48...閘極驅動器48. . . Gate driver
49...負載49. . . load
50...第一電流感測單元50. . . First current sensing unit
60...微處理器60. . . microprocessor
61...強健控制器61. . . Robust controller
611...第一類比數位轉換接點611. . . First analog digital conversion junction
612...高通濾波器612. . . High pass filter
613...時間延遲模組613. . . Time delay module
614...第二類比數位轉換接點614. . . Second analog digital conversion junction
62...電壓控制器62. . . Voltage controller
63...正弦信號計算器63. . . Sinusoidal signal calculator
631...數位輸入點631. . . Digital input point
635...第三類比數位轉換接點635. . . Third analog digital conversion junction
64...電流控制器64. . . Current controller
65...脈波寬度調變器65. . . Pulse width modulator
651...數位接點651. . . Digital contact
70...第二電流感測單元70. . . Second current sensing unit
80...零交越點偵測單元80. . . Zero crossover detection unit
81...降壓電路81. . . Buck circuit
82...零交越點偵測電路82. . . Zero crossover detection circuit
Claims (8)
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TW098110517A TWI384346B (en) | 2009-03-30 | 2009-03-30 | Power factor correction converter with fast load regulation capability |
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TW098110517A TWI384346B (en) | 2009-03-30 | 2009-03-30 | Power factor correction converter with fast load regulation capability |
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TW201035717A TW201035717A (en) | 2010-10-01 |
TWI384346B true TWI384346B (en) | 2013-02-01 |
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CN103166476A (en) * | 2012-12-26 | 2013-06-19 | 黄冠雄 | Alternating current numerical control pressure regulating and current controlling transmission system |
TWI551018B (en) * | 2015-12-15 | 2016-09-21 | Nat Inst Chung Shan Science & Technology | Power factor correction conversion device and control method thereof |
CN114142718B (en) * | 2021-11-18 | 2023-05-09 | 珠海英搏尔电气股份有限公司 | Active power factor correction circuit, switching power supply and vehicle |
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US5134355A (en) * | 1990-12-31 | 1992-07-28 | Texas Instruments Incorporated | Power factor correction control for switch-mode power converters |
US20060139020A1 (en) * | 2004-12-14 | 2006-06-29 | International Rectifier Corporation | Simple partial switching power factor correction circuit |
US7423386B2 (en) * | 2003-12-03 | 2008-09-09 | Universal Lighting Technologies, Inc. | Power supply circuits and methods for supplying stable power to control circuitry in an electronic ballast |
TW200912592A (en) * | 2007-09-07 | 2009-03-16 | Univ Nat Chiao Tung | Power factor correction method and device thereof |
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US5134355A (en) * | 1990-12-31 | 1992-07-28 | Texas Instruments Incorporated | Power factor correction control for switch-mode power converters |
US7423386B2 (en) * | 2003-12-03 | 2008-09-09 | Universal Lighting Technologies, Inc. | Power supply circuits and methods for supplying stable power to control circuitry in an electronic ballast |
US20060139020A1 (en) * | 2004-12-14 | 2006-06-29 | International Rectifier Corporation | Simple partial switching power factor correction circuit |
TW200912592A (en) * | 2007-09-07 | 2009-03-16 | Univ Nat Chiao Tung | Power factor correction method and device thereof |
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Title |
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Figueres, E.; Benavent, J.M.; Garcera, G.; Pascual, M. "A Control Circuit With Load-Current Injection for Single-Phase Power-Factor-Correction Rectifiers", IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 3, JUNE 2007 on page 1272-1281 * |
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