TWI383373B - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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TWI383373B
TWI383373B TW97115388A TW97115388A TWI383373B TW I383373 B TWI383373 B TW I383373B TW 97115388 A TW97115388 A TW 97115388A TW 97115388 A TW97115388 A TW 97115388A TW I383373 B TWI383373 B TW I383373B
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signal
liquid crystal
frame
crystal display
image signal
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TW200945318A (en
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Sheng Tien Cho
Kai Chieh Chan
Eddy Giing Lii Chen
Kuo Feng Li
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Chimei Innolux Corp
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Description

液晶顯示裝置Liquid crystal display device

本發明係關於一種液晶顯示裝置。The present invention relates to a liquid crystal display device.

液晶顯示裝置具有體積小、耗電低及輻射少等特點,被廣泛應用於監視器、液晶電視、行動電話及筆記型電腦等領域,並逐漸成為市場之主流。惟,液晶本身係黏滯係數物質,造成液晶顯示裝置之反應速度無法與CRT顯示器相抗衡。當畫面快速切換時,由於液晶之反應速度過慢,導致影像來不及轉換而顯示一灰階較淡之畫面,即殘影現象。The liquid crystal display device has the characteristics of small size, low power consumption and low radiation, and is widely used in the fields of monitors, LCD TVs, mobile phones, and notebook computers, and has gradually become the mainstream of the market. However, the liquid crystal itself is a viscous coefficient substance, and the reaction speed of the liquid crystal display device cannot compete with the CRT display. When the screen is quickly switched, the reaction speed of the liquid crystal is too slow, resulting in an image that is too late to be converted to display a grayscale image, that is, a residual image phenomenon.

請參閱圖1,係一種先前技術之液晶顯示面板動態圖像響應曲線(MPRC)示意圖。該動態圖像響應曲線圖之縱軸表示經常態化後之光亮度值。橫軸表示像素間之相對位置,如標示600為液晶顯示面板左側之像素,標示1000為液晶顯示面板右側之像素,而標示800則係液晶顯示面板中間之像素。該動態圖像響應曲線係經由參考光產生時間、液晶反應時間及人眼視覺反應時間而繪制之模擬曲線。該動態圖像響應曲線表示當移動物體於背景亮度環境中,物體由橫軸600移動至橫軸1000所產生之殘影現象。左邊之像素顯示背景,右邊之像素顯示移動後之物體,由此可以發現像素700至像素900之間有一斜曲線區域。該斜曲線區域因亮度值介於背景及物體之間而顯示一比物體較淡之灰階,其表示背景與物體之間存在一模糊區域,即為殘影現象。因此,由於液晶之反應速度較慢,導致中間部分仍顯示較淡灰階,其亮度介於 0~1之間。Please refer to FIG. 1 , which is a schematic diagram of a dynamic image response curve (MPRC) of a prior art liquid crystal display panel. The vertical axis of the dynamic image response graph represents the brightness value after the regularization. The horizontal axis represents the relative position between the pixels. For example, the symbol 600 is the pixel on the left side of the liquid crystal display panel, the reference numeral 1000 is the pixel on the right side of the liquid crystal display panel, and the indicator 800 is the pixel in the middle of the liquid crystal display panel. The dynamic image response curve is a simulated curve drawn by reference light generation time, liquid crystal reaction time, and human visual response time. The dynamic image response curve represents an afterimage phenomenon caused by the moving object moving from the horizontal axis 600 to the horizontal axis 1000 in the background brightness environment. The pixel on the left shows the background, and the pixel on the right shows the object after the movement, whereby it can be found that there is a sloped area between the pixel 700 and the pixel 900. The oblique curve area displays a gray level which is lighter than the object due to the brightness value being between the background and the object, which indicates that there is a blurred area between the background and the object, that is, an afterimage phenomenon. Therefore, due to the slow reaction speed of the liquid crystal, the middle portion still shows a light gray scale, and the brightness is between Between 0~1.

請參閱圖2,係一種先前技術之液晶顯示裝置之模塊示意圖。該液晶顯示裝置1包括一微處理器(MCU)11、一過激驅動電路12及一液晶顯示面板13。該微處理器11連接至該過激驅動電路12,該過激驅動電路12連接至該液晶顯示面板13。Please refer to FIG. 2, which is a block diagram of a prior art liquid crystal display device. The liquid crystal display device 1 includes a microprocessor (MCU) 11, an overdrive circuit 12, and a liquid crystal display panel 13. The microprocessor 11 is connected to the overdrive circuit 12, and the overdrive circuit 12 is connected to the liquid crystal display panel 13.

該過激驅動電路12包括複數查找表(Look Up Tables,LUTs),每一個查找表中儲存有複數原始灰階及與該原始灰階對應之複數校正灰階。該複數查找表儲存於一硬體媒介。該微處理器11用於接收一灰階顯示訊號並產生一原始灰階。該過激驅動電路12接收該原始灰階,於該查找表中查找對應該原始灰階之校正灰階,並輸出該校正灰階至該液晶顯示面板13。該液晶顯示面板13根據接收到之校正灰階顯示對應圖像。如,該微處理器11接收到一亮度值192之灰階顯示訊號,其產生一對應原始灰階。該原始灰階輸入該過激驅動電路,將輸出一亮度值202之校正灰階訊號。因此,藉由提高電壓來加強液晶之反應速度以增強顯示效果。The overdrive circuit 12 includes a Look Up Tables (LUTs), each of which stores a complex original gray scale and a complex corrected gray scale corresponding to the original gray scale. The complex lookup table is stored in a hardware medium. The microprocessor 11 is configured to receive a gray scale display signal and generate an original gray scale. The overdrive circuit 12 receives the original gray scale, finds a corrected gray scale corresponding to the original gray scale in the lookup table, and outputs the corrected gray scale to the liquid crystal display panel 13. The liquid crystal display panel 13 displays a corresponding image based on the received grayscale correction. For example, the microprocessor 11 receives a grayscale display signal of a luminance value 192 that produces a corresponding original grayscale. The original gray scale is input to the overdrive circuit, and a corrected gray scale signal of a luminance value 202 is output. Therefore, the reaction speed of the liquid crystal is enhanced by increasing the voltage to enhance the display effect.

惟,該過激驅動電路12之複數查找表,每一個查找表中儲存有複數原始灰階及與該原始灰階對應之複數校正灰階,該複數校正灰階均為預设值不可調節,受參考光產生時間及人眼視覺反應時間等因數影響,使得該液晶顯示面板13輸出畫面未能達到最佳效果。另,該複數查找表儲存於一硬體媒介,亦增加電路設計複雜度及提高成本。However, the complex lookup table of the overdrive circuit 12 stores a complex original gray scale and a complex corrected gray scale corresponding to the original gray scale in each lookup table, and the complex corrected gray scales are all preset values are not adjustable, The factors such as the reference light generation time and the human visual response time make the output image of the liquid crystal display panel 13 fail to achieve the best effect. In addition, the complex lookup table is stored in a hardware medium, which also increases circuit design complexity and increases cost.

有鑑於此,提供一種更精確顯示、電路設計簡單且成本較低之液晶顯示裝置實為必要。In view of this, it is necessary to provide a liquid crystal display device with more accurate display, simple circuit design, and lower cost.

一種液晶顯示裝置,其包括一圖像訊號輸出端、一幀緩存器、一微處理器及一液晶顯示面板。該圖像訊號輸出端用於依次輸出複數幀圖像訊號。該幀緩存器用於依次接收該圖像訊號輸出端傳輸之複數幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後再輸出。該微處理器用於接收該幀緩存器輸出之圖像訊號及該圖像訊號輸出端傳輸之圖像訊號,得出該相鄰二幀圖像訊號之差值訊號,並將該差值訊號與一預定係數相乘產生一輸出訊號,該輸出訊號與該圖像訊號輸出端傳輸之圖像訊號相加並產生一顯示訊號。該液晶顯示面板用於接收顯示訊號並實現圖像顯示。A liquid crystal display device includes an image signal output terminal, a frame buffer, a microprocessor and a liquid crystal display panel. The image signal output end is used for sequentially outputting a plurality of frame image signals. The frame buffer is configured to sequentially receive the plurality of frame image signals transmitted by the image signal output end, and sequentially store the plurality of frame image signals for one frame time before outputting. The microprocessor is configured to receive an image signal output by the frame buffer and an image signal transmitted by the image signal output end, and obtain a difference signal of the adjacent two frame image signals, and the difference signal is Multiplying a predetermined coefficient produces an output signal that is added to the image signal transmitted by the image signal output to generate a display signal. The liquid crystal display panel is configured to receive display signals and implement image display.

一種液晶顯示裝置,其包括一圖像訊號輸出端、一第一幀緩存器、一第二幀緩存器、一微處理器及一液晶顯示面板。該圖像訊號輸出端用於依次輸出複數幀圖像訊號。該第二幀緩存器用於依次接收該圖像訊號輸出端傳輸之複數幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後再輸出。該第一幀緩存器用於依次接收該第二幀緩存器傳輸之複數幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後再輸出。該微處理器用於接收該第二幀緩存器傳輸之圖像訊號及該第一幀緩存器傳輸之圖像訊號,得出該相鄰二幀圖像訊號之差值訊號,並將該差值訊號與一預定係數相乘產生一輸出訊號,該輸出訊號與該第二幀緩存器傳輸之圖像訊號相加並產生一顯示訊號。該液晶顯示面板用於接 收顯示訊號並實現圖像顯示。A liquid crystal display device includes an image signal output terminal, a first frame buffer, a second frame buffer, a microprocessor and a liquid crystal display panel. The image signal output end is used for sequentially outputting a plurality of frame image signals. The second frame buffer is configured to sequentially receive the plurality of frame image signals transmitted by the image signal output end, and sequentially store the plurality of frame image signals for one frame time before outputting. The first frame buffer is configured to sequentially receive the plurality of frame image signals transmitted by the second frame buffer, and sequentially store the plurality of frame image signals for one frame time before outputting. The microprocessor is configured to receive an image signal transmitted by the second frame buffer and an image signal transmitted by the first frame buffer, and obtain a difference signal of the adjacent two frame image signals, and the difference is The signal is multiplied by a predetermined coefficient to generate an output signal, and the output signal is added to the image signal transmitted by the second frame buffer to generate a display signal. The liquid crystal display panel is used for connection Receive the display signal and realize the image display.

相較於先前技術,該液晶顯示裝置藉由該微處理器接收當前鄰幀及前一幀圖像訊號,得出該相鄰二幀圖像訊號之差值訊號,並將該差值訊號與一預定係數相乘產生一輸出訊號,該輸出訊號與該外部輸入之當前幀圖像訊號相加並產生一顯示訊號,使得其圖像顯示更精確。另,省去一硬體媒介使得電路設計簡單且成本較低。Compared with the prior art, the liquid crystal display device receives the current adjacent frame and the previous frame image signal by the microprocessor, and obtains a difference signal of the adjacent two frame image signals, and the difference signal is Multiplying a predetermined coefficient produces an output signal that is added to the current frame image signal of the external input and produces a display signal to make the image display more accurate. In addition, the elimination of a hard medium makes the circuit design simple and low cost.

請參閱圖3,圖3係本發明之液晶顯示裝置之第一實施方式之模塊示意圖。該液晶顯示裝置3包括一圖像訊號輸出端(未標示)、一第一幀緩存器(Frame Buffer)32、一第二幀緩存器31、一減法器33、一乘法器34、一加法器35及一液晶顯示面板36。其中,該減法器33、乘法器34及加法器35構成一微處理器(未標示)。Please refer to FIG. 3. FIG. 3 is a schematic diagram of a module of a first embodiment of a liquid crystal display device of the present invention. The liquid crystal display device 3 includes an image signal output terminal (not shown), a first frame buffer (Frame Buffer) 32, a second frame buffer 31, a subtractor 33, a multiplier 34, and an adder. 35 and a liquid crystal display panel 36. The subtractor 33, the multiplier 34 and the adder 35 constitute a microprocessor (not shown).

該圖像訊號輸出端用於依次輸出第1,2,3……n幀(n≧1)圖像訊號圖像訊號。該第二幀緩存器31用於依次接收該圖像訊號輸出端所傳輸之第1,2,3……n幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後,依次傳輸至該第一幀緩存器32。該第一幀緩存器32用於依次接收該該第二幀緩存器31所傳輸之第1,2,3……n幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後,依次傳輸至該減法器33。該減法器33用於接收該第二幀緩存器31所傳輸之第n幀之圖像訊號及該第一幀緩存器32所傳輸之第n-1幀之圖像訊號並產生二者之差值訊號。該乘法器34 接收該差值訊號,並將該差值訊號與一預定係數相乘產生一輸出訊號。該加法器35接收該乘法器34之輸出訊號及該第二幀緩存器31輸出之第n幀之圖像訊號,對該二訊號執行相加操作並產生一顯示訊號。該液晶顯示面板36用於接收顯示訊號並實現圖像顯示。The image signal output end is used to sequentially output the first, second, third, ... (n≧1) image signal image signals. The second frame buffer 31 is configured to sequentially receive the first, second, third, ... n frame image signals transmitted by the image signal output end, and sequentially store the plurality of frame image signals for one frame time. Thereafter, it is sequentially transmitted to the first frame buffer 32. The first frame buffer 32 is configured to sequentially receive the first, second, third, ... n frame image signals transmitted by the second frame buffer 31, and sequentially perform the frame time signal on the plurality of frame image signals. After the temporary storage, it is sequentially transmitted to the subtractor 33. The subtracter 33 is configured to receive an image signal of the nth frame transmitted by the second frame buffer 31 and an image signal of the n-1th frame transmitted by the first frame buffer 32, and generate a difference between the two. Value signal. The multiplier 34 Receiving the difference signal and multiplying the difference signal by a predetermined coefficient to generate an output signal. The adder 35 receives the output signal of the multiplier 34 and the image signal of the nth frame output by the second frame buffer 31, performs an addition operation on the two signals, and generates a display signal. The liquid crystal display panel 36 is configured to receive display signals and implement image display.

假設人眼可以見到該液晶顯示面板36之每一幀圖像,En表示人眼看到該液晶顯示面板36第n幀顯示之圖像訊號,Fn表示第n幀該液晶顯示面板36之圖像訊號,Fn-1表示第n-1幀該液晶顯示面板36之圖像訊號。當該液晶顯示面板36顯示第n幀之圖像時,人眼並不是覺察到該第n幀之圖像,而是感受到第n幀及第n-1幀之圖像之權重平均值。該En與Fn、Fn-1之關係如下:En=aFn+bFn-1其中,0≦a≦1,0≦b≦1,且a+b=1。It is assumed that the human eye can see each frame image of the liquid crystal display panel 36, En indicates that the human eye sees the image signal displayed in the nth frame of the liquid crystal display panel 36, and Fn represents the image of the liquid crystal display panel 36 in the nth frame. The signal, Fn-1, represents the image signal of the liquid crystal display panel 36 in the n-1th frame. When the liquid crystal display panel 36 displays the image of the nth frame, the human eye does not perceive the image of the nth frame, but feels the weight average of the images of the nth frame and the n-1th frame. The relationship between En and Fn and Fn-1 is as follows: En=aFn+bFn-1, where 0≦a≦1, 0≦b≦1, and a+b=1.

該等式表示人眼所看到之圖像為第n幀該液晶顯示面板36之圖像與第n-1幀該液晶顯示面板36之圖像之權重平均值。The equation indicates that the image seen by the human eye is the weight average of the image of the liquid crystal display panel 36 in the nth frame and the image of the liquid crystal display panel 36 in the n-1th frame.

根據以上推理,若要人眼不受前一幀顯示圖像之影響,則需將該液晶顯示面板36顯示之圖像Fn調變為Fn'以使人眼感受到之圖像為Fn。即:En=aFn'+bFn-1,且En=Fn。According to the above reasoning, if the human eye is not affected by the image displayed in the previous frame, the image Fn displayed on the liquid crystal display panel 36 needs to be changed to Fn' so that the image perceived by the human eye is Fn. That is: En=aFn'+bFn-1, and En=Fn.

整理得到,Fn'=Fn+(Fn-Fn-1)b/a。Finished, Fn' = Fn + (Fn - Fn-1) b / a.

可知,若使人眼所見到第n幀圖像不受前一幀n-1圖像影響,需使得該液晶顯示面板36第n幀所顯示圖像Fn'為原 先第n幀所顯示圖像加第n幀圖像與第n-1幀圖像差值與係數值乘積之和。該係數b/a之較佳範圍為0.5至19之間。比如,a為0.6,b為0.4,b/a為2/3,可得Fn'=Fn+2(Fn-Fn-1)/3。It can be seen that if the image of the nth frame is not affected by the image of the previous frame n-1, the image Fn' displayed in the nth frame of the liquid crystal display panel 36 is required to be the original image. The image displayed in the nth frame plus the sum of the difference between the nth frame image and the n-1th frame image and the coefficient value. The preferred range of the coefficient b/a is between 0.5 and 19. For example, a is 0.6, b is 0.4, and b/a is 2/3, and Fn'=Fn+2(Fn-Fn-1)/3 is obtained.

該二幀緩存器31、32分別傳輸第n幀及第n-1幀圖像訊號至該減法器33可得差值Fn-Fn-1。該乘法器34接收該差值並與比值b/a相乘所得結果傳輸至該加法器35,此時該加法器35亦接收該第二幀緩存器31之第n幀圖像訊號,將所接收二訊號相加並傳輸至該液晶顯示面板36,實現畫面顯示。The two frame buffers 31 and 32 respectively transmit the nth frame and the n-1th frame image signal to the subtractor 33 to obtain a difference Fn-Fn-1. The multiplier 34 receives the difference and multiplies the result by the ratio b/a, and the result is transmitted to the adder 35. At this time, the adder 35 also receives the nth frame image signal of the second frame buffer 31. The received two signals are added and transmitted to the liquid crystal display panel 36 to realize screen display.

相較於先前技術,該液晶顯示裝置3藉由該微處理器接收二相鄰幀第n-1及n幀圖像訊號,得出該相鄰二幀圖像訊號之差值訊號,並將該差值訊號與一預定係數b/a相乘產生一輸出訊號,該輸出訊號與該圖像訊號輸出端輸入之第n幀圖像訊號相加並產生一顯示訊號,使得其圖像顯示更精確。另,省去一硬體媒介使得電路設計簡單且成本較低。Compared with the prior art, the liquid crystal display device 3 receives the n-1th and nth frame image signals of the two adjacent frames by the microprocessor, and obtains the difference signal of the adjacent two frames of image signals, and The difference signal is multiplied by a predetermined coefficient b/a to generate an output signal, and the output signal is added to the nth frame image signal input by the image signal output terminal to generate a display signal, so that the image display is further displayed. accurate. In addition, the elimination of a hard medium makes the circuit design simple and low cost.

請參閱圖4,係本發明之液晶顯示裝置之第二實施方式之模塊示意圖。該液晶顯示裝置4與該第一實施方式之液晶顯示裝置3大致相同,其主要區別在於:該液晶顯示裝置4包括一屏幕顯示控制系統(On Screen Display,OSD)47,該屏幕顯示控制系統47連接至該乘法器44,用於調節係數b/a。用戶於某些特定畫面下藉由調整該屏幕顯示控制系統47,使得該液晶顯示面板46輸出畫面達到最佳效果。Please refer to FIG. 4, which is a schematic diagram of a second embodiment of a liquid crystal display device of the present invention. The liquid crystal display device 4 is substantially the same as the liquid crystal display device 3 of the first embodiment, and the main difference is that the liquid crystal display device 4 includes an on screen display (OSD) 47, and the screen display control system 47 Connected to the multiplier 44 for adjusting the coefficient b/a. The user can adjust the screen display control system 47 under certain screens to make the liquid crystal display panel 46 output a picture to achieve the best effect.

本發明之液晶顯示裝置亦可具其他多種變更設計,如:該液晶顯示裝置僅包括一幀緩存器。該幀緩存器用於依次接 收圖像訊號輸出端所傳輸之第1,2,3……n幀(n≧1)圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後,依次傳輸至該減法器。該減法器接收該圖像訊號輸出端傳輸之第n幀之圖像訊號及該幀緩存器之該第n-1幀之圖像訊號並產生二者之差值訊號。The liquid crystal display device of the present invention may also have various other modifications, such as: the liquid crystal display device includes only one frame buffer. The frame buffer is used to sequentially connect Receiving the first, second, third, and nth (n≧1) image signals transmitted by the image signal output end, and sequentially storing the plurality of frame image signals for one frame time, and then sequentially transmitting the image signals to the image signal Subtractor. The subtracter receives the image signal of the nth frame transmitted by the image signal output end and the image signal of the n-1th frame of the frame buffer and generates a difference signal between the two.

綜上所述,本發明確已符合發明專利之要件,爰依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,本發明之範圍並不以上述實施方式為限,舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and equivalent modifications or variations made by those skilled in the art in light of the spirit of the present invention are It should be covered by the following patent application.

液晶顯示裝置‧‧‧3、4Liquid crystal display device ‧‧3,4

第二幀緩存器‧‧‧31Second frame buffer ‧‧31

第一幀緩存器‧‧‧32First frame buffer ‧‧‧32

減法器‧‧‧33Subtractor ‧‧33

乘法器‧‧‧34、44Multiplier ‧‧·34,44

加法器‧‧‧35Adder ‧‧35

液晶顯示面板‧‧‧36、46LCD panel ‧‧‧36,46

屏幕顯示控制系統‧‧‧47Screen display control system ‧‧47

圖1係一種先前技術之液晶顯示面板動態圖像響應曲線示意圖。1 is a schematic diagram of a dynamic image response curve of a prior art liquid crystal display panel.

圖2係一種先前技術之液晶顯示裝置之模塊示意圖。2 is a block diagram of a prior art liquid crystal display device.

圖3係本發明之液晶顯示裝置之第一實施方式之模塊示意圖。3 is a schematic block diagram of a first embodiment of a liquid crystal display device of the present invention.

圖4係本發明之液晶顯示裝置之第二實施方式之模塊示意圖。4 is a schematic block diagram of a second embodiment of a liquid crystal display device of the present invention.

液晶顯示裝置‧‧‧3Liquid crystal display device ‧‧3

第二幀緩存器‧‧‧31Second frame buffer ‧‧31

第一幀緩存器‧‧‧32First frame buffer ‧‧‧32

減法器‧‧‧33Subtractor ‧‧33

乘法器‧‧‧34Multiplier ‧‧34

加法器‧‧‧35Adder ‧‧35

液晶顯示面板‧‧‧36LCD panel ‧‧36

Claims (12)

一種液晶顯示裝置,其包括:一圖像訊號輸出端,用於依次輸出複數幀圖像訊號;一幀緩存器,用於依次接收該圖像訊號輸出端傳輸之複數幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後再輸出;一微處理器,用於接收該幀緩存器輸出之圖像訊號及該圖像訊號輸出端傳輸之圖像訊號,得出該相鄰二幀圖像訊號之差值訊號,並將該差值訊號與一預定係數相乘產生一輸出訊號,該輸出訊號與該圖像訊號輸出端傳輸之圖像訊號相加並產生一顯示訊號;及一液晶顯示面板,用於接收顯示訊號並實現圖像顯示。A liquid crystal display device comprising: an image signal output end for sequentially outputting a plurality of frame image signals; a frame buffer for sequentially receiving a plurality of frame image signals transmitted by the image signal output end, and sequentially The plurality of frame image signals are temporarily stored for one frame time and then output; a microprocessor is configured to receive the image signal output by the frame buffer and the image signal transmitted by the image signal output end, and obtain a difference signal of the adjacent two frames of image signals, and multiplying the difference signal by a predetermined coefficient to generate an output signal, and the output signal is added to the image signal transmitted by the image signal output end to generate a Display signal; and a liquid crystal display panel for receiving display signals and realizing image display. 如申請專利範圍第1項所述之液晶顯示裝置,其中,該微處理器進一步包括一減法器,該減法器用於接收該圖像訊號輸出端傳輸之當前幀圖像訊號及該幀緩存器輸出之當前幀圖像訊號之前一幀圖像訊號及並產生二者之差值訊號。The liquid crystal display device of claim 1, wherein the microprocessor further comprises a subtractor for receiving a current frame image signal transmitted by the image signal output end and the frame buffer output. The image signal of one frame before the current frame image signal and the difference signal of the two are generated. 如申請專利範圍第2項所述之液晶顯示裝置,其中,該微處理器進一步包括一乘法器,該乘法器接收該差值訊號並與一預定係數相乘,產生一輸出訊號,該預定係數之範圍界於0.5至19之間。The liquid crystal display device of claim 2, wherein the microprocessor further comprises a multiplier, the multiplier receiving the difference signal and multiplying by a predetermined coefficient to generate an output signal, the predetermined coefficient The range is between 0.5 and 19. 如申請專利範圍第3項所述之液晶顯示裝置,其進一步包括一屏幕顯示控制系統,該屏幕顯示控制系統與該乘法器相連接,控制該預定係數之大小。The liquid crystal display device of claim 3, further comprising a screen display control system, wherein the screen display control system is coupled to the multiplier to control the magnitude of the predetermined coefficient. 如申請專利範圍第3項或第4項所述之液晶顯示裝置,其中,該微處理器進一步包括一加法器,該加法器接收該乘法器之輸出訊號及該圖像訊號輸出端傳輸之當前幀圖像訊號,對該二訊號執行相加操作並產生一顯示訊號。The liquid crystal display device of claim 3, wherein the microprocessor further comprises an adder, wherein the adder receives the output signal of the multiplier and the current transmission of the image signal output end The frame image signal performs an addition operation on the two signals and generates a display signal. 如申請專利範圍第3項或第4項所述之液晶顯示裝置,其中,該預定係數為2/3。The liquid crystal display device of claim 3, wherein the predetermined coefficient is 2/3. 一種液晶顯示裝置,其包括:一圖像訊號輸出端,用於依次輸出複數幀圖像訊號;一第二幀緩存器,用於依次接收該圖像訊號輸出端傳輸之複數幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後再輸出;一第一幀緩存器,用於依次接收該第二幀緩存器傳輸之複數幀圖像訊號,並依次對該複數幀圖像訊號進行一幀時間之暫存後再輸出;一微處理器,用於接收該第二幀緩存器傳輸之圖像訊號及該第一幀緩存器傳輸之圖像訊號,得出該相鄰二幀圖像訊號之差值訊號,並將該差值訊號與一預定係數相乘產生一輸出訊號,該輸出訊號與該第二幀緩存器傳輸之圖像訊號相加並產生一顯示訊號;及一液晶顯示面板,用於接收顯示訊號並實現圖像顯示。A liquid crystal display device includes: an image signal output end for sequentially outputting a plurality of frame image signals; and a second frame buffer for sequentially receiving a plurality of frame image signals transmitted by the image signal output end, And sequentially outputting the plurality of frame image signals for one frame time and then outputting; a first frame buffer for sequentially receiving the plurality of frame image signals transmitted by the second frame buffer, and sequentially the plurality of frames The frame image signal is temporarily stored for one frame time and then output; a microprocessor is configured to receive the image signal transmitted by the second frame buffer and the image signal transmitted by the first frame buffer, to obtain the image signal a difference signal of the adjacent two frames of image signals, and multiplying the difference signal by a predetermined coefficient to generate an output signal, the output signal is added to the image signal transmitted by the second frame buffer to generate a display a signal; and a liquid crystal display panel for receiving display signals and realizing image display. 如申請專利範圍第7項所述之液晶顯示裝置,其中,該微處理器進一步包括一減法器,該減法器用於接收該第二幀緩存器傳輸之當前幀圖像訊號及該第一幀緩存器輸出之當前幀圖像訊號之前一幀圖像訊號及並產生二者之差值 訊號。The liquid crystal display device of claim 7, wherein the microprocessor further comprises a subtractor, configured to receive a current frame image signal transmitted by the second frame buffer and the first frame buffer Outputs the image signal of the previous frame of the current frame image signal and produces the difference between the two Signal. 如申請專利範圍第8項所述之液晶顯示裝置,其中,該微處理器進一步包括一乘法器,該乘法器接收該差值訊號並與一預定係數相乘,產生一輸出訊號,該預定係數之範圍界於0.5至19之間。The liquid crystal display device of claim 8, wherein the microprocessor further comprises a multiplier, the multiplier receiving the difference signal and multiplying by a predetermined coefficient to generate an output signal, the predetermined coefficient The range is between 0.5 and 19. 如申請專利範圍第9項所述之液晶顯示裝置,其進一步包括一屏幕顯示控制系統,該屏幕顯示控制系統與該乘法器相連接,控制該預定係數之大小。The liquid crystal display device of claim 9, further comprising a screen display control system, the screen display control system being coupled to the multiplier to control the magnitude of the predetermined coefficient. 如申請專利範圍第9項或第10項所述之液晶顯示裝置,其中,該微處理器進一步包括一加法器,該加法器接收該乘法器之輸出訊號及該第二幀緩存器傳輸之圖像訊號,對該二訊號執行相加操作並產生一顯示訊號。The liquid crystal display device of claim 9 or claim 10, wherein the microprocessor further comprises an adder, the adder receiving the output signal of the multiplier and the second frame buffer transmission diagram Like the signal, the addition operation is performed on the two signals and a display signal is generated. 如申請專利範圍第9項或第10項所述之液晶顯示裝置,其中,該預定係數為2/3。The liquid crystal display device of claim 9, wherein the predetermined coefficient is 2/3.
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