1377537 九、發明說明： 【發明所屬之技彳标領域】 發明領域 本發明係關於顯示器用之薄膜電晶體陣列面板。 5 【冬奸】 發明背景 顯不益提供影像之資訊。液晶顯示器（LCD)及有機£]1 顯不器（OLED)比其他的平面顯示器更廣泛地被使用 ，並且 於LCD和OLED中’薄膜電晶體(TFT)陣列面板具有作為顯 10 示器控制器之作用。 TFT陣列面板具有多數列閘線、多數行資料線、被形 成於閘線和貧料線之相交處所形成的像素區域之多數像素 電極、以及連接該等像素電極至閘線和資料線之TFT。TFT 依據經由閘線被傳送之閘信號資料信號而切換經由資料線 15被傳送至像素電極之傳輸。驅動電壓產生器產生閘導通電 壓或閘斷電電壓並且轉送其至多數閘驅動積體電路(IC)。該 專閘驅動1C依據信號控制器之控制而產生閘信號。資料信 號藉由多數個資料驅動1C而被產生’該等多數個資料驅動 1C變換來自信號控制器之灰階信號為類比電壓。 20 信號控制器和驅動電壓產生器被形成於在LCD陣列面 板之外的印刷電路板(PCB)上’並且驅動ic被製作在介於 PCB和LCD組件之間的彈性印刷電路(fpc)上。一般，有兩 組PCB被使用。其中一組，被稱為閘PCB，其被置於液晶(LC) 面板組件之一側上，並且被稱為資料PCB之另一組，則被 5 置於另一侧上。因為閘驅動1C介於閘PCB和顯示面板之 間’並且資料驅動1(：介於該資料PCB和該顯示面板之間， 故各1C分別地接收來自對應的PCB之信號。 但是，閘PCB可能不被使用並且可能僅有資料PCb被使 用而不需改變閘FPC上之閘FPC和閘驅動1C的位置。於這情 况中’資料FPC和TFT陣列面板皆具有接線以從資料pCB上 之信號控制器以及驅動電壓產生器傳送信號至閘驅動IC， 進v地’閑FPC也具有接線以傳送信號至下一個閘驅動IC。 同％，有許多精細的接線被形成於TFT陣列面板上， 其中一些可能破斷開或被短路。為預防此事件之發生，一 二 阿网我破短路之電路的結構被備妥以避免 Z 被捨棄種用以修補資料線之斷開的修補線是最 :遍的—财法。麵補線m繞tft®板之顯示區域並且相 t貧料線兩端點而以―絕緣層介於其間。當資料線斷開 摘開之貝料線的兩端點藉由發射雷射光而被連接到 該修補線。 田靜電"_L進該修補線時，該靜 緣層並且流進相交兮攸、， -F . . / >補線之資料線。結果，可能導致顯 不區域中之TFT的缺陷。 L考务明内】 發明概要 支術主題是防止靜電經由修補線而造成薄膜 電晶體陣列面板之損宝。 、 本發明提供—種.¾ gy 土 ’寻獏陣列面板，其包含：一絕緣基片； 1377537 被形成於該絕緣基片上之閘線；資料線，其與該等閘線絕 緣且藉由相交該等閘線而定義一顯示區域；相交於該等閘 線之一靜電散佈線；被連接到該等閘線以及該靜電散佈線 之二極體；以及修補線，其用以修補被形成於該顯示區域 5 外之該絕緣基片上的該等資料線，並且相交於該靜電散佈 線。 此處，該等二極體可以包含第一組二極體，其具有被 連接到閘線和到靜電散佈線之兩電極，因此前向電流可從 閘線流動至靜電散佈線，以及第二組二極體，其具有被連 10 接到閘線和到靜電散佈線之二電極，因此傳送靜電可從靜 電散佈線流動至閘線。 該等修補線可以包含相交於該等資料線之第一修補 線、不相交於該等資料線之第二修補線，該第二修補線被 絕緣而相交於該靜電散佈線。 15 薄膜電晶體陣列面板可以進一步地包含比該第二修補 線較遠離該顯示區域並且是相鄰於該第二修補線之一接 線。靜電散佈線可在該修補線相交該資料線之前相交該修 補線。 薄膜電晶體陣列面板可以進一步地包含介於該修補線 20 和該靜電散佈線之間的一絕緣層。 修補線同時也可相交該資料線。 本發明也提供一種薄膜電晶體陣列面板，其包含：一 絕緣基片；被形成於該絕緣基片上之第一信號線；相交於 該第一信號線並且藉由相交該第一信號線而定義該顯示區 7 1377537 域之第二信號線；相交於該第一信號線之一靜電散佈線； 被連接到該第一信號線和該靜電散佈線之一個二極體；以 及周圍接線，其被形成於該顯示區域外之該絕緣基片上， 並且相交該靜電散佈線。 5 該周圍接線被絕緣而相交於該第二信號線。 圖式簡單說明 本發明較佳實施例可藉由下面附圖的說明而更詳細地 被了解，其中： 第1圖是依據本發明一實施例之液晶顯示器的透視圖； 10 第2圖是依據本發明一實施例之液晶顯示器像素的等 效電路圖； 第3圖是依據本發明一實施例之液晶顯示器的概略佈 局圖示； 第4圖是第3圖液晶顯示器之A部份的放大佈局圖； 15 第5圖是依據本發明一實施例之薄膜電晶體顯示器中 修補線和靜電散佈線之相交情況的佈局圖示；以及 第6圖是沿著第5圖展示之線VI-VI'所取的薄膜二極體 陣列面板之截面圖。 L實施方式3 20 較佳實施例之詳細說明 接著將參考所展示之附圖而更詳細地說明本發明之較 佳實施例。但是，本發明可以不同形式被實施，並且可理 解地，應不受限於揭示之實施例。反之，因這些實施例被 提供，所以這揭示將是周密且完全的，並且熟習本技術者 8 1377537 將完全地明白本發明之範疇。 於圖形中，為清楚起見，疊層、薄膜、以及區域之厚 度被放大。相同號螞指示於所有之相同元件。應了解到， 當70件(例如，疊層、薄膜、區域、或基片）被稱為在另一元 5件上”時，其可以是直接地在另一元件之上，或其間也可 以呈現元件。相對地，應了解到，當元件(例如，疊層、薄 膜、區域或基片）被稱為“直接地在另一元件之上，，時，其意 謂著其間不可呈現元件。 第1圖是依據本發明一實施例之液晶顯示器的透視 10圖，並且第2圖是依據本發明一實施例之液晶顯示器（LCD) 的像素等效電路圖。 如第1圖之展示，LCD具有一液晶（LC)面板組件300、 被連接到L C面板組件3 0 〇之閘驅動器4 〇 〇、被連接到l C面板 組件300之資料驅動器5〇〇 '被連接到閘驅動器4〇〇之驅動電 15壓產生器700、被連接到資料驅動器500之灰階電壓產生器 800、以及信號控制器600,其控制驅動電壓產生器7〇〇和灰 階電壓產生器800。 第1圖展示LC面板組件300，其包含多數信號線GrGn *D〗-Dm，以及被連接到該等信號線之多數個像素。各像素 20包含一組切換元件Q，其被連接到該等信號線GrGn和 Di-Dm ’且連接到一組LC電容器Ck以及一組儲存電容器 Cst。信號線Gi-Gn和D「Dm包含傳送行掃瞄信號或閘信號之 多數掃猫信號線或閘線Gi-Gn ’以及傳送列影像信號或資料 #號之資料信號線或資料線D^Dm。切換元件Q具有三個端 9 13775371377537 IX. Description of the Invention: [Technical Field of the Invention] Field of the Invention The present invention relates to a thin film transistor array panel for a display. 5 [Winter] The background of the invention is not conducive to providing information on images. Liquid crystal display (LCD) and organic £1 display (OLED) are used more widely than other flat-panel displays, and in thin-film transistor (TFT) array panels in LCDs and OLEDs as display controllers The role. The TFT array panel has a plurality of column gate lines, a plurality of rows of data lines, a plurality of pixel electrodes formed in a pixel region formed at intersections of the gate lines and the lean lines, and TFTs connecting the pixel electrodes to the gate lines and the data lines. The TFT switches the transmission to the pixel electrode via the data line 15 in accordance with the gate signal data signal transmitted via the gate line. The drive voltage generator generates a gate-on voltage or a gate-off voltage and forwards it to a majority of the gate drive integrated circuit (IC). The gate drive 1C generates a gate signal according to the control of the signal controller. The data signal is generated by driving a plurality of data 1C. The majority of the data drives the 1C conversion grayscale signal from the signal controller to an analog voltage. The signal controller and the driving voltage generator are formed on a printed circuit board (PCB) outside the panel of the LCD array and the driving ic is formed on a flexible printed circuit (fpc) interposed between the PCB and the LCD module. In general, two sets of PCBs are used. One of them, called the gate PCB, is placed on one side of the liquid crystal (LC) panel assembly and is referred to as another group of data PCBs, which is placed on the other side by 5. Because the gate drive 1C is between the gate PCB and the display panel' and the data drive 1 (between the data PCB and the display panel, each 1C receives a signal from the corresponding PCB separately. However, the gate PCB may Not used and may only be used by the data PCb without changing the position of the gate FPC and the gate driver 1C on the gate FPC. In this case, both the data FPC and the TFT array panel have wiring to control from the signal on the data pCB. And the drive voltage generator sends a signal to the gate drive IC, and the V-free FPC also has wiring to transmit signals to the next gate drive IC. At the same time, there are many fine wires formed on the TFT array panel, some of which It may break or be short-circuited. In order to prevent this from happening, the structure of the circuit that broke the short circuit of the first and second network is prepared to avoid the Z-removed patching line for repairing the disconnection of the data line. - The financial method. The surface line m is wrapped around the display area of the tft® board and the ends of the phase line are at the ends of the lean line. The insulation layer is interposed between them. When the data line is disconnected, the ends of the strip line are taken off. Connected by emitting laser light The repair line. When the field statics "_L enters the repair line, the static edge layer flows into the intersecting line, -F . . / > the data line of the line. As a result, the TFT in the visible area may be caused. The defect of the invention is summarized in the present invention. The subject of the invention is to prevent the static electricity from being damaged by the repairing line. The invention provides a kind of .3⁄4 gy soil 'seeking array panel, which comprises: An insulating substrate; 1377537 is formed on the insulating substrate; the data line is insulated from the gate lines and defines a display area by intersecting the gate lines; intersecting one of the gate lines to electrostatically a bulk wiring; a diode connected to the gate line and the static discharge wiring; and a repair line for repairing the data lines formed on the insulating substrate outside the display region 5, and intersecting The static dispersion wiring. Here, the diodes may include a first group of diodes having two electrodes connected to the gate lines and to the electrostatic discharge wiring, so the forward current may flow from the gate lines to the static electricity dispersion. Line, and the second set of poles The body has two electrodes connected to the gate line and to the electrostatic discharge wiring, so that static electricity can be transmitted from the electrostatic discharge wiring to the gate line. The repair lines can include the first repair line intersecting the data lines. a second repair line that is not intersected with the data line, the second repair line is insulated and intersects the electrostatic discharge wiring. 15 The thin film transistor array panel may further include a distance from the display area than the second repair line And being adjacent to one of the second repair lines. The electrostatic discharge wiring may intersect the repair line before the repair line intersects the data line. The thin film transistor array panel may further include the repair line 20 and the static electricity An insulating layer between the scattered wirings. The repairing lines can also intersect the data lines. The present invention also provides a thin film transistor array panel comprising: an insulating substrate; a first signal line formed on the insulating substrate; intersecting the first signal line and defined by intersecting the first signal line a second signal line of the display area 7 1377537; an electrostatic dispersion wiring intersecting one of the first signal lines; a diode connected to the first signal line and the static electricity wiring; and a surrounding wiring, which is Formed on the insulating substrate outside the display area, and intersecting the static electricity wiring. 5 The surrounding wiring is insulated and intersects the second signal line. BRIEF DESCRIPTION OF THE DRAWINGS A preferred embodiment of the present invention will be understood in more detail by the following description of the accompanying drawings in which: FIG. 1 is a perspective view of a liquid crystal display according to an embodiment of the invention; An equivalent circuit diagram of a liquid crystal display pixel according to an embodiment of the present invention; FIG. 3 is a schematic layout diagram of a liquid crystal display according to an embodiment of the present invention; and FIG. 4 is an enlarged layout view of a portion A of the liquid crystal display of FIG. 15 is a layout diagram of the intersection of the repair line and the electrostatic discharge wiring in the thin film transistor display according to an embodiment of the present invention; and FIG. 6 is a line VI-VI' shown along the fifth diagram; A cross-sectional view of the thin film diode array panel taken. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will now be described in more detail with reference to the accompanying drawings. The present invention may, however, be embodied in various forms and embodiments may be On the contrary, as these embodiments are provided, the disclosure will be thorough and complete, and the scope of the present invention will be fully understood by those skilled in the art. In the figures, the thickness of the laminate, film, and region are magnified for clarity. The same number indicates the same components. It should be understood that when 70 pieces (eg, a laminate, film, region, or substrate) are referred to as being "on another element 5", it may be directly on top of another element, or it may be presented between In contrast, it will be understood that when an element (e.g., a laminate, film, region or substrate) is referred to as being "directly over" another element, it is meant that the element is not present. 1 is a perspective view of a liquid crystal display according to an embodiment of the present invention, and FIG. 2 is a pixel equivalent circuit diagram of a liquid crystal display (LCD) according to an embodiment of the present invention. As shown in FIG. 1, the LCD has a liquid crystal (LC) panel assembly 300, a gate driver 4 connected to the LC panel assembly 30, and a data driver 5' connected to the LCD panel assembly 300. A driving power 15 voltage generator 700 connected to the gate driver 4, a gray scale voltage generator 800 connected to the data driver 500, and a signal controller 600 that controls the driving voltage generator 7 and the gray scale voltage generation 800. 1 shows an LC panel assembly 300 that includes a plurality of signal lines GrGn*D-Dm, and a plurality of pixels connected to the signal lines. Each pixel 20 includes a set of switching elements Q connected to the signal lines GrGn and Di-Dm' and to a set of LC capacitors Ck and a set of storage capacitors Cst. The signal lines Gi-Gn and D"Dm include a plurality of sweeping cat signal lines or gate lines Gi-Gn' for transmitting line scan signals or gate signals, and data signal lines or data lines for transmitting column image signals or data #DmDm Switching element Q has three ends 9 1377537
任巧相郇之上方閘線（下面將被稱為“先前 的儲存電容ncst被稱為分轉、_式，並且後者型式之儲 3 一電極可以被連 先前閘線”）。前者型式 存電容器cst被稱為先前閘型式。 0 @時’第2圖將概略地展*LC面板組件300之結構。為 方便起見，第2圖將展示一像素。 如第2圖之展示，LC面板組件300具有一下方面板 1〇〇、面向下方面板刚之上方面板細、以及介於二面板1〇〇 和200之間的LC層3。下方面板100具有開線^、資料 I5線D』、切換元件Q、以及儲存電容器Cst<>Ix：電容器ο。具有 —電極，一電極是下方面板1〇〇之像素電極且另一組電極是 上方面板200之共同電極270，並且介於二電極丨叩和270之 間的LC層3功能如介電質。 像素電極190被連接到切換元件q，並且共同電極270 20整體地被形成於上方面板200上且被連接到共同電壓Vconi。 此處，LC分子之配置依據藉由像素電極190和共同電 極270被產生之電場而被改變，並且對應地LC層3中之入射 光的極化被改變。由於極化被附帶於面板100和200之薄膜 (未被展示於第2圖中），此極化之改變導致入射光傳輸比率 1377537 之差量。 進一步地，被施加共同電壓之一組獨立接線形成於下 方面板100上。儲存電谷斋Cst被形成於像素電極〖go和獨立 接線之間。在先前的閘型式中，像素電極19〇重疊於先前閘 5 線丨而以絕緣層介於其間以形成儲存電容器。 於第2圖中，金屬-氧化物半導體(m〇s)電晶體被展示作 為切換元件Q之一範例^ MOS電晶體藉由具有非結晶石夕或 多晶石夕之通道層的薄膜電晶體(TFT)被實施。不同於第2 圖，共同電極270也可以被形成於下方面板1〇〇上，並且於 10此情況中，電極19〇和270也可以被形成於下方面板上而具 有線性形狀。 紅色、綠色和藍色之色彩濾波器2 3 0被形成於對應至像 素電極190的上方面板200上以引動色彩顯示器。如第2圓之 展示，雖然色彩濾波器230通常被形成於上方面板200之對 15應區域上’色彩濾波器230也可被形成於下方面板100上之 像素電極19〇的上方或下方區域。 再次參看第1圖，驅動電壓產生器700產生電壓，例如， 用以導通切換元件Q之閘導通電壓Von ’以及用以斷電切換 凡件Q之閘斷電電壓V〇ff。 20 如 灰階電壓產生器800產生多數個相關於LCD亮度之灰 階電壓。 閘驅動器400，稱為掃瞄驅動器，被連接到LC面板組 件300之閘線，龙且其補償驅動電壓產生器700之閘導通電 ^ V〇n且供應閘信號至閘線Gi-Gn。閘信號利用閘導通電壓 11 ϋ/7537 νοη和閘斷電電壓voff之組合而被形成。 貢料驅動器500，稱為源極驅動器，被連接到lc面板 組件300之資料線rvDm，並且其從灰階電壓產生器8〇〇而選 擇-灰1¾电壓且供應作為資料信號之_灰階電壓至資料線 5 Di-Dm ° 信號控制器600產生控制閘驅動器4〇〇、資料驅動器 500、以及驅動電壓產生器700之操作的控制信號，並且其 供應該等分別的對應控制信號至閘驅動器4〇〇、資料驅動器 500以及驅動電壓產生器7〇〇。 10 如第3圖之展示，一般而言，閘驅動器4〇〇具有多數個 閘驅動積體電路(IC)441-444並且資料驅動器5〇〇具有多數 個資料驅動1C 540。各1C可以相同於信號線G]_Gi^nDi_Dm 及薄膜電晶體Q之製造程序而被形成於LC面板組件300之 内部或外部上。 15 隨後，依據本發明一實施例之液晶顯示器（LCD)的結構 將詳細地被說明。 第3圖是依據本發明一實施例之液晶顯示器的概略佈 局圖示。 如第3圖之展示，印刷電路板(PCB)550被配置在包含閘 20 線G丨-Gn和資料線01-0„1之LC面板組件300上面。PCB 550具 有電路元件，例如’信號控制器600、驅動電壓產生器700 以及灰階電壓產生器800，用以操作LCD。LC面板組件300 經由彈性印刷電路(FPC)51〇而電氣地且實際地被連接到 PCB 550。 12 1377537 資料FPC S10具有資料驅動IC 54〇、多數個資料導線 440、以及多數個閘驅動信號接線通道521 524。因為資料 導線440經由導體C2被連接到資料驅動Ic 54〇以及資料線 DrDm之輸出端點，它們從資料驅動IC 54〇傳送像素作號炱 5資料線DrDm。為方便起見，僅四組閘驅動信號接線通道 521-524被展示於第3圖中，但實際上，閘驅動信號接線通 道數目是更多於五組。於本發明實施例中，信號線52ι傳送 一閘導通電壓，例如，信號線522傳送閘斷電電壓或閘時脈 信號，並且信號線523傳送垂直同步開始信號。而且信號線 10 524從信號控制器600而傳送序列資訊信號(sis)。 信號線52卜524，如同資料驅動IC 54〇，電氣地被連接 到PCB 550之電路元件。 四組閘驅動FPC 411-414被附於LC面板組件3〇〇之左 側，並且閘驅動1C 441 -444分別地被配置於閘驅動fpc 15 411-414上。多數個閘導線420和閘驅動信號接線通道421、 422、423a、423b、以及424被形成於閘FPC 411-414上。雖 然閘驅動信號接線通道421、422、423a、423b以及424之信 號線421、422及424經由分支信號線而被連接到閘驅動1C 441-444之輸入端點’信號線423a和423b之一端點被連接到 20 閘驅動1C 441-444。上方信號線423a被連接到閘驅動1C 441-444之輸入端點，並且下方信號線423b被連接到閘驅動 1C 441-444之輸出端點。為方便起見，僅五組閘驅動信號接 線通道421、422、423a、423b以及424被展示於第3圖中’ 但是閘線數目可以被改變。 13 '如第1圖之展Τ ’像素區域藉由相交列閘線Gi_Gn和行 貝料線DrDmffi]被形成。顯示器區域D包含表示影像之多數 像素區域目為黑色矩陣被形成在顯示區域d之外(如第3 圖之斜線表不），顯示區勒之光沒漏可以被防止。雖然於 5顯不區域D中閘線GrGn^資料線DrDm是大致地平行，當它 們成群地聚集於顯示區域之外時它們的距離逐漸地接 近。隨後它們再次地以較顯示區域D接近的距離而大致地平行。 閘驅動信號接線通道321a_321d、322a_322d、 323a-323d '以及324a-324d被形成於LC面板組件300之顯示 10區域D外面的左上方和左方邊緣上。被形成於左方上方邊緣 上之閘驅動信號接線通道321a、322a、323a，以及324a經 由接觸點C 4而電氣地被連接到資料f P C 510之閘驅動信號 接線通道521、522、523、524，並且利用接觸點C3而被連 接到最上方閘FPC 411之閘驅動信號接線通道421、422、 15 423a、以及424。其他的閘驅動信號接線通道321b-321d、 322b-322d、323b-323d、以及324a-324d被配置在閘線G]-Gn 的聚集部份之間。它們經由接觸點C5和C6而連.接閘FPC 411-414之閘驅動信號接線通道421、422、423a、423b，以 及424至相鄰閘FPC 411-414之閘驅動信號接線通道、 20 422、423a、423b、以及424。 同時，除了資料FPC 51 〇之外，不包含資料驅動1C 540 之FPC(不被展示於第3圖中）可以被附於pCB 以及LC面 板組件300。於這情況中，閘驅動信號接線通道521-524可 以被配置於FPC上。 14 1377537 第1圖是依據本發明一實施例之液晶顯示器的透視圖； 第2圖是依據本發明一實施例之液晶顯示器像素 效電路圖； 、等 第3圖是依據本發明一實施例之液晶顯示器的概略 5 局圖示； 第4圖是第3圖液晶顯示器之A部份的放大佈局圖； 第5圖是依據本發明一實施例之薄膜電晶體顯示器中 修補線和靜電散佈線之相交情況的佈局圖示 :以及 第6圖是沿著第5圖展示之線VI-VI，所取的薄膜二極體 10陣列面板之截面圖。 【主要元件符號說明】 3…LC層 400…閘驅動器 100…下方面板 440…資料導線 121…問線 441-444…閘驅動積體電路 140…閘絕緣層 411-414…閘驅動FPC 171···資料線 500…資料驅動器 190…像素電極 540…資料驅動1C 200…上方面板 550…PCB 230···色彩濾波器 600…信號控制器 270…共同電極 601…靜電散佈線 3〇〇…液晶(LC)面板組件 700…驅動電壓產生器 321a-321d，322a-322d，323a- 701，702，703…修補線 323d，324a-324d，421，422， 704…修補線連接桿 423a，423b，424，521-524... 800…灰階電壓產生器 閘驅動信號接線通道 801…接線樣型 19The upper gate line of Ren Qiaoxiang (hereinafter referred to as "the previous storage capacitor ncst is called split, _ type, and the latter type of storage can be connected to the previous brake line"). The former type of storage capacitor cst is called the previous gate type. 0 @时' The second diagram will outline the structure of the *LC panel assembly 300. For convenience, Figure 2 shows a pixel. As shown in Fig. 2, the LC panel assembly 300 has a lower panel, an upper panel facing the lower panel, and an LC layer 3 interposed between the two panels 1 and 200. The lower panel 100 has an open line ^, a data I5 line D", a switching element Q, and a storage capacitor Cst <> Ix: capacitor ο. There is an electrode, one electrode is a pixel electrode of the lower panel 1 且 and the other electrode is a common electrode 270 of the upper panel 200, and the LC layer 3 interposed between the two electrodes 丨叩 and 270 functions as a dielectric. The pixel electrode 190 is connected to the switching element q, and the common electrode 270 20 is integrally formed on the upper panel 200 and connected to the common voltage Vconi. Here, the arrangement of the LC molecules is changed in accordance with the electric field generated by the pixel electrode 190 and the common electrode 270, and correspondingly the polarization of the incident light in the LC layer 3 is changed. Since the polarization is attached to the film of panels 100 and 200 (not shown in Figure 2), this change in polarization results in a difference in the incident light transmission ratio of 1377537. Further, a group of independent voltages applied with a common voltage is formed on the lower panel 100. The storage electricity valley Cst is formed between the pixel electrode 〖go and the independent wiring. In the previous gate type, the pixel electrode 19 is overlapped with the previous gate 5 turns with an insulating layer interposed therebetween to form a storage capacitor. In Fig. 2, a metal-oxide semiconductor (m〇s) transistor is shown as an example of a switching element Q. A MOS transistor is provided by a thin film transistor having a channel layer of amorphous or polycrystalline (TFT) is implemented. Unlike the second drawing, the common electrode 270 can also be formed on the lower panel 1 ,, and in this case, the electrodes 19 〇 and 270 can also be formed on the lower panel to have a linear shape. Red, green, and blue color filters 203 are formed on the upper panel 200 corresponding to the pixel electrodes 190 to illuminate the color display. As shown in the second circle, although the color filter 230 is generally formed on the area of the upper panel 200, the color filter 230 may be formed on the upper or lower region of the pixel electrode 19A on the lower panel 100. Referring again to Fig. 1, the driving voltage generator 700 generates a voltage, for example, to turn on the gate-on voltage Von' of the switching element Q and to turn off the gate-off voltage V?ff of the device Q. 20, such as gray scale voltage generator 800, generates a plurality of gray scale voltages associated with LCD brightness. A gate driver 400, referred to as a scan driver, is coupled to the gate line of the LC panel assembly 300, which compensates for the gate of the drive voltage generator 700 to energize and supply the gate signal to the gate line Gi-Gn. The gate signal is formed by a combination of the gate-on voltage 11 ϋ/7537 νοη and the gate-off voltage voff. The tributary driver 500, referred to as the source driver, is connected to the data line rvDm of the lc panel assembly 300, and it selects the gray voltage from the gray scale voltage generator 8 且 and supplies the gray scale voltage as the data signal. The data line 5 Di-Dm ° signal controller 600 generates control signals for controlling the operation of the gate driver 4, the data driver 500, and the driving voltage generator 700, and supplies the respective corresponding control signals to the gate driver 4 〇〇, data driver 500 and drive voltage generator 7〇〇. 10 As shown in Fig. 3, in general, the gate driver 4 has a plurality of gate drive integrated circuits (IC) 441-444 and the data driver 5 has a plurality of data drivers 1C 540. Each 1C can be formed on the inside or the outside of the LC panel assembly 300 in the same manner as the manufacturing process of the signal lines G]_Gi^nDi_Dm and the thin film transistor Q. 15 Subsequently, the structure of a liquid crystal display (LCD) according to an embodiment of the present invention will be described in detail. Fig. 3 is a schematic layout view of a liquid crystal display according to an embodiment of the present invention. As shown in FIG. 3, a printed circuit board (PCB) 550 is disposed over the LC panel assembly 300 including the gate 20 line G丨-Gn and the data line 01-0'1. The PCB 550 has circuit components such as 'signal control The device 600, the driving voltage generator 700, and the grayscale voltage generator 800 are used to operate the LCD. The LC panel assembly 300 is electrically and practically connected to the PCB 550 via a flexible printed circuit (FPC) 51. 12 1377537 Data FPC S10 has a data driving IC 54A, a plurality of data wires 440, and a plurality of gate driving signal wiring channels 521 524. Since the data wires 440 are connected to the data driving Ic 54 〇 and the output terminals of the data lines DrDm via the conductor C2, they From the data drive IC 54 〇 transfer pixel number 炱 5 data line DrDm. For convenience, only four sets of gate drive signal wiring channels 521-524 are shown in Figure 3, but in fact, the number of gate drive signal wiring channels It is more than five groups. In the embodiment of the present invention, the signal line 521 transmits a gate conduction voltage, for example, the signal line 522 transmits a gate power-off voltage or a gate clock signal, and the signal line 523 transmits a vertical synchronization. The signal line 10 524 transmits a sequence information signal (sis) from the signal controller 600. The signal line 52 524, like the data drive IC 54, is electrically connected to the circuit components of the PCB 550. Four sets of gate drive FPC 411-414 is attached to the left side of the LC panel assembly 3, and gate drivers 1C 441 - 444 are respectively disposed on the gate drive fpc 15 411-414. A plurality of gate wires 420 and gate drive signal wiring channels 421, 422 423a, 423b, and 424 are formed on the gate FPC 411-414. Although the signal lines 421, 422, and 424 of the gate drive signal wiring paths 421, 422, 423a, 423b, and 424 are connected to the gate drive via the branch signal lines, The input terminal of 1C 441-444, one of the signal lines 423a and 423b, is connected to the 20 gate driver 1C 441-444. The upper signal line 423a is connected to the input terminal of the gate driver 1C 441-444, and the lower signal line 423b is connected to the output terminal of the gate drive 1C 441-444. For convenience, only five sets of gate drive signal wiring channels 421, 422, 423a, 423b, and 424 are shown in Figure 3, but the number of gate lines can be Was changed. 13 'As in Figure 1 Τ 'The pixel area is formed by the intersecting column gate line Gi_Gn and the row-beet line DrDmffi. The display area D contains a plurality of pixel areas representing the image, and the black matrix is formed outside the display area d (as shown in the oblique line of FIG. 3) The table does not show that the light in the display area can be prevented. Although the gate line GrGn^ data line DrDm is substantially parallel in the area 5 of the display area, their distances gradually approach when they are clustered outside the display area. They are then substantially parallel again at a distance closer to the display area D. Gate drive signal wiring passages 321a to 321d, 322a to 322d, 323a to 323d', and 324a to 324d are formed on the upper left and left edges outside the display 10 region D of the LC panel assembly 300. The gate drive signal wiring passages 321a, 322a, 323a, and 324a formed on the upper left edge are electrically connected to the gate drive signal wiring passages 521, 522, 523, 524 of the material f PC 510 via the contact point C 4 . And is connected to the gate drive signal wiring channels 421, 422, 15 423a, and 424 of the uppermost gate FPC 411 by the contact point C3. The other gate drive signal wiring channels 321b-321d, 322b-322d, 323b-323d, and 324a-324d are disposed between the gathered portions of the gate lines G]-Gn. They are connected via contact points C5 and C6. The gate drive signal wiring channels 421, 422, 423a, 423b, and 424 of the gate FPC 411-414 are connected to the gate drive signal wiring channels of the adjacent gate FPC 411-414, 20 422, 423a, 423b, and 424. Meanwhile, in addition to the data FPC 51 F, an FPC (not shown in Fig. 3) not including the data drive 1C 540 can be attached to the pCB and the LC panel assembly 300. In this case, the gate drive signal wiring paths 521-524 can be configured on the FPC. 14 1377537 1 is a perspective view of a liquid crystal display according to an embodiment of the present invention; FIG. 2 is a circuit diagram of a pixel effect of a liquid crystal display according to an embodiment of the present invention; and FIG. 3 is a liquid crystal according to an embodiment of the present invention; 5 is a schematic diagram of a display of the display; FIG. 4 is an enlarged layout view of a portion A of the liquid crystal display of FIG. 3; FIG. 5 is an intersection of a repaired line and an electrostatic discharge wiring of the thin film transistor display according to an embodiment of the present invention; A layout illustration of the situation: and Figure 6 is a cross-sectional view of the array of thin film diode 10 arrays taken along line VI-VI shown in Figure 5. [Main component symbol description] 3...LC layer 400...gate driver 100...lower panel 440...data wire 121...interval 441-444...gate drive integrated circuit 140...gate insulating layer 411-414...gate drive FPC 171·· Data line 500...data driver 190...pixel electrode 540...data drive 1C 200...upper panel 550...PCB 230··color filter 600...signal controller 270...common electrode 601...electrostatic discharge wiring 3〇〇...liquid crystal ( LC) panel assembly 700... drive voltage generators 321a-321d, 322a-322d, 323a-701, 702, 703... repair lines 323d, 324a-324d, 421, 422, 704... repair line connecting rods 423a, 423b, 424, 521-524... 800... gray scale voltage generator gate drive signal wiring channel 801... wiring type 19