TWI373101B - Method for fabricating self-aligned recess gate trench - Google Patents
Method for fabricating self-aligned recess gate trenchInfo
- Publication number
- TWI373101B TWI373101B TW096139023A TW96139023A TWI373101B TW I373101 B TWI373101 B TW I373101B TW 096139023 A TW096139023 A TW 096139023A TW 96139023 A TW96139023 A TW 96139023A TW I373101 B TWI373101 B TW I373101B
- Authority
- TW
- Taiwan
- Prior art keywords
- gate trench
- recess gate
- aligned recess
- fabricating self
- fabricating
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
- H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0385—Making a connection between the transistor and the capacitor, e.g. buried strap
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096139023A TWI373101B (en) | 2007-10-18 | 2007-10-18 | Method for fabricating self-aligned recess gate trench |
US12/049,383 US20090104748A1 (en) | 2007-10-18 | 2008-03-17 | Method for fabricating self-aligned recess gate trench |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096139023A TWI373101B (en) | 2007-10-18 | 2007-10-18 | Method for fabricating self-aligned recess gate trench |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200919643A TW200919643A (en) | 2009-05-01 |
TWI373101B true TWI373101B (en) | 2012-09-21 |
Family
ID=40563892
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096139023A TWI373101B (en) | 2007-10-18 | 2007-10-18 | Method for fabricating self-aligned recess gate trench |
Country Status (2)
Country | Link |
---|---|
US (1) | US20090104748A1 (zh) |
TW (1) | TWI373101B (zh) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6734485B2 (en) * | 2002-09-09 | 2004-05-11 | Ching-Yuan Wu | Vertical DRAM cell structure and its contactless DRAM arrays |
TWI297183B (en) * | 2006-03-23 | 2008-05-21 | Nanya Technology Corp | Method for fabricating recessed gate mos transistor device |
TWI323498B (en) * | 2006-04-20 | 2010-04-11 | Nanya Technology Corp | Recessed gate mos transistor device and method of making the same |
-
2007
- 2007-10-18 TW TW096139023A patent/TWI373101B/zh active
-
2008
- 2008-03-17 US US12/049,383 patent/US20090104748A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20090104748A1 (en) | 2009-04-23 |
TW200919643A (en) | 2009-05-01 |
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