TWI368877B - Hardware sharing system and method - Google Patents

Hardware sharing system and method

Info

Publication number
TWI368877B
TWI368877B TW096115611A TW96115611A TWI368877B TW I368877 B TWI368877 B TW I368877B TW 096115611 A TW096115611 A TW 096115611A TW 96115611 A TW96115611 A TW 96115611A TW I368877 B TWI368877 B TW I368877B
Authority
TW
Taiwan
Prior art keywords
sharing system
hardware sharing
hardware
sharing
Prior art date
Application number
TW096115611A
Other languages
English (en)
Other versions
TW200820083A (en
Inventor
Gokhan Avkarogullari
Steven L Petersen
Original Assignee
Nvidia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nvidia Corp filed Critical Nvidia Corp
Publication of TW200820083A publication Critical patent/TW200820083A/zh
Application granted granted Critical
Publication of TWI368877B publication Critical patent/TWI368877B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Multi Processors (AREA)
TW096115611A 2006-05-06 2007-05-02 Hardware sharing system and method TWI368877B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/382,025 US8726279B2 (en) 2006-05-06 2006-05-06 System for multi threaded multi processor sharing of asynchronous hardware units

Publications (2)

Publication Number Publication Date
TW200820083A TW200820083A (en) 2008-05-01
TWI368877B true TWI368877B (en) 2012-07-21

Family

ID=38662609

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096115611A TWI368877B (en) 2006-05-06 2007-05-02 Hardware sharing system and method

Country Status (4)

Country Link
US (1) US8726279B2 (zh)
KR (1) KR100902977B1 (zh)
CN (1) CN101078996B (zh)
TW (1) TWI368877B (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8966494B2 (en) * 2012-03-16 2015-02-24 Arm Limited Apparatus and method for processing threads requiring resources
CN103377086A (zh) * 2012-04-27 2013-10-30 华为技术有限公司 用于异步多核系统操作共享资源的方法、装置及系统
JP6070150B2 (ja) * 2012-12-14 2017-02-01 富士通株式会社 情報処理装置、情報処理装置の制御方法及び情報処理装置の制御プログラム
CN104102547B (zh) * 2014-07-25 2017-12-26 珠海全志科技股份有限公司 多处理器系统的同步方法及其同步装置
US9898348B2 (en) 2014-10-22 2018-02-20 International Business Machines Corporation Resource mapping in multi-threaded central processor units
CN106649189B (zh) * 2015-10-28 2021-04-09 中兴通讯股份有限公司 一种多核系统中硬件资源管理的方法及相应的多核系统
TWI546779B (zh) 2015-11-06 2016-08-21 財團法人工業技術研究院 串流資料的編碼排程方法、裝置與電腦可讀取媒體
CN106874125B (zh) * 2017-01-13 2021-04-06 北京元心科技有限公司 多容器系统间共享系统资源的方法及装置
US10719464B1 (en) * 2019-05-01 2020-07-21 Xilinx, Inc. Lock circuit for competing kernels in a hardware accelerator
CN114327920B (zh) * 2022-03-16 2022-06-21 长沙金维信息技术有限公司 用于多处理器系统的硬件资源共享方法

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US5285528A (en) * 1991-02-22 1994-02-08 International Business Machines Corporation Data structures and algorithms for managing lock states of addressable element ranges
US5444853A (en) 1992-03-31 1995-08-22 Seiko Epson Corporation System and method for transferring data between a plurality of virtual FIFO's and a peripheral via a hardware FIFO and selectively updating control information associated with the virtual FIFO's
US5408629A (en) * 1992-08-13 1995-04-18 Unisys Corporation Apparatus and method for controlling exclusive access to portions of addressable memory in a multiprocessor system
US5437042A (en) 1992-10-02 1995-07-25 Compaq Computer Corporation Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system
US5550965A (en) 1993-12-27 1996-08-27 Lucent Technologies Inc. Method and system for operating a data processor to index primary data in real time with iconic table of contents
US5613139A (en) * 1994-05-11 1997-03-18 International Business Machines Corporation Hardware implemented locking mechanism for handling both single and plural lock requests in a lock message
KR970002689B1 (en) 1994-06-30 1997-03-08 Hyundai Electronics Ind Cdma
JPH11513150A (ja) 1995-06-15 1999-11-09 インテル・コーポレーション Ｐｃｉ間ブリッジを統合する入出力プロセッサ用アーキテクチャ
US5678026A (en) * 1995-12-28 1997-10-14 Unisys Corporation Multi-processor data processing system with control for granting multiple storage locks in parallel and parallel lock priority and second level cache priority queues
US6598068B1 (en) * 1996-01-04 2003-07-22 Sun Microsystems, Inc. Method and apparatus for automatically managing concurrent access to a shared resource in a multi-threaded programming environment
US6122699A (en) 1996-06-03 2000-09-19 Canon Kabushiki Kaisha Data processing apparatus with bus intervention means for controlling interconnection of plural busses
US6263425B1 (en) * 1997-07-08 2001-07-17 National Semiconductor Corporation Circuit that implements semaphores in a multiprocessor environment without reliance on atomic test and set operations of the processor cores
US6105085A (en) * 1997-12-26 2000-08-15 Emc Corporation Lock mechanism for shared resources having associated data structure stored in common memory include a lock portion and a reserve portion
US6112222A (en) 1998-08-25 2000-08-29 International Business Machines Corporation Method for resource lock/unlock capability in multithreaded computer environment
US6105049A (en) * 1998-08-25 2000-08-15 International Business Machines Corporation Resource lock/unlock capability in multithreaded computer environment
US7257814B1 (en) * 1998-12-16 2007-08-14 Mips Technologies, Inc. Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors
US6412028B1 (en) 1999-04-06 2002-06-25 National Instruments Corporation Optimizing serial USB device transfers using virtual DMA techniques to emulate a direct memory access controller in software
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JP2001256065A (ja) 2000-03-14 2001-09-21 Hitachi Ltd 排他制御方法及び計算機システム
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US6782440B2 (en) * 2000-07-26 2004-08-24 T.N.S. Holdings, Inc. Resource locking and thread synchronization in a multiprocessor environment
US7159220B2 (en) * 2001-09-28 2007-01-02 Intel Corporation Flexible acceleration of java thread synchronization on multiprocessor computers
US7174552B2 (en) 2002-01-12 2007-02-06 Intel Corporation Method of accessing a resource by a process based on a semaphore of another process
US20050071841A1 (en) * 2003-09-30 2005-03-31 Hoflehner Gerolf F. Methods and apparatuses for thread management of mult-threading
US9274859B2 (en) * 2006-05-25 2016-03-01 Nvidia Corporation Multi processor and multi thread safe message queue with hardware assistance
US8321872B2 (en) * 2006-06-28 2012-11-27 Nvidia Corporation Reusable, operating system aware hardware mutex
US8468169B2 (en) * 2010-12-01 2013-06-18 Microsoft Corporation Hierarchical software locking

Also Published As

Publication number Publication date
KR20070108329A (ko) 2007-11-09
KR100902977B1 (ko) 2009-06-15
CN101078996A (zh) 2007-11-28
TW200820083A (en) 2008-05-01
US20070261053A1 (en) 2007-11-08
US8726279B2 (en) 2014-05-13
CN101078996B (zh) 2011-05-04

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