TWI366346B - Method for reading and writing a block interleaver and the reading circuit thereof - Google Patents

Method for reading and writing a block interleaver and the reading circuit thereof

Info

Publication number
TWI366346B
TWI366346B TW097142446A TW97142446A TWI366346B TW I366346 B TWI366346 B TW I366346B TW 097142446 A TW097142446 A TW 097142446A TW 97142446 A TW97142446 A TW 97142446A TW I366346 B TWI366346 B TW I366346B
Authority
TW
Taiwan
Prior art keywords
reading
writing
block interleaver
circuit
reading circuit
Prior art date
Application number
TW097142446A
Other languages
English (en)
Other versions
TW201019612A (en
Inventor
Shih Yi Yeh
Original Assignee
Ralink Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ralink Technology Corp filed Critical Ralink Technology Corp
Priority to TW097142446A priority Critical patent/TWI366346B/zh
Priority to US12/498,981 priority patent/US8139428B2/en
Publication of TW201019612A publication Critical patent/TW201019612A/zh
Application granted granted Critical
Publication of TWI366346B publication Critical patent/TWI366346B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1042—Read-write modes for single port memories, i.e. having either a random port or a serial port using interleaving techniques, i.e. read-write of one part of the memory while preparing another part
TW097142446A 2008-11-04 2008-11-04 Method for reading and writing a block interleaver and the reading circuit thereof TWI366346B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW097142446A TWI366346B (en) 2008-11-04 2008-11-04 Method for reading and writing a block interleaver and the reading circuit thereof
US12/498,981 US8139428B2 (en) 2008-11-04 2009-07-07 Method for reading and writing a block interleaver and the reading circuit thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW097142446A TWI366346B (en) 2008-11-04 2008-11-04 Method for reading and writing a block interleaver and the reading circuit thereof

Publications (2)

Publication Number Publication Date
TW201019612A TW201019612A (en) 2010-05-16
TWI366346B true TWI366346B (en) 2012-06-11

Family

ID=42131214

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097142446A TWI366346B (en) 2008-11-04 2008-11-04 Method for reading and writing a block interleaver and the reading circuit thereof

Country Status (2)

Country Link
US (1) US8139428B2 (zh)
TW (1) TWI366346B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9271241B2 (en) 2013-11-19 2016-02-23 Intel IP Corporation Access point and methods for distinguishing HEW physical layer packets with backwards compatibility
US9544914B2 (en) 2013-11-19 2017-01-10 Intel IP Corporation Master station and method for HEW communication using a transmission signaling structure for a HEW signal field
US9900906B2 (en) 2013-11-19 2018-02-20 Intel IP Corporation Method, apparatus, and computer readable medium for multi-user scheduling in wireless local-area networks
US9325463B2 (en) 2013-11-19 2016-04-26 Intel IP Corporation High-efficiency WLAN (HEW) master station and methods to increase information bits for HEW communication

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1170871A4 (en) * 1999-03-15 2004-04-28 Matsushita Electric Ind Co Ltd METHOD AND DEVICE FOR BLOCK NESTLING AND UNLEASTERING
US6981175B2 (en) * 2001-09-28 2005-12-27 Infineon Technologies Ag Memory and method for employing a checksum for addresses of replaced storage elements
US7600163B2 (en) 2003-09-23 2009-10-06 Realtek Semiconductor Corp. Convolutional interleaver and deinterleaver

Also Published As

Publication number Publication date
TW201019612A (en) 2010-05-16
US20100110804A1 (en) 2010-05-06
US8139428B2 (en) 2012-03-20

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees